9p: implement optional loose read cache
[pandora-kernel.git] / include / asm-arm / arch-at91 / hardware.h
1 /*
2  * include/asm-arm/arch-at91/hardware.h
3  *
4  *  Copyright (C) 2003 SAN People
5  *  Copyright (C) 2003 ATMEL
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  */
13
14 #ifndef __ASM_ARCH_HARDWARE_H
15 #define __ASM_ARCH_HARDWARE_H
16
17 #include <asm/sizes.h>
18
19 #if defined(CONFIG_ARCH_AT91RM9200)
20 #include <asm/arch/at91rm9200.h>
21 #elif defined(CONFIG_ARCH_AT91SAM9260)
22 #include <asm/arch/at91sam9260.h>
23 #elif defined(CONFIG_ARCH_AT91SAM9261)
24 #include <asm/arch/at91sam9261.h>
25 #elif defined(CONFIG_ARCH_AT91SAM9263)
26 #include <asm/arch/at91sam9263.h>
27 #else
28 #error "Unsupported AT91 processor"
29 #endif
30
31
32 /*
33  * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
34  * to 0xFEF78000 .. 0xFF000000.  (5444Kb)
35  */
36 #define AT91_IO_PHYS_BASE       0xFFF78000
37 #define AT91_IO_SIZE            (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
38 #define AT91_IO_VIRT_BASE       (0xFF000000 - AT91_IO_SIZE)
39
40  /* Convert a physical IO address to virtual IO address */
41 #define AT91_IO_P2V(x)          ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
42
43 /*
44  * Virtual to Physical Address mapping for IO devices.
45  */
46 #define AT91_VA_BASE_SYS        AT91_IO_P2V(AT91_BASE_SYS)
47 #define AT91_VA_BASE_EMAC       AT91_IO_P2V(AT91RM9200_BASE_EMAC)
48
49  /* Internal SRAM is mapped below the IO devices */
50 #define AT91_SRAM_MAX           SZ_1M
51 #define AT91_VIRT_BASE          (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
52
53 /* Serial ports */
54 #define ATMEL_MAX_UART          7               /* 6 USART3's and one DBGU port (SAM9260) */
55
56 /* External Memory Map */
57 #define AT91_CHIPSELECT_0       0x10000000
58 #define AT91_CHIPSELECT_1       0x20000000
59 #define AT91_CHIPSELECT_2       0x30000000
60 #define AT91_CHIPSELECT_3       0x40000000
61 #define AT91_CHIPSELECT_4       0x50000000
62 #define AT91_CHIPSELECT_5       0x60000000
63 #define AT91_CHIPSELECT_6       0x70000000
64 #define AT91_CHIPSELECT_7       0x80000000
65
66 /* SDRAM */
67 #define AT91_SDRAM_BASE         AT91_CHIPSELECT_1
68
69 /* Clocks */
70 #define AT91_SLOW_CLOCK         32768           /* slow clock */
71
72 #ifndef __ASSEMBLY__
73 #include <asm/io.h>
74
75 static inline unsigned int at91_sys_read(unsigned int reg_offset)
76 {
77         void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
78
79         return __raw_readl(addr + reg_offset);
80 }
81
82 static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
83 {
84         void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
85
86         __raw_writel(value, addr + reg_offset);
87 }
88 #endif
89
90 #endif