drivers/watchdog/hpwdt.c

   1 /*
   2  *      HP WatchDog Driver
   3  *      based on
   4  *
   5  *      SoftDog 0.05:   A Software Watchdog Device
   6  *
   7  *      (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
   8  *      Thomas Mingarelli <thomas.mingarelli@hp.com>
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      version 2 as published by the Free Software Foundation
  13  *
  14  */
  15
  16 #include <linux/device.h>
  17 #include <linux/fs.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/bitops.h>
  21 #include <linux/kernel.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci_ids.h>
  27 #include <linux/types.h>
  28 #include <linux/uaccess.h>
  29 #include <linux/watchdog.h>
  30 #ifdef CONFIG_HPWDT_NMI_DECODING
  31 #include <linux/dmi.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/nmi.h>
  34 #include <linux/kdebug.h>
  35 #include <linux/notifier.h>
  36 #include <asm/cacheflush.h>
  37 #endif /* CONFIG_HPWDT_NMI_DECODING */
  38
  39 #define HPWDT_VERSION                   "1.3.0"
  40 #define SECS_TO_TICKS(secs)             ((secs) * 1000 / 128)
  41 #define TICKS_TO_SECS(ticks)            ((ticks) * 128 / 1000)
  42 #define HPWDT_MAX_TIMER                 TICKS_TO_SECS(65535)
  43 #define DEFAULT_MARGIN                  30
  44
  45 static unsigned int soft_margin = DEFAULT_MARGIN;       /* in seconds */
  46 static unsigned int reload;                     /* the computed soft_margin */
  47 static int nowayout = WATCHDOG_NOWAYOUT;
  48 static char expect_release;
  49 static unsigned long hpwdt_is_open;
  50
  51 static void __iomem *pci_mem_addr;              /* the PCI-memory address */
  52 static unsigned long __iomem *hpwdt_timer_reg;
  53 static unsigned long __iomem *hpwdt_timer_con;
  54
  55 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = {
  56         { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },   /* iLO2 */
  57         { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },       /* iLO3 */
  58         {0},                    /* terminate list */
  59 };
  60 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  61
  62 #ifdef CONFIG_HPWDT_NMI_DECODING
  63 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
  64 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
  65 #define PCI_BIOS32_PARAGRAPH_LEN        16
  66 #define PCI_ROM_BASE1                   0x000F0000
  67 #define ROM_SIZE                        0x10000
  68
  69 struct bios32_service_dir {
  70         u32 signature;
  71         u32 entry_point;
  72         u8 revision;
  73         u8 length;
  74         u8 checksum;
  75         u8 reserved[5];
  76 };
  77
  78 /* type 212 */
  79 struct smbios_cru64_info {
  80         u8 type;
  81         u8 byte_length;
  82         u16 handle;
  83         u32 signature;
  84         u64 physical_address;
  85         u32 double_length;
  86         u32 double_offset;
  87 };
  88 #define SMBIOS_CRU64_INFORMATION        212
  89
  90 /* type 219 */
  91 struct smbios_proliant_info {
  92         u8 type;
  93         u8 byte_length;
  94         u16 handle;
  95         u32 power_features;
  96         u32 omega_features;
  97         u32 reserved;
  98         u32 misc_features;
  99 };
 100 #define SMBIOS_ICRU_INFORMATION         219
 101
 102
 103 struct cmn_registers {
 104         union {
 105                 struct {
 106                         u8 ral;
 107                         u8 rah;
 108                         u16 rea2;
 109                 };
 110                 u32 reax;
 111         } u1;
 112         union {
 113                 struct {
 114                         u8 rbl;
 115                         u8 rbh;
 116                         u8 reb2l;
 117                         u8 reb2h;
 118                 };
 119                 u32 rebx;
 120         } u2;
 121         union {
 122                 struct {
 123                         u8 rcl;
 124                         u8 rch;
 125                         u16 rec2;
 126                 };
 127                 u32 recx;
 128         } u3;
 129         union {
 130                 struct {
 131                         u8 rdl;
 132                         u8 rdh;
 133                         u16 red2;
 134                 };
 135                 u32 redx;
 136         } u4;
 137
 138         u32 resi;
 139         u32 redi;
 140         u16 rds;
 141         u16 res;
 142         u32 reflags;
 143 }  __attribute__((packed));
 144
 145 static unsigned int hpwdt_nmi_decoding;
 146 static unsigned int allow_kdump;
 147 static unsigned int priority;           /* hpwdt at end of die_notify list */
 148 static unsigned int is_icru;
 149 static DEFINE_SPINLOCK(rom_lock);
 150 static void *cru_rom_addr;
 151 static struct cmn_registers cmn_regs;
 152
 153 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
 154                                                 unsigned long *pRomEntry);
 155
 156 #ifdef CONFIG_X86_32
 157 /* --32 Bit Bios------------------------------------------------------------ */
 158
 159 #define HPWDT_ARCH      32
 160
 161 asm(".text                          \n\t"
 162     ".align 4                       \n"
 163     "asminline_call:                \n\t"
 164     "pushl       %ebp               \n\t"
 165     "movl        %esp, %ebp         \n\t"
 166     "pusha                          \n\t"
 167     "pushf                          \n\t"
 168     "push        %es                \n\t"
 169     "push        %ds                \n\t"
 170     "pop         %es                \n\t"
 171     "movl        8(%ebp),%eax       \n\t"
 172     "movl        4(%eax),%ebx       \n\t"
 173     "movl        8(%eax),%ecx       \n\t"
 174     "movl        12(%eax),%edx      \n\t"
 175     "movl        16(%eax),%esi      \n\t"
 176     "movl        20(%eax),%edi      \n\t"
 177     "movl        (%eax),%eax        \n\t"
 178     "push        %cs                \n\t"
 179     "call        *12(%ebp)          \n\t"
 180     "pushf                          \n\t"
 181     "pushl       %eax               \n\t"
 182     "movl        8(%ebp),%eax       \n\t"
 183     "movl        %ebx,4(%eax)       \n\t"
 184     "movl        %ecx,8(%eax)       \n\t"
 185     "movl        %edx,12(%eax)      \n\t"
 186     "movl        %esi,16(%eax)      \n\t"
 187     "movl        %edi,20(%eax)      \n\t"
 188     "movw        %ds,24(%eax)       \n\t"
 189     "movw        %es,26(%eax)       \n\t"
 190     "popl        %ebx               \n\t"
 191     "movl        %ebx,(%eax)        \n\t"
 192     "popl        %ebx               \n\t"
 193     "movl        %ebx,28(%eax)      \n\t"
 194     "pop         %es                \n\t"
 195     "popf                           \n\t"
 196     "popa                           \n\t"
 197     "leave                          \n\t"
 198     "ret                            \n\t"
 199     ".previous");
 200
 201
 202 /*
 203  *      cru_detect
 204  *
 205  *      Routine Description:
 206  *      This function uses the 32-bit BIOS Service Directory record to
 207  *      search for a $CRU record.
 208  *
 209  *      Return Value:
 210  *      0        :  SUCCESS
 211  *      <0       :  FAILURE
 212  */
 213 static int __devinit cru_detect(unsigned long map_entry,
 214         unsigned long map_offset)
 215 {
 216         void *bios32_map;
 217         unsigned long *bios32_entrypoint;
 218         unsigned long cru_physical_address;
 219         unsigned long cru_length;
 220         unsigned long physical_bios_base = 0;
 221         unsigned long physical_bios_offset = 0;
 222         int retval = -ENODEV;
 223
 224         bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
 225
 226         if (bios32_map == NULL)
 227                 return -ENODEV;
 228
 229         bios32_entrypoint = bios32_map + map_offset;
 230
 231         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 232
 233         asminline_call(&cmn_regs, bios32_entrypoint);
 234
 235         if (cmn_regs.u1.ral != 0) {
 236                 printk(KERN_WARNING
 237                         "hpwdt: Call succeeded but with an error: 0x%x\n",
 238                         cmn_regs.u1.ral);
 239         } else {
 240                 physical_bios_base = cmn_regs.u2.rebx;
 241                 physical_bios_offset = cmn_regs.u4.redx;
 242                 cru_length = cmn_regs.u3.recx;
 243                 cru_physical_address =
 244                         physical_bios_base + physical_bios_offset;
 245
 246                 /* If the values look OK, then map it in. */
 247                 if ((physical_bios_base + physical_bios_offset)) {
 248                         cru_rom_addr =
 249                                 ioremap(cru_physical_address, cru_length);
 250                         if (cru_rom_addr)
 251                                 retval = 0;
 252                 }
 253
 254                 printk(KERN_DEBUG "hpwdt: CRU Base Address:   0x%lx\n",
 255                         physical_bios_base);
 256                 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
 257                         physical_bios_offset);
 258                 printk(KERN_DEBUG "hpwdt: CRU Length:         0x%lx\n",
 259                         cru_length);
 260                 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
 261                         &cru_rom_addr);
 262         }
 263         iounmap(bios32_map);
 264         return retval;
 265 }
 266
 267 /*
 268  *      bios_checksum
 269  */
 270 static int __devinit bios_checksum(const char __iomem *ptr, int len)
 271 {
 272         char sum = 0;
 273         int i;
 274
 275         /*
 276          * calculate checksum of size bytes. This should add up
 277          * to zero if we have a valid header.
 278          */
 279         for (i = 0; i < len; i++)
 280                 sum += ptr[i];
 281
 282         return ((sum == 0) && (len > 0));
 283 }
 284
 285 /*
 286  *      bios32_present
 287  *
 288  *      Routine Description:
 289  *      This function finds the 32-bit BIOS Service Directory
 290  *
 291  *      Return Value:
 292  *      0        :  SUCCESS
 293  *      <0       :  FAILURE
 294  */
 295 static int __devinit bios32_present(const char __iomem *p)
 296 {
 297         struct bios32_service_dir *bios_32_ptr;
 298         int length;
 299         unsigned long map_entry, map_offset;
 300
 301         bios_32_ptr = (struct bios32_service_dir *) p;
 302
 303         /*
 304          * Search for signature by checking equal to the swizzled value
 305          * instead of calling another routine to perform a strcmp.
 306          */
 307         if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
 308                 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
 309                 if (bios_checksum(p, length)) {
 310                         /*
 311                          * According to the spec, we're looking for the
 312                          * first 4KB-aligned address below the entrypoint
 313                          * listed in the header. The Service Directory code
 314                          * is guaranteed to occupy no more than 2 4KB pages.
 315                          */
 316                         map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
 317                         map_offset = bios_32_ptr->entry_point - map_entry;
 318
 319                         return cru_detect(map_entry, map_offset);
 320                 }
 321         }
 322         return -ENODEV;
 323 }
 324
 325 static int __devinit detect_cru_service(void)
 326 {
 327         char __iomem *p, *q;
 328         int rc = -1;
 329
 330         /*
 331          * Search from 0x0f0000 through 0x0fffff, inclusive.
 332          */
 333         p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
 334         if (p == NULL)
 335                 return -ENOMEM;
 336
 337         for (q = p; q < p + ROM_SIZE; q += 16) {
 338                 rc = bios32_present(q);
 339                 if (!rc)
 340                         break;
 341         }
 342         iounmap(p);
 343         return rc;
 344 }
 345 /* ------------------------------------------------------------------------- */
 346 #endif /* CONFIG_X86_32 */
 347 #ifdef CONFIG_X86_64
 348 /* --64 Bit Bios------------------------------------------------------------ */
 349
 350 #define HPWDT_ARCH      64
 351
 352 asm(".text                      \n\t"
 353     ".align 4                   \n"
 354     "asminline_call:            \n\t"
 355     "pushq      %rbp            \n\t"
 356     "movq       %rsp, %rbp      \n\t"
 357     "pushq      %rax            \n\t"
 358     "pushq      %rbx            \n\t"
 359     "pushq      %rdx            \n\t"
 360     "pushq      %r12            \n\t"
 361     "pushq      %r9             \n\t"
 362     "movq       %rsi, %r12      \n\t"
 363     "movq       %rdi, %r9       \n\t"
 364     "movl       4(%r9),%ebx     \n\t"
 365     "movl       8(%r9),%ecx     \n\t"
 366     "movl       12(%r9),%edx    \n\t"
 367     "movl       16(%r9),%esi    \n\t"
 368     "movl       20(%r9),%edi    \n\t"
 369     "movl       (%r9),%eax      \n\t"
 370     "call       *%r12           \n\t"
 371     "pushfq                     \n\t"
 372     "popq        %r12           \n\t"
 373     "movl       %eax, (%r9)     \n\t"
 374     "movl       %ebx, 4(%r9)    \n\t"
 375     "movl       %ecx, 8(%r9)    \n\t"
 376     "movl       %edx, 12(%r9)   \n\t"
 377     "movl       %esi, 16(%r9)   \n\t"
 378     "movl       %edi, 20(%r9)   \n\t"
 379     "movq       %r12, %rax      \n\t"
 380     "movl       %eax, 28(%r9)   \n\t"
 381     "popq       %r9             \n\t"
 382     "popq       %r12            \n\t"
 383     "popq       %rdx            \n\t"
 384     "popq       %rbx            \n\t"
 385     "popq       %rax            \n\t"
 386     "leave                      \n\t"
 387     "ret                        \n\t"
 388     ".previous");
 389
 390 /*
 391  *      dmi_find_cru
 392  *
 393  *      Routine Description:
 394  *      This function checks whether or not a SMBIOS/DMI record is
 395  *      the 64bit CRU info or not
 396  */
 397 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
 398 {
 399         struct smbios_cru64_info *smbios_cru64_ptr;
 400         unsigned long cru_physical_address;
 401
 402         if (dm->type == SMBIOS_CRU64_INFORMATION) {
 403                 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
 404                 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
 405                         cru_physical_address =
 406                                 smbios_cru64_ptr->physical_address +
 407                                 smbios_cru64_ptr->double_offset;
 408                         cru_rom_addr = ioremap(cru_physical_address,
 409                                 smbios_cru64_ptr->double_length);
 410                         set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 411                                 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
 412                 }
 413         }
 414 }
 415
 416 static int __devinit detect_cru_service(void)
 417 {
 418         cru_rom_addr = NULL;
 419
 420         dmi_walk(dmi_find_cru, NULL);
 421
 422         /* if cru_rom_addr has been set then we found a CRU service */
 423         return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
 424 }
 425 /* ------------------------------------------------------------------------- */
 426 #endif /* CONFIG_X86_64 */
 427 #endif /* CONFIG_HPWDT_NMI_DECODING */
 428
 429 /*
 430  *      Watchdog operations
 431  */
 432 static void hpwdt_start(void)
 433 {
 434         reload = SECS_TO_TICKS(soft_margin);
 435         iowrite16(reload, hpwdt_timer_reg);
 436         iowrite16(0x85, hpwdt_timer_con);
 437 }
 438
 439 static void hpwdt_stop(void)
 440 {
 441         unsigned long data;
 442
 443         data = ioread16(hpwdt_timer_con);
 444         data &= 0xFE;
 445         iowrite16(data, hpwdt_timer_con);
 446 }
 447
 448 static void hpwdt_ping(void)
 449 {
 450         iowrite16(reload, hpwdt_timer_reg);
 451 }
 452
 453 static int hpwdt_change_timer(int new_margin)
 454 {
 455         if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
 456                 printk(KERN_WARNING
 457                         "hpwdt: New value passed in is invalid: %d seconds.\n",
 458                         new_margin);
 459                 return -EINVAL;
 460         }
 461
 462         soft_margin = new_margin;
 463         printk(KERN_DEBUG
 464                 "hpwdt: New timer passed in is %d seconds.\n",
 465                 new_margin);
 466         reload = SECS_TO_TICKS(soft_margin);
 467
 468         return 0;
 469 }
 470
 471 static int hpwdt_time_left(void)
 472 {
 473         return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 474 }
 475
 476 #ifdef CONFIG_HPWDT_NMI_DECODING
 477 /*
 478  *      NMI Handler
 479  */
 480 static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
 481                                 void *data)
 482 {
 483         unsigned long rom_pl;
 484         static int die_nmi_called;
 485
 486         if (ulReason != DIE_NMIUNKNOWN)
 487                 goto out;
 488
 489         if (!hpwdt_nmi_decoding)
 490                 goto out;
 491
 492         spin_lock_irqsave(&rom_lock, rom_pl);
 493         if (!die_nmi_called && !is_icru)
 494                 asminline_call(&cmn_regs, cru_rom_addr);
 495         die_nmi_called = 1;
 496         spin_unlock_irqrestore(&rom_lock, rom_pl);
 497
 498         if (allow_kdump)
 499                 hpwdt_stop();
 500
 501         if (!is_icru) {
 502                 if (cmn_regs.u1.ral == 0) {
 503                         panic("An NMI occurred, "
 504                                 "but unable to determine source.\n");
 505                 }
 506         }
 507         panic("An NMI occurred, please see the Integrated "
 508                 "Management Log for details.\n");
 509
 510 out:
 511         return NOTIFY_OK;
 512 }
 513 #endif /* CONFIG_HPWDT_NMI_DECODING */
 514
 515 /*
 516  *      /dev/watchdog handling
 517  */
 518 static int hpwdt_open(struct inode *inode, struct file *file)
 519 {
 520         /* /dev/watchdog can only be opened once */
 521         if (test_and_set_bit(0, &hpwdt_is_open))
 522                 return -EBUSY;
 523
 524         /* Start the watchdog */
 525         hpwdt_start();
 526         hpwdt_ping();
 527
 528         return nonseekable_open(inode, file);
 529 }
 530
 531 static int hpwdt_release(struct inode *inode, struct file *file)
 532 {
 533         /* Stop the watchdog */
 534         if (expect_release == 42) {
 535                 hpwdt_stop();
 536         } else {
 537                 printk(KERN_CRIT
 538                         "hpwdt: Unexpected close, not stopping watchdog!\n");
 539                 hpwdt_ping();
 540         }
 541
 542         expect_release = 0;
 543
 544         /* /dev/watchdog is being closed, make sure it can be re-opened */
 545         clear_bit(0, &hpwdt_is_open);
 546
 547         return 0;
 548 }
 549
 550 static ssize_t hpwdt_write(struct file *file, const char __user *data,
 551         size_t len, loff_t *ppos)
 552 {
 553         /* See if we got the magic character 'V' and reload the timer */
 554         if (len) {
 555                 if (!nowayout) {
 556                         size_t i;
 557
 558                         /* note: just in case someone wrote the magic character
 559                          * five months ago... */
 560                         expect_release = 0;
 561
 562                         /* scan to see whether or not we got the magic char. */
 563                         for (i = 0; i != len; i++) {
 564                                 char c;
 565                                 if (get_user(c, data + i))
 566                                         return -EFAULT;
 567                                 if (c == 'V')
 568                                         expect_release = 42;
 569                         }
 570                 }
 571
 572                 /* someone wrote to us, we should reload the timer */
 573                 hpwdt_ping();
 574         }
 575
 576         return len;
 577 }
 578
 579 static const struct watchdog_info ident = {
 580         .options = WDIOF_SETTIMEOUT |
 581                    WDIOF_KEEPALIVEPING |
 582                    WDIOF_MAGICCLOSE,
 583         .identity = "HP iLO2+ HW Watchdog Timer",
 584 };
 585
 586 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
 587         unsigned long arg)
 588 {
 589         void __user *argp = (void __user *)arg;
 590         int __user *p = argp;
 591         int new_margin;
 592         int ret = -ENOTTY;
 593
 594         switch (cmd) {
 595         case WDIOC_GETSUPPORT:
 596                 ret = 0;
 597                 if (copy_to_user(argp, &ident, sizeof(ident)))
 598                         ret = -EFAULT;
 599                 break;
 600
 601         case WDIOC_GETSTATUS:
 602         case WDIOC_GETBOOTSTATUS:
 603                 ret = put_user(0, p);
 604                 break;
 605
 606         case WDIOC_KEEPALIVE:
 607                 hpwdt_ping();
 608                 ret = 0;
 609                 break;
 610
 611         case WDIOC_SETTIMEOUT:
 612                 ret = get_user(new_margin, p);
 613                 if (ret)
 614                         break;
 615
 616                 ret = hpwdt_change_timer(new_margin);
 617                 if (ret)
 618                         break;
 619
 620                 hpwdt_ping();
 621                 /* Fall */
 622         case WDIOC_GETTIMEOUT:
 623                 ret = put_user(soft_margin, p);
 624                 break;
 625
 626         case WDIOC_GETTIMELEFT:
 627                 ret = put_user(hpwdt_time_left(), p);
 628                 break;
 629         }
 630         return ret;
 631 }
 632
 633 /*
 634  *      Kernel interfaces
 635  */
 636 static const struct file_operations hpwdt_fops = {
 637         .owner = THIS_MODULE,
 638         .llseek = no_llseek,
 639         .write = hpwdt_write,
 640         .unlocked_ioctl = hpwdt_ioctl,
 641         .open = hpwdt_open,
 642         .release = hpwdt_release,
 643 };
 644
 645 static struct miscdevice hpwdt_miscdev = {
 646         .minor = WATCHDOG_MINOR,
 647         .name = "watchdog",
 648         .fops = &hpwdt_fops,
 649 };
 650
 651 #ifdef CONFIG_HPWDT_NMI_DECODING
 652 static struct notifier_block die_notifier = {
 653         .notifier_call = hpwdt_pretimeout,
 654         .priority = 0,
 655 };
 656 #endif /* CONFIG_HPWDT_NMI_DECODING */
 657
 658 /*
 659  *      Init & Exit
 660  */
 661
 662 #ifdef CONFIG_HPWDT_NMI_DECODING
 663 #ifdef CONFIG_X86_LOCAL_APIC
 664 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 665 {
 666         /*
 667          * If nmi_watchdog is turned off then we can turn on
 668          * our nmi decoding capability.
 669          */
 670         hpwdt_nmi_decoding = 1;
 671 }
 672 #else
 673 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 674 {
 675         dev_warn(&dev->dev, "NMI decoding is disabled. "
 676                 "Your kernel does not support a NMI Watchdog.\n");
 677 }
 678 #endif /* CONFIG_X86_LOCAL_APIC */
 679
 680 /*
 681  *      dmi_find_icru
 682  *
 683  *      Routine Description:
 684  *      This function checks whether or not we are on an iCRU-based server.
 685  *      This check is independent of architecture and needs to be made for
 686  *      any ProLiant system.
 687  */
 688 static void __devinit dmi_find_icru(const struct dmi_header *dm, void *dummy)
 689 {
 690         struct smbios_proliant_info *smbios_proliant_ptr;
 691
 692         if (dm->type == SMBIOS_ICRU_INFORMATION) {
 693                 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
 694                 if (smbios_proliant_ptr->misc_features & 0x01)
 695                         is_icru = 1;
 696         }
 697 }
 698
 699 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 700 {
 701         int retval;
 702
 703         /*
 704          * On typical CRU-based systems we need to map that service in
 705          * the BIOS. For 32 bit Operating Systems we need to go through
 706          * the 32 Bit BIOS Service Directory. For 64 bit Operating
 707          * Systems we get that service through SMBIOS.
 708          *
 709          * On systems that support the new iCRU service all we need to
 710          * do is call dmi_walk to get the supported flag value and skip
 711          * the old cru detect code.
 712          */
 713         dmi_walk(dmi_find_icru, NULL);
 714         if (!is_icru) {
 715
 716                 /*
 717                 * We need to map the ROM to get the CRU service.
 718                 * For 32 bit Operating Systems we need to go through the 32 Bit
 719                 * BIOS Service Directory
 720                 * For 64 bit Operating Systems we get that service through SMBIOS.
 721                 */
 722                 retval = detect_cru_service();
 723                 if (retval < 0) {
 724                         dev_warn(&dev->dev,
 725                                 "Unable to detect the %d Bit CRU Service.\n",
 726                                 HPWDT_ARCH);
 727                         return retval;
 728                 }
 729
 730                 /*
 731                 * We know this is the only CRU call we need to make so lets keep as
 732                 * few instructions as possible once the NMI comes in.
 733                 */
 734                 cmn_regs.u1.rah = 0x0D;
 735                 cmn_regs.u1.ral = 0x02;
 736         }
 737
 738         /*
 739          * If the priority is set to 1, then we will be put first on the
 740          * die notify list to handle a critical NMI. The default is to
 741          * be last so other users of the NMI signal can function.
 742          */
 743         if (priority)
 744                 die_notifier.priority = 0x7FFFFFFF;
 745
 746         retval = register_die_notifier(&die_notifier);
 747         if (retval != 0) {
 748                 dev_warn(&dev->dev,
 749                         "Unable to register a die notifier (err=%d).\n",
 750                         retval);
 751                 if (cru_rom_addr)
 752                         iounmap(cru_rom_addr);
 753         }
 754
 755         dev_info(&dev->dev,
 756                         "HP Watchdog Timer Driver: NMI decoding initialized"
 757                         ", allow kernel dump: %s (default = 0/OFF)"
 758                         ", priority: %s (default = 0/LAST).\n",
 759                         (allow_kdump == 0) ? "OFF" : "ON",
 760                         (priority == 0) ? "LAST" : "FIRST");
 761         return 0;
 762 }
 763
 764 static void hpwdt_exit_nmi_decoding(void)
 765 {
 766         unregister_die_notifier(&die_notifier);
 767         if (cru_rom_addr)
 768                 iounmap(cru_rom_addr);
 769 }
 770 #else /* !CONFIG_HPWDT_NMI_DECODING */
 771 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 772 {
 773 }
 774
 775 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 776 {
 777         return 0;
 778 }
 779
 780 static void hpwdt_exit_nmi_decoding(void)
 781 {
 782 }
 783 #endif /* CONFIG_HPWDT_NMI_DECODING */
 784
 785 static int __devinit hpwdt_init_one(struct pci_dev *dev,
 786                                         const struct pci_device_id *ent)
 787 {
 788         int retval;
 789
 790         /*
 791          * Check if we can do NMI decoding or not
 792          */
 793         hpwdt_check_nmi_decoding(dev);
 794
 795         /*
 796          * First let's find out if we are on an iLO2+ server. We will
 797          * not run on a legacy ASM box.
 798          * So we only support the G5 ProLiant servers and higher.
 799          */
 800         if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
 801                 dev_warn(&dev->dev,
 802                         "This server does not have an iLO2+ ASIC.\n");
 803                 return -ENODEV;
 804         }
 805
 806         if (pci_enable_device(dev)) {
 807                 dev_warn(&dev->dev,
 808                         "Not possible to enable PCI Device: 0x%x:0x%x.\n",
 809                         ent->vendor, ent->device);
 810                 return -ENODEV;
 811         }
 812
 813         pci_mem_addr = pci_iomap(dev, 1, 0x80);
 814         if (!pci_mem_addr) {
 815                 dev_warn(&dev->dev,
 816                         "Unable to detect the iLO2+ server memory.\n");
 817                 retval = -ENOMEM;
 818                 goto error_pci_iomap;
 819         }
 820         hpwdt_timer_reg = pci_mem_addr + 0x70;
 821         hpwdt_timer_con = pci_mem_addr + 0x72;
 822
 823         /* Make sure that we have a valid soft_margin */
 824         if (hpwdt_change_timer(soft_margin))
 825                 hpwdt_change_timer(DEFAULT_MARGIN);
 826
 827         /* Initialize NMI Decoding functionality */
 828         retval = hpwdt_init_nmi_decoding(dev);
 829         if (retval != 0)
 830                 goto error_init_nmi_decoding;
 831
 832         retval = misc_register(&hpwdt_miscdev);
 833         if (retval < 0) {
 834                 dev_warn(&dev->dev,
 835                         "Unable to register miscdev on minor=%d (err=%d).\n",
 836                         WATCHDOG_MINOR, retval);
 837                 goto error_misc_register;
 838         }
 839
 840         dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
 841                         ", timer margin: %d seconds (nowayout=%d).\n",
 842                         HPWDT_VERSION, soft_margin, nowayout);
 843         return 0;
 844
 845 error_misc_register:
 846         hpwdt_exit_nmi_decoding();
 847 error_init_nmi_decoding:
 848         pci_iounmap(dev, pci_mem_addr);
 849 error_pci_iomap:
 850         pci_disable_device(dev);
 851         return retval;
 852 }
 853
 854 static void __devexit hpwdt_exit(struct pci_dev *dev)
 855 {
 856         if (!nowayout)
 857                 hpwdt_stop();
 858
 859         misc_deregister(&hpwdt_miscdev);
 860         hpwdt_exit_nmi_decoding();
 861         pci_iounmap(dev, pci_mem_addr);
 862         pci_disable_device(dev);
 863 }
 864
 865 static struct pci_driver hpwdt_driver = {
 866         .name = "hpwdt",
 867         .id_table = hpwdt_devices,
 868         .probe = hpwdt_init_one,
 869         .remove = __devexit_p(hpwdt_exit),
 870 };
 871
 872 static void __exit hpwdt_cleanup(void)
 873 {
 874         pci_unregister_driver(&hpwdt_driver);
 875 }
 876
 877 static int __init hpwdt_init(void)
 878 {
 879         return pci_register_driver(&hpwdt_driver);
 880 }
 881
 882 MODULE_AUTHOR("Tom Mingarelli");
 883 MODULE_DESCRIPTION("hp watchdog driver");
 884 MODULE_LICENSE("GPL");
 885 MODULE_VERSION(HPWDT_VERSION);
 886 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 887
 888 module_param(soft_margin, int, 0);
 889 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 890
 891 module_param(nowayout, int, 0);
 892 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 893                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 894
 895 #ifdef CONFIG_HPWDT_NMI_DECODING
 896 module_param(allow_kdump, int, 0);
 897 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
 898
 899 module_param(priority, int, 0);
 900 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
 901                 " (default = 0/Last)\n");
 902 #endif /* !CONFIG_HPWDT_NMI_DECODING */
 903
 904 module_init(hpwdt_init);
 905 module_exit(hpwdt_cleanup);