drivers/watchdog/hpwdt.c

   1 /*
   2  *      HP WatchDog Driver
   3  *      based on
   4  *
   5  *      SoftDog 0.05:   A Software Watchdog Device
   6  *
   7  *      (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
   8  *      Thomas Mingarelli <thomas.mingarelli@hp.com>
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      version 2 as published by the Free Software Foundation
  13  *
  14  */
  15
  16 #include <linux/device.h>
  17 #include <linux/fs.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/bitops.h>
  21 #include <linux/kernel.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci_ids.h>
  27 #include <linux/types.h>
  28 #include <linux/uaccess.h>
  29 #include <linux/watchdog.h>
  30 #ifdef CONFIG_HPWDT_NMI_DECODING
  31 #include <linux/dmi.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/nmi.h>
  34 #include <linux/kdebug.h>
  35 #include <linux/notifier.h>
  36 #include <asm/cacheflush.h>
  37 #endif /* CONFIG_HPWDT_NMI_DECODING */
  38 #include <asm/nmi.h>
  39
  40 #define HPWDT_VERSION                   "1.3.0"
  41 #define SECS_TO_TICKS(secs)             ((secs) * 1000 / 128)
  42 #define TICKS_TO_SECS(ticks)            ((ticks) * 128 / 1000)
  43 #define HPWDT_MAX_TIMER                 TICKS_TO_SECS(65535)
  44 #define DEFAULT_MARGIN                  30
  45
  46 static unsigned int soft_margin = DEFAULT_MARGIN;       /* in seconds */
  47 static unsigned int reload;                     /* the computed soft_margin */
  48 static int nowayout = WATCHDOG_NOWAYOUT;
  49 static char expect_release;
  50 static unsigned long hpwdt_is_open;
  51
  52 static void __iomem *pci_mem_addr;              /* the PCI-memory address */
  53 static unsigned long __iomem *hpwdt_timer_reg;
  54 static unsigned long __iomem *hpwdt_timer_con;
  55
  56 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = {
  57         { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },   /* iLO2 */
  58         { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },       /* iLO3 */
  59         {0},                    /* terminate list */
  60 };
  61 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  62
  63 #ifdef CONFIG_HPWDT_NMI_DECODING
  64 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
  65 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
  66 #define PCI_BIOS32_PARAGRAPH_LEN        16
  67 #define PCI_ROM_BASE1                   0x000F0000
  68 #define ROM_SIZE                        0x10000
  69
  70 struct bios32_service_dir {
  71         u32 signature;
  72         u32 entry_point;
  73         u8 revision;
  74         u8 length;
  75         u8 checksum;
  76         u8 reserved[5];
  77 };
  78
  79 /* type 212 */
  80 struct smbios_cru64_info {
  81         u8 type;
  82         u8 byte_length;
  83         u16 handle;
  84         u32 signature;
  85         u64 physical_address;
  86         u32 double_length;
  87         u32 double_offset;
  88 };
  89 #define SMBIOS_CRU64_INFORMATION        212
  90
  91 /* type 219 */
  92 struct smbios_proliant_info {
  93         u8 type;
  94         u8 byte_length;
  95         u16 handle;
  96         u32 power_features;
  97         u32 omega_features;
  98         u32 reserved;
  99         u32 misc_features;
 100 };
 101 #define SMBIOS_ICRU_INFORMATION         219
 102
 103
 104 struct cmn_registers {
 105         union {
 106                 struct {
 107                         u8 ral;
 108                         u8 rah;
 109                         u16 rea2;
 110                 };
 111                 u32 reax;
 112         } u1;
 113         union {
 114                 struct {
 115                         u8 rbl;
 116                         u8 rbh;
 117                         u8 reb2l;
 118                         u8 reb2h;
 119                 };
 120                 u32 rebx;
 121         } u2;
 122         union {
 123                 struct {
 124                         u8 rcl;
 125                         u8 rch;
 126                         u16 rec2;
 127                 };
 128                 u32 recx;
 129         } u3;
 130         union {
 131                 struct {
 132                         u8 rdl;
 133                         u8 rdh;
 134                         u16 red2;
 135                 };
 136                 u32 redx;
 137         } u4;
 138
 139         u32 resi;
 140         u32 redi;
 141         u16 rds;
 142         u16 res;
 143         u32 reflags;
 144 }  __attribute__((packed));
 145
 146 static unsigned int hpwdt_nmi_decoding;
 147 static unsigned int allow_kdump;
 148 static unsigned int priority;           /* hpwdt at end of die_notify list */
 149 static unsigned int is_icru;
 150 static DEFINE_SPINLOCK(rom_lock);
 151 static void *cru_rom_addr;
 152 static struct cmn_registers cmn_regs;
 153
 154 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
 155                                                 unsigned long *pRomEntry);
 156
 157 #ifdef CONFIG_X86_32
 158 /* --32 Bit Bios------------------------------------------------------------ */
 159
 160 #define HPWDT_ARCH      32
 161
 162 asm(".text                          \n\t"
 163     ".align 4                       \n"
 164     "asminline_call:                \n\t"
 165     "pushl       %ebp               \n\t"
 166     "movl        %esp, %ebp         \n\t"
 167     "pusha                          \n\t"
 168     "pushf                          \n\t"
 169     "push        %es                \n\t"
 170     "push        %ds                \n\t"
 171     "pop         %es                \n\t"
 172     "movl        8(%ebp),%eax       \n\t"
 173     "movl        4(%eax),%ebx       \n\t"
 174     "movl        8(%eax),%ecx       \n\t"
 175     "movl        12(%eax),%edx      \n\t"
 176     "movl        16(%eax),%esi      \n\t"
 177     "movl        20(%eax),%edi      \n\t"
 178     "movl        (%eax),%eax        \n\t"
 179     "push        %cs                \n\t"
 180     "call        *12(%ebp)          \n\t"
 181     "pushf                          \n\t"
 182     "pushl       %eax               \n\t"
 183     "movl        8(%ebp),%eax       \n\t"
 184     "movl        %ebx,4(%eax)       \n\t"
 185     "movl        %ecx,8(%eax)       \n\t"
 186     "movl        %edx,12(%eax)      \n\t"
 187     "movl        %esi,16(%eax)      \n\t"
 188     "movl        %edi,20(%eax)      \n\t"
 189     "movw        %ds,24(%eax)       \n\t"
 190     "movw        %es,26(%eax)       \n\t"
 191     "popl        %ebx               \n\t"
 192     "movl        %ebx,(%eax)        \n\t"
 193     "popl        %ebx               \n\t"
 194     "movl        %ebx,28(%eax)      \n\t"
 195     "pop         %es                \n\t"
 196     "popf                           \n\t"
 197     "popa                           \n\t"
 198     "leave                          \n\t"
 199     "ret                            \n\t"
 200     ".previous");
 201
 202
 203 /*
 204  *      cru_detect
 205  *
 206  *      Routine Description:
 207  *      This function uses the 32-bit BIOS Service Directory record to
 208  *      search for a $CRU record.
 209  *
 210  *      Return Value:
 211  *      0        :  SUCCESS
 212  *      <0       :  FAILURE
 213  */
 214 static int __devinit cru_detect(unsigned long map_entry,
 215         unsigned long map_offset)
 216 {
 217         void *bios32_map;
 218         unsigned long *bios32_entrypoint;
 219         unsigned long cru_physical_address;
 220         unsigned long cru_length;
 221         unsigned long physical_bios_base = 0;
 222         unsigned long physical_bios_offset = 0;
 223         int retval = -ENODEV;
 224
 225         bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
 226
 227         if (bios32_map == NULL)
 228                 return -ENODEV;
 229
 230         bios32_entrypoint = bios32_map + map_offset;
 231
 232         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 233
 234         asminline_call(&cmn_regs, bios32_entrypoint);
 235
 236         if (cmn_regs.u1.ral != 0) {
 237                 printk(KERN_WARNING
 238                         "hpwdt: Call succeeded but with an error: 0x%x\n",
 239                         cmn_regs.u1.ral);
 240         } else {
 241                 physical_bios_base = cmn_regs.u2.rebx;
 242                 physical_bios_offset = cmn_regs.u4.redx;
 243                 cru_length = cmn_regs.u3.recx;
 244                 cru_physical_address =
 245                         physical_bios_base + physical_bios_offset;
 246
 247                 /* If the values look OK, then map it in. */
 248                 if ((physical_bios_base + physical_bios_offset)) {
 249                         cru_rom_addr =
 250                                 ioremap(cru_physical_address, cru_length);
 251                         if (cru_rom_addr)
 252                                 retval = 0;
 253                 }
 254
 255                 printk(KERN_DEBUG "hpwdt: CRU Base Address:   0x%lx\n",
 256                         physical_bios_base);
 257                 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
 258                         physical_bios_offset);
 259                 printk(KERN_DEBUG "hpwdt: CRU Length:         0x%lx\n",
 260                         cru_length);
 261                 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
 262                         &cru_rom_addr);
 263         }
 264         iounmap(bios32_map);
 265         return retval;
 266 }
 267
 268 /*
 269  *      bios_checksum
 270  */
 271 static int __devinit bios_checksum(const char __iomem *ptr, int len)
 272 {
 273         char sum = 0;
 274         int i;
 275
 276         /*
 277          * calculate checksum of size bytes. This should add up
 278          * to zero if we have a valid header.
 279          */
 280         for (i = 0; i < len; i++)
 281                 sum += ptr[i];
 282
 283         return ((sum == 0) && (len > 0));
 284 }
 285
 286 /*
 287  *      bios32_present
 288  *
 289  *      Routine Description:
 290  *      This function finds the 32-bit BIOS Service Directory
 291  *
 292  *      Return Value:
 293  *      0        :  SUCCESS
 294  *      <0       :  FAILURE
 295  */
 296 static int __devinit bios32_present(const char __iomem *p)
 297 {
 298         struct bios32_service_dir *bios_32_ptr;
 299         int length;
 300         unsigned long map_entry, map_offset;
 301
 302         bios_32_ptr = (struct bios32_service_dir *) p;
 303
 304         /*
 305          * Search for signature by checking equal to the swizzled value
 306          * instead of calling another routine to perform a strcmp.
 307          */
 308         if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
 309                 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
 310                 if (bios_checksum(p, length)) {
 311                         /*
 312                          * According to the spec, we're looking for the
 313                          * first 4KB-aligned address below the entrypoint
 314                          * listed in the header. The Service Directory code
 315                          * is guaranteed to occupy no more than 2 4KB pages.
 316                          */
 317                         map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
 318                         map_offset = bios_32_ptr->entry_point - map_entry;
 319
 320                         return cru_detect(map_entry, map_offset);
 321                 }
 322         }
 323         return -ENODEV;
 324 }
 325
 326 static int __devinit detect_cru_service(void)
 327 {
 328         char __iomem *p, *q;
 329         int rc = -1;
 330
 331         /*
 332          * Search from 0x0f0000 through 0x0fffff, inclusive.
 333          */
 334         p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
 335         if (p == NULL)
 336                 return -ENOMEM;
 337
 338         for (q = p; q < p + ROM_SIZE; q += 16) {
 339                 rc = bios32_present(q);
 340                 if (!rc)
 341                         break;
 342         }
 343         iounmap(p);
 344         return rc;
 345 }
 346 /* ------------------------------------------------------------------------- */
 347 #endif /* CONFIG_X86_32 */
 348 #ifdef CONFIG_X86_64
 349 /* --64 Bit Bios------------------------------------------------------------ */
 350
 351 #define HPWDT_ARCH      64
 352
 353 asm(".text                      \n\t"
 354     ".align 4                   \n"
 355     "asminline_call:            \n\t"
 356     "pushq      %rbp            \n\t"
 357     "movq       %rsp, %rbp      \n\t"
 358     "pushq      %rax            \n\t"
 359     "pushq      %rbx            \n\t"
 360     "pushq      %rdx            \n\t"
 361     "pushq      %r12            \n\t"
 362     "pushq      %r9             \n\t"
 363     "movq       %rsi, %r12      \n\t"
 364     "movq       %rdi, %r9       \n\t"
 365     "movl       4(%r9),%ebx     \n\t"
 366     "movl       8(%r9),%ecx     \n\t"
 367     "movl       12(%r9),%edx    \n\t"
 368     "movl       16(%r9),%esi    \n\t"
 369     "movl       20(%r9),%edi    \n\t"
 370     "movl       (%r9),%eax      \n\t"
 371     "call       *%r12           \n\t"
 372     "pushfq                     \n\t"
 373     "popq        %r12           \n\t"
 374     "movl       %eax, (%r9)     \n\t"
 375     "movl       %ebx, 4(%r9)    \n\t"
 376     "movl       %ecx, 8(%r9)    \n\t"
 377     "movl       %edx, 12(%r9)   \n\t"
 378     "movl       %esi, 16(%r9)   \n\t"
 379     "movl       %edi, 20(%r9)   \n\t"
 380     "movq       %r12, %rax      \n\t"
 381     "movl       %eax, 28(%r9)   \n\t"
 382     "popq       %r9             \n\t"
 383     "popq       %r12            \n\t"
 384     "popq       %rdx            \n\t"
 385     "popq       %rbx            \n\t"
 386     "popq       %rax            \n\t"
 387     "leave                      \n\t"
 388     "ret                        \n\t"
 389     ".previous");
 390
 391 /*
 392  *      dmi_find_cru
 393  *
 394  *      Routine Description:
 395  *      This function checks whether or not a SMBIOS/DMI record is
 396  *      the 64bit CRU info or not
 397  */
 398 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
 399 {
 400         struct smbios_cru64_info *smbios_cru64_ptr;
 401         unsigned long cru_physical_address;
 402
 403         if (dm->type == SMBIOS_CRU64_INFORMATION) {
 404                 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
 405                 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
 406                         cru_physical_address =
 407                                 smbios_cru64_ptr->physical_address +
 408                                 smbios_cru64_ptr->double_offset;
 409                         cru_rom_addr = ioremap(cru_physical_address,
 410                                 smbios_cru64_ptr->double_length);
 411                         set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 412                                 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
 413                 }
 414         }
 415 }
 416
 417 static int __devinit detect_cru_service(void)
 418 {
 419         cru_rom_addr = NULL;
 420
 421         dmi_walk(dmi_find_cru, NULL);
 422
 423         /* if cru_rom_addr has been set then we found a CRU service */
 424         return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
 425 }
 426 /* ------------------------------------------------------------------------- */
 427 #endif /* CONFIG_X86_64 */
 428 #endif /* CONFIG_HPWDT_NMI_DECODING */
 429
 430 /*
 431  *      Watchdog operations
 432  */
 433 static void hpwdt_start(void)
 434 {
 435         reload = SECS_TO_TICKS(soft_margin);
 436         iowrite16(reload, hpwdt_timer_reg);
 437         iowrite16(0x85, hpwdt_timer_con);
 438 }
 439
 440 static void hpwdt_stop(void)
 441 {
 442         unsigned long data;
 443
 444         data = ioread16(hpwdt_timer_con);
 445         data &= 0xFE;
 446         iowrite16(data, hpwdt_timer_con);
 447 }
 448
 449 static void hpwdt_ping(void)
 450 {
 451         iowrite16(reload, hpwdt_timer_reg);
 452 }
 453
 454 static int hpwdt_change_timer(int new_margin)
 455 {
 456         if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
 457                 printk(KERN_WARNING
 458                         "hpwdt: New value passed in is invalid: %d seconds.\n",
 459                         new_margin);
 460                 return -EINVAL;
 461         }
 462
 463         soft_margin = new_margin;
 464         printk(KERN_DEBUG
 465                 "hpwdt: New timer passed in is %d seconds.\n",
 466                 new_margin);
 467         reload = SECS_TO_TICKS(soft_margin);
 468
 469         return 0;
 470 }
 471
 472 static int hpwdt_time_left(void)
 473 {
 474         return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 475 }
 476
 477 #ifdef CONFIG_HPWDT_NMI_DECODING
 478 /*
 479  *      NMI Handler
 480  */
 481 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
 482 {
 483         unsigned long rom_pl;
 484         static int die_nmi_called;
 485
 486         if (!hpwdt_nmi_decoding)
 487                 goto out;
 488
 489         spin_lock_irqsave(&rom_lock, rom_pl);
 490         if (!die_nmi_called && !is_icru)
 491                 asminline_call(&cmn_regs, cru_rom_addr);
 492         die_nmi_called = 1;
 493         spin_unlock_irqrestore(&rom_lock, rom_pl);
 494
 495         if (allow_kdump)
 496                 hpwdt_stop();
 497
 498         if (!is_icru) {
 499                 if (cmn_regs.u1.ral == 0) {
 500                         panic("An NMI occurred, "
 501                                 "but unable to determine source.\n");
 502                 }
 503         }
 504         panic("An NMI occurred, please see the Integrated "
 505                 "Management Log for details.\n");
 506
 507 out:
 508         return NMI_DONE;
 509 }
 510 #endif /* CONFIG_HPWDT_NMI_DECODING */
 511
 512 /*
 513  *      /dev/watchdog handling
 514  */
 515 static int hpwdt_open(struct inode *inode, struct file *file)
 516 {
 517         /* /dev/watchdog can only be opened once */
 518         if (test_and_set_bit(0, &hpwdt_is_open))
 519                 return -EBUSY;
 520
 521         /* Start the watchdog */
 522         hpwdt_start();
 523         hpwdt_ping();
 524
 525         return nonseekable_open(inode, file);
 526 }
 527
 528 static int hpwdt_release(struct inode *inode, struct file *file)
 529 {
 530         /* Stop the watchdog */
 531         if (expect_release == 42) {
 532                 hpwdt_stop();
 533         } else {
 534                 printk(KERN_CRIT
 535                         "hpwdt: Unexpected close, not stopping watchdog!\n");
 536                 hpwdt_ping();
 537         }
 538
 539         expect_release = 0;
 540
 541         /* /dev/watchdog is being closed, make sure it can be re-opened */
 542         clear_bit(0, &hpwdt_is_open);
 543
 544         return 0;
 545 }
 546
 547 static ssize_t hpwdt_write(struct file *file, const char __user *data,
 548         size_t len, loff_t *ppos)
 549 {
 550         /* See if we got the magic character 'V' and reload the timer */
 551         if (len) {
 552                 if (!nowayout) {
 553                         size_t i;
 554
 555                         /* note: just in case someone wrote the magic character
 556                          * five months ago... */
 557                         expect_release = 0;
 558
 559                         /* scan to see whether or not we got the magic char. */
 560                         for (i = 0; i != len; i++) {
 561                                 char c;
 562                                 if (get_user(c, data + i))
 563                                         return -EFAULT;
 564                                 if (c == 'V')
 565                                         expect_release = 42;
 566                         }
 567                 }
 568
 569                 /* someone wrote to us, we should reload the timer */
 570                 hpwdt_ping();
 571         }
 572
 573         return len;
 574 }
 575
 576 static const struct watchdog_info ident = {
 577         .options = WDIOF_SETTIMEOUT |
 578                    WDIOF_KEEPALIVEPING |
 579                    WDIOF_MAGICCLOSE,
 580         .identity = "HP iLO2+ HW Watchdog Timer",
 581 };
 582
 583 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
 584         unsigned long arg)
 585 {
 586         void __user *argp = (void __user *)arg;
 587         int __user *p = argp;
 588         int new_margin;
 589         int ret = -ENOTTY;
 590
 591         switch (cmd) {
 592         case WDIOC_GETSUPPORT:
 593                 ret = 0;
 594                 if (copy_to_user(argp, &ident, sizeof(ident)))
 595                         ret = -EFAULT;
 596                 break;
 597
 598         case WDIOC_GETSTATUS:
 599         case WDIOC_GETBOOTSTATUS:
 600                 ret = put_user(0, p);
 601                 break;
 602
 603         case WDIOC_KEEPALIVE:
 604                 hpwdt_ping();
 605                 ret = 0;
 606                 break;
 607
 608         case WDIOC_SETTIMEOUT:
 609                 ret = get_user(new_margin, p);
 610                 if (ret)
 611                         break;
 612
 613                 ret = hpwdt_change_timer(new_margin);
 614                 if (ret)
 615                         break;
 616
 617                 hpwdt_ping();
 618                 /* Fall */
 619         case WDIOC_GETTIMEOUT:
 620                 ret = put_user(soft_margin, p);
 621                 break;
 622
 623         case WDIOC_GETTIMELEFT:
 624                 ret = put_user(hpwdt_time_left(), p);
 625                 break;
 626         }
 627         return ret;
 628 }
 629
 630 /*
 631  *      Kernel interfaces
 632  */
 633 static const struct file_operations hpwdt_fops = {
 634         .owner = THIS_MODULE,
 635         .llseek = no_llseek,
 636         .write = hpwdt_write,
 637         .unlocked_ioctl = hpwdt_ioctl,
 638         .open = hpwdt_open,
 639         .release = hpwdt_release,
 640 };
 641
 642 static struct miscdevice hpwdt_miscdev = {
 643         .minor = WATCHDOG_MINOR,
 644         .name = "watchdog",
 645         .fops = &hpwdt_fops,
 646 };
 647
 648 /*
 649  *      Init & Exit
 650  */
 651
 652 #ifdef CONFIG_HPWDT_NMI_DECODING
 653 #ifdef CONFIG_X86_LOCAL_APIC
 654 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 655 {
 656         /*
 657          * If nmi_watchdog is turned off then we can turn on
 658          * our nmi decoding capability.
 659          */
 660         hpwdt_nmi_decoding = 1;
 661 }
 662 #else
 663 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 664 {
 665         dev_warn(&dev->dev, "NMI decoding is disabled. "
 666                 "Your kernel does not support a NMI Watchdog.\n");
 667 }
 668 #endif /* CONFIG_X86_LOCAL_APIC */
 669
 670 /*
 671  *      dmi_find_icru
 672  *
 673  *      Routine Description:
 674  *      This function checks whether or not we are on an iCRU-based server.
 675  *      This check is independent of architecture and needs to be made for
 676  *      any ProLiant system.
 677  */
 678 static void __devinit dmi_find_icru(const struct dmi_header *dm, void *dummy)
 679 {
 680         struct smbios_proliant_info *smbios_proliant_ptr;
 681
 682         if (dm->type == SMBIOS_ICRU_INFORMATION) {
 683                 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
 684                 if (smbios_proliant_ptr->misc_features & 0x01)
 685                         is_icru = 1;
 686         }
 687 }
 688
 689 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 690 {
 691         int retval;
 692
 693         /*
 694          * On typical CRU-based systems we need to map that service in
 695          * the BIOS. For 32 bit Operating Systems we need to go through
 696          * the 32 Bit BIOS Service Directory. For 64 bit Operating
 697          * Systems we get that service through SMBIOS.
 698          *
 699          * On systems that support the new iCRU service all we need to
 700          * do is call dmi_walk to get the supported flag value and skip
 701          * the old cru detect code.
 702          */
 703         dmi_walk(dmi_find_icru, NULL);
 704         if (!is_icru) {
 705
 706                 /*
 707                 * We need to map the ROM to get the CRU service.
 708                 * For 32 bit Operating Systems we need to go through the 32 Bit
 709                 * BIOS Service Directory
 710                 * For 64 bit Operating Systems we get that service through SMBIOS.
 711                 */
 712                 retval = detect_cru_service();
 713                 if (retval < 0) {
 714                         dev_warn(&dev->dev,
 715                                 "Unable to detect the %d Bit CRU Service.\n",
 716                                 HPWDT_ARCH);
 717                         return retval;
 718                 }
 719
 720                 /*
 721                 * We know this is the only CRU call we need to make so lets keep as
 722                 * few instructions as possible once the NMI comes in.
 723                 */
 724                 cmn_regs.u1.rah = 0x0D;
 725                 cmn_regs.u1.ral = 0x02;
 726         }
 727
 728         /*
 729          * If the priority is set to 1, then we will be put first on the
 730          * die notify list to handle a critical NMI. The default is to
 731          * be last so other users of the NMI signal can function.
 732          */
 733         retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout,
 734                                         (priority) ? NMI_FLAG_FIRST : 0,
 735                                         "hpwdt");
 736         if (retval != 0) {
 737                 dev_warn(&dev->dev,
 738                         "Unable to register a die notifier (err=%d).\n",
 739                         retval);
 740                 if (cru_rom_addr)
 741                         iounmap(cru_rom_addr);
 742         }
 743
 744         dev_info(&dev->dev,
 745                         "HP Watchdog Timer Driver: NMI decoding initialized"
 746                         ", allow kernel dump: %s (default = 0/OFF)"
 747                         ", priority: %s (default = 0/LAST).\n",
 748                         (allow_kdump == 0) ? "OFF" : "ON",
 749                         (priority == 0) ? "LAST" : "FIRST");
 750         return 0;
 751 }
 752
 753 static void hpwdt_exit_nmi_decoding(void)
 754 {
 755         unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
 756         if (cru_rom_addr)
 757                 iounmap(cru_rom_addr);
 758 }
 759 #else /* !CONFIG_HPWDT_NMI_DECODING */
 760 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
 761 {
 762 }
 763
 764 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
 765 {
 766         return 0;
 767 }
 768
 769 static void hpwdt_exit_nmi_decoding(void)
 770 {
 771 }
 772 #endif /* CONFIG_HPWDT_NMI_DECODING */
 773
 774 static int __devinit hpwdt_init_one(struct pci_dev *dev,
 775                                         const struct pci_device_id *ent)
 776 {
 777         int retval;
 778
 779         /*
 780          * Check if we can do NMI decoding or not
 781          */
 782         hpwdt_check_nmi_decoding(dev);
 783
 784         /*
 785          * First let's find out if we are on an iLO2+ server. We will
 786          * not run on a legacy ASM box.
 787          * So we only support the G5 ProLiant servers and higher.
 788          */
 789         if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
 790                 dev_warn(&dev->dev,
 791                         "This server does not have an iLO2+ ASIC.\n");
 792                 return -ENODEV;
 793         }
 794
 795         if (pci_enable_device(dev)) {
 796                 dev_warn(&dev->dev,
 797                         "Not possible to enable PCI Device: 0x%x:0x%x.\n",
 798                         ent->vendor, ent->device);
 799                 return -ENODEV;
 800         }
 801
 802         pci_mem_addr = pci_iomap(dev, 1, 0x80);
 803         if (!pci_mem_addr) {
 804                 dev_warn(&dev->dev,
 805                         "Unable to detect the iLO2+ server memory.\n");
 806                 retval = -ENOMEM;
 807                 goto error_pci_iomap;
 808         }
 809         hpwdt_timer_reg = pci_mem_addr + 0x70;
 810         hpwdt_timer_con = pci_mem_addr + 0x72;
 811
 812         /* Make sure that we have a valid soft_margin */
 813         if (hpwdt_change_timer(soft_margin))
 814                 hpwdt_change_timer(DEFAULT_MARGIN);
 815
 816         /* Initialize NMI Decoding functionality */
 817         retval = hpwdt_init_nmi_decoding(dev);
 818         if (retval != 0)
 819                 goto error_init_nmi_decoding;
 820
 821         retval = misc_register(&hpwdt_miscdev);
 822         if (retval < 0) {
 823                 dev_warn(&dev->dev,
 824                         "Unable to register miscdev on minor=%d (err=%d).\n",
 825                         WATCHDOG_MINOR, retval);
 826                 goto error_misc_register;
 827         }
 828
 829         dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
 830                         ", timer margin: %d seconds (nowayout=%d).\n",
 831                         HPWDT_VERSION, soft_margin, nowayout);
 832         return 0;
 833
 834 error_misc_register:
 835         hpwdt_exit_nmi_decoding();
 836 error_init_nmi_decoding:
 837         pci_iounmap(dev, pci_mem_addr);
 838 error_pci_iomap:
 839         pci_disable_device(dev);
 840         return retval;
 841 }
 842
 843 static void __devexit hpwdt_exit(struct pci_dev *dev)
 844 {
 845         if (!nowayout)
 846                 hpwdt_stop();
 847
 848         misc_deregister(&hpwdt_miscdev);
 849         hpwdt_exit_nmi_decoding();
 850         pci_iounmap(dev, pci_mem_addr);
 851         pci_disable_device(dev);
 852 }
 853
 854 static struct pci_driver hpwdt_driver = {
 855         .name = "hpwdt",
 856         .id_table = hpwdt_devices,
 857         .probe = hpwdt_init_one,
 858         .remove = __devexit_p(hpwdt_exit),
 859 };
 860
 861 static void __exit hpwdt_cleanup(void)
 862 {
 863         pci_unregister_driver(&hpwdt_driver);
 864 }
 865
 866 static int __init hpwdt_init(void)
 867 {
 868         return pci_register_driver(&hpwdt_driver);
 869 }
 870
 871 MODULE_AUTHOR("Tom Mingarelli");
 872 MODULE_DESCRIPTION("hp watchdog driver");
 873 MODULE_LICENSE("GPL");
 874 MODULE_VERSION(HPWDT_VERSION);
 875 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 876
 877 module_param(soft_margin, int, 0);
 878 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 879
 880 module_param(nowayout, int, 0);
 881 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 882                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 883
 884 #ifdef CONFIG_HPWDT_NMI_DECODING
 885 module_param(allow_kdump, int, 0);
 886 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
 887
 888 module_param(priority, int, 0);
 889 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
 890                 " (default = 0/Last)\n");
 891 #endif /* !CONFIG_HPWDT_NMI_DECODING */
 892
 893 module_init(hpwdt_init);
 894 module_exit(hpwdt_cleanup);