Merge branches 'core-fixes-for-linus' and 'irq-fixes-for-linus' of git://git.kernel...
[pandora-kernel.git] / drivers / video / omap2 / dss / dss_features.h
1 /*
2  * linux/drivers/video/omap2/dss/dss_features.h
3  *
4  * Copyright (C) 2010 Texas Instruments
5  * Author: Archit Taneja <archit@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #ifndef __OMAP2_DSS_FEATURES_H
21 #define __OMAP2_DSS_FEATURES_H
22
23 #define MAX_DSS_MANAGERS        3
24 #define MAX_DSS_OVERLAYS        3
25 #define MAX_DSS_LCD_MANAGERS    2
26 #define MAX_NUM_DSI             2
27
28 /* DSS has feature id */
29 enum dss_feat_id {
30         FEAT_GLOBAL_ALPHA               = 1 << 0,
31         FEAT_GLOBAL_ALPHA_VID1          = 1 << 1,
32         FEAT_PRE_MULT_ALPHA             = 1 << 2,
33         FEAT_LCDENABLEPOL               = 1 << 3,
34         FEAT_LCDENABLESIGNAL            = 1 << 4,
35         FEAT_PCKFREEENABLE              = 1 << 5,
36         FEAT_FUNCGATED                  = 1 << 6,
37         FEAT_MGR_LCD2                   = 1 << 7,
38         FEAT_LINEBUFFERSPLIT            = 1 << 8,
39         FEAT_ROWREPEATENABLE            = 1 << 9,
40         FEAT_RESIZECONF                 = 1 << 10,
41         /* Independent core clk divider */
42         FEAT_CORE_CLK_DIV               = 1 << 11,
43         FEAT_LCD_CLK_SRC                = 1 << 12,
44         /* DSI-PLL power command 0x3 is not working */
45         FEAT_DSI_PLL_PWR_BUG            = 1 << 13,
46         FEAT_DSI_PLL_FREQSEL            = 1 << 14,
47         FEAT_DSI_DCS_CMD_CONFIG_VC      = 1 << 15,
48         FEAT_DSI_VC_OCP_WIDTH           = 1 << 16,
49         FEAT_DSI_REVERSE_TXCLKESC       = 1 << 17,
50         FEAT_DSI_GNQ                    = 1 << 18,
51         FEAT_HDMI_CTS_SWMODE            = 1 << 19,
52         FEAT_HANDLE_UV_SEPARATE         = 1 << 20,
53         FEAT_ATTR2                      = 1 << 21,
54 };
55
56 /* DSS register field id */
57 enum dss_feat_reg_field {
58         FEAT_REG_FIRHINC,
59         FEAT_REG_FIRVINC,
60         FEAT_REG_FIFOHIGHTHRESHOLD,
61         FEAT_REG_FIFOLOWTHRESHOLD,
62         FEAT_REG_FIFOSIZE,
63         FEAT_REG_HORIZONTALACCU,
64         FEAT_REG_VERTICALACCU,
65         FEAT_REG_DISPC_CLK_SWITCH,
66         FEAT_REG_DSIPLL_REGN,
67         FEAT_REG_DSIPLL_REGM,
68         FEAT_REG_DSIPLL_REGM_DISPC,
69         FEAT_REG_DSIPLL_REGM_DSI,
70 };
71
72 enum dss_range_param {
73         FEAT_PARAM_DSS_FCK,
74         FEAT_PARAM_DSIPLL_REGN,
75         FEAT_PARAM_DSIPLL_REGM,
76         FEAT_PARAM_DSIPLL_REGM_DISPC,
77         FEAT_PARAM_DSIPLL_REGM_DSI,
78         FEAT_PARAM_DSIPLL_FINT,
79         FEAT_PARAM_DSIPLL_LPDIV,
80 };
81
82 /* DSS Feature Functions */
83 int dss_feat_get_num_mgrs(void);
84 int dss_feat_get_num_ovls(void);
85 unsigned long dss_feat_get_param_min(enum dss_range_param param);
86 unsigned long dss_feat_get_param_max(enum dss_range_param param);
87 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
88 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
89 bool dss_feat_color_mode_supported(enum omap_plane plane,
90                 enum omap_color_mode color_mode);
91 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
92
93 bool dss_has_feature(enum dss_feat_id id);
94 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
95 void dss_features_init(void);
96 #endif