drivers/video/mxsfb.c

   1 /*
   2  * Copyright (C) 2010 Juergen Beisert, Pengutronix
   3  *
   4  * This code is based on:
   5  * Author: Vitaly Wool <vital@embeddedalley.com>
   6  *
   7  * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
   8  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20 #define DRIVER_NAME "mxsfb"
  21
  22 /**
  23  * @file
  24  * @brief LCDIF driver for i.MX23 and i.MX28
  25  *
  26  * The LCDIF support four modes of operation
  27  * - MPU interface (to drive smart displays) -> not supported yet
  28  * - VSYNC interface (like MPU interface plus Vsync) -> not supported yet
  29  * - Dotclock interface (to drive LC displays with RGB data and sync signals)
  30  * - DVI (to drive ITU-R BT656)  -> not supported yet
  31  *
  32  * This driver depends on a correct setup of the pins used for this purpose
  33  * (platform specific).
  34  *
  35  * For the developer: Don't forget to set the data bus width to the display
  36  * in the imx_fb_videomode structure. You will else end up with ugly colours.
  37  * If you fight against jitter you can vary the clock delay. This is a feature
  38  * of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give
  39  * the required value in the imx_fb_videomode structure.
  40  */
  41
  42 #include <linux/module.h>
  43 #include <linux/kernel.h>
  44 #include <linux/platform_device.h>
  45 #include <linux/clk.h>
  46 #include <linux/dma-mapping.h>
  47 #include <linux/io.h>
  48 #include <mach/mxsfb.h>
  49
  50 #define REG_SET 4
  51 #define REG_CLR 8
  52
  53 #define LCDC_CTRL                       0x00
  54 #define LCDC_CTRL1                      0x10
  55 #define LCDC_V4_CTRL2                   0x20
  56 #define LCDC_V3_TRANSFER_COUNT          0x20
  57 #define LCDC_V4_TRANSFER_COUNT          0x30
  58 #define LCDC_V4_CUR_BUF                 0x40
  59 #define LCDC_V4_NEXT_BUF                0x50
  60 #define LCDC_V3_CUR_BUF                 0x30
  61 #define LCDC_V3_NEXT_BUF                0x40
  62 #define LCDC_TIMING                     0x60
  63 #define LCDC_VDCTRL0                    0x70
  64 #define LCDC_VDCTRL1                    0x80
  65 #define LCDC_VDCTRL2                    0x90
  66 #define LCDC_VDCTRL3                    0xa0
  67 #define LCDC_VDCTRL4                    0xb0
  68 #define LCDC_DVICTRL0                   0xc0
  69 #define LCDC_DVICTRL1                   0xd0
  70 #define LCDC_DVICTRL2                   0xe0
  71 #define LCDC_DVICTRL3                   0xf0
  72 #define LCDC_DVICTRL4                   0x100
  73 #define LCDC_V4_DATA                    0x180
  74 #define LCDC_V3_DATA                    0x1b0
  75 #define LCDC_V4_DEBUG0                  0x1d0
  76 #define LCDC_V3_DEBUG0                  0x1f0
  77
  78 #define CTRL_SFTRST                     (1 << 31)
  79 #define CTRL_CLKGATE                    (1 << 30)
  80 #define CTRL_BYPASS_COUNT               (1 << 19)
  81 #define CTRL_VSYNC_MODE                 (1 << 18)
  82 #define CTRL_DOTCLK_MODE                (1 << 17)
  83 #define CTRL_DATA_SELECT                (1 << 16)
  84 #define CTRL_SET_BUS_WIDTH(x)           (((x) & 0x3) << 10)
  85 #define CTRL_GET_BUS_WIDTH(x)           (((x) >> 10) & 0x3)
  86 #define CTRL_SET_WORD_LENGTH(x)         (((x) & 0x3) << 8)
  87 #define CTRL_GET_WORD_LENGTH(x)         (((x) >> 8) & 0x3)
  88 #define CTRL_MASTER                     (1 << 5)
  89 #define CTRL_DF16                       (1 << 3)
  90 #define CTRL_DF18                       (1 << 2)
  91 #define CTRL_DF24                       (1 << 1)
  92 #define CTRL_RUN                        (1 << 0)
  93
  94 #define CTRL1_FIFO_CLEAR                (1 << 21)
  95 #define CTRL1_SET_BYTE_PACKAGING(x)     (((x) & 0xf) << 16)
  96 #define CTRL1_GET_BYTE_PACKAGING(x)     (((x) >> 16) & 0xf)
  97
  98 #define TRANSFER_COUNT_SET_VCOUNT(x)    (((x) & 0xffff) << 16)
  99 #define TRANSFER_COUNT_GET_VCOUNT(x)    (((x) >> 16) & 0xffff)
 100 #define TRANSFER_COUNT_SET_HCOUNT(x)    ((x) & 0xffff)
 101 #define TRANSFER_COUNT_GET_HCOUNT(x)    ((x) & 0xffff)
 102
 103
 104 #define VDCTRL0_ENABLE_PRESENT          (1 << 28)
 105 #define VDCTRL0_VSYNC_ACT_HIGH          (1 << 27)
 106 #define VDCTRL0_HSYNC_ACT_HIGH          (1 << 26)
 107 #define VDCTRL0_DOTCLK_ACT_FAILING      (1 << 25)
 108 #define VDCTRL0_ENABLE_ACT_HIGH         (1 << 24)
 109 #define VDCTRL0_VSYNC_PERIOD_UNIT       (1 << 21)
 110 #define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT  (1 << 20)
 111 #define VDCTRL0_HALF_LINE               (1 << 19)
 112 #define VDCTRL0_HALF_LINE_MODE          (1 << 18)
 113 #define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 114 #define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 115
 116 #define VDCTRL2_SET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 117 #define VDCTRL2_GET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 118
 119 #define VDCTRL3_MUX_SYNC_SIGNALS        (1 << 29)
 120 #define VDCTRL3_VSYNC_ONLY              (1 << 28)
 121 #define SET_HOR_WAIT_CNT(x)             (((x) & 0xfff) << 16)
 122 #define GET_HOR_WAIT_CNT(x)             (((x) >> 16) & 0xfff)
 123 #define SET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 124 #define GET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 125
 126 #define VDCTRL4_SET_DOTCLK_DLY(x)       (((x) & 0x7) << 29) /* v4 only */
 127 #define VDCTRL4_GET_DOTCLK_DLY(x)       (((x) >> 29) & 0x7) /* v4 only */
 128 #define VDCTRL4_SYNC_SIGNALS_ON         (1 << 18)
 129 #define SET_DOTCLK_H_VALID_DATA_CNT(x)  ((x) & 0x3ffff)
 130
 131 #define DEBUG0_HSYNC                    (1 < 26)
 132 #define DEBUG0_VSYNC                    (1 < 25)
 133
 134 #define MIN_XRES                        120
 135 #define MIN_YRES                        120
 136
 137 #define RED 0
 138 #define GREEN 1
 139 #define BLUE 2
 140 #define TRANSP 3
 141
 142 enum mxsfb_devtype {
 143         MXSFB_V3,
 144         MXSFB_V4,
 145 };
 146
 147 /* CPU dependent register offsets */
 148 struct mxsfb_devdata {
 149         unsigned transfer_count;
 150         unsigned cur_buf;
 151         unsigned next_buf;
 152         unsigned debug0;
 153         unsigned hs_wdth_mask;
 154         unsigned hs_wdth_shift;
 155         unsigned ipversion;
 156 };
 157
 158 struct mxsfb_info {
 159         struct fb_info fb_info;
 160         struct platform_device *pdev;
 161         struct clk *clk;
 162         void __iomem *base;     /* registers */
 163         unsigned allocated_size;
 164         int enabled;
 165         unsigned ld_intf_width;
 166         unsigned dotclk_delay;
 167         const struct mxsfb_devdata *devdata;
 168         int mapped;
 169 };
 170
 171 #define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
 172 #define mxsfb_is_v4(host) (host->devdata->ipversion == 4)
 173
 174 static const struct mxsfb_devdata mxsfb_devdata[] = {
 175         [MXSFB_V3] = {
 176                 .transfer_count = LCDC_V3_TRANSFER_COUNT,
 177                 .cur_buf = LCDC_V3_CUR_BUF,
 178                 .next_buf = LCDC_V3_NEXT_BUF,
 179                 .debug0 = LCDC_V3_DEBUG0,
 180                 .hs_wdth_mask = 0xff,
 181                 .hs_wdth_shift = 24,
 182                 .ipversion = 3,
 183         },
 184         [MXSFB_V4] = {
 185                 .transfer_count = LCDC_V4_TRANSFER_COUNT,
 186                 .cur_buf = LCDC_V4_CUR_BUF,
 187                 .next_buf = LCDC_V4_NEXT_BUF,
 188                 .debug0 = LCDC_V4_DEBUG0,
 189                 .hs_wdth_mask = 0x3fff,
 190                 .hs_wdth_shift = 18,
 191                 .ipversion = 4,
 192         },
 193 };
 194
 195 #define to_imxfb_host(x) (container_of(x, struct mxsfb_info, fb_info))
 196
 197 /* mask and shift depends on architecture */
 198 static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 199 {
 200         return (val & host->devdata->hs_wdth_mask) <<
 201                 host->devdata->hs_wdth_shift;
 202 }
 203
 204 static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 205 {
 206         return (val >> host->devdata->hs_wdth_shift) &
 207                 host->devdata->hs_wdth_mask;
 208 }
 209
 210 static const struct fb_bitfield def_rgb565[] = {
 211         [RED] = {
 212                 .offset = 11,
 213                 .length = 5,
 214         },
 215         [GREEN] = {
 216                 .offset = 5,
 217                 .length = 6,
 218         },
 219         [BLUE] = {
 220                 .offset = 0,
 221                 .length = 5,
 222         },
 223         [TRANSP] = {    /* no support for transparency */
 224                 .length = 0,
 225         }
 226 };
 227
 228 static const struct fb_bitfield def_rgb666[] = {
 229         [RED] = {
 230                 .offset = 16,
 231                 .length = 6,
 232         },
 233         [GREEN] = {
 234                 .offset = 8,
 235                 .length = 6,
 236         },
 237         [BLUE] = {
 238                 .offset = 0,
 239                 .length = 6,
 240         },
 241         [TRANSP] = {    /* no support for transparency */
 242                 .length = 0,
 243         }
 244 };
 245
 246 static const struct fb_bitfield def_rgb888[] = {
 247         [RED] = {
 248                 .offset = 16,
 249                 .length = 8,
 250         },
 251         [GREEN] = {
 252                 .offset = 8,
 253                 .length = 8,
 254         },
 255         [BLUE] = {
 256                 .offset = 0,
 257                 .length = 8,
 258         },
 259         [TRANSP] = {    /* no support for transparency */
 260                 .length = 0,
 261         }
 262 };
 263
 264 static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf)
 265 {
 266         chan &= 0xffff;
 267         chan >>= 16 - bf->length;
 268         return chan << bf->offset;
 269 }
 270
 271 static int mxsfb_check_var(struct fb_var_screeninfo *var,
 272                 struct fb_info *fb_info)
 273 {
 274         struct mxsfb_info *host = to_imxfb_host(fb_info);
 275         const struct fb_bitfield *rgb = NULL;
 276
 277         if (var->xres < MIN_XRES)
 278                 var->xres = MIN_XRES;
 279         if (var->yres < MIN_YRES)
 280                 var->yres = MIN_YRES;
 281
 282         var->xres_virtual = var->xres;
 283
 284         var->yres_virtual = var->yres;
 285
 286         switch (var->bits_per_pixel) {
 287         case 16:
 288                 /* always expect RGB 565 */
 289                 rgb = def_rgb565;
 290                 break;
 291         case 32:
 292                 switch (host->ld_intf_width) {
 293                 case STMLCDIF_8BIT:
 294                         pr_debug("Unsupported LCD bus width mapping\n");
 295                         break;
 296                 case STMLCDIF_16BIT:
 297                 case STMLCDIF_18BIT:
 298                         /* 24 bit to 18 bit mapping */
 299                         rgb = def_rgb666;
 300                         break;
 301                 case STMLCDIF_24BIT:
 302                         /* real 24 bit */
 303                         rgb = def_rgb888;
 304                         break;
 305                 }
 306                 break;
 307         default:
 308                 pr_debug("Unsupported colour depth: %u\n", var->bits_per_pixel);
 309                 return -EINVAL;
 310         }
 311
 312         /*
 313          * Copy the RGB parameters for this display
 314          * from the machine specific parameters.
 315          */
 316         var->red    = rgb[RED];
 317         var->green  = rgb[GREEN];
 318         var->blue   = rgb[BLUE];
 319         var->transp = rgb[TRANSP];
 320
 321         return 0;
 322 }
 323
 324 static void mxsfb_enable_controller(struct fb_info *fb_info)
 325 {
 326         struct mxsfb_info *host = to_imxfb_host(fb_info);
 327         u32 reg;
 328
 329         dev_dbg(&host->pdev->dev, "%s\n", __func__);
 330
 331         clk_enable(host->clk);
 332         clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U);
 333
 334         /* if it was disabled, re-enable the mode again */
 335         writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET);
 336
 337         /* enable the SYNC signals first, then the DMA engine */
 338         reg = readl(host->base + LCDC_VDCTRL4);
 339         reg |= VDCTRL4_SYNC_SIGNALS_ON;
 340         writel(reg, host->base + LCDC_VDCTRL4);
 341
 342         writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET);
 343
 344         host->enabled = 1;
 345 }
 346
 347 static void mxsfb_disable_controller(struct fb_info *fb_info)
 348 {
 349         struct mxsfb_info *host = to_imxfb_host(fb_info);
 350         unsigned loop;
 351         u32 reg;
 352
 353         dev_dbg(&host->pdev->dev, "%s\n", __func__);
 354
 355         /*
 356          * Even if we disable the controller here, it will still continue
 357          * until its FIFOs are running out of data
 358          */
 359         writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR);
 360
 361         loop = 1000;
 362         while (loop) {
 363                 reg = readl(host->base + LCDC_CTRL);
 364                 if (!(reg & CTRL_RUN))
 365                         break;
 366                 loop--;
 367         }
 368
 369         reg = readl(host->base + LCDC_VDCTRL4);
 370         writel(reg & ~VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4);
 371
 372         clk_disable(host->clk);
 373
 374         host->enabled = 0;
 375 }
 376
 377 static int mxsfb_set_par(struct fb_info *fb_info)
 378 {
 379         struct mxsfb_info *host = to_imxfb_host(fb_info);
 380         u32 ctrl, vdctrl0, vdctrl4;
 381         int line_size, fb_size;
 382         int reenable = 0;
 383
 384         line_size =  fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3);
 385         fb_size = fb_info->var.yres_virtual * line_size;
 386
 387         if (fb_size > fb_info->fix.smem_len)
 388                 return -ENOMEM;
 389
 390         fb_info->fix.line_length = line_size;
 391
 392         /*
 393          * It seems, you can't re-program the controller if it is still running.
 394          * This may lead into shifted pictures (FIFO issue?).
 395          * So, first stop the controller and drain its FIFOs
 396          */
 397         if (host->enabled) {
 398                 reenable = 1;
 399                 mxsfb_disable_controller(fb_info);
 400         }
 401
 402         /* clear the FIFOs */
 403         writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET);
 404
 405         ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER |
 406                 CTRL_SET_BUS_WIDTH(host->ld_intf_width);
 407
 408         switch (fb_info->var.bits_per_pixel) {
 409         case 16:
 410                 dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n");
 411                 ctrl |= CTRL_SET_WORD_LENGTH(0);
 412                 writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1);
 413                 break;
 414         case 32:
 415                 dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n");
 416                 ctrl |= CTRL_SET_WORD_LENGTH(3);
 417                 switch (host->ld_intf_width) {
 418                 case STMLCDIF_8BIT:
 419                         dev_dbg(&host->pdev->dev,
 420                                         "Unsupported LCD bus width mapping\n");
 421                         return -EINVAL;
 422                 case STMLCDIF_16BIT:
 423                 case STMLCDIF_18BIT:
 424                         /* 24 bit to 18 bit mapping */
 425                         ctrl |= CTRL_DF24; /* ignore the upper 2 bits in
 426                                             *  each colour component
 427                                             */
 428                         break;
 429                 case STMLCDIF_24BIT:
 430                         /* real 24 bit */
 431                         break;
 432                 }
 433                 /* do not use packed pixels = one pixel per word instead */
 434                 writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1);
 435                 break;
 436         default:
 437                 dev_dbg(&host->pdev->dev, "Unhandled color depth of %u\n",
 438                                 fb_info->var.bits_per_pixel);
 439                 return -EINVAL;
 440         }
 441
 442         writel(ctrl, host->base + LCDC_CTRL);
 443
 444         writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) |
 445                         TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres),
 446                         host->base + host->devdata->transfer_count);
 447
 448         vdctrl0 = VDCTRL0_ENABLE_PRESENT |      /* always in DOTCLOCK mode */
 449                 VDCTRL0_VSYNC_PERIOD_UNIT |
 450                 VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
 451                 VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len);
 452         if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT)
 453                 vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
 454         if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
 455                 vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
 456         if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT)
 457                 vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
 458         if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT)
 459                 vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
 460
 461         writel(vdctrl0, host->base + LCDC_VDCTRL0);
 462
 463         /* frame length in lines */
 464         writel(fb_info->var.upper_margin + fb_info->var.vsync_len +
 465                 fb_info->var.lower_margin + fb_info->var.yres,
 466                 host->base + LCDC_VDCTRL1);
 467
 468         /* line length in units of clocks or pixels */
 469         writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) |
 470                 VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin +
 471                 fb_info->var.hsync_len + fb_info->var.right_margin +
 472                 fb_info->var.xres),
 473                 host->base + LCDC_VDCTRL2);
 474
 475         writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin +
 476                 fb_info->var.hsync_len) |
 477                 SET_VERT_WAIT_CNT(fb_info->var.upper_margin +
 478                         fb_info->var.vsync_len),
 479                 host->base + LCDC_VDCTRL3);
 480
 481         vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres);
 482         if (mxsfb_is_v4(host))
 483                 vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay);
 484         writel(vdctrl4, host->base + LCDC_VDCTRL4);
 485
 486         writel(fb_info->fix.smem_start +
 487                         fb_info->fix.line_length * fb_info->var.yoffset,
 488                         host->base + host->devdata->next_buf);
 489
 490         if (reenable)
 491                 mxsfb_enable_controller(fb_info);
 492
 493         return 0;
 494 }
 495
 496 static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 497                 u_int transp, struct fb_info *fb_info)
 498 {
 499         unsigned int val;
 500         int ret = -EINVAL;
 501
 502         /*
 503          * If greyscale is true, then we convert the RGB value
 504          * to greyscale no matter what visual we are using.
 505          */
 506         if (fb_info->var.grayscale)
 507                 red = green = blue = (19595 * red + 38470 * green +
 508                                         7471 * blue) >> 16;
 509
 510         switch (fb_info->fix.visual) {
 511         case FB_VISUAL_TRUECOLOR:
 512                 /*
 513                  * 12 or 16-bit True Colour.  We encode the RGB value
 514                  * according to the RGB bitfield information.
 515                  */
 516                 if (regno < 16) {
 517                         u32 *pal = fb_info->pseudo_palette;
 518
 519                         val  = chan_to_field(red, &fb_info->var.red);
 520                         val |= chan_to_field(green, &fb_info->var.green);
 521                         val |= chan_to_field(blue, &fb_info->var.blue);
 522
 523                         pal[regno] = val;
 524                         ret = 0;
 525                 }
 526                 break;
 527
 528         case FB_VISUAL_STATIC_PSEUDOCOLOR:
 529         case FB_VISUAL_PSEUDOCOLOR:
 530                 break;
 531         }
 532
 533         return ret;
 534 }
 535
 536 static int mxsfb_blank(int blank, struct fb_info *fb_info)
 537 {
 538         struct mxsfb_info *host = to_imxfb_host(fb_info);
 539
 540         switch (blank) {
 541         case FB_BLANK_POWERDOWN:
 542         case FB_BLANK_VSYNC_SUSPEND:
 543         case FB_BLANK_HSYNC_SUSPEND:
 544         case FB_BLANK_NORMAL:
 545                 if (host->enabled)
 546                         mxsfb_disable_controller(fb_info);
 547                 break;
 548
 549         case FB_BLANK_UNBLANK:
 550                 if (!host->enabled)
 551                         mxsfb_enable_controller(fb_info);
 552                 break;
 553         }
 554         return 0;
 555 }
 556
 557 static int mxsfb_pan_display(struct fb_var_screeninfo *var,
 558                 struct fb_info *fb_info)
 559 {
 560         struct mxsfb_info *host = to_imxfb_host(fb_info);
 561         unsigned offset;
 562
 563         if (var->xoffset != 0)
 564                 return -EINVAL;
 565
 566         offset = fb_info->fix.line_length * var->yoffset;
 567
 568         /* update on next VSYNC */
 569         writel(fb_info->fix.smem_start + offset,
 570                         host->base + host->devdata->next_buf);
 571
 572         return 0;
 573 }
 574
 575 static struct fb_ops mxsfb_ops = {
 576         .owner = THIS_MODULE,
 577         .fb_check_var = mxsfb_check_var,
 578         .fb_set_par = mxsfb_set_par,
 579         .fb_setcolreg = mxsfb_setcolreg,
 580         .fb_blank = mxsfb_blank,
 581         .fb_pan_display = mxsfb_pan_display,
 582         .fb_fillrect = cfb_fillrect,
 583         .fb_copyarea = cfb_copyarea,
 584         .fb_imageblit = cfb_imageblit,
 585 };
 586
 587 static int __devinit mxsfb_restore_mode(struct mxsfb_info *host)
 588 {
 589         struct fb_info *fb_info = &host->fb_info;
 590         unsigned line_count;
 591         unsigned period;
 592         unsigned long pa, fbsize;
 593         int bits_per_pixel, ofs;
 594         u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl;
 595         struct fb_videomode vmode;
 596
 597         /* Only restore the mode when the controller is running */
 598         ctrl = readl(host->base + LCDC_CTRL);
 599         if (!(ctrl & CTRL_RUN))
 600                 return -EINVAL;
 601
 602         vdctrl0 = readl(host->base + LCDC_VDCTRL0);
 603         vdctrl2 = readl(host->base + LCDC_VDCTRL2);
 604         vdctrl3 = readl(host->base + LCDC_VDCTRL3);
 605         vdctrl4 = readl(host->base + LCDC_VDCTRL4);
 606
 607         transfer_count = readl(host->base + host->devdata->transfer_count);
 608
 609         vmode.xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count);
 610         vmode.yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count);
 611
 612         switch (CTRL_GET_WORD_LENGTH(ctrl)) {
 613         case 0:
 614                 bits_per_pixel = 16;
 615                 break;
 616         case 3:
 617                 bits_per_pixel = 32;
 618         case 1:
 619         default:
 620                 return -EINVAL;
 621         }
 622
 623         fb_info->var.bits_per_pixel = bits_per_pixel;
 624
 625         vmode.pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U);
 626         vmode.hsync_len = get_hsync_pulse_width(host, vdctrl2);
 627         vmode.left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode.hsync_len;
 628         vmode.right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - vmode.hsync_len -
 629                 vmode.left_margin - vmode.xres;
 630         vmode.vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0);
 631         period = readl(host->base + LCDC_VDCTRL1);
 632         vmode.upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode.vsync_len;
 633         vmode.lower_margin = period - vmode.vsync_len - vmode.upper_margin - vmode.yres;
 634
 635         vmode.vmode = FB_VMODE_NONINTERLACED;
 636
 637         vmode.sync = 0;
 638         if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH)
 639                 vmode.sync |= FB_SYNC_HOR_HIGH_ACT;
 640         if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH)
 641                 vmode.sync |= FB_SYNC_VERT_HIGH_ACT;
 642
 643         pr_debug("Reconstructed video mode:\n");
 644         pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n",
 645                         vmode.xres, vmode.yres,
 646                         vmode.hsync_len, vmode.left_margin, vmode.right_margin,
 647                         vmode.vsync_len, vmode.upper_margin, vmode.lower_margin);
 648         pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode.pixclock));
 649
 650         fb_add_videomode(&vmode, &fb_info->modelist);
 651
 652         host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl);
 653         host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4);
 654
 655         fb_info->fix.line_length = vmode.xres * (bits_per_pixel >> 3);
 656
 657         pa = readl(host->base + host->devdata->cur_buf);
 658         fbsize = fb_info->fix.line_length * vmode.yres;
 659         if (pa < fb_info->fix.smem_start)
 660                 return -EINVAL;
 661         if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len)
 662                 return -EINVAL;
 663         ofs = pa - fb_info->fix.smem_start;
 664         if (ofs) {
 665                 memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize);
 666                 writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf);
 667         }
 668
 669         line_count = fb_info->fix.smem_len / fb_info->fix.line_length;
 670         fb_info->fix.ypanstep = 1;
 671
 672         clk_enable(host->clk);
 673         host->enabled = 1;
 674
 675         return 0;
 676 }
 677
 678 static int __devinit mxsfb_init_fbinfo(struct mxsfb_info *host)
 679 {
 680         struct fb_info *fb_info = &host->fb_info;
 681         struct fb_var_screeninfo *var = &fb_info->var;
 682         struct mxsfb_platform_data *pdata = host->pdev->dev.platform_data;
 683         dma_addr_t fb_phys;
 684         void *fb_virt;
 685         unsigned fb_size = pdata->fb_size;
 686
 687         fb_info->fbops = &mxsfb_ops;
 688         fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
 689         strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id));
 690         fb_info->fix.type = FB_TYPE_PACKED_PIXELS;
 691         fb_info->fix.ypanstep = 1;
 692         fb_info->fix.visual = FB_VISUAL_TRUECOLOR,
 693         fb_info->fix.accel = FB_ACCEL_NONE;
 694
 695         var->bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
 696         var->nonstd = 0;
 697         var->activate = FB_ACTIVATE_NOW;
 698         var->accel_flags = 0;
 699         var->vmode = FB_VMODE_NONINTERLACED;
 700
 701         host->dotclk_delay = pdata->dotclk_delay;
 702         host->ld_intf_width = pdata->ld_intf_width;
 703
 704         /* Memory allocation for framebuffer */
 705         if (pdata->fb_phys) {
 706                 if (!fb_size)
 707                         return -EINVAL;
 708
 709                 fb_phys = pdata->fb_phys;
 710
 711                 if (!request_mem_region(fb_phys, fb_size, host->pdev->name))
 712                         return -ENOMEM;
 713
 714                 fb_virt = ioremap(fb_phys, fb_size);
 715                 if (!fb_virt) {
 716                         release_mem_region(fb_phys, fb_size);
 717                         return -ENOMEM;
 718                 }
 719                 host->mapped = 1;
 720         } else {
 721                 if (!fb_size)
 722                         fb_size = SZ_2M; /* default */
 723                 fb_virt = alloc_pages_exact(fb_size, GFP_DMA);
 724                 if (!fb_virt)
 725                         return -ENOMEM;
 726
 727                 fb_phys = virt_to_phys(fb_virt);
 728         }
 729
 730         fb_info->fix.smem_start = fb_phys;
 731         fb_info->screen_base = fb_virt;
 732         fb_info->screen_size = fb_info->fix.smem_len = fb_size;
 733
 734         if (mxsfb_restore_mode(host))
 735                 memset(fb_virt, 0, fb_size);
 736
 737         return 0;
 738 }
 739
 740 static void __devexit mxsfb_free_videomem(struct mxsfb_info *host)
 741 {
 742         struct fb_info *fb_info = &host->fb_info;
 743
 744         if (host->mapped) {
 745                 iounmap(fb_info->screen_base);
 746                 release_mem_region(fb_info->fix.smem_start,
 747                                 fb_info->screen_size);
 748         } else {
 749                 free_pages_exact(fb_info->screen_base, fb_info->fix.smem_len);
 750         }
 751 }
 752
 753 static int __devinit mxsfb_probe(struct platform_device *pdev)
 754 {
 755         struct mxsfb_platform_data *pdata = pdev->dev.platform_data;
 756         struct resource *res;
 757         struct mxsfb_info *host;
 758         struct fb_info *fb_info;
 759         struct fb_modelist *modelist;
 760         int i, ret;
 761
 762         if (!pdata) {
 763                 dev_err(&pdev->dev, "No platformdata. Giving up\n");
 764                 return -ENODEV;
 765         }
 766
 767         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 768         if (!res) {
 769                 dev_err(&pdev->dev, "Cannot get memory IO resource\n");
 770                 return -ENODEV;
 771         }
 772
 773         if (!request_mem_region(res->start, resource_size(res), pdev->name))
 774                 return -EBUSY;
 775
 776         fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev);
 777         if (!fb_info) {
 778                 dev_err(&pdev->dev, "Failed to allocate fbdev\n");
 779                 ret = -ENOMEM;
 780                 goto error_alloc_info;
 781         }
 782
 783         host = to_imxfb_host(fb_info);
 784
 785         host->base = ioremap(res->start, resource_size(res));
 786         if (!host->base) {
 787                 dev_err(&pdev->dev, "ioremap failed\n");
 788                 ret = -ENOMEM;
 789                 goto error_ioremap;
 790         }
 791
 792         host->pdev = pdev;
 793         platform_set_drvdata(pdev, host);
 794
 795         host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
 796
 797         host->clk = clk_get(&host->pdev->dev, NULL);
 798         if (IS_ERR(host->clk)) {
 799                 ret = PTR_ERR(host->clk);
 800                 goto error_getclock;
 801         }
 802
 803         fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
 804         if (!fb_info->pseudo_palette) {
 805                 ret = -ENOMEM;
 806                 goto error_pseudo_pallette;
 807         }
 808
 809         INIT_LIST_HEAD(&fb_info->modelist);
 810
 811         ret = mxsfb_init_fbinfo(host);
 812         if (ret != 0)
 813                 goto error_init_fb;
 814
 815         for (i = 0; i < pdata->mode_count; i++)
 816                 fb_add_videomode(&pdata->mode_list[i], &fb_info->modelist);
 817
 818         modelist = list_first_entry(&fb_info->modelist,
 819                         struct fb_modelist, list);
 820         fb_videomode_to_var(&fb_info->var, &modelist->mode);
 821
 822         /* init the color fields */
 823         mxsfb_check_var(&fb_info->var, fb_info);
 824
 825         platform_set_drvdata(pdev, fb_info);
 826
 827         ret = register_framebuffer(fb_info);
 828         if (ret != 0) {
 829                 dev_err(&pdev->dev,"Failed to register framebuffer\n");
 830                 goto error_register;
 831         }
 832
 833         if (!host->enabled) {
 834                 writel(0, host->base + LCDC_CTRL);
 835                 mxsfb_set_par(fb_info);
 836                 mxsfb_enable_controller(fb_info);
 837         }
 838
 839         dev_info(&pdev->dev, "initialized\n");
 840
 841         return 0;
 842
 843 error_register:
 844         if (host->enabled)
 845                 clk_disable(host->clk);
 846         fb_destroy_modelist(&fb_info->modelist);
 847 error_init_fb:
 848         kfree(fb_info->pseudo_palette);
 849 error_pseudo_pallette:
 850         clk_put(host->clk);
 851 error_getclock:
 852         iounmap(host->base);
 853 error_ioremap:
 854         framebuffer_release(fb_info);
 855 error_alloc_info:
 856         release_mem_region(res->start, resource_size(res));
 857
 858         return ret;
 859 }
 860
 861 static int __devexit mxsfb_remove(struct platform_device *pdev)
 862 {
 863         struct fb_info *fb_info = platform_get_drvdata(pdev);
 864         struct mxsfb_info *host = to_imxfb_host(fb_info);
 865         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 866
 867         if (host->enabled)
 868                 mxsfb_disable_controller(fb_info);
 869
 870         unregister_framebuffer(fb_info);
 871         kfree(fb_info->pseudo_palette);
 872         mxsfb_free_videomem(host);
 873         iounmap(host->base);
 874         clk_put(host->clk);
 875
 876         framebuffer_release(fb_info);
 877         release_mem_region(res->start, resource_size(res));
 878
 879         platform_set_drvdata(pdev, NULL);
 880
 881         return 0;
 882 }
 883
 884 static struct platform_device_id mxsfb_devtype[] = {
 885         {
 886                 .name = "imx23-fb",
 887                 .driver_data = MXSFB_V3,
 888         }, {
 889                 .name = "imx28-fb",
 890                 .driver_data = MXSFB_V4,
 891         }, {
 892                 /* sentinel */
 893         }
 894 };
 895 MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
 896
 897 static struct platform_driver mxsfb_driver = {
 898         .probe = mxsfb_probe,
 899         .remove = __devexit_p(mxsfb_remove),
 900         .id_table = mxsfb_devtype,
 901         .driver = {
 902                    .name = DRIVER_NAME,
 903         },
 904 };
 905
 906 static int __init mxsfb_init(void)
 907 {
 908         return platform_driver_register(&mxsfb_driver);
 909 }
 910
 911 static void __exit mxsfb_exit(void)
 912 {
 913         platform_driver_unregister(&mxsfb_driver);
 914 }
 915
 916 module_init(mxsfb_init);
 917 module_exit(mxsfb_exit);
 918
 919 MODULE_DESCRIPTION("Freescale mxs framebuffer driver");
 920 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 921 MODULE_LICENSE("GPL");