drivers/usb/otg/langwell_otg.c

   1 /*
   2  * Intel Langwell USB OTG transceiver driver
   3  * Copyright (C) 2008 - 2010, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  */
  19 /* This driver helps to switch Langwell OTG controller function between host
  20  * and peripheral. It works with EHCI driver and Langwell client controller
  21  * driver together.
  22  */
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/pci.h>
  26 #include <linux/errno.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/kernel.h>
  29 #include <linux/device.h>
  30 #include <linux/moduleparam.h>
  31 #include <linux/usb/ch9.h>
  32 #include <linux/usb/gadget.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/usb/hcd.h>
  36 #include <linux/notifier.h>
  37 #include <linux/delay.h>
  38 #include <asm/intel_scu_ipc.h>
  39
  40 #include <linux/usb/langwell_otg.h>
  41
  42 #define DRIVER_DESC             "Intel Langwell USB OTG transceiver driver"
  43 #define DRIVER_VERSION          "July 10, 2010"
  44
  45 MODULE_DESCRIPTION(DRIVER_DESC);
  46 MODULE_AUTHOR("Henry Yuan <hang.yuan@intel.com>, Hao Wu <hao.wu@intel.com>");
  47 MODULE_VERSION(DRIVER_VERSION);
  48 MODULE_LICENSE("GPL");
  49
  50 static const char driver_name[] = "langwell_otg";
  51
  52 static int langwell_otg_probe(struct pci_dev *pdev,
  53                         const struct pci_device_id *id);
  54 static void langwell_otg_remove(struct pci_dev *pdev);
  55 static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message);
  56 static int langwell_otg_resume(struct pci_dev *pdev);
  57
  58 static int langwell_otg_set_host(struct otg_transceiver *otg,
  59                                 struct usb_bus *host);
  60 static int langwell_otg_set_peripheral(struct otg_transceiver *otg,
  61                                 struct usb_gadget *gadget);
  62 static int langwell_otg_start_srp(struct otg_transceiver *otg);
  63
  64 static const struct pci_device_id pci_ids[] = {{
  65         .class =        ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  66         .class_mask =   ~0,
  67         .vendor =       0x8086,
  68         .device =       0x0811,
  69         .subvendor =    PCI_ANY_ID,
  70         .subdevice =    PCI_ANY_ID,
  71 }, { /* end: all zeroes */ }
  72 };
  73
  74 static struct pci_driver otg_pci_driver = {
  75         .name =         (char *) driver_name,
  76         .id_table =     pci_ids,
  77
  78         .probe =        langwell_otg_probe,
  79         .remove =       langwell_otg_remove,
  80
  81         .suspend =      langwell_otg_suspend,
  82         .resume =       langwell_otg_resume,
  83 };
  84
  85 /* HSM timers */
  86 static inline struct langwell_otg_timer *otg_timer_initializer
  87 (void (*function)(unsigned long), unsigned long expires, unsigned long data)
  88 {
  89         struct langwell_otg_timer *timer;
  90         timer = kmalloc(sizeof(struct langwell_otg_timer), GFP_KERNEL);
  91         if (timer == NULL)
  92                 return timer;
  93
  94         timer->function = function;
  95         timer->expires = expires;
  96         timer->data = data;
  97         return timer;
  98 }
  99
 100 static struct langwell_otg_timer *a_wait_vrise_tmr, *a_aidl_bdis_tmr,
 101         *b_se0_srp_tmr, *b_srp_init_tmr;
 102
 103 static struct list_head active_timers;
 104
 105 static struct langwell_otg *the_transceiver;
 106
 107 /* host/client notify transceiver when event affects HNP state */
 108 void langwell_update_transceiver(void)
 109 {
 110         struct langwell_otg *lnw = the_transceiver;
 111
 112         dev_dbg(lnw->dev, "transceiver is updated\n");
 113
 114         if (!lnw->qwork)
 115                 return ;
 116
 117         queue_work(lnw->qwork, &lnw->work);
 118 }
 119 EXPORT_SYMBOL(langwell_update_transceiver);
 120
 121 static int langwell_otg_set_host(struct otg_transceiver *otg,
 122                                         struct usb_bus *host)
 123 {
 124         otg->host = host;
 125
 126         return 0;
 127 }
 128
 129 static int langwell_otg_set_peripheral(struct otg_transceiver *otg,
 130                                         struct usb_gadget *gadget)
 131 {
 132         otg->gadget = gadget;
 133
 134         return 0;
 135 }
 136
 137 static int langwell_otg_set_power(struct otg_transceiver *otg,
 138                                 unsigned mA)
 139 {
 140         return 0;
 141 }
 142
 143 /* A-device drives vbus, controlled through IPC commands */
 144 static int langwell_otg_set_vbus(struct otg_transceiver *otg, bool enabled)
 145 {
 146         struct langwell_otg             *lnw = the_transceiver;
 147         u8                              sub_id;
 148
 149         dev_dbg(lnw->dev, "%s <--- %s\n", __func__, enabled ? "on" : "off");
 150
 151         if (enabled)
 152                 sub_id = 0x8; /* Turn on the VBus */
 153         else
 154                 sub_id = 0x9; /* Turn off the VBus */
 155
 156         if (intel_scu_ipc_simple_command(0xef, sub_id)) {
 157                 dev_dbg(lnw->dev, "Failed to set Vbus via IPC commands\n");
 158                 return -EBUSY;
 159         }
 160
 161         dev_dbg(lnw->dev, "%s --->\n", __func__);
 162
 163         return 0;
 164 }
 165
 166 /* charge vbus or discharge vbus through a resistor to ground */
 167 static void langwell_otg_chrg_vbus(int on)
 168 {
 169         struct langwell_otg     *lnw = the_transceiver;
 170         u32     val;
 171
 172         val = readl(lnw->iotg.base + CI_OTGSC);
 173
 174         if (on)
 175                 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VC,
 176                                 lnw->iotg.base + CI_OTGSC);
 177         else
 178                 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VD,
 179                                 lnw->iotg.base + CI_OTGSC);
 180 }
 181
 182 /* Start SRP */
 183 static int langwell_otg_start_srp(struct otg_transceiver *otg)
 184 {
 185         struct langwell_otg             *lnw = the_transceiver;
 186         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 187         u32                             val;
 188
 189         dev_dbg(lnw->dev, "%s --->\n", __func__);
 190
 191         val = readl(iotg->base + CI_OTGSC);
 192
 193         writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP,
 194                                 iotg->base + CI_OTGSC);
 195
 196         /* Check if the data plus is finished or not */
 197         msleep(8);
 198         val = readl(iotg->base + CI_OTGSC);
 199         if (val & (OTGSC_HADP | OTGSC_DP))
 200                 dev_dbg(lnw->dev, "DataLine SRP Error\n");
 201
 202         /* Disable interrupt - b_sess_vld */
 203         val = readl(iotg->base + CI_OTGSC);
 204         val &= (~(OTGSC_BSVIE | OTGSC_BSEIE));
 205         writel(val, iotg->base + CI_OTGSC);
 206
 207         /* Start VBus SRP, drive vbus to generate VBus pulse */
 208         iotg->otg.set_vbus(&iotg->otg, true);
 209         msleep(15);
 210         iotg->otg.set_vbus(&iotg->otg, false);
 211
 212         /* Enable interrupt - b_sess_vld*/
 213         val = readl(iotg->base + CI_OTGSC);
 214         dev_dbg(lnw->dev, "after VBUS pulse otgsc = %x\n", val);
 215
 216         val |= (OTGSC_BSVIE | OTGSC_BSEIE);
 217         writel(val, iotg->base + CI_OTGSC);
 218
 219         /* If Vbus is valid, then update the hsm */
 220         if (val & OTGSC_BSV) {
 221                 dev_dbg(lnw->dev, "no b_sess_vld interrupt\n");
 222
 223                 lnw->iotg.hsm.b_sess_vld = 1;
 224                 langwell_update_transceiver();
 225         }
 226
 227         dev_dbg(lnw->dev, "%s <---\n", __func__);
 228         return 0;
 229 }
 230
 231 /* stop SOF via bus_suspend */
 232 static void langwell_otg_loc_sof(int on)
 233 {
 234         struct langwell_otg     *lnw = the_transceiver;
 235         struct usb_hcd          *hcd;
 236         int                     err;
 237
 238         dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "suspend" : "resume");
 239
 240         hcd = bus_to_hcd(lnw->iotg.otg.host);
 241         if (on)
 242                 err = hcd->driver->bus_resume(hcd);
 243         else
 244                 err = hcd->driver->bus_suspend(hcd);
 245
 246         if (err)
 247                 dev_dbg(lnw->dev, "Fail to resume/suspend USB bus - %d\n", err);
 248
 249         dev_dbg(lnw->dev, "%s <---\n", __func__);
 250 }
 251
 252 static int langwell_otg_check_otgsc(void)
 253 {
 254         struct langwell_otg             *lnw = the_transceiver;
 255         u32                             otgsc, usbcfg;
 256
 257         dev_dbg(lnw->dev, "check sync OTGSC and USBCFG registers\n");
 258
 259         otgsc = readl(lnw->iotg.base + CI_OTGSC);
 260         usbcfg = readl(lnw->usbcfg);
 261
 262         dev_dbg(lnw->dev, "OTGSC = %08x, USBCFG = %08x\n",
 263                                         otgsc, usbcfg);
 264         dev_dbg(lnw->dev, "OTGSC_AVV = %d\n", !!(otgsc & OTGSC_AVV));
 265         dev_dbg(lnw->dev, "USBCFG.VBUSVAL = %d\n",
 266                                         !!(usbcfg & USBCFG_VBUSVAL));
 267         dev_dbg(lnw->dev, "OTGSC_ASV = %d\n", !!(otgsc & OTGSC_ASV));
 268         dev_dbg(lnw->dev, "USBCFG.AVALID = %d\n",
 269                                         !!(usbcfg & USBCFG_AVALID));
 270         dev_dbg(lnw->dev, "OTGSC_BSV = %d\n", !!(otgsc & OTGSC_BSV));
 271         dev_dbg(lnw->dev, "USBCFG.BVALID = %d\n",
 272                                         !!(usbcfg & USBCFG_BVALID));
 273         dev_dbg(lnw->dev, "OTGSC_BSE = %d\n", !!(otgsc & OTGSC_BSE));
 274         dev_dbg(lnw->dev, "USBCFG.SESEND = %d\n",
 275                                         !!(usbcfg & USBCFG_SESEND));
 276
 277         /* Check USBCFG VBusValid/AValid/BValid/SessEnd */
 278         if (!!(otgsc & OTGSC_AVV) ^ !!(usbcfg & USBCFG_VBUSVAL)) {
 279                 dev_dbg(lnw->dev, "OTGSC.AVV != USBCFG.VBUSVAL\n");
 280                 goto err;
 281         }
 282         if (!!(otgsc & OTGSC_ASV) ^ !!(usbcfg & USBCFG_AVALID)) {
 283                 dev_dbg(lnw->dev, "OTGSC.ASV != USBCFG.AVALID\n");
 284                 goto err;
 285         }
 286         if (!!(otgsc & OTGSC_BSV) ^ !!(usbcfg & USBCFG_BVALID)) {
 287                 dev_dbg(lnw->dev, "OTGSC.BSV != USBCFG.BVALID\n");
 288                 goto err;
 289         }
 290         if (!!(otgsc & OTGSC_BSE) ^ !!(usbcfg & USBCFG_SESEND)) {
 291                 dev_dbg(lnw->dev, "OTGSC.BSE != USBCFG.SESSEN\n");
 292                 goto err;
 293         }
 294
 295         dev_dbg(lnw->dev, "OTGSC and USBCFG are synced\n");
 296
 297         return 0;
 298
 299 err:
 300         dev_warn(lnw->dev, "OTGSC isn't equal to USBCFG\n");
 301         return -EPIPE;
 302 }
 303
 304
 305 static void langwell_otg_phy_low_power(int on)
 306 {
 307         struct langwell_otg             *lnw = the_transceiver;
 308         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 309         u8                              val, phcd;
 310         int                             retval;
 311
 312         dev_dbg(lnw->dev, "%s ---> %s mode\n",
 313                         __func__, on ? "Low power" : "Normal");
 314
 315         phcd = 0x40;
 316
 317         val = readb(iotg->base + CI_HOSTPC1 + 2);
 318
 319         if (on) {
 320                 /* Due to hardware issue, after set PHCD, sync will failed
 321                  * between USBCFG and OTGSC, so before set PHCD, check if
 322                  * sync is in process now. If the answer is "yes", then do
 323                  * not touch PHCD bit */
 324                 retval = langwell_otg_check_otgsc();
 325                 if (retval) {
 326                         dev_dbg(lnw->dev, "Skip PHCD programming..\n");
 327                         return ;
 328                 }
 329
 330                 writeb(val | phcd, iotg->base + CI_HOSTPC1 + 2);
 331         } else
 332                 writeb(val & ~phcd, iotg->base + CI_HOSTPC1 + 2);
 333
 334         dev_dbg(lnw->dev, "%s <--- done\n", __func__);
 335 }
 336
 337 /* After drv vbus, add 5 ms delay to set PHCD */
 338 static void langwell_otg_phy_low_power_wait(int on)
 339 {
 340         struct langwell_otg     *lnw = the_transceiver;
 341
 342         dev_dbg(lnw->dev, "add 5ms delay before programing PHCD\n");
 343
 344         mdelay(5);
 345         langwell_otg_phy_low_power(on);
 346 }
 347
 348 /* Enable/Disable OTG interrupt */
 349 static void langwell_otg_intr(int on)
 350 {
 351         struct langwell_otg             *lnw = the_transceiver;
 352         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 353         u32                             val;
 354
 355         dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "on" : "off");
 356
 357         val = readl(iotg->base + CI_OTGSC);
 358
 359         /* OTGSC_INT_MASK doesn't contains 1msInt */
 360         if (on) {
 361                 val = val | (OTGSC_INT_MASK);
 362                 writel(val, iotg->base + CI_OTGSC);
 363         } else {
 364                 val = val & ~(OTGSC_INT_MASK);
 365                 writel(val, iotg->base + CI_OTGSC);
 366         }
 367
 368         dev_dbg(lnw->dev, "%s <---\n", __func__);
 369 }
 370
 371 /* set HAAR: Hardware Assist Auto-Reset */
 372 static void langwell_otg_HAAR(int on)
 373 {
 374         struct langwell_otg             *lnw = the_transceiver;
 375         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 376         u32                             val;
 377
 378         dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "on" : "off");
 379
 380         val = readl(iotg->base + CI_OTGSC);
 381         if (on)
 382                 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HAAR,
 383                                         iotg->base + CI_OTGSC);
 384         else
 385                 writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HAAR,
 386                                         iotg->base + CI_OTGSC);
 387
 388         dev_dbg(lnw->dev, "%s <---\n", __func__);
 389 }
 390
 391 /* set HABA: Hardware Assist B-Disconnect to A-Connect */
 392 static void langwell_otg_HABA(int on)
 393 {
 394         struct langwell_otg             *lnw = the_transceiver;
 395         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 396         u32                             val;
 397
 398         dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "on" : "off");
 399
 400         val = readl(iotg->base + CI_OTGSC);
 401         if (on)
 402                 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HABA,
 403                                         iotg->base + CI_OTGSC);
 404         else
 405                 writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HABA,
 406                                         iotg->base + CI_OTGSC);
 407
 408         dev_dbg(lnw->dev, "%s <---\n", __func__);
 409 }
 410
 411 static int langwell_otg_check_se0_srp(int on)
 412 {
 413         struct langwell_otg     *lnw = the_transceiver;
 414         int                     delay_time = TB_SE0_SRP * 10;
 415         u32                     val;
 416
 417         dev_dbg(lnw->dev, "%s --->\n", __func__);
 418
 419         do {
 420                 udelay(100);
 421                 if (!delay_time--)
 422                         break;
 423                 val = readl(lnw->iotg.base + CI_PORTSC1);
 424                 val &= PORTSC_LS;
 425         } while (!val);
 426
 427         dev_dbg(lnw->dev, "%s <---\n", __func__);
 428         return val;
 429 }
 430
 431 /* The timeout callback function to set time out bit */
 432 static void set_tmout(unsigned long indicator)
 433 {
 434         *(int *)indicator = 1;
 435 }
 436
 437 void langwell_otg_nsf_msg(unsigned long indicator)
 438 {
 439         struct langwell_otg     *lnw = the_transceiver;
 440
 441         switch (indicator) {
 442         case 2:
 443         case 4:
 444         case 6:
 445         case 7:
 446                 dev_warn(lnw->dev,
 447                         "OTG:NSF-%lu - deivce not responding\n", indicator);
 448                 break;
 449         case 3:
 450                 dev_warn(lnw->dev,
 451                         "OTG:NSF-%lu - deivce not supported\n", indicator);
 452                 break;
 453         default:
 454                 dev_warn(lnw->dev, "Do not have this kind of NSF\n");
 455                 break;
 456         }
 457 }
 458
 459 /* Initialize timers */
 460 static int langwell_otg_init_timers(struct otg_hsm *hsm)
 461 {
 462         /* HSM used timers */
 463         a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
 464                                 (unsigned long)&hsm->a_wait_vrise_tmout);
 465         if (a_wait_vrise_tmr == NULL)
 466                 return -ENOMEM;
 467         a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
 468                                 (unsigned long)&hsm->a_aidl_bdis_tmout);
 469         if (a_aidl_bdis_tmr == NULL)
 470                 return -ENOMEM;
 471         b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
 472                                 (unsigned long)&hsm->b_se0_srp);
 473         if (b_se0_srp_tmr == NULL)
 474                 return -ENOMEM;
 475         b_srp_init_tmr = otg_timer_initializer(&set_tmout, TB_SRP_INIT,
 476                                 (unsigned long)&hsm->b_srp_init_tmout);
 477         if (b_srp_init_tmr == NULL)
 478                 return -ENOMEM;
 479
 480         return 0;
 481 }
 482
 483 /* Free timers */
 484 static void langwell_otg_free_timers(void)
 485 {
 486         kfree(a_wait_vrise_tmr);
 487         kfree(a_aidl_bdis_tmr);
 488         kfree(b_se0_srp_tmr);
 489         kfree(b_srp_init_tmr);
 490 }
 491
 492 /* The timeout callback function to set time out bit */
 493 static void langwell_otg_timer_fn(unsigned long indicator)
 494 {
 495         struct langwell_otg *lnw = the_transceiver;
 496
 497         *(int *)indicator = 1;
 498
 499         dev_dbg(lnw->dev, "kernel timer - timeout\n");
 500
 501         langwell_update_transceiver();
 502 }
 503
 504 /* kernel timer used instead of HW based interrupt */
 505 static void langwell_otg_add_ktimer(enum langwell_otg_timer_type timers)
 506 {
 507         struct langwell_otg             *lnw = the_transceiver;
 508         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 509         unsigned long           j = jiffies;
 510         unsigned long           data, time;
 511
 512         switch (timers) {
 513         case TA_WAIT_VRISE_TMR:
 514                 iotg->hsm.a_wait_vrise_tmout = 0;
 515                 data = (unsigned long)&iotg->hsm.a_wait_vrise_tmout;
 516                 time = TA_WAIT_VRISE;
 517                 break;
 518         case TA_WAIT_BCON_TMR:
 519                 iotg->hsm.a_wait_bcon_tmout = 0;
 520                 data = (unsigned long)&iotg->hsm.a_wait_bcon_tmout;
 521                 time = TA_WAIT_BCON;
 522                 break;
 523         case TA_AIDL_BDIS_TMR:
 524                 iotg->hsm.a_aidl_bdis_tmout = 0;
 525                 data = (unsigned long)&iotg->hsm.a_aidl_bdis_tmout;
 526                 time = TA_AIDL_BDIS;
 527                 break;
 528         case TB_ASE0_BRST_TMR:
 529                 iotg->hsm.b_ase0_brst_tmout = 0;
 530                 data = (unsigned long)&iotg->hsm.b_ase0_brst_tmout;
 531                 time = TB_ASE0_BRST;
 532                 break;
 533         case TB_SRP_INIT_TMR:
 534                 iotg->hsm.b_srp_init_tmout = 0;
 535                 data = (unsigned long)&iotg->hsm.b_srp_init_tmout;
 536                 time = TB_SRP_INIT;
 537                 break;
 538         case TB_SRP_FAIL_TMR:
 539                 iotg->hsm.b_srp_fail_tmout = 0;
 540                 data = (unsigned long)&iotg->hsm.b_srp_fail_tmout;
 541                 time = TB_SRP_FAIL;
 542                 break;
 543         case TB_BUS_SUSPEND_TMR:
 544                 iotg->hsm.b_bus_suspend_tmout = 0;
 545                 data = (unsigned long)&iotg->hsm.b_bus_suspend_tmout;
 546                 time = TB_BUS_SUSPEND;
 547                 break;
 548         default:
 549                 dev_dbg(lnw->dev, "unknown timer, cannot enable it\n");
 550                 return;
 551         }
 552
 553         lnw->hsm_timer.data = data;
 554         lnw->hsm_timer.function = langwell_otg_timer_fn;
 555         lnw->hsm_timer.expires = j + time * HZ / 1000; /* milliseconds */
 556
 557         add_timer(&lnw->hsm_timer);
 558
 559         dev_dbg(lnw->dev, "add timer successfully\n");
 560 }
 561
 562 /* Add timer to timer list */
 563 static void langwell_otg_add_timer(void *gtimer)
 564 {
 565         struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer;
 566         struct langwell_otg_timer *tmp_timer;
 567         struct intel_mid_otg_xceiv *iotg = &the_transceiver->iotg;
 568         u32     val32;
 569
 570         /* Check if the timer is already in the active list,
 571          * if so update timer count
 572          */
 573         list_for_each_entry(tmp_timer, &active_timers, list)
 574                 if (tmp_timer == timer) {
 575                         timer->count = timer->expires;
 576                         return;
 577                 }
 578         timer->count = timer->expires;
 579
 580         if (list_empty(&active_timers)) {
 581                 val32 = readl(iotg->base + CI_OTGSC);
 582                 writel(val32 | OTGSC_1MSE, iotg->base + CI_OTGSC);
 583         }
 584
 585         list_add_tail(&timer->list, &active_timers);
 586 }
 587
 588 /* Remove timer from the timer list; clear timeout status */
 589 static void langwell_otg_del_timer(void *gtimer)
 590 {
 591         struct langwell_otg *lnw = the_transceiver;
 592         struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer;
 593         struct langwell_otg_timer *tmp_timer, *del_tmp;
 594         u32 val32;
 595
 596         list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
 597                 if (tmp_timer == timer)
 598                         list_del(&timer->list);
 599
 600         if (list_empty(&active_timers)) {
 601                 val32 = readl(lnw->iotg.base + CI_OTGSC);
 602                 writel(val32 & ~OTGSC_1MSE, lnw->iotg.base + CI_OTGSC);
 603         }
 604 }
 605
 606 /* Reduce timer count by 1, and find timeout conditions.*/
 607 static int langwell_otg_tick_timer(u32 *int_sts)
 608 {
 609         struct langwell_otg     *lnw = the_transceiver;
 610         struct langwell_otg_timer *tmp_timer, *del_tmp;
 611         int expired = 0;
 612
 613         list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
 614                 tmp_timer->count--;
 615                 /* check if timer expires */
 616                 if (!tmp_timer->count) {
 617                         list_del(&tmp_timer->list);
 618                         tmp_timer->function(tmp_timer->data);
 619                         expired = 1;
 620                 }
 621         }
 622
 623         if (list_empty(&active_timers)) {
 624                 dev_dbg(lnw->dev, "tick timer: disable 1ms int\n");
 625                 *int_sts = *int_sts & ~OTGSC_1MSE;
 626         }
 627         return expired;
 628 }
 629
 630 static void reset_otg(void)
 631 {
 632         struct langwell_otg     *lnw = the_transceiver;
 633         int                     delay_time = 1000;
 634         u32                     val;
 635
 636         dev_dbg(lnw->dev, "reseting OTG controller ...\n");
 637         val = readl(lnw->iotg.base + CI_USBCMD);
 638         writel(val | USBCMD_RST, lnw->iotg.base + CI_USBCMD);
 639         do {
 640                 udelay(100);
 641                 if (!delay_time--)
 642                         dev_dbg(lnw->dev, "reset timeout\n");
 643                 val = readl(lnw->iotg.base + CI_USBCMD);
 644                 val &= USBCMD_RST;
 645         } while (val != 0);
 646         dev_dbg(lnw->dev, "reset done.\n");
 647 }
 648
 649 static void set_host_mode(void)
 650 {
 651         struct langwell_otg     *lnw = the_transceiver;
 652         u32                     val;
 653
 654         reset_otg();
 655         val = readl(lnw->iotg.base + CI_USBMODE);
 656         val = (val & (~USBMODE_CM)) | USBMODE_HOST;
 657         writel(val, lnw->iotg.base + CI_USBMODE);
 658 }
 659
 660 static void set_client_mode(void)
 661 {
 662         struct langwell_otg     *lnw = the_transceiver;
 663         u32                     val;
 664
 665         reset_otg();
 666         val = readl(lnw->iotg.base + CI_USBMODE);
 667         val = (val & (~USBMODE_CM)) | USBMODE_DEVICE;
 668         writel(val, lnw->iotg.base + CI_USBMODE);
 669 }
 670
 671 static void init_hsm(void)
 672 {
 673         struct langwell_otg             *lnw = the_transceiver;
 674         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 675         u32                             val32;
 676
 677         /* read OTGSC after reset */
 678         val32 = readl(lnw->iotg.base + CI_OTGSC);
 679         dev_dbg(lnw->dev, "%s: OTGSC init value = 0x%x\n", __func__, val32);
 680
 681         /* set init state */
 682         if (val32 & OTGSC_ID) {
 683                 iotg->hsm.id = 1;
 684                 iotg->otg.default_a = 0;
 685                 set_client_mode();
 686                 iotg->otg.state = OTG_STATE_B_IDLE;
 687         } else {
 688                 iotg->hsm.id = 0;
 689                 iotg->otg.default_a = 1;
 690                 set_host_mode();
 691                 iotg->otg.state = OTG_STATE_A_IDLE;
 692         }
 693
 694         /* set session indicator */
 695         if (val32 & OTGSC_BSE)
 696                 iotg->hsm.b_sess_end = 1;
 697         if (val32 & OTGSC_BSV)
 698                 iotg->hsm.b_sess_vld = 1;
 699         if (val32 & OTGSC_ASV)
 700                 iotg->hsm.a_sess_vld = 1;
 701         if (val32 & OTGSC_AVV)
 702                 iotg->hsm.a_vbus_vld = 1;
 703
 704         /* defautly power the bus */
 705         iotg->hsm.a_bus_req = 1;
 706         iotg->hsm.a_bus_drop = 0;
 707         /* defautly don't request bus as B device */
 708         iotg->hsm.b_bus_req = 0;
 709         /* no system error */
 710         iotg->hsm.a_clr_err = 0;
 711
 712         langwell_otg_phy_low_power_wait(1);
 713 }
 714
 715 static void update_hsm(void)
 716 {
 717         struct langwell_otg             *lnw = the_transceiver;
 718         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 719         u32                             val32;
 720
 721         /* read OTGSC */
 722         val32 = readl(lnw->iotg.base + CI_OTGSC);
 723         dev_dbg(lnw->dev, "%s: OTGSC value = 0x%x\n", __func__, val32);
 724
 725         iotg->hsm.id = !!(val32 & OTGSC_ID);
 726         iotg->hsm.b_sess_end = !!(val32 & OTGSC_BSE);
 727         iotg->hsm.b_sess_vld = !!(val32 & OTGSC_BSV);
 728         iotg->hsm.a_sess_vld = !!(val32 & OTGSC_ASV);
 729         iotg->hsm.a_vbus_vld = !!(val32 & OTGSC_AVV);
 730 }
 731
 732 static irqreturn_t otg_dummy_irq(int irq, void *_dev)
 733 {
 734         struct langwell_otg     *lnw = the_transceiver;
 735         void __iomem            *reg_base = _dev;
 736         u32                     val;
 737         u32                     int_mask = 0;
 738
 739         val = readl(reg_base + CI_USBMODE);
 740         if ((val & USBMODE_CM) != USBMODE_DEVICE)
 741                 return IRQ_NONE;
 742
 743         val = readl(reg_base + CI_USBSTS);
 744         int_mask = val & INTR_DUMMY_MASK;
 745
 746         if (int_mask == 0)
 747                 return IRQ_NONE;
 748
 749         /* clear hsm.b_conn here since host driver can't detect it
 750         *  otg_dummy_irq called means B-disconnect happened.
 751         */
 752         if (lnw->iotg.hsm.b_conn) {
 753                 lnw->iotg.hsm.b_conn = 0;
 754                 if (spin_trylock(&lnw->wq_lock)) {
 755                         langwell_update_transceiver();
 756                         spin_unlock(&lnw->wq_lock);
 757                 }
 758         }
 759
 760         /* Clear interrupts */
 761         writel(int_mask, reg_base + CI_USBSTS);
 762         return IRQ_HANDLED;
 763 }
 764
 765 static irqreturn_t otg_irq(int irq, void *_dev)
 766 {
 767         struct langwell_otg             *lnw = _dev;
 768         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
 769         u32                             int_sts, int_en;
 770         u32                             int_mask = 0;
 771         int                             flag = 0;
 772
 773         int_sts = readl(lnw->iotg.base + CI_OTGSC);
 774         int_en = (int_sts & OTGSC_INTEN_MASK) >> 8;
 775         int_mask = int_sts & int_en;
 776         if (int_mask == 0)
 777                 return IRQ_NONE;
 778
 779         if (int_mask & OTGSC_IDIS) {
 780                 dev_dbg(lnw->dev, "%s: id change int\n", __func__);
 781                 iotg->hsm.id = (int_sts & OTGSC_ID) ? 1 : 0;
 782                 dev_dbg(lnw->dev, "id = %d\n", iotg->hsm.id);
 783                 flag = 1;
 784         }
 785         if (int_mask & OTGSC_DPIS) {
 786                 dev_dbg(lnw->dev, "%s: data pulse int\n", __func__);
 787                 iotg->hsm.a_srp_det = (int_sts & OTGSC_DPS) ? 1 : 0;
 788                 dev_dbg(lnw->dev, "data pulse = %d\n", iotg->hsm.a_srp_det);
 789                 flag = 1;
 790         }
 791         if (int_mask & OTGSC_BSEIS) {
 792                 dev_dbg(lnw->dev, "%s: b session end int\n", __func__);
 793                 iotg->hsm.b_sess_end = (int_sts & OTGSC_BSE) ? 1 : 0;
 794                 dev_dbg(lnw->dev, "b_sess_end = %d\n", iotg->hsm.b_sess_end);
 795                 flag = 1;
 796         }
 797         if (int_mask & OTGSC_BSVIS) {
 798                 dev_dbg(lnw->dev, "%s: b session valid int\n", __func__);
 799                 iotg->hsm.b_sess_vld = (int_sts & OTGSC_BSV) ? 1 : 0;
 800                 dev_dbg(lnw->dev, "b_sess_vld = %d\n", iotg->hsm.b_sess_end);
 801                 flag = 1;
 802         }
 803         if (int_mask & OTGSC_ASVIS) {
 804                 dev_dbg(lnw->dev, "%s: a session valid int\n", __func__);
 805                 iotg->hsm.a_sess_vld = (int_sts & OTGSC_ASV) ? 1 : 0;
 806                 dev_dbg(lnw->dev, "a_sess_vld = %d\n", iotg->hsm.a_sess_vld);
 807                 flag = 1;
 808         }
 809         if (int_mask & OTGSC_AVVIS) {
 810                 dev_dbg(lnw->dev, "%s: a vbus valid int\n", __func__);
 811                 iotg->hsm.a_vbus_vld = (int_sts & OTGSC_AVV) ? 1 : 0;
 812                 dev_dbg(lnw->dev, "a_vbus_vld = %d\n", iotg->hsm.a_vbus_vld);
 813                 flag = 1;
 814         }
 815
 816         if (int_mask & OTGSC_1MSS) {
 817                 /* need to schedule otg_work if any timer is expired */
 818                 if (langwell_otg_tick_timer(&int_sts))
 819                         flag = 1;
 820         }
 821
 822         writel((int_sts & ~OTGSC_INTSTS_MASK) | int_mask,
 823                                         lnw->iotg.base + CI_OTGSC);
 824         if (flag)
 825                 langwell_update_transceiver();
 826
 827         return IRQ_HANDLED;
 828 }
 829
 830 static int langwell_otg_iotg_notify(struct notifier_block *nb,
 831                                 unsigned long action, void *data)
 832 {
 833         struct langwell_otg             *lnw = the_transceiver;
 834         struct intel_mid_otg_xceiv      *iotg = data;
 835         int                             flag = 0;
 836
 837         if (iotg == NULL)
 838                 return NOTIFY_BAD;
 839
 840         if (lnw == NULL)
 841                 return NOTIFY_BAD;
 842
 843         switch (action) {
 844         case MID_OTG_NOTIFY_CONNECT:
 845                 dev_dbg(lnw->dev, "Lnw OTG Notify Connect Event\n");
 846                 if (iotg->otg.default_a == 1)
 847                         iotg->hsm.b_conn = 1;
 848                 else
 849                         iotg->hsm.a_conn = 1;
 850                 flag = 1;
 851                 break;
 852         case MID_OTG_NOTIFY_DISCONN:
 853                 dev_dbg(lnw->dev, "Lnw OTG Notify Disconnect Event\n");
 854                 if (iotg->otg.default_a == 1)
 855                         iotg->hsm.b_conn = 0;
 856                 else
 857                         iotg->hsm.a_conn = 0;
 858                 flag = 1;
 859                 break;
 860         case MID_OTG_NOTIFY_HSUSPEND:
 861                 dev_dbg(lnw->dev, "Lnw OTG Notify Host Bus suspend Event\n");
 862                 if (iotg->otg.default_a == 1)
 863                         iotg->hsm.a_suspend_req = 1;
 864                 else
 865                         iotg->hsm.b_bus_req = 0;
 866                 flag = 1;
 867                 break;
 868         case MID_OTG_NOTIFY_HRESUME:
 869                 dev_dbg(lnw->dev, "Lnw OTG Notify Host Bus resume Event\n");
 870                 if (iotg->otg.default_a == 1)
 871                         iotg->hsm.b_bus_resume = 1;
 872                 flag = 1;
 873                 break;
 874         case MID_OTG_NOTIFY_CSUSPEND:
 875                 dev_dbg(lnw->dev, "Lnw OTG Notify Client Bus suspend Event\n");
 876                 if (iotg->otg.default_a == 1) {
 877                         if (iotg->hsm.b_bus_suspend_vld == 2) {
 878                                 iotg->hsm.b_bus_suspend = 1;
 879                                 iotg->hsm.b_bus_suspend_vld = 0;
 880                                 flag = 1;
 881                         } else {
 882                                 iotg->hsm.b_bus_suspend_vld++;
 883                                 flag = 0;
 884                         }
 885                 } else {
 886                         if (iotg->hsm.a_bus_suspend == 0) {
 887                                 iotg->hsm.a_bus_suspend = 1;
 888                                 flag = 1;
 889                         }
 890                 }
 891                 break;
 892         case MID_OTG_NOTIFY_CRESUME:
 893                 dev_dbg(lnw->dev, "Lnw OTG Notify Client Bus resume Event\n");
 894                 if (iotg->otg.default_a == 0)
 895                         iotg->hsm.a_bus_suspend = 0;
 896                 flag = 0;
 897                 break;
 898         case MID_OTG_NOTIFY_HOSTADD:
 899                 dev_dbg(lnw->dev, "Lnw OTG Nofity Host Driver Add\n");
 900                 flag = 1;
 901                 break;
 902         case MID_OTG_NOTIFY_HOSTREMOVE:
 903                 dev_dbg(lnw->dev, "Lnw OTG Nofity Host Driver remove\n");
 904                 flag = 1;
 905                 break;
 906         case MID_OTG_NOTIFY_CLIENTADD:
 907                 dev_dbg(lnw->dev, "Lnw OTG Nofity Client Driver Add\n");
 908                 flag = 1;
 909                 break;
 910         case MID_OTG_NOTIFY_CLIENTREMOVE:
 911                 dev_dbg(lnw->dev, "Lnw OTG Nofity Client Driver remove\n");
 912                 flag = 1;
 913                 break;
 914         default:
 915                 dev_dbg(lnw->dev, "Lnw OTG Nofity unknown notify message\n");
 916                 return NOTIFY_DONE;
 917         }
 918
 919         if (flag)
 920                 langwell_update_transceiver();
 921
 922         return NOTIFY_OK;
 923 }
 924
 925 static void langwell_otg_work(struct work_struct *work)
 926 {
 927         struct langwell_otg             *lnw;
 928         struct intel_mid_otg_xceiv      *iotg;
 929         int                             retval;
 930         struct pci_dev                  *pdev;
 931
 932         lnw = container_of(work, struct langwell_otg, work);
 933         iotg = &lnw->iotg;
 934         pdev = to_pci_dev(lnw->dev);
 935
 936         dev_dbg(lnw->dev, "%s: old state = %s\n", __func__,
 937                         otg_state_string(iotg->otg.state));
 938
 939         switch (iotg->otg.state) {
 940         case OTG_STATE_UNDEFINED:
 941         case OTG_STATE_B_IDLE:
 942                 if (!iotg->hsm.id) {
 943                         langwell_otg_del_timer(b_srp_init_tmr);
 944                         del_timer_sync(&lnw->hsm_timer);
 945
 946                         iotg->otg.default_a = 1;
 947                         iotg->hsm.a_srp_det = 0;
 948
 949                         langwell_otg_chrg_vbus(0);
 950                         set_host_mode();
 951                         langwell_otg_phy_low_power(1);
 952
 953                         iotg->otg.state = OTG_STATE_A_IDLE;
 954                         langwell_update_transceiver();
 955                 } else if (iotg->hsm.b_sess_vld) {
 956                         langwell_otg_del_timer(b_srp_init_tmr);
 957                         del_timer_sync(&lnw->hsm_timer);
 958                         iotg->hsm.b_sess_end = 0;
 959                         iotg->hsm.a_bus_suspend = 0;
 960                         langwell_otg_chrg_vbus(0);
 961
 962                         if (lnw->iotg.start_peripheral) {
 963                                 lnw->iotg.start_peripheral(&lnw->iotg);
 964                                 iotg->otg.state = OTG_STATE_B_PERIPHERAL;
 965                         } else
 966                                 dev_dbg(lnw->dev, "client driver not loaded\n");
 967
 968                 } else if (iotg->hsm.b_srp_init_tmout) {
 969                         iotg->hsm.b_srp_init_tmout = 0;
 970                         dev_warn(lnw->dev, "SRP init timeout\n");
 971                 } else if (iotg->hsm.b_srp_fail_tmout) {
 972                         iotg->hsm.b_srp_fail_tmout = 0;
 973                         iotg->hsm.b_bus_req = 0;
 974
 975                         /* No silence failure */
 976                         langwell_otg_nsf_msg(6);
 977                 } else if (iotg->hsm.b_bus_req && iotg->hsm.b_sess_end) {
 978                         del_timer_sync(&lnw->hsm_timer);
 979                         /* workaround for b_se0_srp detection */
 980                         retval = langwell_otg_check_se0_srp(0);
 981                         if (retval) {
 982                                 iotg->hsm.b_bus_req = 0;
 983                                 dev_dbg(lnw->dev, "LS isn't SE0, try later\n");
 984                         } else {
 985                                 /* clear the PHCD before start srp */
 986                                 langwell_otg_phy_low_power(0);
 987
 988                                 /* Start SRP */
 989                                 langwell_otg_add_timer(b_srp_init_tmr);
 990                                 iotg->otg.start_srp(&iotg->otg);
 991                                 langwell_otg_del_timer(b_srp_init_tmr);
 992                                 langwell_otg_add_ktimer(TB_SRP_FAIL_TMR);
 993
 994                                 /* reset PHY low power mode here */
 995                                 langwell_otg_phy_low_power_wait(1);
 996                         }
 997                 }
 998                 break;
 999         case OTG_STATE_B_SRP_INIT:
1000                 if (!iotg->hsm.id) {
1001                         iotg->otg.default_a = 1;
1002                         iotg->hsm.a_srp_det = 0;
1003
1004                         /* Turn off VBus */
1005                         iotg->otg.set_vbus(&iotg->otg, false);
1006                         langwell_otg_chrg_vbus(0);
1007                         set_host_mode();
1008                         langwell_otg_phy_low_power(1);
1009                         iotg->otg.state = OTG_STATE_A_IDLE;
1010                         langwell_update_transceiver();
1011                 } else if (iotg->hsm.b_sess_vld) {
1012                         langwell_otg_chrg_vbus(0);
1013                         if (lnw->iotg.start_peripheral) {
1014                                 lnw->iotg.start_peripheral(&lnw->iotg);
1015                                 iotg->otg.state = OTG_STATE_B_PERIPHERAL;
1016                         } else
1017                                 dev_dbg(lnw->dev, "client driver not loaded\n");
1018                 }
1019                 break;
1020         case OTG_STATE_B_PERIPHERAL:
1021                 if (!iotg->hsm.id) {
1022                         iotg->otg.default_a = 1;
1023                         iotg->hsm.a_srp_det = 0;
1024
1025                         langwell_otg_chrg_vbus(0);
1026
1027                         if (lnw->iotg.stop_peripheral)
1028                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1029                         else
1030                                 dev_dbg(lnw->dev,
1031                                         "client driver has been removed.\n");
1032
1033                         set_host_mode();
1034                         langwell_otg_phy_low_power(1);
1035                         iotg->otg.state = OTG_STATE_A_IDLE;
1036                         langwell_update_transceiver();
1037                 } else if (!iotg->hsm.b_sess_vld) {
1038                         iotg->hsm.b_hnp_enable = 0;
1039
1040                         if (lnw->iotg.stop_peripheral)
1041                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1042                         else
1043                                 dev_dbg(lnw->dev,
1044                                         "client driver has been removed.\n");
1045
1046                         iotg->otg.state = OTG_STATE_B_IDLE;
1047                 } else if (iotg->hsm.b_bus_req && iotg->otg.gadget &&
1048                                         iotg->otg.gadget->b_hnp_enable &&
1049                                         iotg->hsm.a_bus_suspend) {
1050
1051                         if (lnw->iotg.stop_peripheral)
1052                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1053                         else
1054                                 dev_dbg(lnw->dev,
1055                                         "client driver has been removed.\n");
1056
1057                         langwell_otg_HAAR(1);
1058                         iotg->hsm.a_conn = 0;
1059
1060                         if (lnw->iotg.start_host) {
1061                                 lnw->iotg.start_host(&lnw->iotg);
1062                                 iotg->otg.state = OTG_STATE_B_WAIT_ACON;
1063                         } else
1064                                 dev_dbg(lnw->dev,
1065                                                 "host driver not loaded.\n");
1066
1067                         iotg->hsm.a_bus_resume = 0;
1068                         langwell_otg_add_ktimer(TB_ASE0_BRST_TMR);
1069                 }
1070                 break;
1071
1072         case OTG_STATE_B_WAIT_ACON:
1073                 if (!iotg->hsm.id) {
1074                         /* delete hsm timer for b_ase0_brst_tmr */
1075                         del_timer_sync(&lnw->hsm_timer);
1076
1077                         iotg->otg.default_a = 1;
1078                         iotg->hsm.a_srp_det = 0;
1079
1080                         langwell_otg_chrg_vbus(0);
1081
1082                         langwell_otg_HAAR(0);
1083                         if (lnw->iotg.stop_host)
1084                                 lnw->iotg.stop_host(&lnw->iotg);
1085                         else
1086                                 dev_dbg(lnw->dev,
1087                                         "host driver has been removed.\n");
1088
1089                         set_host_mode();
1090                         langwell_otg_phy_low_power(1);
1091                         iotg->otg.state = OTG_STATE_A_IDLE;
1092                         langwell_update_transceiver();
1093                 } else if (!iotg->hsm.b_sess_vld) {
1094                         /* delete hsm timer for b_ase0_brst_tmr */
1095                         del_timer_sync(&lnw->hsm_timer);
1096
1097                         iotg->hsm.b_hnp_enable = 0;
1098                         iotg->hsm.b_bus_req = 0;
1099
1100                         langwell_otg_chrg_vbus(0);
1101                         langwell_otg_HAAR(0);
1102
1103                         if (lnw->iotg.stop_host)
1104                                 lnw->iotg.stop_host(&lnw->iotg);
1105                         else
1106                                 dev_dbg(lnw->dev,
1107                                         "host driver has been removed.\n");
1108
1109                         set_client_mode();
1110                         langwell_otg_phy_low_power(1);
1111                         iotg->otg.state = OTG_STATE_B_IDLE;
1112                 } else if (iotg->hsm.a_conn) {
1113                         /* delete hsm timer for b_ase0_brst_tmr */
1114                         del_timer_sync(&lnw->hsm_timer);
1115
1116                         langwell_otg_HAAR(0);
1117                         iotg->otg.state = OTG_STATE_B_HOST;
1118                         langwell_update_transceiver();
1119                 } else if (iotg->hsm.a_bus_resume ||
1120                                 iotg->hsm.b_ase0_brst_tmout) {
1121                         /* delete hsm timer for b_ase0_brst_tmr */
1122                         del_timer_sync(&lnw->hsm_timer);
1123
1124                         langwell_otg_HAAR(0);
1125                         langwell_otg_nsf_msg(7);
1126
1127                         if (lnw->iotg.stop_host)
1128                                 lnw->iotg.stop_host(&lnw->iotg);
1129                         else
1130                                 dev_dbg(lnw->dev,
1131                                         "host driver has been removed.\n");
1132
1133                         iotg->hsm.a_bus_suspend = 0;
1134                         iotg->hsm.b_bus_req = 0;
1135
1136                         if (lnw->iotg.start_peripheral)
1137                                 lnw->iotg.start_peripheral(&lnw->iotg);
1138                         else
1139                                 dev_dbg(lnw->dev,
1140                                         "client driver not loaded.\n");
1141
1142                         iotg->otg.state = OTG_STATE_B_PERIPHERAL;
1143                 }
1144                 break;
1145
1146         case OTG_STATE_B_HOST:
1147                 if (!iotg->hsm.id) {
1148                         iotg->otg.default_a = 1;
1149                         iotg->hsm.a_srp_det = 0;
1150
1151                         langwell_otg_chrg_vbus(0);
1152
1153                         if (lnw->iotg.stop_host)
1154                                 lnw->iotg.stop_host(&lnw->iotg);
1155                         else
1156                                 dev_dbg(lnw->dev,
1157                                         "host driver has been removed.\n");
1158
1159                         set_host_mode();
1160                         langwell_otg_phy_low_power(1);
1161                         iotg->otg.state = OTG_STATE_A_IDLE;
1162                         langwell_update_transceiver();
1163                 } else if (!iotg->hsm.b_sess_vld) {
1164                         iotg->hsm.b_hnp_enable = 0;
1165                         iotg->hsm.b_bus_req = 0;
1166
1167                         langwell_otg_chrg_vbus(0);
1168                         if (lnw->iotg.stop_host)
1169                                 lnw->iotg.stop_host(&lnw->iotg);
1170                         else
1171                                 dev_dbg(lnw->dev,
1172                                         "host driver has been removed.\n");
1173
1174                         set_client_mode();
1175                         langwell_otg_phy_low_power(1);
1176                         iotg->otg.state = OTG_STATE_B_IDLE;
1177                 } else if ((!iotg->hsm.b_bus_req) ||
1178                                 (!iotg->hsm.a_conn)) {
1179                         iotg->hsm.b_bus_req = 0;
1180                         langwell_otg_loc_sof(0);
1181
1182                         if (lnw->iotg.stop_host)
1183                                 lnw->iotg.stop_host(&lnw->iotg);
1184                         else
1185                                 dev_dbg(lnw->dev,
1186                                         "host driver has been removed.\n");
1187
1188                         iotg->hsm.a_bus_suspend = 0;
1189
1190                         if (lnw->iotg.start_peripheral)
1191                                 lnw->iotg.start_peripheral(&lnw->iotg);
1192                         else
1193                                 dev_dbg(lnw->dev,
1194                                                 "client driver not loaded.\n");
1195
1196                         iotg->otg.state = OTG_STATE_B_PERIPHERAL;
1197                 }
1198                 break;
1199
1200         case OTG_STATE_A_IDLE:
1201                 iotg->otg.default_a = 1;
1202                 if (iotg->hsm.id) {
1203                         iotg->otg.default_a = 0;
1204                         iotg->hsm.b_bus_req = 0;
1205                         iotg->hsm.vbus_srp_up = 0;
1206
1207                         langwell_otg_chrg_vbus(0);
1208                         set_client_mode();
1209                         langwell_otg_phy_low_power(1);
1210                         iotg->otg.state = OTG_STATE_B_IDLE;
1211                         langwell_update_transceiver();
1212                 } else if (!iotg->hsm.a_bus_drop &&
1213                         (iotg->hsm.a_srp_det || iotg->hsm.a_bus_req)) {
1214                         langwell_otg_phy_low_power(0);
1215
1216                         /* Turn on VBus */
1217                         iotg->otg.set_vbus(&iotg->otg, true);
1218
1219                         iotg->hsm.vbus_srp_up = 0;
1220                         iotg->hsm.a_wait_vrise_tmout = 0;
1221                         langwell_otg_add_timer(a_wait_vrise_tmr);
1222                         iotg->otg.state = OTG_STATE_A_WAIT_VRISE;
1223                         langwell_update_transceiver();
1224                 } else if (!iotg->hsm.a_bus_drop && iotg->hsm.a_sess_vld) {
1225                         iotg->hsm.vbus_srp_up = 1;
1226                 } else if (!iotg->hsm.a_sess_vld && iotg->hsm.vbus_srp_up) {
1227                         msleep(10);
1228                         langwell_otg_phy_low_power(0);
1229
1230                         /* Turn on VBus */
1231                         iotg->otg.set_vbus(&iotg->otg, true);
1232                         iotg->hsm.a_srp_det = 1;
1233                         iotg->hsm.vbus_srp_up = 0;
1234                         iotg->hsm.a_wait_vrise_tmout = 0;
1235                         langwell_otg_add_timer(a_wait_vrise_tmr);
1236                         iotg->otg.state = OTG_STATE_A_WAIT_VRISE;
1237                         langwell_update_transceiver();
1238                 } else if (!iotg->hsm.a_sess_vld &&
1239                                 !iotg->hsm.vbus_srp_up) {
1240                         langwell_otg_phy_low_power(1);
1241                 }
1242                 break;
1243         case OTG_STATE_A_WAIT_VRISE:
1244                 if (iotg->hsm.id) {
1245                         langwell_otg_del_timer(a_wait_vrise_tmr);
1246                         iotg->hsm.b_bus_req = 0;
1247                         iotg->otg.default_a = 0;
1248
1249                         /* Turn off VBus */
1250                         iotg->otg.set_vbus(&iotg->otg, false);
1251                         set_client_mode();
1252                         langwell_otg_phy_low_power_wait(1);
1253                         iotg->otg.state = OTG_STATE_B_IDLE;
1254                 } else if (iotg->hsm.a_vbus_vld) {
1255                         langwell_otg_del_timer(a_wait_vrise_tmr);
1256                         iotg->hsm.b_conn = 0;
1257                         if (lnw->iotg.start_host)
1258                                 lnw->iotg.start_host(&lnw->iotg);
1259                         else {
1260                                 dev_dbg(lnw->dev, "host driver not loaded.\n");
1261                                 break;
1262                         }
1263
1264                         langwell_otg_add_ktimer(TA_WAIT_BCON_TMR);
1265                         iotg->otg.state = OTG_STATE_A_WAIT_BCON;
1266                 } else if (iotg->hsm.a_wait_vrise_tmout) {
1267                         iotg->hsm.b_conn = 0;
1268                         if (iotg->hsm.a_vbus_vld) {
1269                                 if (lnw->iotg.start_host)
1270                                         lnw->iotg.start_host(&lnw->iotg);
1271                                 else {
1272                                         dev_dbg(lnw->dev,
1273                                                 "host driver not loaded.\n");
1274                                         break;
1275                                 }
1276                                 langwell_otg_add_ktimer(TA_WAIT_BCON_TMR);
1277                                 iotg->otg.state = OTG_STATE_A_WAIT_BCON;
1278                         } else {
1279
1280                                 /* Turn off VBus */
1281                                 iotg->otg.set_vbus(&iotg->otg, false);
1282                                 langwell_otg_phy_low_power_wait(1);
1283                                 iotg->otg.state = OTG_STATE_A_VBUS_ERR;
1284                         }
1285                 }
1286                 break;
1287         case OTG_STATE_A_WAIT_BCON:
1288                 if (iotg->hsm.id) {
1289                         /* delete hsm timer for a_wait_bcon_tmr */
1290                         del_timer_sync(&lnw->hsm_timer);
1291
1292                         iotg->otg.default_a = 0;
1293                         iotg->hsm.b_bus_req = 0;
1294
1295                         if (lnw->iotg.stop_host)
1296                                 lnw->iotg.stop_host(&lnw->iotg);
1297                         else
1298                                 dev_dbg(lnw->dev,
1299                                         "host driver has been removed.\n");
1300
1301                         /* Turn off VBus */
1302                         iotg->otg.set_vbus(&iotg->otg, false);
1303                         set_client_mode();
1304                         langwell_otg_phy_low_power_wait(1);
1305                         iotg->otg.state = OTG_STATE_B_IDLE;
1306                         langwell_update_transceiver();
1307                 } else if (!iotg->hsm.a_vbus_vld) {
1308                         /* delete hsm timer for a_wait_bcon_tmr */
1309                         del_timer_sync(&lnw->hsm_timer);
1310
1311                         if (lnw->iotg.stop_host)
1312                                 lnw->iotg.stop_host(&lnw->iotg);
1313                         else
1314                                 dev_dbg(lnw->dev,
1315                                         "host driver has been removed.\n");
1316
1317                         /* Turn off VBus */
1318                         iotg->otg.set_vbus(&iotg->otg, false);
1319                         langwell_otg_phy_low_power_wait(1);
1320                         iotg->otg.state = OTG_STATE_A_VBUS_ERR;
1321                 } else if (iotg->hsm.a_bus_drop ||
1322                                 (iotg->hsm.a_wait_bcon_tmout &&
1323                                 !iotg->hsm.a_bus_req)) {
1324                         /* delete hsm timer for a_wait_bcon_tmr */
1325                         del_timer_sync(&lnw->hsm_timer);
1326
1327                         if (lnw->iotg.stop_host)
1328                                 lnw->iotg.stop_host(&lnw->iotg);
1329                         else
1330                                 dev_dbg(lnw->dev,
1331                                         "host driver has been removed.\n");
1332
1333                         /* Turn off VBus */
1334                         iotg->otg.set_vbus(&iotg->otg, false);
1335                         iotg->otg.state = OTG_STATE_A_WAIT_VFALL;
1336                 } else if (iotg->hsm.b_conn) {
1337                         /* delete hsm timer for a_wait_bcon_tmr */
1338                         del_timer_sync(&lnw->hsm_timer);
1339
1340                         iotg->hsm.a_suspend_req = 0;
1341                         iotg->otg.state = OTG_STATE_A_HOST;
1342                         if (iotg->hsm.a_srp_det && iotg->otg.host &&
1343                                         !iotg->otg.host->b_hnp_enable) {
1344                                 /* SRP capable peripheral-only device */
1345                                 iotg->hsm.a_bus_req = 1;
1346                                 iotg->hsm.a_srp_det = 0;
1347                         } else if (!iotg->hsm.a_bus_req && iotg->otg.host &&
1348                                         iotg->otg.host->b_hnp_enable) {
1349                                 /* It is not safe enough to do a fast
1350                                  * transition from A_WAIT_BCON to
1351                                  * A_SUSPEND */
1352                                 msleep(10000);
1353                                 if (iotg->hsm.a_bus_req)
1354                                         break;
1355
1356                                 if (request_irq(pdev->irq,
1357                                         otg_dummy_irq, IRQF_SHARED,
1358                                         driver_name, iotg->base) != 0) {
1359                                         dev_dbg(lnw->dev,
1360                                                 "request interrupt %d fail\n",
1361                                                 pdev->irq);
1362                                 }
1363
1364                                 langwell_otg_HABA(1);
1365                                 iotg->hsm.b_bus_resume = 0;
1366                                 iotg->hsm.a_aidl_bdis_tmout = 0;
1367
1368                                 langwell_otg_loc_sof(0);
1369                                 /* clear PHCD to enable HW timer */
1370                                 langwell_otg_phy_low_power(0);
1371                                 langwell_otg_add_timer(a_aidl_bdis_tmr);
1372                                 iotg->otg.state = OTG_STATE_A_SUSPEND;
1373                         } else if (!iotg->hsm.a_bus_req && iotg->otg.host &&
1374                                 !iotg->otg.host->b_hnp_enable) {
1375                                 if (lnw->iotg.stop_host)
1376                                         lnw->iotg.stop_host(&lnw->iotg);
1377                                 else
1378                                         dev_dbg(lnw->dev,
1379                                                 "host driver removed.\n");
1380
1381                                 /* Turn off VBus */
1382                                 iotg->otg.set_vbus(&iotg->otg, false);
1383                                 iotg->otg.state = OTG_STATE_A_WAIT_VFALL;
1384                         }
1385                 }
1386                 break;
1387         case OTG_STATE_A_HOST:
1388                 if (iotg->hsm.id) {
1389                         iotg->otg.default_a = 0;
1390                         iotg->hsm.b_bus_req = 0;
1391
1392                         if (lnw->iotg.stop_host)
1393                                 lnw->iotg.stop_host(&lnw->iotg);
1394                         else
1395                                 dev_dbg(lnw->dev,
1396                                         "host driver has been removed.\n");
1397
1398                         /* Turn off VBus */
1399                         iotg->otg.set_vbus(&iotg->otg, false);
1400                         set_client_mode();
1401                         langwell_otg_phy_low_power_wait(1);
1402                         iotg->otg.state = OTG_STATE_B_IDLE;
1403                         langwell_update_transceiver();
1404                 } else if (iotg->hsm.a_bus_drop ||
1405                                 (iotg->otg.host &&
1406                                 !iotg->otg.host->b_hnp_enable &&
1407                                         !iotg->hsm.a_bus_req)) {
1408                         if (lnw->iotg.stop_host)
1409                                 lnw->iotg.stop_host(&lnw->iotg);
1410                         else
1411                                 dev_dbg(lnw->dev,
1412                                         "host driver has been removed.\n");
1413
1414                         /* Turn off VBus */
1415                         iotg->otg.set_vbus(&iotg->otg, false);
1416                         iotg->otg.state = OTG_STATE_A_WAIT_VFALL;
1417                 } else if (!iotg->hsm.a_vbus_vld) {
1418                         if (lnw->iotg.stop_host)
1419                                 lnw->iotg.stop_host(&lnw->iotg);
1420                         else
1421                                 dev_dbg(lnw->dev,
1422                                         "host driver has been removed.\n");
1423
1424                         /* Turn off VBus */
1425                         iotg->otg.set_vbus(&iotg->otg, false);
1426                         langwell_otg_phy_low_power_wait(1);
1427                         iotg->otg.state = OTG_STATE_A_VBUS_ERR;
1428                 } else if (iotg->otg.host &&
1429                                 iotg->otg.host->b_hnp_enable &&
1430                                 !iotg->hsm.a_bus_req) {
1431                         /* Set HABA to enable hardware assistance to signal
1432                          *  A-connect after receiver B-disconnect. Hardware
1433                          *  will then set client mode and enable URE, SLE and
1434                          *  PCE after the assistance. otg_dummy_irq is used to
1435                          *  clean these ints when client driver is not resumed.
1436                          */
1437                         if (request_irq(pdev->irq, otg_dummy_irq, IRQF_SHARED,
1438                                         driver_name, iotg->base) != 0) {
1439                                 dev_dbg(lnw->dev,
1440                                         "request interrupt %d failed\n",
1441                                                 pdev->irq);
1442                         }
1443
1444                         /* set HABA */
1445                         langwell_otg_HABA(1);
1446                         iotg->hsm.b_bus_resume = 0;
1447                         iotg->hsm.a_aidl_bdis_tmout = 0;
1448                         langwell_otg_loc_sof(0);
1449                         /* clear PHCD to enable HW timer */
1450                         langwell_otg_phy_low_power(0);
1451                         langwell_otg_add_timer(a_aidl_bdis_tmr);
1452                         iotg->otg.state = OTG_STATE_A_SUSPEND;
1453                 } else if (!iotg->hsm.b_conn || !iotg->hsm.a_bus_req) {
1454                         langwell_otg_add_ktimer(TA_WAIT_BCON_TMR);
1455                         iotg->otg.state = OTG_STATE_A_WAIT_BCON;
1456                 }
1457                 break;
1458         case OTG_STATE_A_SUSPEND:
1459                 if (iotg->hsm.id) {
1460                         langwell_otg_del_timer(a_aidl_bdis_tmr);
1461                         langwell_otg_HABA(0);
1462                         free_irq(pdev->irq, iotg->base);
1463                         iotg->otg.default_a = 0;
1464                         iotg->hsm.b_bus_req = 0;
1465
1466                         if (lnw->iotg.stop_host)
1467                                 lnw->iotg.stop_host(&lnw->iotg);
1468                         else
1469                                 dev_dbg(lnw->dev,
1470                                         "host driver has been removed.\n");
1471
1472                         /* Turn off VBus */
1473                         iotg->otg.set_vbus(&iotg->otg, false);
1474                         set_client_mode();
1475                         langwell_otg_phy_low_power(1);
1476                         iotg->otg.state = OTG_STATE_B_IDLE;
1477                         langwell_update_transceiver();
1478                 } else if (iotg->hsm.a_bus_req ||
1479                                 iotg->hsm.b_bus_resume) {
1480                         langwell_otg_del_timer(a_aidl_bdis_tmr);
1481                         langwell_otg_HABA(0);
1482                         free_irq(pdev->irq, iotg->base);
1483                         iotg->hsm.a_suspend_req = 0;
1484                         langwell_otg_loc_sof(1);
1485                         iotg->otg.state = OTG_STATE_A_HOST;
1486                 } else if (iotg->hsm.a_aidl_bdis_tmout ||
1487                                 iotg->hsm.a_bus_drop) {
1488                         langwell_otg_del_timer(a_aidl_bdis_tmr);
1489                         langwell_otg_HABA(0);
1490                         free_irq(pdev->irq, iotg->base);
1491                         if (lnw->iotg.stop_host)
1492                                 lnw->iotg.stop_host(&lnw->iotg);
1493                         else
1494                                 dev_dbg(lnw->dev,
1495                                         "host driver has been removed.\n");
1496
1497                         /* Turn off VBus */
1498                         iotg->otg.set_vbus(&iotg->otg, false);
1499                         iotg->otg.state = OTG_STATE_A_WAIT_VFALL;
1500                 } else if (!iotg->hsm.b_conn && iotg->otg.host &&
1501                                 iotg->otg.host->b_hnp_enable) {
1502                         langwell_otg_del_timer(a_aidl_bdis_tmr);
1503                         langwell_otg_HABA(0);
1504                         free_irq(pdev->irq, iotg->base);
1505
1506                         if (lnw->iotg.stop_host)
1507                                 lnw->iotg.stop_host(&lnw->iotg);
1508                         else
1509                                 dev_dbg(lnw->dev,
1510                                         "host driver has been removed.\n");
1511
1512                         iotg->hsm.b_bus_suspend = 0;
1513                         iotg->hsm.b_bus_suspend_vld = 0;
1514
1515                         /* msleep(200); */
1516                         if (lnw->iotg.start_peripheral)
1517                                 lnw->iotg.start_peripheral(&lnw->iotg);
1518                         else
1519                                 dev_dbg(lnw->dev,
1520                                         "client driver not loaded.\n");
1521
1522                         langwell_otg_add_ktimer(TB_BUS_SUSPEND_TMR);
1523                         iotg->otg.state = OTG_STATE_A_PERIPHERAL;
1524                         break;
1525                 } else if (!iotg->hsm.a_vbus_vld) {
1526                         langwell_otg_del_timer(a_aidl_bdis_tmr);
1527                         langwell_otg_HABA(0);
1528                         free_irq(pdev->irq, iotg->base);
1529                         if (lnw->iotg.stop_host)
1530                                 lnw->iotg.stop_host(&lnw->iotg);
1531                         else
1532                                 dev_dbg(lnw->dev,
1533                                         "host driver has been removed.\n");
1534
1535                         /* Turn off VBus */
1536                         iotg->otg.set_vbus(&iotg->otg, false);
1537                         langwell_otg_phy_low_power_wait(1);
1538                         iotg->otg.state = OTG_STATE_A_VBUS_ERR;
1539                 }
1540                 break;
1541         case OTG_STATE_A_PERIPHERAL:
1542                 if (iotg->hsm.id) {
1543                         /* delete hsm timer for b_bus_suspend_tmr */
1544                         del_timer_sync(&lnw->hsm_timer);
1545                         iotg->otg.default_a = 0;
1546                         iotg->hsm.b_bus_req = 0;
1547                         if (lnw->iotg.stop_peripheral)
1548                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1549                         else
1550                                 dev_dbg(lnw->dev,
1551                                         "client driver has been removed.\n");
1552
1553                         /* Turn off VBus */
1554                         iotg->otg.set_vbus(&iotg->otg, false);
1555                         set_client_mode();
1556                         langwell_otg_phy_low_power_wait(1);
1557                         iotg->otg.state = OTG_STATE_B_IDLE;
1558                         langwell_update_transceiver();
1559                 } else if (!iotg->hsm.a_vbus_vld) {
1560                         /* delete hsm timer for b_bus_suspend_tmr */
1561                         del_timer_sync(&lnw->hsm_timer);
1562
1563                         if (lnw->iotg.stop_peripheral)
1564                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1565                         else
1566                                 dev_dbg(lnw->dev,
1567                                         "client driver has been removed.\n");
1568
1569                         /* Turn off VBus */
1570                         iotg->otg.set_vbus(&iotg->otg, false);
1571                         langwell_otg_phy_low_power_wait(1);
1572                         iotg->otg.state = OTG_STATE_A_VBUS_ERR;
1573                 } else if (iotg->hsm.a_bus_drop) {
1574                         /* delete hsm timer for b_bus_suspend_tmr */
1575                         del_timer_sync(&lnw->hsm_timer);
1576
1577                         if (lnw->iotg.stop_peripheral)
1578                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1579                         else
1580                                 dev_dbg(lnw->dev,
1581                                         "client driver has been removed.\n");
1582
1583                         /* Turn off VBus */
1584                         iotg->otg.set_vbus(&iotg->otg, false);
1585                         iotg->otg.state = OTG_STATE_A_WAIT_VFALL;
1586                 } else if (iotg->hsm.b_bus_suspend) {
1587                         /* delete hsm timer for b_bus_suspend_tmr */
1588                         del_timer_sync(&lnw->hsm_timer);
1589
1590                         if (lnw->iotg.stop_peripheral)
1591                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1592                         else
1593                                 dev_dbg(lnw->dev,
1594                                         "client driver has been removed.\n");
1595
1596                         if (lnw->iotg.start_host)
1597                                 lnw->iotg.start_host(&lnw->iotg);
1598                         else
1599                                 dev_dbg(lnw->dev,
1600                                                 "host driver not loaded.\n");
1601                         langwell_otg_add_ktimer(TA_WAIT_BCON_TMR);
1602                         iotg->otg.state = OTG_STATE_A_WAIT_BCON;
1603                 } else if (iotg->hsm.b_bus_suspend_tmout) {
1604                         u32     val;
1605                         val = readl(lnw->iotg.base + CI_PORTSC1);
1606                         if (!(val & PORTSC_SUSP))
1607                                 break;
1608
1609                         if (lnw->iotg.stop_peripheral)
1610                                 lnw->iotg.stop_peripheral(&lnw->iotg);
1611                         else
1612                                 dev_dbg(lnw->dev,
1613                                         "client driver has been removed.\n");
1614
1615                         if (lnw->iotg.start_host)
1616                                 lnw->iotg.start_host(&lnw->iotg);
1617                         else
1618                                 dev_dbg(lnw->dev,
1619                                                 "host driver not loaded.\n");
1620                         langwell_otg_add_ktimer(TA_WAIT_BCON_TMR);
1621                         iotg->otg.state = OTG_STATE_A_WAIT_BCON;
1622                 }
1623                 break;
1624         case OTG_STATE_A_VBUS_ERR:
1625                 if (iotg->hsm.id) {
1626                         iotg->otg.default_a = 0;
1627                         iotg->hsm.a_clr_err = 0;
1628                         iotg->hsm.a_srp_det = 0;
1629                         set_client_mode();
1630                         langwell_otg_phy_low_power(1);
1631                         iotg->otg.state = OTG_STATE_B_IDLE;
1632                         langwell_update_transceiver();
1633                 } else if (iotg->hsm.a_clr_err) {
1634                         iotg->hsm.a_clr_err = 0;
1635                         iotg->hsm.a_srp_det = 0;
1636                         reset_otg();
1637                         init_hsm();
1638                         if (iotg->otg.state == OTG_STATE_A_IDLE)
1639                                 langwell_update_transceiver();
1640                 } else {
1641                         /* FW will clear PHCD bit when any VBus
1642                          * event detected. Reset PHCD to 1 again */
1643                         langwell_otg_phy_low_power(1);
1644                 }
1645                 break;
1646         case OTG_STATE_A_WAIT_VFALL:
1647                 if (iotg->hsm.id) {
1648                         iotg->otg.default_a = 0;
1649                         set_client_mode();
1650                         langwell_otg_phy_low_power(1);
1651                         iotg->otg.state = OTG_STATE_B_IDLE;
1652                         langwell_update_transceiver();
1653                 } else if (iotg->hsm.a_bus_req) {
1654
1655                         /* Turn on VBus */
1656                         iotg->otg.set_vbus(&iotg->otg, true);
1657                         iotg->hsm.a_wait_vrise_tmout = 0;
1658                         langwell_otg_add_timer(a_wait_vrise_tmr);
1659                         iotg->otg.state = OTG_STATE_A_WAIT_VRISE;
1660                 } else if (!iotg->hsm.a_sess_vld) {
1661                         iotg->hsm.a_srp_det = 0;
1662                         set_host_mode();
1663                         langwell_otg_phy_low_power(1);
1664                         iotg->otg.state = OTG_STATE_A_IDLE;
1665                 }
1666                 break;
1667         default:
1668                 ;
1669         }
1670
1671         dev_dbg(lnw->dev, "%s: new state = %s\n", __func__,
1672                         otg_state_string(iotg->otg.state));
1673 }
1674
1675 static ssize_t
1676 show_registers(struct device *_dev, struct device_attribute *attr, char *buf)
1677 {
1678         struct langwell_otg     *lnw = the_transceiver;
1679         char                    *next;
1680         unsigned                size, t;
1681
1682         next = buf;
1683         size = PAGE_SIZE;
1684
1685         t = scnprintf(next, size,
1686                 "\n"
1687                 "USBCMD = 0x%08x\n"
1688                 "USBSTS = 0x%08x\n"
1689                 "USBINTR = 0x%08x\n"
1690                 "ASYNCLISTADDR = 0x%08x\n"
1691                 "PORTSC1 = 0x%08x\n"
1692                 "HOSTPC1 = 0x%08x\n"
1693                 "OTGSC = 0x%08x\n"
1694                 "USBMODE = 0x%08x\n",
1695                 readl(lnw->iotg.base + 0x30),
1696                 readl(lnw->iotg.base + 0x34),
1697                 readl(lnw->iotg.base + 0x38),
1698                 readl(lnw->iotg.base + 0x48),
1699                 readl(lnw->iotg.base + 0x74),
1700                 readl(lnw->iotg.base + 0xb4),
1701                 readl(lnw->iotg.base + 0xf4),
1702                 readl(lnw->iotg.base + 0xf8)
1703              );
1704         size -= t;
1705         next += t;
1706
1707         return PAGE_SIZE - size;
1708 }
1709 static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL);
1710
1711 static ssize_t
1712 show_hsm(struct device *_dev, struct device_attribute *attr, char *buf)
1713 {
1714         struct langwell_otg             *lnw = the_transceiver;
1715         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
1716         char                            *next;
1717         unsigned                        size, t;
1718
1719         next = buf;
1720         size = PAGE_SIZE;
1721
1722         if (iotg->otg.host)
1723                 iotg->hsm.a_set_b_hnp_en = iotg->otg.host->b_hnp_enable;
1724
1725         if (iotg->otg.gadget)
1726                 iotg->hsm.b_hnp_enable = iotg->otg.gadget->b_hnp_enable;
1727
1728         t = scnprintf(next, size,
1729                 "\n"
1730                 "current state = %s\n"
1731                 "a_bus_resume = \t%d\n"
1732                 "a_bus_suspend = \t%d\n"
1733                 "a_conn = \t%d\n"
1734                 "a_sess_vld = \t%d\n"
1735                 "a_srp_det = \t%d\n"
1736                 "a_vbus_vld = \t%d\n"
1737                 "b_bus_resume = \t%d\n"
1738                 "b_bus_suspend = \t%d\n"
1739                 "b_conn = \t%d\n"
1740                 "b_se0_srp = \t%d\n"
1741                 "b_sess_end = \t%d\n"
1742                 "b_sess_vld = \t%d\n"
1743                 "id = \t%d\n"
1744                 "a_set_b_hnp_en = \t%d\n"
1745                 "b_srp_done = \t%d\n"
1746                 "b_hnp_enable = \t%d\n"
1747                 "a_wait_vrise_tmout = \t%d\n"
1748                 "a_wait_bcon_tmout = \t%d\n"
1749                 "a_aidl_bdis_tmout = \t%d\n"
1750                 "b_ase0_brst_tmout = \t%d\n"
1751                 "a_bus_drop = \t%d\n"
1752                 "a_bus_req = \t%d\n"
1753                 "a_clr_err = \t%d\n"
1754                 "a_suspend_req = \t%d\n"
1755                 "b_bus_req = \t%d\n"
1756                 "b_bus_suspend_tmout = \t%d\n"
1757                 "b_bus_suspend_vld = \t%d\n",
1758                 otg_state_string(iotg->otg.state),
1759                 iotg->hsm.a_bus_resume,
1760                 iotg->hsm.a_bus_suspend,
1761                 iotg->hsm.a_conn,
1762                 iotg->hsm.a_sess_vld,
1763                 iotg->hsm.a_srp_det,
1764                 iotg->hsm.a_vbus_vld,
1765                 iotg->hsm.b_bus_resume,
1766                 iotg->hsm.b_bus_suspend,
1767                 iotg->hsm.b_conn,
1768                 iotg->hsm.b_se0_srp,
1769                 iotg->hsm.b_sess_end,
1770                 iotg->hsm.b_sess_vld,
1771                 iotg->hsm.id,
1772                 iotg->hsm.a_set_b_hnp_en,
1773                 iotg->hsm.b_srp_done,
1774                 iotg->hsm.b_hnp_enable,
1775                 iotg->hsm.a_wait_vrise_tmout,
1776                 iotg->hsm.a_wait_bcon_tmout,
1777                 iotg->hsm.a_aidl_bdis_tmout,
1778                 iotg->hsm.b_ase0_brst_tmout,
1779                 iotg->hsm.a_bus_drop,
1780                 iotg->hsm.a_bus_req,
1781                 iotg->hsm.a_clr_err,
1782                 iotg->hsm.a_suspend_req,
1783                 iotg->hsm.b_bus_req,
1784                 iotg->hsm.b_bus_suspend_tmout,
1785                 iotg->hsm.b_bus_suspend_vld
1786                 );
1787         size -= t;
1788         next += t;
1789
1790         return PAGE_SIZE - size;
1791 }
1792 static DEVICE_ATTR(hsm, S_IRUGO, show_hsm, NULL);
1793
1794 static ssize_t
1795 get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
1796 {
1797         struct langwell_otg     *lnw = the_transceiver;
1798         char                    *next;
1799         unsigned                size, t;
1800
1801         next = buf;
1802         size = PAGE_SIZE;
1803
1804         t = scnprintf(next, size, "%d", lnw->iotg.hsm.a_bus_req);
1805         size -= t;
1806         next += t;
1807
1808         return PAGE_SIZE - size;
1809 }
1810
1811 static ssize_t
1812 set_a_bus_req(struct device *dev, struct device_attribute *attr,
1813                 const char *buf, size_t count)
1814 {
1815         struct langwell_otg             *lnw = the_transceiver;
1816         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
1817
1818         if (!iotg->otg.default_a)
1819                 return -1;
1820         if (count > 2)
1821                 return -1;
1822
1823         if (buf[0] == '0') {
1824                 iotg->hsm.a_bus_req = 0;
1825                 dev_dbg(lnw->dev, "User request: a_bus_req = 0\n");
1826         } else if (buf[0] == '1') {
1827                 /* If a_bus_drop is TRUE, a_bus_req can't be set */
1828                 if (iotg->hsm.a_bus_drop)
1829                         return -1;
1830                 iotg->hsm.a_bus_req = 1;
1831                 dev_dbg(lnw->dev, "User request: a_bus_req = 1\n");
1832         }
1833         if (spin_trylock(&lnw->wq_lock)) {
1834                 langwell_update_transceiver();
1835                 spin_unlock(&lnw->wq_lock);
1836         }
1837         return count;
1838 }
1839 static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req);
1840
1841 static ssize_t
1842 get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
1843 {
1844         struct langwell_otg     *lnw = the_transceiver;
1845         char                    *next;
1846         unsigned                size, t;
1847
1848         next = buf;
1849         size = PAGE_SIZE;
1850
1851         t = scnprintf(next, size, "%d", lnw->iotg.hsm.a_bus_drop);
1852         size -= t;
1853         next += t;
1854
1855         return PAGE_SIZE - size;
1856 }
1857
1858 static ssize_t
1859 set_a_bus_drop(struct device *dev, struct device_attribute *attr,
1860                 const char *buf, size_t count)
1861 {
1862         struct langwell_otg             *lnw = the_transceiver;
1863         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
1864
1865         if (!iotg->otg.default_a)
1866                 return -1;
1867         if (count > 2)
1868                 return -1;
1869
1870         if (buf[0] == '0') {
1871                 iotg->hsm.a_bus_drop = 0;
1872                 dev_dbg(lnw->dev, "User request: a_bus_drop = 0\n");
1873         } else if (buf[0] == '1') {
1874                 iotg->hsm.a_bus_drop = 1;
1875                 iotg->hsm.a_bus_req = 0;
1876                 dev_dbg(lnw->dev, "User request: a_bus_drop = 1\n");
1877                 dev_dbg(lnw->dev, "User request: and a_bus_req = 0\n");
1878         }
1879         if (spin_trylock(&lnw->wq_lock)) {
1880                 langwell_update_transceiver();
1881                 spin_unlock(&lnw->wq_lock);
1882         }
1883         return count;
1884 }
1885 static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop, set_a_bus_drop);
1886
1887 static ssize_t
1888 get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
1889 {
1890         struct langwell_otg     *lnw = the_transceiver;
1891         char                    *next;
1892         unsigned                size, t;
1893
1894         next = buf;
1895         size = PAGE_SIZE;
1896
1897         t = scnprintf(next, size, "%d", lnw->iotg.hsm.b_bus_req);
1898         size -= t;
1899         next += t;
1900
1901         return PAGE_SIZE - size;
1902 }
1903
1904 static ssize_t
1905 set_b_bus_req(struct device *dev, struct device_attribute *attr,
1906                 const char *buf, size_t count)
1907 {
1908         struct langwell_otg             *lnw = the_transceiver;
1909         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
1910
1911         if (iotg->otg.default_a)
1912                 return -1;
1913
1914         if (count > 2)
1915                 return -1;
1916
1917         if (buf[0] == '0') {
1918                 iotg->hsm.b_bus_req = 0;
1919                 dev_dbg(lnw->dev, "User request: b_bus_req = 0\n");
1920         } else if (buf[0] == '1') {
1921                 iotg->hsm.b_bus_req = 1;
1922                 dev_dbg(lnw->dev, "User request: b_bus_req = 1\n");
1923         }
1924         if (spin_trylock(&lnw->wq_lock)) {
1925                 langwell_update_transceiver();
1926                 spin_unlock(&lnw->wq_lock);
1927         }
1928         return count;
1929 }
1930 static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req);
1931
1932 static ssize_t
1933 set_a_clr_err(struct device *dev, struct device_attribute *attr,
1934                 const char *buf, size_t count)
1935 {
1936         struct langwell_otg             *lnw = the_transceiver;
1937         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
1938
1939         if (!iotg->otg.default_a)
1940                 return -1;
1941         if (count > 2)
1942                 return -1;
1943
1944         if (buf[0] == '1') {
1945                 iotg->hsm.a_clr_err = 1;
1946                 dev_dbg(lnw->dev, "User request: a_clr_err = 1\n");
1947         }
1948         if (spin_trylock(&lnw->wq_lock)) {
1949                 langwell_update_transceiver();
1950                 spin_unlock(&lnw->wq_lock);
1951         }
1952         return count;
1953 }
1954 static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
1955
1956 static struct attribute *inputs_attrs[] = {
1957         &dev_attr_a_bus_req.attr,
1958         &dev_attr_a_bus_drop.attr,
1959         &dev_attr_b_bus_req.attr,
1960         &dev_attr_a_clr_err.attr,
1961         NULL,
1962 };
1963
1964 static struct attribute_group debug_dev_attr_group = {
1965         .name = "inputs",
1966         .attrs = inputs_attrs,
1967 };
1968
1969 static int langwell_otg_probe(struct pci_dev *pdev,
1970                 const struct pci_device_id *id)
1971 {
1972         unsigned long           resource, len;
1973         void __iomem            *base = NULL;
1974         int                     retval;
1975         u32                     val32;
1976         struct langwell_otg     *lnw;
1977         char                    qname[] = "langwell_otg_queue";
1978
1979         retval = 0;
1980         dev_dbg(&pdev->dev, "\notg controller is detected.\n");
1981         if (pci_enable_device(pdev) < 0) {
1982                 retval = -ENODEV;
1983                 goto done;
1984         }
1985
1986         lnw = kzalloc(sizeof *lnw, GFP_KERNEL);
1987         if (lnw == NULL) {
1988                 retval = -ENOMEM;
1989                 goto done;
1990         }
1991         the_transceiver = lnw;
1992
1993         /* control register: BAR 0 */
1994         resource = pci_resource_start(pdev, 0);
1995         len = pci_resource_len(pdev, 0);
1996         if (!request_mem_region(resource, len, driver_name)) {
1997                 retval = -EBUSY;
1998                 goto err;
1999         }
2000         lnw->region = 1;
2001
2002         base = ioremap_nocache(resource, len);
2003         if (base == NULL) {
2004                 retval = -EFAULT;
2005                 goto err;
2006         }
2007         lnw->iotg.base = base;
2008
2009         if (!request_mem_region(USBCFG_ADDR, USBCFG_LEN, driver_name)) {
2010                 retval = -EBUSY;
2011                 goto err;
2012         }
2013         lnw->cfg_region = 1;
2014
2015         /* For the SCCB.USBCFG register */
2016         base = ioremap_nocache(USBCFG_ADDR, USBCFG_LEN);
2017         if (base == NULL) {
2018                 retval = -EFAULT;
2019                 goto err;
2020         }
2021         lnw->usbcfg = base;
2022
2023         if (!pdev->irq) {
2024                 dev_dbg(&pdev->dev, "No IRQ.\n");
2025                 retval = -ENODEV;
2026                 goto err;
2027         }
2028
2029         lnw->qwork = create_singlethread_workqueue(qname);
2030         if (!lnw->qwork) {
2031                 dev_dbg(&pdev->dev, "cannot create workqueue %s\n", qname);
2032                 retval = -ENOMEM;
2033                 goto err;
2034         }
2035         INIT_WORK(&lnw->work, langwell_otg_work);
2036
2037         /* OTG common part */
2038         lnw->dev = &pdev->dev;
2039         lnw->iotg.otg.dev = lnw->dev;
2040         lnw->iotg.otg.label = driver_name;
2041         lnw->iotg.otg.set_host = langwell_otg_set_host;
2042         lnw->iotg.otg.set_peripheral = langwell_otg_set_peripheral;
2043         lnw->iotg.otg.set_power = langwell_otg_set_power;
2044         lnw->iotg.otg.set_vbus = langwell_otg_set_vbus;
2045         lnw->iotg.otg.start_srp = langwell_otg_start_srp;
2046         lnw->iotg.otg.state = OTG_STATE_UNDEFINED;
2047
2048         if (otg_set_transceiver(&lnw->iotg.otg)) {
2049                 dev_dbg(lnw->dev, "can't set transceiver\n");
2050                 retval = -EBUSY;
2051                 goto err;
2052         }
2053
2054         reset_otg();
2055         init_hsm();
2056
2057         spin_lock_init(&lnw->lock);
2058         spin_lock_init(&lnw->wq_lock);
2059         INIT_LIST_HEAD(&active_timers);
2060         retval = langwell_otg_init_timers(&lnw->iotg.hsm);
2061         if (retval) {
2062                 dev_dbg(&pdev->dev, "Failed to init timers\n");
2063                 goto err;
2064         }
2065
2066         init_timer(&lnw->hsm_timer);
2067         ATOMIC_INIT_NOTIFIER_HEAD(&lnw->iotg.iotg_notifier);
2068
2069         lnw->iotg_notifier.notifier_call = langwell_otg_iotg_notify;
2070
2071         retval = intel_mid_otg_register_notifier(&lnw->iotg,
2072                                                 &lnw->iotg_notifier);
2073         if (retval) {
2074                 dev_dbg(lnw->dev, "Failed to register notifier\n");
2075                 goto err;
2076         }
2077
2078         if (request_irq(pdev->irq, otg_irq, IRQF_SHARED,
2079                                 driver_name, lnw) != 0) {
2080                 dev_dbg(lnw->dev, "request interrupt %d failed\n", pdev->irq);
2081                 retval = -EBUSY;
2082                 goto err;
2083         }
2084
2085         /* enable OTGSC int */
2086         val32 = OTGSC_DPIE | OTGSC_BSEIE | OTGSC_BSVIE |
2087                 OTGSC_ASVIE | OTGSC_AVVIE | OTGSC_IDIE | OTGSC_IDPU;
2088         writel(val32, lnw->iotg.base + CI_OTGSC);
2089
2090         retval = device_create_file(&pdev->dev, &dev_attr_registers);
2091         if (retval < 0) {
2092                 dev_dbg(lnw->dev,
2093                         "Can't register sysfs attribute: %d\n", retval);
2094                 goto err;
2095         }
2096
2097         retval = device_create_file(&pdev->dev, &dev_attr_hsm);
2098         if (retval < 0) {
2099                 dev_dbg(lnw->dev, "Can't hsm sysfs attribute: %d\n", retval);
2100                 goto err;
2101         }
2102
2103         retval = sysfs_create_group(&pdev->dev.kobj, &debug_dev_attr_group);
2104         if (retval < 0) {
2105                 dev_dbg(lnw->dev,
2106                         "Can't register sysfs attr group: %d\n", retval);
2107                 goto err;
2108         }
2109
2110         if (lnw->iotg.otg.state == OTG_STATE_A_IDLE)
2111                 langwell_update_transceiver();
2112
2113         return 0;
2114
2115 err:
2116         if (the_transceiver)
2117                 langwell_otg_remove(pdev);
2118 done:
2119         return retval;
2120 }
2121
2122 static void langwell_otg_remove(struct pci_dev *pdev)
2123 {
2124         struct langwell_otg *lnw = the_transceiver;
2125
2126         if (lnw->qwork) {
2127                 flush_workqueue(lnw->qwork);
2128                 destroy_workqueue(lnw->qwork);
2129         }
2130         intel_mid_otg_unregister_notifier(&lnw->iotg, &lnw->iotg_notifier);
2131         langwell_otg_free_timers();
2132
2133         /* disable OTGSC interrupt as OTGSC doesn't change in reset */
2134         writel(0, lnw->iotg.base + CI_OTGSC);
2135
2136         if (pdev->irq)
2137                 free_irq(pdev->irq, lnw);
2138         if (lnw->usbcfg)
2139                 iounmap(lnw->usbcfg);
2140         if (lnw->cfg_region)
2141                 release_mem_region(USBCFG_ADDR, USBCFG_LEN);
2142         if (lnw->iotg.base)
2143                 iounmap(lnw->iotg.base);
2144         if (lnw->region)
2145                 release_mem_region(pci_resource_start(pdev, 0),
2146                                 pci_resource_len(pdev, 0));
2147
2148         otg_set_transceiver(NULL);
2149         pci_disable_device(pdev);
2150         sysfs_remove_group(&pdev->dev.kobj, &debug_dev_attr_group);
2151         device_remove_file(&pdev->dev, &dev_attr_hsm);
2152         device_remove_file(&pdev->dev, &dev_attr_registers);
2153         kfree(lnw);
2154         lnw = NULL;
2155 }
2156
2157 static void transceiver_suspend(struct pci_dev *pdev)
2158 {
2159         pci_save_state(pdev);
2160         pci_set_power_state(pdev, PCI_D3hot);
2161         langwell_otg_phy_low_power(1);
2162 }
2163
2164 static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message)
2165 {
2166         struct langwell_otg             *lnw = the_transceiver;
2167         struct intel_mid_otg_xceiv      *iotg = &lnw->iotg;
2168         int                             ret = 0;
2169
2170         /* Disbale OTG interrupts */
2171         langwell_otg_intr(0);
2172
2173         if (pdev->irq)
2174                 free_irq(pdev->irq, lnw);
2175
2176         /* Prevent more otg_work */
2177         flush_workqueue(lnw->qwork);
2178         destroy_workqueue(lnw->qwork);
2179         lnw->qwork = NULL;
2180
2181         /* start actions */
2182         switch (iotg->otg.state) {
2183         case OTG_STATE_A_WAIT_VFALL:
2184                 iotg->otg.state = OTG_STATE_A_IDLE;
2185         case OTG_STATE_A_IDLE:
2186         case OTG_STATE_B_IDLE:
2187         case OTG_STATE_A_VBUS_ERR:
2188                 transceiver_suspend(pdev);
2189                 break;
2190         case OTG_STATE_A_WAIT_VRISE:
2191                 langwell_otg_del_timer(a_wait_vrise_tmr);
2192                 iotg->hsm.a_srp_det = 0;
2193
2194                 /* Turn off VBus */
2195                 iotg->otg.set_vbus(&iotg->otg, false);
2196                 iotg->otg.state = OTG_STATE_A_IDLE;
2197                 transceiver_suspend(pdev);
2198                 break;
2199         case OTG_STATE_A_WAIT_BCON:
2200                 del_timer_sync(&lnw->hsm_timer);
2201                 if (lnw->iotg.stop_host)
2202                         lnw->iotg.stop_host(&lnw->iotg);
2203                 else
2204                         dev_dbg(&pdev->dev, "host driver has been removed.\n");
2205
2206                 iotg->hsm.a_srp_det = 0;
2207
2208                 /* Turn off VBus */
2209                 iotg->otg.set_vbus(&iotg->otg, false);
2210                 iotg->otg.state = OTG_STATE_A_IDLE;
2211                 transceiver_suspend(pdev);
2212                 break;
2213         case OTG_STATE_A_HOST:
2214                 if (lnw->iotg.stop_host)
2215                         lnw->iotg.stop_host(&lnw->iotg);
2216                 else
2217                         dev_dbg(&pdev->dev, "host driver has been removed.\n");
2218
2219                 iotg->hsm.a_srp_det = 0;
2220
2221                 /* Turn off VBus */
2222                 iotg->otg.set_vbus(&iotg->otg, false);
2223
2224                 iotg->otg.state = OTG_STATE_A_IDLE;
2225                 transceiver_suspend(pdev);
2226                 break;
2227         case OTG_STATE_A_SUSPEND:
2228                 langwell_otg_del_timer(a_aidl_bdis_tmr);
2229                 langwell_otg_HABA(0);
2230                 if (lnw->iotg.stop_host)
2231                         lnw->iotg.stop_host(&lnw->iotg);
2232                 else
2233                         dev_dbg(lnw->dev, "host driver has been removed.\n");
2234                 iotg->hsm.a_srp_det = 0;
2235
2236                 /* Turn off VBus */
2237                 iotg->otg.set_vbus(&iotg->otg, false);
2238                 iotg->otg.state = OTG_STATE_A_IDLE;
2239                 transceiver_suspend(pdev);
2240                 break;
2241         case OTG_STATE_A_PERIPHERAL:
2242                 del_timer_sync(&lnw->hsm_timer);
2243
2244                 if (lnw->iotg.stop_peripheral)
2245                         lnw->iotg.stop_peripheral(&lnw->iotg);
2246                 else
2247                         dev_dbg(&pdev->dev,
2248                                 "client driver has been removed.\n");
2249                 iotg->hsm.a_srp_det = 0;
2250
2251                 /* Turn off VBus */
2252                 iotg->otg.set_vbus(&iotg->otg, false);
2253                 iotg->otg.state = OTG_STATE_A_IDLE;
2254                 transceiver_suspend(pdev);
2255                 break;
2256         case OTG_STATE_B_HOST:
2257                 if (lnw->iotg.stop_host)
2258                         lnw->iotg.stop_host(&lnw->iotg);
2259                 else
2260                         dev_dbg(&pdev->dev, "host driver has been removed.\n");
2261                 iotg->hsm.b_bus_req = 0;
2262                 iotg->otg.state = OTG_STATE_B_IDLE;
2263                 transceiver_suspend(pdev);
2264                 break;
2265         case OTG_STATE_B_PERIPHERAL:
2266                 if (lnw->iotg.stop_peripheral)
2267                         lnw->iotg.stop_peripheral(&lnw->iotg);
2268                 else
2269                         dev_dbg(&pdev->dev,
2270                                 "client driver has been removed.\n");
2271                 iotg->otg.state = OTG_STATE_B_IDLE;
2272                 transceiver_suspend(pdev);
2273                 break;
2274         case OTG_STATE_B_WAIT_ACON:
2275                 /* delete hsm timer for b_ase0_brst_tmr */
2276                 del_timer_sync(&lnw->hsm_timer);
2277
2278                 langwell_otg_HAAR(0);
2279
2280                 if (lnw->iotg.stop_host)
2281                         lnw->iotg.stop_host(&lnw->iotg);
2282                 else
2283                         dev_dbg(&pdev->dev, "host driver has been removed.\n");
2284                 iotg->hsm.b_bus_req = 0;
2285                 iotg->otg.state = OTG_STATE_B_IDLE;
2286                 transceiver_suspend(pdev);
2287                 break;
2288         default:
2289                 dev_dbg(lnw->dev, "error state before suspend\n");
2290                 break;
2291         }
2292
2293         return ret;
2294 }
2295
2296 static void transceiver_resume(struct pci_dev *pdev)
2297 {
2298         pci_restore_state(pdev);
2299         pci_set_power_state(pdev, PCI_D0);
2300 }
2301
2302 static int langwell_otg_resume(struct pci_dev *pdev)
2303 {
2304         struct langwell_otg     *lnw = the_transceiver;
2305         int                     ret = 0;
2306
2307         transceiver_resume(pdev);
2308
2309         lnw->qwork = create_singlethread_workqueue("langwell_otg_queue");
2310         if (!lnw->qwork) {
2311                 dev_dbg(&pdev->dev, "cannot create langwell otg workqueuen");
2312                 ret = -ENOMEM;
2313                 goto error;
2314         }
2315
2316         if (request_irq(pdev->irq, otg_irq, IRQF_SHARED,
2317                                 driver_name, lnw) != 0) {
2318                 dev_dbg(&pdev->dev, "request interrupt %d failed\n", pdev->irq);
2319                 ret = -EBUSY;
2320                 goto error;
2321         }
2322
2323         /* enable OTG interrupts */
2324         langwell_otg_intr(1);
2325
2326         update_hsm();
2327
2328         langwell_update_transceiver();
2329
2330         return ret;
2331 error:
2332         langwell_otg_intr(0);
2333         transceiver_suspend(pdev);
2334         return ret;
2335 }
2336
2337 static int __init langwell_otg_init(void)
2338 {
2339         return pci_register_driver(&otg_pci_driver);
2340 }
2341 module_init(langwell_otg_init);
2342
2343 static void __exit langwell_otg_cleanup(void)
2344 {
2345         pci_unregister_driver(&otg_pci_driver);
2346 }
2347 module_exit(langwell_otg_cleanup);