2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56 u32 mask, u32 done, int usec)
61 result = xhci_readl(xhci, ptr);
62 if (result == ~(u32)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd *xhci)
83 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
87 cmd = xhci_readl(xhci, &xhci->op_regs->command);
89 xhci_writel(xhci, cmd, &xhci->op_regs->command);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd *xhci)
103 xhci_dbg(xhci, "// Halt the HC\n");
106 ret = handshake(xhci, &xhci->op_regs->status,
107 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109 xhci->xhc_state |= XHCI_STATE_HALTED;
110 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
112 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd *xhci)
125 temp = xhci_readl(xhci, &xhci->op_regs->command);
127 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci, temp, &xhci->op_regs->command);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret = handshake(xhci, &xhci->op_regs->status,
136 STS_HALT, 0, XHCI_MAX_HALT_USEC);
137 if (ret == -ETIMEDOUT)
138 xhci_err(xhci, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci->xhc_state &= ~XHCI_STATE_HALTED;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd *xhci)
159 state = xhci_readl(xhci, &xhci->op_regs->status);
160 if ((state & STS_HALT) == 0) {
161 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci, "// Reset the HC\n");
166 command = xhci_readl(xhci, &xhci->op_regs->command);
167 command |= CMD_RESET;
168 xhci_writel(xhci, command, &xhci->op_regs->command);
170 ret = handshake(xhci, &xhci->op_regs->command,
171 CMD_RESET, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 return handshake(xhci, &xhci->op_regs->status,
181 STS_CNR, 0, 10 * 1000 * 1000);
185 static int xhci_free_msi(struct xhci_hcd *xhci)
189 if (!xhci->msix_entries)
192 for (i = 0; i < xhci->msix_count; i++)
193 if (xhci->msix_entries[i].vector)
194 free_irq(xhci->msix_entries[i].vector,
202 static int xhci_setup_msi(struct xhci_hcd *xhci)
205 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
207 ret = pci_enable_msi(pdev);
209 xhci_err(xhci, "failed to allocate MSI entry\n");
213 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
214 0, "xhci_hcd", xhci_to_hcd(xhci));
216 xhci_err(xhci, "disable MSI interrupt\n");
217 pci_disable_msi(pdev);
225 * free all IRQs request
227 static void xhci_free_irq(struct xhci_hcd *xhci)
229 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
232 /* return if using legacy interrupt */
233 if (xhci_to_hcd(xhci)->irq >= 0)
236 ret = xhci_free_msi(xhci);
240 free_irq(pdev->irq, xhci_to_hcd(xhci));
248 static int xhci_setup_msix(struct xhci_hcd *xhci)
251 struct usb_hcd *hcd = xhci_to_hcd(xhci);
252 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
255 * calculate number of msi-x vectors supported.
256 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
257 * with max number of interrupters based on the xhci HCSPARAMS1.
258 * - num_online_cpus: maximum msi-x vectors per CPUs core.
259 * Add additional 1 vector to ensure always available interrupt.
261 xhci->msix_count = min(num_online_cpus() + 1,
262 HCS_MAX_INTRS(xhci->hcs_params1));
265 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
267 if (!xhci->msix_entries) {
268 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
272 for (i = 0; i < xhci->msix_count; i++) {
273 xhci->msix_entries[i].entry = i;
274 xhci->msix_entries[i].vector = 0;
277 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
279 xhci_err(xhci, "Failed to enable MSI-X\n");
283 for (i = 0; i < xhci->msix_count; i++) {
284 ret = request_irq(xhci->msix_entries[i].vector,
285 (irq_handler_t)xhci_msi_irq,
286 0, "xhci_hcd", xhci_to_hcd(xhci));
291 hcd->msix_enabled = 1;
295 xhci_err(xhci, "disable MSI-X interrupt\n");
297 pci_disable_msix(pdev);
299 kfree(xhci->msix_entries);
300 xhci->msix_entries = NULL;
304 /* Free any IRQs and disable MSI-X */
305 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
307 struct usb_hcd *hcd = xhci_to_hcd(xhci);
308 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
312 if (xhci->msix_entries) {
313 pci_disable_msix(pdev);
314 kfree(xhci->msix_entries);
315 xhci->msix_entries = NULL;
317 pci_disable_msi(pdev);
320 hcd->msix_enabled = 0;
324 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
328 if (xhci->msix_entries) {
329 for (i = 0; i < xhci->msix_count; i++)
330 synchronize_irq(xhci->msix_entries[i].vector);
334 static int xhci_try_enable_msi(struct usb_hcd *hcd)
336 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
337 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
341 * Some Fresco Logic host controllers advertise MSI, but fail to
342 * generate interrupts. Don't even try to enable MSI.
344 if (xhci->quirks & XHCI_BROKEN_MSI)
347 /* unregister the legacy interrupt */
349 free_irq(hcd->irq, hcd);
352 ret = xhci_setup_msix(xhci);
354 /* fall back to msi*/
355 ret = xhci_setup_msi(xhci);
358 /* hcd->irq is -1, we have MSI */
362 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
366 /* fall back to legacy interrupt*/
367 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
368 hcd->irq_descr, hcd);
370 xhci_err(xhci, "request interrupt %d failed\n",
374 hcd->irq = pdev->irq;
380 static int xhci_try_enable_msi(struct usb_hcd *hcd)
385 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
389 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
395 static void compliance_mode_recovery(unsigned long arg)
397 struct xhci_hcd *xhci;
402 xhci = (struct xhci_hcd *)arg;
404 for (i = 0; i < xhci->num_usb3_ports; i++) {
405 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
406 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
408 * Compliance Mode Detected. Letting USB Core
409 * handle the Warm Reset
411 xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
413 xhci_dbg(xhci, "Attempting Recovery routine!\n");
414 hcd = xhci->shared_hcd;
416 if (hcd->state == HC_STATE_SUSPENDED)
417 usb_hcd_resume_root_hub(hcd);
419 usb_hcd_poll_rh_status(hcd);
423 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
424 mod_timer(&xhci->comp_mode_recovery_timer,
425 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
429 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
430 * that causes ports behind that hardware to enter compliance mode sometimes.
431 * The quirk creates a timer that polls every 2 seconds the link state of
432 * each host controller's port and recovers it by issuing a Warm reset
433 * if Compliance mode is detected, otherwise the port will become "dead" (no
434 * device connections or disconnections will be detected anymore). Becasue no
435 * status event is generated when entering compliance mode (per xhci spec),
436 * this quirk is needed on systems that have the failing hardware installed.
438 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
440 xhci->port_status_u0 = 0;
441 init_timer(&xhci->comp_mode_recovery_timer);
443 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
444 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
445 xhci->comp_mode_recovery_timer.expires = jiffies +
446 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
448 set_timer_slack(&xhci->comp_mode_recovery_timer,
449 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
450 add_timer(&xhci->comp_mode_recovery_timer);
451 xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
455 * This function identifies the systems that have installed the SN65LVPE502CP
456 * USB3.0 re-driver and that need the Compliance Mode Quirk.
458 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
460 static bool compliance_mode_recovery_timer_quirk_check(void)
462 const char *dmi_product_name, *dmi_sys_vendor;
464 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
465 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
467 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
470 if (strstr(dmi_product_name, "Z420") ||
471 strstr(dmi_product_name, "Z620") ||
472 strstr(dmi_product_name, "Z820"))
478 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
480 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
485 * Initialize memory for HCD and xHC (one-time init).
487 * Program the PAGESIZE register, initialize the device context array, create
488 * device contexts (?), set up a command ring segment (or two?), create event
489 * ring (one for now).
491 int xhci_init(struct usb_hcd *hcd)
493 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
496 xhci_dbg(xhci, "xhci_init\n");
497 spin_lock_init(&xhci->lock);
498 if (xhci->hci_version == 0x95 && link_quirk) {
499 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
500 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
502 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
504 retval = xhci_mem_init(xhci, GFP_KERNEL);
505 xhci_dbg(xhci, "Finished xhci_init\n");
507 /* Initializing Compliance Mode Recovery Data If Needed */
508 if (compliance_mode_recovery_timer_quirk_check()) {
509 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
510 compliance_mode_recovery_timer_init(xhci);
516 /*-------------------------------------------------------------------------*/
519 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
520 static void xhci_event_ring_work(unsigned long arg)
525 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
528 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
530 spin_lock_irqsave(&xhci->lock, flags);
531 temp = xhci_readl(xhci, &xhci->op_regs->status);
532 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
533 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
534 (xhci->xhc_state & XHCI_STATE_HALTED)) {
535 xhci_dbg(xhci, "HW died, polling stopped.\n");
536 spin_unlock_irqrestore(&xhci->lock, flags);
540 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
541 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
542 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
543 xhci->error_bitmask = 0;
544 xhci_dbg(xhci, "Event ring:\n");
545 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
546 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
547 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
548 temp_64 &= ~ERST_PTR_MASK;
549 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
550 xhci_dbg(xhci, "Command ring:\n");
551 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
552 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
553 xhci_dbg_cmd_ptrs(xhci);
554 for (i = 0; i < MAX_HC_SLOTS; ++i) {
557 for (j = 0; j < 31; ++j) {
558 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
561 spin_unlock_irqrestore(&xhci->lock, flags);
564 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
566 xhci_dbg(xhci, "Quit polling the event ring.\n");
570 static int xhci_run_finished(struct xhci_hcd *xhci)
572 if (xhci_start(xhci)) {
576 xhci->shared_hcd->state = HC_STATE_RUNNING;
577 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
579 if (xhci->quirks & XHCI_NEC_HOST)
580 xhci_ring_cmd_db(xhci);
582 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
587 * Start the HC after it was halted.
589 * This function is called by the USB core when the HC driver is added.
590 * Its opposite is xhci_stop().
592 * xhci_init() must be called once before this function can be called.
593 * Reset the HC, enable device slot contexts, program DCBAAP, and
594 * set command ring pointer and event ring pointer.
596 * Setup MSI-X vectors and enable interrupts.
598 int xhci_run(struct usb_hcd *hcd)
603 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
605 /* Start the xHCI host controller running only after the USB 2.0 roothub
609 hcd->uses_new_polling = 1;
610 if (!usb_hcd_is_primary_hcd(hcd))
611 return xhci_run_finished(xhci);
613 xhci_dbg(xhci, "xhci_run\n");
615 ret = xhci_try_enable_msi(hcd);
619 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
620 init_timer(&xhci->event_ring_timer);
621 xhci->event_ring_timer.data = (unsigned long) xhci;
622 xhci->event_ring_timer.function = xhci_event_ring_work;
623 /* Poll the event ring */
624 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
626 xhci_dbg(xhci, "Setting event ring polling timer\n");
627 add_timer(&xhci->event_ring_timer);
630 xhci_dbg(xhci, "Command ring memory map follows:\n");
631 xhci_debug_ring(xhci, xhci->cmd_ring);
632 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
633 xhci_dbg_cmd_ptrs(xhci);
635 xhci_dbg(xhci, "ERST memory map follows:\n");
636 xhci_dbg_erst(xhci, &xhci->erst);
637 xhci_dbg(xhci, "Event ring:\n");
638 xhci_debug_ring(xhci, xhci->event_ring);
639 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
640 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
641 temp_64 &= ~ERST_PTR_MASK;
642 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
644 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
645 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
646 temp &= ~ER_IRQ_INTERVAL_MASK;
648 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
650 /* Set the HCD state before we enable the irqs */
651 temp = xhci_readl(xhci, &xhci->op_regs->command);
653 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
655 xhci_writel(xhci, temp, &xhci->op_regs->command);
657 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
658 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
659 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
660 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
661 &xhci->ir_set->irq_pending);
662 xhci_print_ir_set(xhci, 0);
664 if (xhci->quirks & XHCI_NEC_HOST)
665 xhci_queue_vendor_command(xhci, 0, 0, 0,
666 TRB_TYPE(TRB_NEC_GET_FW));
668 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
672 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
674 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
676 spin_lock_irq(&xhci->lock);
679 /* The shared_hcd is going to be deallocated shortly (the USB core only
680 * calls this function when allocation fails in usb_add_hcd(), or
681 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
683 xhci->shared_hcd = NULL;
684 spin_unlock_irq(&xhci->lock);
690 * This function is called by the USB core when the HC driver is removed.
691 * Its opposite is xhci_run().
693 * Disable device contexts, disable IRQs, and quiesce the HC.
694 * Reset the HC, finish any completed transactions, and cleanup memory.
696 void xhci_stop(struct usb_hcd *hcd)
699 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
701 if (!usb_hcd_is_primary_hcd(hcd)) {
702 xhci_only_stop_hcd(xhci->shared_hcd);
706 spin_lock_irq(&xhci->lock);
707 /* Make sure the xHC is halted for a USB3 roothub
708 * (xhci_stop() could be called as part of failed init).
712 spin_unlock_irq(&xhci->lock);
714 xhci_cleanup_msix(xhci);
716 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
717 /* Tell the event ring poll function not to reschedule */
719 del_timer_sync(&xhci->event_ring_timer);
722 /* Deleting Compliance Mode Recovery Timer */
723 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
724 (!(xhci_all_ports_seen_u0(xhci))))
725 del_timer_sync(&xhci->comp_mode_recovery_timer);
727 if (xhci->quirks & XHCI_AMD_PLL_FIX)
730 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
731 temp = xhci_readl(xhci, &xhci->op_regs->status);
732 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
733 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
734 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
735 &xhci->ir_set->irq_pending);
736 xhci_print_ir_set(xhci, 0);
738 xhci_dbg(xhci, "cleaning up memory\n");
739 xhci_mem_cleanup(xhci);
740 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
741 xhci_readl(xhci, &xhci->op_regs->status));
745 * Shutdown HC (not bus-specific)
747 * This is called when the machine is rebooting or halting. We assume that the
748 * machine will be powered off, and the HC's internal state will be reset.
749 * Don't bother to free memory.
751 * This will only ever be called with the main usb_hcd (the USB3 roothub).
753 void xhci_shutdown(struct usb_hcd *hcd)
755 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
757 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
758 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
760 spin_lock_irq(&xhci->lock);
762 spin_unlock_irq(&xhci->lock);
764 xhci_cleanup_msix(xhci);
766 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
767 xhci_readl(xhci, &xhci->op_regs->status));
771 static void xhci_save_registers(struct xhci_hcd *xhci)
773 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
774 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
775 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
776 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
777 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
778 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
779 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
780 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
781 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
784 static void xhci_restore_registers(struct xhci_hcd *xhci)
786 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
787 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
788 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
789 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
790 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
791 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
792 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
793 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
794 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
797 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
801 /* step 2: initialize command ring buffer */
802 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
803 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
804 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
805 xhci->cmd_ring->dequeue) &
806 (u64) ~CMD_RING_RSVD_BITS) |
807 xhci->cmd_ring->cycle_state;
808 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
809 (long unsigned long) val_64);
810 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
814 * The whole command ring must be cleared to zero when we suspend the host.
816 * The host doesn't save the command ring pointer in the suspend well, so we
817 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
818 * aligned, because of the reserved bits in the command ring dequeue pointer
819 * register. Therefore, we can't just set the dequeue pointer back in the
820 * middle of the ring (TRBs are 16-byte aligned).
822 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
824 struct xhci_ring *ring;
825 struct xhci_segment *seg;
827 ring = xhci->cmd_ring;
831 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
832 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
833 cpu_to_le32(~TRB_CYCLE);
835 } while (seg != ring->deq_seg);
837 /* Reset the software enqueue and dequeue pointers */
838 ring->deq_seg = ring->first_seg;
839 ring->dequeue = ring->first_seg->trbs;
840 ring->enq_seg = ring->deq_seg;
841 ring->enqueue = ring->dequeue;
844 * Ring is now zeroed, so the HW should look for change of ownership
845 * when the cycle bit is set to 1.
847 ring->cycle_state = 1;
850 * Reset the hardware dequeue pointer.
851 * Yes, this will need to be re-written after resume, but we're paranoid
852 * and want to make sure the hardware doesn't access bogus memory
853 * because, say, the BIOS or an SMI started the host without changing
854 * the command ring pointers.
856 xhci_set_cmd_ring_deq(xhci);
860 * Stop HC (not bus-specific)
862 * This is called when the machine transition into S3/S4 mode.
865 int xhci_suspend(struct xhci_hcd *xhci)
868 struct usb_hcd *hcd = xhci_to_hcd(xhci);
871 spin_lock_irq(&xhci->lock);
872 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
873 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
874 /* step 1: stop endpoint */
875 /* skipped assuming that port suspend has done */
877 /* step 2: clear Run/Stop bit */
878 command = xhci_readl(xhci, &xhci->op_regs->command);
880 xhci_writel(xhci, command, &xhci->op_regs->command);
881 if (handshake(xhci, &xhci->op_regs->status,
882 STS_HALT, STS_HALT, 100*100)) {
883 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
884 spin_unlock_irq(&xhci->lock);
887 xhci_clear_command_ring(xhci);
889 /* step 3: save registers */
890 xhci_save_registers(xhci);
892 /* step 4: set CSS flag */
893 command = xhci_readl(xhci, &xhci->op_regs->command);
895 xhci_writel(xhci, command, &xhci->op_regs->command);
896 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
897 xhci_warn(xhci, "WARN: xHC save state timeout\n");
898 spin_unlock_irq(&xhci->lock);
901 spin_unlock_irq(&xhci->lock);
904 * Deleting Compliance Mode Recovery Timer because the xHCI Host
905 * is about to be suspended.
907 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
908 (!(xhci_all_ports_seen_u0(xhci)))) {
909 del_timer_sync(&xhci->comp_mode_recovery_timer);
910 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
913 /* step 5: remove core well power */
914 /* synchronize irq when using MSI-X */
915 xhci_msix_sync_irqs(xhci);
921 * start xHC (not bus-specific)
923 * This is called when the machine transition from S3/S4 mode.
926 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
928 u32 command, temp = 0;
929 struct usb_hcd *hcd = xhci_to_hcd(xhci);
930 struct usb_hcd *secondary_hcd;
933 /* Wait a bit if either of the roothubs need to settle from the
934 * transition into bus suspend.
936 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
938 xhci->bus_state[1].next_statechange))
941 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
942 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
944 spin_lock_irq(&xhci->lock);
945 if (xhci->quirks & XHCI_RESET_ON_RESUME)
949 /* step 1: restore register */
950 xhci_restore_registers(xhci);
951 /* step 2: initialize command ring buffer */
952 xhci_set_cmd_ring_deq(xhci);
953 /* step 3: restore state and start state*/
954 /* step 3: set CRS flag */
955 command = xhci_readl(xhci, &xhci->op_regs->command);
957 xhci_writel(xhci, command, &xhci->op_regs->command);
958 if (handshake(xhci, &xhci->op_regs->status,
959 STS_RESTORE, 0, 10 * 1000)) {
960 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
961 spin_unlock_irq(&xhci->lock);
964 temp = xhci_readl(xhci, &xhci->op_regs->status);
967 /* If restore operation fails, re-initialize the HC during resume */
968 if ((temp & STS_SRE) || hibernated) {
969 /* Let the USB core know _both_ roothubs lost power. */
970 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
971 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
973 xhci_dbg(xhci, "Stop HCD\n");
976 spin_unlock_irq(&xhci->lock);
977 xhci_cleanup_msix(xhci);
979 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
980 /* Tell the event ring poll function not to reschedule */
982 del_timer_sync(&xhci->event_ring_timer);
985 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
986 temp = xhci_readl(xhci, &xhci->op_regs->status);
987 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
988 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
989 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
990 &xhci->ir_set->irq_pending);
991 xhci_print_ir_set(xhci, 0);
993 xhci_dbg(xhci, "cleaning up memory\n");
994 xhci_mem_cleanup(xhci);
995 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
996 xhci_readl(xhci, &xhci->op_regs->status));
998 /* USB core calls the PCI reinit and start functions twice:
999 * first with the primary HCD, and then with the secondary HCD.
1000 * If we don't do the same, the host will never be started.
1002 if (!usb_hcd_is_primary_hcd(hcd))
1003 secondary_hcd = hcd;
1005 secondary_hcd = xhci->shared_hcd;
1007 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1008 retval = xhci_init(hcd->primary_hcd);
1011 xhci_dbg(xhci, "Start the primary HCD\n");
1012 retval = xhci_run(hcd->primary_hcd);
1014 xhci_dbg(xhci, "Start the secondary HCD\n");
1015 retval = xhci_run(secondary_hcd);
1017 hcd->state = HC_STATE_SUSPENDED;
1018 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1022 /* step 4: set Run/Stop bit */
1023 command = xhci_readl(xhci, &xhci->op_regs->command);
1025 xhci_writel(xhci, command, &xhci->op_regs->command);
1026 handshake(xhci, &xhci->op_regs->status, STS_HALT,
1029 /* step 5: walk topology and initialize portsc,
1030 * portpmsc and portli
1032 /* this is done in bus_resume */
1034 /* step 6: restart each of the previously
1035 * Running endpoints by ringing their doorbells
1038 spin_unlock_irq(&xhci->lock);
1042 usb_hcd_resume_root_hub(hcd);
1043 usb_hcd_resume_root_hub(xhci->shared_hcd);
1047 * If system is subject to the Quirk, Compliance Mode Timer needs to
1048 * be re-initialized Always after a system resume. Ports are subject
1049 * to suffer the Compliance Mode issue again. It doesn't matter if
1050 * ports have entered previously to U0 before system's suspension.
1052 if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
1053 compliance_mode_recovery_timer_init(xhci);
1057 #endif /* CONFIG_PM */
1059 /*-------------------------------------------------------------------------*/
1062 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1063 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1064 * value to right shift 1 for the bitmask.
1066 * Index = (epnum * 2) + direction - 1,
1067 * where direction = 0 for OUT, 1 for IN.
1068 * For control endpoints, the IN index is used (OUT index is unused), so
1069 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1071 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1074 if (usb_endpoint_xfer_control(desc))
1075 index = (unsigned int) (usb_endpoint_num(desc)*2);
1077 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1078 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1082 /* Find the flag for this endpoint (for use in the control context). Use the
1083 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1086 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1088 return 1 << (xhci_get_endpoint_index(desc) + 1);
1091 /* Find the flag for this endpoint (for use in the control context). Use the
1092 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1095 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1097 return 1 << (ep_index + 1);
1100 /* Compute the last valid endpoint context index. Basically, this is the
1101 * endpoint index plus one. For slot contexts with more than valid endpoint,
1102 * we find the most significant bit set in the added contexts flags.
1103 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1104 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1106 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1108 return fls(added_ctxs) - 1;
1111 /* Returns 1 if the arguments are OK;
1112 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1114 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1115 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1117 struct xhci_hcd *xhci;
1118 struct xhci_virt_device *virt_dev;
1120 if (!hcd || (check_ep && !ep) || !udev) {
1121 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1125 if (!udev->parent) {
1126 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1131 xhci = hcd_to_xhci(hcd);
1132 if (xhci->xhc_state & XHCI_STATE_HALTED)
1135 if (check_virt_dev) {
1136 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1137 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1142 virt_dev = xhci->devs[udev->slot_id];
1143 if (virt_dev->udev != udev) {
1144 printk(KERN_DEBUG "xHCI %s called with udev and "
1145 "virt_dev does not match\n", func);
1153 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1154 struct usb_device *udev, struct xhci_command *command,
1155 bool ctx_change, bool must_succeed);
1158 * Full speed devices may have a max packet size greater than 8 bytes, but the
1159 * USB core doesn't know that until it reads the first 8 bytes of the
1160 * descriptor. If the usb_device's max packet size changes after that point,
1161 * we need to issue an evaluate context command and wait on it.
1163 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1164 unsigned int ep_index, struct urb *urb)
1166 struct xhci_container_ctx *in_ctx;
1167 struct xhci_container_ctx *out_ctx;
1168 struct xhci_input_control_ctx *ctrl_ctx;
1169 struct xhci_ep_ctx *ep_ctx;
1170 int max_packet_size;
1171 int hw_max_packet_size;
1174 out_ctx = xhci->devs[slot_id]->out_ctx;
1175 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1176 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1177 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1178 if (hw_max_packet_size != max_packet_size) {
1179 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1180 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1182 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1183 hw_max_packet_size);
1184 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1186 /* Set up the modified control endpoint 0 */
1187 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1188 xhci->devs[slot_id]->out_ctx, ep_index);
1189 in_ctx = xhci->devs[slot_id]->in_ctx;
1190 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1191 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1192 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1194 /* Set up the input context flags for the command */
1195 /* FIXME: This won't work if a non-default control endpoint
1196 * changes max packet sizes.
1198 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1199 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1200 ctrl_ctx->drop_flags = 0;
1202 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1203 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1204 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1205 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1207 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1210 /* Clean up the input context for later use by bandwidth
1213 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1219 * non-error returns are a promise to giveback() the urb later
1220 * we drop ownership so next owner (or urb unlink) can get it
1222 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1224 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1225 struct xhci_td *buffer;
1226 unsigned long flags;
1228 unsigned int slot_id, ep_index;
1229 struct urb_priv *urb_priv;
1232 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1233 true, true, __func__) <= 0)
1236 slot_id = urb->dev->slot_id;
1237 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1239 if (!HCD_HW_ACCESSIBLE(hcd)) {
1240 if (!in_interrupt())
1241 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1246 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1247 size = urb->number_of_packets;
1251 urb_priv = kzalloc(sizeof(struct urb_priv) +
1252 size * sizeof(struct xhci_td *), mem_flags);
1256 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1262 for (i = 0; i < size; i++) {
1263 urb_priv->td[i] = buffer;
1267 urb_priv->length = size;
1268 urb_priv->td_cnt = 0;
1269 urb->hcpriv = urb_priv;
1271 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1272 /* Check to see if the max packet size for the default control
1273 * endpoint changed during FS device enumeration
1275 if (urb->dev->speed == USB_SPEED_FULL) {
1276 ret = xhci_check_maxpacket(xhci, slot_id,
1279 xhci_urb_free_priv(xhci, urb_priv);
1285 /* We have a spinlock and interrupts disabled, so we must pass
1286 * atomic context to this function, which may allocate memory.
1288 spin_lock_irqsave(&xhci->lock, flags);
1289 if (xhci->xhc_state & XHCI_STATE_DYING)
1291 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1295 spin_unlock_irqrestore(&xhci->lock, flags);
1296 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1297 spin_lock_irqsave(&xhci->lock, flags);
1298 if (xhci->xhc_state & XHCI_STATE_DYING)
1300 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1301 EP_GETTING_STREAMS) {
1302 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1303 "is transitioning to using streams.\n");
1305 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1306 EP_GETTING_NO_STREAMS) {
1307 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1308 "is transitioning to "
1309 "not having streams.\n");
1312 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1317 spin_unlock_irqrestore(&xhci->lock, flags);
1318 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1319 spin_lock_irqsave(&xhci->lock, flags);
1320 if (xhci->xhc_state & XHCI_STATE_DYING)
1322 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1326 spin_unlock_irqrestore(&xhci->lock, flags);
1328 spin_lock_irqsave(&xhci->lock, flags);
1329 if (xhci->xhc_state & XHCI_STATE_DYING)
1331 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1335 spin_unlock_irqrestore(&xhci->lock, flags);
1340 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1341 "non-responsive xHCI host.\n",
1342 urb->ep->desc.bEndpointAddress, urb);
1345 xhci_urb_free_priv(xhci, urb_priv);
1347 spin_unlock_irqrestore(&xhci->lock, flags);
1351 /* Get the right ring for the given URB.
1352 * If the endpoint supports streams, boundary check the URB's stream ID.
1353 * If the endpoint doesn't support streams, return the singular endpoint ring.
1355 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1358 unsigned int slot_id;
1359 unsigned int ep_index;
1360 unsigned int stream_id;
1361 struct xhci_virt_ep *ep;
1363 slot_id = urb->dev->slot_id;
1364 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1365 stream_id = urb->stream_id;
1366 ep = &xhci->devs[slot_id]->eps[ep_index];
1367 /* Common case: no streams */
1368 if (!(ep->ep_state & EP_HAS_STREAMS))
1371 if (stream_id == 0) {
1373 "WARN: Slot ID %u, ep index %u has streams, "
1374 "but URB has no stream ID.\n",
1379 if (stream_id < ep->stream_info->num_streams)
1380 return ep->stream_info->stream_rings[stream_id];
1383 "WARN: Slot ID %u, ep index %u has "
1384 "stream IDs 1 to %u allocated, "
1385 "but stream ID %u is requested.\n",
1387 ep->stream_info->num_streams - 1,
1393 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1394 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1395 * should pick up where it left off in the TD, unless a Set Transfer Ring
1396 * Dequeue Pointer is issued.
1398 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1399 * the ring. Since the ring is a contiguous structure, they can't be physically
1400 * removed. Instead, there are two options:
1402 * 1) If the HC is in the middle of processing the URB to be canceled, we
1403 * simply move the ring's dequeue pointer past those TRBs using the Set
1404 * Transfer Ring Dequeue Pointer command. This will be the common case,
1405 * when drivers timeout on the last submitted URB and attempt to cancel.
1407 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1408 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1409 * HC will need to invalidate the any TRBs it has cached after the stop
1410 * endpoint command, as noted in the xHCI 0.95 errata.
1412 * 3) The TD may have completed by the time the Stop Endpoint Command
1413 * completes, so software needs to handle that case too.
1415 * This function should protect against the TD enqueueing code ringing the
1416 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1417 * It also needs to account for multiple cancellations on happening at the same
1418 * time for the same endpoint.
1420 * Note that this function can be called in any context, or so says
1421 * usb_hcd_unlink_urb()
1423 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1425 unsigned long flags;
1428 struct xhci_hcd *xhci;
1429 struct urb_priv *urb_priv;
1431 unsigned int ep_index;
1432 struct xhci_ring *ep_ring;
1433 struct xhci_virt_ep *ep;
1435 xhci = hcd_to_xhci(hcd);
1436 spin_lock_irqsave(&xhci->lock, flags);
1437 /* Make sure the URB hasn't completed or been unlinked already */
1438 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1439 if (ret || !urb->hcpriv)
1441 temp = xhci_readl(xhci, &xhci->op_regs->status);
1442 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1443 xhci_dbg(xhci, "HW died, freeing TD.\n");
1444 urb_priv = urb->hcpriv;
1445 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1446 td = urb_priv->td[i];
1447 if (!list_empty(&td->td_list))
1448 list_del_init(&td->td_list);
1449 if (!list_empty(&td->cancelled_td_list))
1450 list_del_init(&td->cancelled_td_list);
1453 usb_hcd_unlink_urb_from_ep(hcd, urb);
1454 spin_unlock_irqrestore(&xhci->lock, flags);
1455 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1456 xhci_urb_free_priv(xhci, urb_priv);
1459 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1460 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1461 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1462 "non-responsive xHCI host.\n",
1463 urb->ep->desc.bEndpointAddress, urb);
1464 /* Let the stop endpoint command watchdog timer (which set this
1465 * state) finish cleaning up the endpoint TD lists. We must
1466 * have caught it in the middle of dropping a lock and giving
1472 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1473 xhci_dbg(xhci, "Event ring:\n");
1474 xhci_debug_ring(xhci, xhci->event_ring);
1475 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1476 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1477 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1483 xhci_dbg(xhci, "Endpoint ring:\n");
1484 xhci_debug_ring(xhci, ep_ring);
1486 urb_priv = urb->hcpriv;
1488 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1489 td = urb_priv->td[i];
1490 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1493 /* Queue a stop endpoint command, but only if this is
1494 * the first cancellation to be handled.
1496 if (!(ep->ep_state & EP_HALT_PENDING)) {
1497 ep->ep_state |= EP_HALT_PENDING;
1498 ep->stop_cmds_pending++;
1499 ep->stop_cmd_timer.expires = jiffies +
1500 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1501 add_timer(&ep->stop_cmd_timer);
1502 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1503 xhci_ring_cmd_db(xhci);
1506 spin_unlock_irqrestore(&xhci->lock, flags);
1510 /* Drop an endpoint from a new bandwidth configuration for this device.
1511 * Only one call to this function is allowed per endpoint before
1512 * check_bandwidth() or reset_bandwidth() must be called.
1513 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1514 * add the endpoint to the schedule with possibly new parameters denoted by a
1515 * different endpoint descriptor in usb_host_endpoint.
1516 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1519 * The USB core will not allow URBs to be queued to an endpoint that is being
1520 * disabled, so there's no need for mutual exclusion to protect
1521 * the xhci->devs[slot_id] structure.
1523 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1524 struct usb_host_endpoint *ep)
1526 struct xhci_hcd *xhci;
1527 struct xhci_container_ctx *in_ctx, *out_ctx;
1528 struct xhci_input_control_ctx *ctrl_ctx;
1529 struct xhci_slot_ctx *slot_ctx;
1530 unsigned int last_ctx;
1531 unsigned int ep_index;
1532 struct xhci_ep_ctx *ep_ctx;
1534 u32 new_add_flags, new_drop_flags, new_slot_info;
1537 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1540 xhci = hcd_to_xhci(hcd);
1541 if (xhci->xhc_state & XHCI_STATE_DYING)
1544 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1545 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1546 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1547 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1548 __func__, drop_flag);
1552 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1553 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1554 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1555 ep_index = xhci_get_endpoint_index(&ep->desc);
1556 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1557 /* If the HC already knows the endpoint is disabled,
1558 * or the HCD has noted it is disabled, ignore this request
1560 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1561 cpu_to_le32(EP_STATE_DISABLED)) ||
1562 le32_to_cpu(ctrl_ctx->drop_flags) &
1563 xhci_get_endpoint_flag(&ep->desc)) {
1564 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1569 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1570 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1572 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1573 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1575 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1576 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1577 /* Update the last valid endpoint context, if we deleted the last one */
1578 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1579 LAST_CTX(last_ctx)) {
1580 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1581 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1583 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1585 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1587 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1588 (unsigned int) ep->desc.bEndpointAddress,
1590 (unsigned int) new_drop_flags,
1591 (unsigned int) new_add_flags,
1592 (unsigned int) new_slot_info);
1596 /* Add an endpoint to a new possible bandwidth configuration for this device.
1597 * Only one call to this function is allowed per endpoint before
1598 * check_bandwidth() or reset_bandwidth() must be called.
1599 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1600 * add the endpoint to the schedule with possibly new parameters denoted by a
1601 * different endpoint descriptor in usb_host_endpoint.
1602 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1605 * The USB core will not allow URBs to be queued to an endpoint until the
1606 * configuration or alt setting is installed in the device, so there's no need
1607 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1609 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1610 struct usb_host_endpoint *ep)
1612 struct xhci_hcd *xhci;
1613 struct xhci_container_ctx *in_ctx, *out_ctx;
1614 unsigned int ep_index;
1615 struct xhci_ep_ctx *ep_ctx;
1616 struct xhci_slot_ctx *slot_ctx;
1617 struct xhci_input_control_ctx *ctrl_ctx;
1619 unsigned int last_ctx;
1620 u32 new_add_flags, new_drop_flags, new_slot_info;
1621 struct xhci_virt_device *virt_dev;
1624 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1626 /* So we won't queue a reset ep command for a root hub */
1630 xhci = hcd_to_xhci(hcd);
1631 if (xhci->xhc_state & XHCI_STATE_DYING)
1634 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1635 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1636 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1637 /* FIXME when we have to issue an evaluate endpoint command to
1638 * deal with ep0 max packet size changing once we get the
1641 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1642 __func__, added_ctxs);
1646 virt_dev = xhci->devs[udev->slot_id];
1647 in_ctx = virt_dev->in_ctx;
1648 out_ctx = virt_dev->out_ctx;
1649 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1650 ep_index = xhci_get_endpoint_index(&ep->desc);
1651 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1653 /* If this endpoint is already in use, and the upper layers are trying
1654 * to add it again without dropping it, reject the addition.
1656 if (virt_dev->eps[ep_index].ring &&
1657 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1658 xhci_get_endpoint_flag(&ep->desc))) {
1659 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1660 "without dropping it.\n",
1661 (unsigned int) ep->desc.bEndpointAddress);
1665 /* If the HCD has already noted the endpoint is enabled,
1666 * ignore this request.
1668 if (le32_to_cpu(ctrl_ctx->add_flags) &
1669 xhci_get_endpoint_flag(&ep->desc)) {
1670 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1676 * Configuration and alternate setting changes must be done in
1677 * process context, not interrupt context (or so documenation
1678 * for usb_set_interface() and usb_set_configuration() claim).
1680 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1681 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1682 __func__, ep->desc.bEndpointAddress);
1686 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1687 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1689 /* If xhci_endpoint_disable() was called for this endpoint, but the
1690 * xHC hasn't been notified yet through the check_bandwidth() call,
1691 * this re-adds a new state for the endpoint from the new endpoint
1692 * descriptors. We must drop and re-add this endpoint, so we leave the
1695 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1697 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1698 /* Update the last valid endpoint context, if we just added one past */
1699 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1700 LAST_CTX(last_ctx)) {
1701 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1702 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1704 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1706 /* Store the usb_device pointer for later use */
1709 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1710 (unsigned int) ep->desc.bEndpointAddress,
1712 (unsigned int) new_drop_flags,
1713 (unsigned int) new_add_flags,
1714 (unsigned int) new_slot_info);
1718 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1720 struct xhci_input_control_ctx *ctrl_ctx;
1721 struct xhci_ep_ctx *ep_ctx;
1722 struct xhci_slot_ctx *slot_ctx;
1725 /* When a device's add flag and drop flag are zero, any subsequent
1726 * configure endpoint command will leave that endpoint's state
1727 * untouched. Make sure we don't leave any old state in the input
1728 * endpoint contexts.
1730 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1731 ctrl_ctx->drop_flags = 0;
1732 ctrl_ctx->add_flags = 0;
1733 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1734 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1735 /* Endpoint 0 is always valid */
1736 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1737 for (i = 1; i < 31; ++i) {
1738 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1739 ep_ctx->ep_info = 0;
1740 ep_ctx->ep_info2 = 0;
1742 ep_ctx->tx_info = 0;
1746 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1747 struct usb_device *udev, u32 *cmd_status)
1751 switch (*cmd_status) {
1753 dev_warn(&udev->dev, "Not enough host controller resources "
1754 "for new device state.\n");
1756 /* FIXME: can we allocate more resources for the HC? */
1759 case COMP_2ND_BW_ERR:
1760 dev_warn(&udev->dev, "Not enough bandwidth "
1761 "for new device state.\n");
1763 /* FIXME: can we go back to the old state? */
1766 /* the HCD set up something wrong */
1767 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1769 "and endpoint is not disabled.\n");
1773 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1774 "configure command.\n");
1778 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1782 xhci_err(xhci, "ERROR: unexpected command completion "
1783 "code 0x%x.\n", *cmd_status);
1790 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1791 struct usb_device *udev, u32 *cmd_status)
1794 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1796 switch (*cmd_status) {
1798 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1799 "context command.\n");
1803 dev_warn(&udev->dev, "WARN: slot not enabled for"
1804 "evaluate context command.\n");
1805 case COMP_CTX_STATE:
1806 dev_warn(&udev->dev, "WARN: invalid context state for "
1807 "evaluate context command.\n");
1808 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1812 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1813 "context command.\n");
1817 /* Max Exit Latency too large error */
1818 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1822 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1826 xhci_err(xhci, "ERROR: unexpected command completion "
1827 "code 0x%x.\n", *cmd_status);
1834 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1835 struct xhci_container_ctx *in_ctx)
1837 struct xhci_input_control_ctx *ctrl_ctx;
1838 u32 valid_add_flags;
1839 u32 valid_drop_flags;
1841 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1842 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1843 * (bit 1). The default control endpoint is added during the Address
1844 * Device command and is never removed until the slot is disabled.
1846 valid_add_flags = ctrl_ctx->add_flags >> 2;
1847 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1849 /* Use hweight32 to count the number of ones in the add flags, or
1850 * number of endpoints added. Don't count endpoints that are changed
1851 * (both added and dropped).
1853 return hweight32(valid_add_flags) -
1854 hweight32(valid_add_flags & valid_drop_flags);
1857 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1858 struct xhci_container_ctx *in_ctx)
1860 struct xhci_input_control_ctx *ctrl_ctx;
1861 u32 valid_add_flags;
1862 u32 valid_drop_flags;
1864 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1865 valid_add_flags = ctrl_ctx->add_flags >> 2;
1866 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1868 return hweight32(valid_drop_flags) -
1869 hweight32(valid_add_flags & valid_drop_flags);
1873 * We need to reserve the new number of endpoints before the configure endpoint
1874 * command completes. We can't subtract the dropped endpoints from the number
1875 * of active endpoints until the command completes because we can oversubscribe
1876 * the host in this case:
1878 * - the first configure endpoint command drops more endpoints than it adds
1879 * - a second configure endpoint command that adds more endpoints is queued
1880 * - the first configure endpoint command fails, so the config is unchanged
1881 * - the second command may succeed, even though there isn't enough resources
1883 * Must be called with xhci->lock held.
1885 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1886 struct xhci_container_ctx *in_ctx)
1890 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1891 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1892 xhci_dbg(xhci, "Not enough ep ctxs: "
1893 "%u active, need to add %u, limit is %u.\n",
1894 xhci->num_active_eps, added_eps,
1895 xhci->limit_active_eps);
1898 xhci->num_active_eps += added_eps;
1899 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1900 xhci->num_active_eps);
1905 * The configure endpoint was failed by the xHC for some other reason, so we
1906 * need to revert the resources that failed configuration would have used.
1908 * Must be called with xhci->lock held.
1910 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1911 struct xhci_container_ctx *in_ctx)
1915 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1916 xhci->num_active_eps -= num_failed_eps;
1917 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1919 xhci->num_active_eps);
1923 * Now that the command has completed, clean up the active endpoint count by
1924 * subtracting out the endpoints that were dropped (but not changed).
1926 * Must be called with xhci->lock held.
1928 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1929 struct xhci_container_ctx *in_ctx)
1931 u32 num_dropped_eps;
1933 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1934 xhci->num_active_eps -= num_dropped_eps;
1935 if (num_dropped_eps)
1936 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1938 xhci->num_active_eps);
1941 unsigned int xhci_get_block_size(struct usb_device *udev)
1943 switch (udev->speed) {
1945 case USB_SPEED_FULL:
1947 case USB_SPEED_HIGH:
1949 case USB_SPEED_SUPER:
1951 case USB_SPEED_UNKNOWN:
1952 case USB_SPEED_WIRELESS:
1954 /* Should never happen */
1959 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1961 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1963 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1968 /* If we are changing a LS/FS device under a HS hub,
1969 * make sure (if we are activating a new TT) that the HS bus has enough
1970 * bandwidth for this new TT.
1972 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1973 struct xhci_virt_device *virt_dev,
1976 struct xhci_interval_bw_table *bw_table;
1977 struct xhci_tt_bw_info *tt_info;
1979 /* Find the bandwidth table for the root port this TT is attached to. */
1980 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1981 tt_info = virt_dev->tt_info;
1982 /* If this TT already had active endpoints, the bandwidth for this TT
1983 * has already been added. Removing all periodic endpoints (and thus
1984 * making the TT enactive) will only decrease the bandwidth used.
1988 if (old_active_eps == 0 && tt_info->active_eps != 0) {
1989 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1993 /* Not sure why we would have no new active endpoints...
1995 * Maybe because of an Evaluate Context change for a hub update or a
1996 * control endpoint 0 max packet size change?
1997 * FIXME: skip the bandwidth calculation in that case.
2002 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2003 struct xhci_virt_device *virt_dev)
2005 unsigned int bw_reserved;
2007 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2008 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2011 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2012 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2019 * This algorithm is a very conservative estimate of the worst-case scheduling
2020 * scenario for any one interval. The hardware dynamically schedules the
2021 * packets, so we can't tell which microframe could be the limiting factor in
2022 * the bandwidth scheduling. This only takes into account periodic endpoints.
2024 * Obviously, we can't solve an NP complete problem to find the minimum worst
2025 * case scenario. Instead, we come up with an estimate that is no less than
2026 * the worst case bandwidth used for any one microframe, but may be an
2029 * We walk the requirements for each endpoint by interval, starting with the
2030 * smallest interval, and place packets in the schedule where there is only one
2031 * possible way to schedule packets for that interval. In order to simplify
2032 * this algorithm, we record the largest max packet size for each interval, and
2033 * assume all packets will be that size.
2035 * For interval 0, we obviously must schedule all packets for each interval.
2036 * The bandwidth for interval 0 is just the amount of data to be transmitted
2037 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2038 * the number of packets).
2040 * For interval 1, we have two possible microframes to schedule those packets
2041 * in. For this algorithm, if we can schedule the same number of packets for
2042 * each possible scheduling opportunity (each microframe), we will do so. The
2043 * remaining number of packets will be saved to be transmitted in the gaps in
2044 * the next interval's scheduling sequence.
2046 * As we move those remaining packets to be scheduled with interval 2 packets,
2047 * we have to double the number of remaining packets to transmit. This is
2048 * because the intervals are actually powers of 2, and we would be transmitting
2049 * the previous interval's packets twice in this interval. We also have to be
2050 * sure that when we look at the largest max packet size for this interval, we
2051 * also look at the largest max packet size for the remaining packets and take
2052 * the greater of the two.
2054 * The algorithm continues to evenly distribute packets in each scheduling
2055 * opportunity, and push the remaining packets out, until we get to the last
2056 * interval. Then those packets and their associated overhead are just added
2057 * to the bandwidth used.
2059 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2060 struct xhci_virt_device *virt_dev,
2063 unsigned int bw_reserved;
2064 unsigned int max_bandwidth;
2065 unsigned int bw_used;
2066 unsigned int block_size;
2067 struct xhci_interval_bw_table *bw_table;
2068 unsigned int packet_size = 0;
2069 unsigned int overhead = 0;
2070 unsigned int packets_transmitted = 0;
2071 unsigned int packets_remaining = 0;
2074 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2075 return xhci_check_ss_bw(xhci, virt_dev);
2077 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2078 max_bandwidth = HS_BW_LIMIT;
2079 /* Convert percent of bus BW reserved to blocks reserved */
2080 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2082 max_bandwidth = FS_BW_LIMIT;
2083 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2086 bw_table = virt_dev->bw_table;
2087 /* We need to translate the max packet size and max ESIT payloads into
2088 * the units the hardware uses.
2090 block_size = xhci_get_block_size(virt_dev->udev);
2092 /* If we are manipulating a LS/FS device under a HS hub, double check
2093 * that the HS bus has enough bandwidth if we are activing a new TT.
2095 if (virt_dev->tt_info) {
2096 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2097 virt_dev->real_port);
2098 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2099 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2100 "newly activated TT.\n");
2103 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2104 virt_dev->tt_info->slot_id,
2105 virt_dev->tt_info->ttport);
2107 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2108 virt_dev->real_port);
2111 /* Add in how much bandwidth will be used for interval zero, or the
2112 * rounded max ESIT payload + number of packets * largest overhead.
2114 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2115 bw_table->interval_bw[0].num_packets *
2116 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2118 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2119 unsigned int bw_added;
2120 unsigned int largest_mps;
2121 unsigned int interval_overhead;
2124 * How many packets could we transmit in this interval?
2125 * If packets didn't fit in the previous interval, we will need
2126 * to transmit that many packets twice within this interval.
2128 packets_remaining = 2 * packets_remaining +
2129 bw_table->interval_bw[i].num_packets;
2131 /* Find the largest max packet size of this or the previous
2134 if (list_empty(&bw_table->interval_bw[i].endpoints))
2137 struct xhci_virt_ep *virt_ep;
2138 struct list_head *ep_entry;
2140 ep_entry = bw_table->interval_bw[i].endpoints.next;
2141 virt_ep = list_entry(ep_entry,
2142 struct xhci_virt_ep, bw_endpoint_list);
2143 /* Convert to blocks, rounding up */
2144 largest_mps = DIV_ROUND_UP(
2145 virt_ep->bw_info.max_packet_size,
2148 if (largest_mps > packet_size)
2149 packet_size = largest_mps;
2151 /* Use the larger overhead of this or the previous interval. */
2152 interval_overhead = xhci_get_largest_overhead(
2153 &bw_table->interval_bw[i]);
2154 if (interval_overhead > overhead)
2155 overhead = interval_overhead;
2157 /* How many packets can we evenly distribute across
2158 * (1 << (i + 1)) possible scheduling opportunities?
2160 packets_transmitted = packets_remaining >> (i + 1);
2162 /* Add in the bandwidth used for those scheduled packets */
2163 bw_added = packets_transmitted * (overhead + packet_size);
2165 /* How many packets do we have remaining to transmit? */
2166 packets_remaining = packets_remaining % (1 << (i + 1));
2168 /* What largest max packet size should those packets have? */
2169 /* If we've transmitted all packets, don't carry over the
2170 * largest packet size.
2172 if (packets_remaining == 0) {
2175 } else if (packets_transmitted > 0) {
2176 /* Otherwise if we do have remaining packets, and we've
2177 * scheduled some packets in this interval, take the
2178 * largest max packet size from endpoints with this
2181 packet_size = largest_mps;
2182 overhead = interval_overhead;
2184 /* Otherwise carry over packet_size and overhead from the last
2185 * time we had a remainder.
2187 bw_used += bw_added;
2188 if (bw_used > max_bandwidth) {
2189 xhci_warn(xhci, "Not enough bandwidth. "
2190 "Proposed: %u, Max: %u\n",
2191 bw_used, max_bandwidth);
2196 * Ok, we know we have some packets left over after even-handedly
2197 * scheduling interval 15. We don't know which microframes they will
2198 * fit into, so we over-schedule and say they will be scheduled every
2201 if (packets_remaining > 0)
2202 bw_used += overhead + packet_size;
2204 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2205 unsigned int port_index = virt_dev->real_port - 1;
2207 /* OK, we're manipulating a HS device attached to a
2208 * root port bandwidth domain. Include the number of active TTs
2209 * in the bandwidth used.
2211 bw_used += TT_HS_OVERHEAD *
2212 xhci->rh_bw[port_index].num_active_tts;
2215 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2216 "Available: %u " "percent\n",
2217 bw_used, max_bandwidth, bw_reserved,
2218 (max_bandwidth - bw_used - bw_reserved) * 100 /
2221 bw_used += bw_reserved;
2222 if (bw_used > max_bandwidth) {
2223 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2224 bw_used, max_bandwidth);
2228 bw_table->bw_used = bw_used;
2232 static bool xhci_is_async_ep(unsigned int ep_type)
2234 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2235 ep_type != ISOC_IN_EP &&
2236 ep_type != INT_IN_EP);
2239 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2241 return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2244 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2246 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2248 if (ep_bw->ep_interval == 0)
2249 return SS_OVERHEAD_BURST +
2250 (ep_bw->mult * ep_bw->num_packets *
2251 (SS_OVERHEAD + mps));
2252 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2253 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2254 1 << ep_bw->ep_interval);
2258 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2259 struct xhci_bw_info *ep_bw,
2260 struct xhci_interval_bw_table *bw_table,
2261 struct usb_device *udev,
2262 struct xhci_virt_ep *virt_ep,
2263 struct xhci_tt_bw_info *tt_info)
2265 struct xhci_interval_bw *interval_bw;
2266 int normalized_interval;
2268 if (xhci_is_async_ep(ep_bw->type))
2271 if (udev->speed == USB_SPEED_SUPER) {
2272 if (xhci_is_sync_in_ep(ep_bw->type))
2273 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2274 xhci_get_ss_bw_consumed(ep_bw);
2276 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2277 xhci_get_ss_bw_consumed(ep_bw);
2281 /* SuperSpeed endpoints never get added to intervals in the table, so
2282 * this check is only valid for HS/FS/LS devices.
2284 if (list_empty(&virt_ep->bw_endpoint_list))
2286 /* For LS/FS devices, we need to translate the interval expressed in
2287 * microframes to frames.
2289 if (udev->speed == USB_SPEED_HIGH)
2290 normalized_interval = ep_bw->ep_interval;
2292 normalized_interval = ep_bw->ep_interval - 3;
2294 if (normalized_interval == 0)
2295 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2296 interval_bw = &bw_table->interval_bw[normalized_interval];
2297 interval_bw->num_packets -= ep_bw->num_packets;
2298 switch (udev->speed) {
2300 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2302 case USB_SPEED_FULL:
2303 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2305 case USB_SPEED_HIGH:
2306 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2308 case USB_SPEED_SUPER:
2309 case USB_SPEED_UNKNOWN:
2310 case USB_SPEED_WIRELESS:
2311 /* Should never happen because only LS/FS/HS endpoints will get
2312 * added to the endpoint list.
2317 tt_info->active_eps -= 1;
2318 list_del_init(&virt_ep->bw_endpoint_list);
2321 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2322 struct xhci_bw_info *ep_bw,
2323 struct xhci_interval_bw_table *bw_table,
2324 struct usb_device *udev,
2325 struct xhci_virt_ep *virt_ep,
2326 struct xhci_tt_bw_info *tt_info)
2328 struct xhci_interval_bw *interval_bw;
2329 struct xhci_virt_ep *smaller_ep;
2330 int normalized_interval;
2332 if (xhci_is_async_ep(ep_bw->type))
2335 if (udev->speed == USB_SPEED_SUPER) {
2336 if (xhci_is_sync_in_ep(ep_bw->type))
2337 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2338 xhci_get_ss_bw_consumed(ep_bw);
2340 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2341 xhci_get_ss_bw_consumed(ep_bw);
2345 /* For LS/FS devices, we need to translate the interval expressed in
2346 * microframes to frames.
2348 if (udev->speed == USB_SPEED_HIGH)
2349 normalized_interval = ep_bw->ep_interval;
2351 normalized_interval = ep_bw->ep_interval - 3;
2353 if (normalized_interval == 0)
2354 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2355 interval_bw = &bw_table->interval_bw[normalized_interval];
2356 interval_bw->num_packets += ep_bw->num_packets;
2357 switch (udev->speed) {
2359 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2361 case USB_SPEED_FULL:
2362 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2364 case USB_SPEED_HIGH:
2365 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2367 case USB_SPEED_SUPER:
2368 case USB_SPEED_UNKNOWN:
2369 case USB_SPEED_WIRELESS:
2370 /* Should never happen because only LS/FS/HS endpoints will get
2371 * added to the endpoint list.
2377 tt_info->active_eps += 1;
2378 /* Insert the endpoint into the list, largest max packet size first. */
2379 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2381 if (ep_bw->max_packet_size >=
2382 smaller_ep->bw_info.max_packet_size) {
2383 /* Add the new ep before the smaller endpoint */
2384 list_add_tail(&virt_ep->bw_endpoint_list,
2385 &smaller_ep->bw_endpoint_list);
2389 /* Add the new endpoint at the end of the list. */
2390 list_add_tail(&virt_ep->bw_endpoint_list,
2391 &interval_bw->endpoints);
2394 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2395 struct xhci_virt_device *virt_dev,
2398 struct xhci_root_port_bw_info *rh_bw_info;
2399 if (!virt_dev->tt_info)
2402 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2403 if (old_active_eps == 0 &&
2404 virt_dev->tt_info->active_eps != 0) {
2405 rh_bw_info->num_active_tts += 1;
2406 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2407 } else if (old_active_eps != 0 &&
2408 virt_dev->tt_info->active_eps == 0) {
2409 rh_bw_info->num_active_tts -= 1;
2410 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2414 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2415 struct xhci_virt_device *virt_dev,
2416 struct xhci_container_ctx *in_ctx)
2418 struct xhci_bw_info ep_bw_info[31];
2420 struct xhci_input_control_ctx *ctrl_ctx;
2421 int old_active_eps = 0;
2423 if (virt_dev->tt_info)
2424 old_active_eps = virt_dev->tt_info->active_eps;
2426 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2428 for (i = 0; i < 31; i++) {
2429 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2432 /* Make a copy of the BW info in case we need to revert this */
2433 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2434 sizeof(ep_bw_info[i]));
2435 /* Drop the endpoint from the interval table if the endpoint is
2436 * being dropped or changed.
2438 if (EP_IS_DROPPED(ctrl_ctx, i))
2439 xhci_drop_ep_from_interval_table(xhci,
2440 &virt_dev->eps[i].bw_info,
2446 /* Overwrite the information stored in the endpoints' bw_info */
2447 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2448 for (i = 0; i < 31; i++) {
2449 /* Add any changed or added endpoints to the interval table */
2450 if (EP_IS_ADDED(ctrl_ctx, i))
2451 xhci_add_ep_to_interval_table(xhci,
2452 &virt_dev->eps[i].bw_info,
2459 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2460 /* Ok, this fits in the bandwidth we have.
2461 * Update the number of active TTs.
2463 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2467 /* We don't have enough bandwidth for this, revert the stored info. */
2468 for (i = 0; i < 31; i++) {
2469 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2472 /* Drop the new copies of any added or changed endpoints from
2473 * the interval table.
2475 if (EP_IS_ADDED(ctrl_ctx, i)) {
2476 xhci_drop_ep_from_interval_table(xhci,
2477 &virt_dev->eps[i].bw_info,
2483 /* Revert the endpoint back to its old information */
2484 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2485 sizeof(ep_bw_info[i]));
2486 /* Add any changed or dropped endpoints back into the table */
2487 if (EP_IS_DROPPED(ctrl_ctx, i))
2488 xhci_add_ep_to_interval_table(xhci,
2489 &virt_dev->eps[i].bw_info,
2499 /* Issue a configure endpoint command or evaluate context command
2500 * and wait for it to finish.
2502 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2503 struct usb_device *udev,
2504 struct xhci_command *command,
2505 bool ctx_change, bool must_succeed)
2509 unsigned long flags;
2510 struct xhci_container_ctx *in_ctx;
2511 struct completion *cmd_completion;
2513 struct xhci_virt_device *virt_dev;
2515 spin_lock_irqsave(&xhci->lock, flags);
2516 virt_dev = xhci->devs[udev->slot_id];
2519 in_ctx = command->in_ctx;
2521 in_ctx = virt_dev->in_ctx;
2523 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2524 xhci_reserve_host_resources(xhci, in_ctx)) {
2525 spin_unlock_irqrestore(&xhci->lock, flags);
2526 xhci_warn(xhci, "Not enough host resources, "
2527 "active endpoint contexts = %u\n",
2528 xhci->num_active_eps);
2531 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2532 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2533 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2534 xhci_free_host_resources(xhci, in_ctx);
2535 spin_unlock_irqrestore(&xhci->lock, flags);
2536 xhci_warn(xhci, "Not enough bandwidth\n");
2541 cmd_completion = command->completion;
2542 cmd_status = &command->status;
2543 command->command_trb = xhci->cmd_ring->enqueue;
2545 /* Enqueue pointer can be left pointing to the link TRB,
2546 * we must handle that
2548 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2549 command->command_trb =
2550 xhci->cmd_ring->enq_seg->next->trbs;
2552 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2554 cmd_completion = &virt_dev->cmd_completion;
2555 cmd_status = &virt_dev->cmd_status;
2557 init_completion(cmd_completion);
2560 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2561 udev->slot_id, must_succeed);
2563 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2567 list_del(&command->cmd_list);
2568 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2569 xhci_free_host_resources(xhci, in_ctx);
2570 spin_unlock_irqrestore(&xhci->lock, flags);
2571 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2574 xhci_ring_cmd_db(xhci);
2575 spin_unlock_irqrestore(&xhci->lock, flags);
2577 /* Wait for the configure endpoint command to complete */
2578 timeleft = wait_for_completion_interruptible_timeout(
2580 USB_CTRL_SET_TIMEOUT);
2581 if (timeleft <= 0) {
2582 xhci_warn(xhci, "%s while waiting for %s command\n",
2583 timeleft == 0 ? "Timeout" : "Signal",
2585 "configure endpoint" :
2586 "evaluate context");
2587 /* FIXME cancel the configure endpoint command */
2592 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2594 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2596 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2597 spin_lock_irqsave(&xhci->lock, flags);
2598 /* If the command failed, remove the reserved resources.
2599 * Otherwise, clean up the estimate to include dropped eps.
2602 xhci_free_host_resources(xhci, in_ctx);
2604 xhci_finish_resource_reservation(xhci, in_ctx);
2605 spin_unlock_irqrestore(&xhci->lock, flags);
2610 /* Called after one or more calls to xhci_add_endpoint() or
2611 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2612 * to call xhci_reset_bandwidth().
2614 * Since we are in the middle of changing either configuration or
2615 * installing a new alt setting, the USB core won't allow URBs to be
2616 * enqueued for any endpoint on the old config or interface. Nothing
2617 * else should be touching the xhci->devs[slot_id] structure, so we
2618 * don't need to take the xhci->lock for manipulating that.
2620 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2624 struct xhci_hcd *xhci;
2625 struct xhci_virt_device *virt_dev;
2626 struct xhci_input_control_ctx *ctrl_ctx;
2627 struct xhci_slot_ctx *slot_ctx;
2629 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2632 xhci = hcd_to_xhci(hcd);
2633 if (xhci->xhc_state & XHCI_STATE_DYING)
2636 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2637 virt_dev = xhci->devs[udev->slot_id];
2639 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2640 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2641 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2642 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2643 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2645 /* Don't issue the command if there's no endpoints to update. */
2646 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2647 ctrl_ctx->drop_flags == 0)
2650 xhci_dbg(xhci, "New Input Control Context:\n");
2651 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2652 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2653 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2655 ret = xhci_configure_endpoint(xhci, udev, NULL,
2658 /* Callee should call reset_bandwidth() */
2662 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2663 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2664 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2666 /* Free any rings that were dropped, but not changed. */
2667 for (i = 1; i < 31; ++i) {
2668 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2669 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2670 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2672 xhci_zero_in_ctx(xhci, virt_dev);
2674 * Install any rings for completely new endpoints or changed endpoints,
2675 * and free or cache any old rings from changed endpoints.
2677 for (i = 1; i < 31; ++i) {
2678 if (!virt_dev->eps[i].new_ring)
2680 /* Only cache or free the old ring if it exists.
2681 * It may not if this is the first add of an endpoint.
2683 if (virt_dev->eps[i].ring) {
2684 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2686 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2687 virt_dev->eps[i].new_ring = NULL;
2693 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2695 struct xhci_hcd *xhci;
2696 struct xhci_virt_device *virt_dev;
2699 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2702 xhci = hcd_to_xhci(hcd);
2704 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2705 virt_dev = xhci->devs[udev->slot_id];
2706 /* Free any rings allocated for added endpoints */
2707 for (i = 0; i < 31; ++i) {
2708 if (virt_dev->eps[i].new_ring) {
2709 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2710 virt_dev->eps[i].new_ring = NULL;
2713 xhci_zero_in_ctx(xhci, virt_dev);
2716 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2717 struct xhci_container_ctx *in_ctx,
2718 struct xhci_container_ctx *out_ctx,
2719 u32 add_flags, u32 drop_flags)
2721 struct xhci_input_control_ctx *ctrl_ctx;
2722 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2723 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2724 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2725 xhci_slot_copy(xhci, in_ctx, out_ctx);
2726 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2728 xhci_dbg(xhci, "Input Context:\n");
2729 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2732 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2733 unsigned int slot_id, unsigned int ep_index,
2734 struct xhci_dequeue_state *deq_state)
2736 struct xhci_container_ctx *in_ctx;
2737 struct xhci_ep_ctx *ep_ctx;
2741 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2742 xhci->devs[slot_id]->out_ctx, ep_index);
2743 in_ctx = xhci->devs[slot_id]->in_ctx;
2744 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2745 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2746 deq_state->new_deq_ptr);
2748 xhci_warn(xhci, "WARN Cannot submit config ep after "
2749 "reset ep command\n");
2750 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2751 deq_state->new_deq_seg,
2752 deq_state->new_deq_ptr);
2755 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2757 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2758 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2759 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2762 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2763 struct usb_device *udev, unsigned int ep_index)
2765 struct xhci_dequeue_state deq_state;
2766 struct xhci_virt_ep *ep;
2768 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2769 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2770 /* We need to move the HW's dequeue pointer past this TD,
2771 * or it will attempt to resend it on the next doorbell ring.
2773 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2774 ep_index, ep->stopped_stream, ep->stopped_td,
2777 /* HW with the reset endpoint quirk will use the saved dequeue state to
2778 * issue a configure endpoint command later.
2780 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2781 xhci_dbg(xhci, "Queueing new dequeue state\n");
2782 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2783 ep_index, ep->stopped_stream, &deq_state);
2785 /* Better hope no one uses the input context between now and the
2786 * reset endpoint completion!
2787 * XXX: No idea how this hardware will react when stream rings
2790 xhci_dbg(xhci, "Setting up input context for "
2791 "configure endpoint command\n");
2792 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2793 ep_index, &deq_state);
2797 /* Deal with stalled endpoints. The core should have sent the control message
2798 * to clear the halt condition. However, we need to make the xHCI hardware
2799 * reset its sequence number, since a device will expect a sequence number of
2800 * zero after the halt condition is cleared.
2801 * Context: in_interrupt
2803 void xhci_endpoint_reset(struct usb_hcd *hcd,
2804 struct usb_host_endpoint *ep)
2806 struct xhci_hcd *xhci;
2807 struct usb_device *udev;
2808 unsigned int ep_index;
2809 unsigned long flags;
2811 struct xhci_virt_ep *virt_ep;
2813 xhci = hcd_to_xhci(hcd);
2814 udev = (struct usb_device *) ep->hcpriv;
2815 /* Called with a root hub endpoint (or an endpoint that wasn't added
2816 * with xhci_add_endpoint()
2820 ep_index = xhci_get_endpoint_index(&ep->desc);
2821 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2822 if (!virt_ep->stopped_td) {
2823 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2824 ep->desc.bEndpointAddress);
2827 if (usb_endpoint_xfer_control(&ep->desc)) {
2828 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2832 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2833 spin_lock_irqsave(&xhci->lock, flags);
2834 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2836 * Can't change the ring dequeue pointer until it's transitioned to the
2837 * stopped state, which is only upon a successful reset endpoint
2838 * command. Better hope that last command worked!
2841 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2842 kfree(virt_ep->stopped_td);
2843 xhci_ring_cmd_db(xhci);
2845 virt_ep->stopped_td = NULL;
2846 virt_ep->stopped_trb = NULL;
2847 virt_ep->stopped_stream = 0;
2848 spin_unlock_irqrestore(&xhci->lock, flags);
2851 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2854 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2855 struct usb_device *udev, struct usb_host_endpoint *ep,
2856 unsigned int slot_id)
2859 unsigned int ep_index;
2860 unsigned int ep_state;
2864 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2867 if (ep->ss_ep_comp.bmAttributes == 0) {
2868 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2869 " descriptor for ep 0x%x does not support streams\n",
2870 ep->desc.bEndpointAddress);
2874 ep_index = xhci_get_endpoint_index(&ep->desc);
2875 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2876 if (ep_state & EP_HAS_STREAMS ||
2877 ep_state & EP_GETTING_STREAMS) {
2878 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2879 "already has streams set up.\n",
2880 ep->desc.bEndpointAddress);
2881 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2882 "dynamic stream context array reallocation.\n");
2885 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2886 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2887 "endpoint 0x%x; URBs are pending.\n",
2888 ep->desc.bEndpointAddress);
2894 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2895 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2897 unsigned int max_streams;
2899 /* The stream context array size must be a power of two */
2900 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2902 * Find out how many primary stream array entries the host controller
2903 * supports. Later we may use secondary stream arrays (similar to 2nd
2904 * level page entries), but that's an optional feature for xHCI host
2905 * controllers. xHCs must support at least 4 stream IDs.
2907 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2908 if (*num_stream_ctxs > max_streams) {
2909 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2911 *num_stream_ctxs = max_streams;
2912 *num_streams = max_streams;
2916 /* Returns an error code if one of the endpoint already has streams.
2917 * This does not change any data structures, it only checks and gathers
2920 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2921 struct usb_device *udev,
2922 struct usb_host_endpoint **eps, unsigned int num_eps,
2923 unsigned int *num_streams, u32 *changed_ep_bitmask)
2925 unsigned int max_streams;
2926 unsigned int endpoint_flag;
2930 for (i = 0; i < num_eps; i++) {
2931 ret = xhci_check_streams_endpoint(xhci, udev,
2932 eps[i], udev->slot_id);
2936 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2937 if (max_streams < (*num_streams - 1)) {
2938 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2939 eps[i]->desc.bEndpointAddress,
2941 *num_streams = max_streams+1;
2944 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2945 if (*changed_ep_bitmask & endpoint_flag)
2947 *changed_ep_bitmask |= endpoint_flag;
2952 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2953 struct usb_device *udev,
2954 struct usb_host_endpoint **eps, unsigned int num_eps)
2956 u32 changed_ep_bitmask = 0;
2957 unsigned int slot_id;
2958 unsigned int ep_index;
2959 unsigned int ep_state;
2962 slot_id = udev->slot_id;
2963 if (!xhci->devs[slot_id])
2966 for (i = 0; i < num_eps; i++) {
2967 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2968 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2969 /* Are streams already being freed for the endpoint? */
2970 if (ep_state & EP_GETTING_NO_STREAMS) {
2971 xhci_warn(xhci, "WARN Can't disable streams for "
2973 "streams are being disabled already.",
2974 eps[i]->desc.bEndpointAddress);
2977 /* Are there actually any streams to free? */
2978 if (!(ep_state & EP_HAS_STREAMS) &&
2979 !(ep_state & EP_GETTING_STREAMS)) {
2980 xhci_warn(xhci, "WARN Can't disable streams for "
2982 "streams are already disabled!",
2983 eps[i]->desc.bEndpointAddress);
2984 xhci_warn(xhci, "WARN xhci_free_streams() called "
2985 "with non-streams endpoint\n");
2988 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2990 return changed_ep_bitmask;
2994 * The USB device drivers use this function (though the HCD interface in USB
2995 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2996 * coordinate mass storage command queueing across multiple endpoints (basically
2997 * a stream ID == a task ID).
2999 * Setting up streams involves allocating the same size stream context array
3000 * for each endpoint and issuing a configure endpoint command for all endpoints.
3002 * Don't allow the call to succeed if one endpoint only supports one stream
3003 * (which means it doesn't support streams at all).
3005 * Drivers may get less stream IDs than they asked for, if the host controller
3006 * hardware or endpoints claim they can't support the number of requested
3009 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3010 struct usb_host_endpoint **eps, unsigned int num_eps,
3011 unsigned int num_streams, gfp_t mem_flags)
3014 struct xhci_hcd *xhci;
3015 struct xhci_virt_device *vdev;
3016 struct xhci_command *config_cmd;
3017 unsigned int ep_index;
3018 unsigned int num_stream_ctxs;
3019 unsigned long flags;
3020 u32 changed_ep_bitmask = 0;
3025 /* Add one to the number of streams requested to account for
3026 * stream 0 that is reserved for xHCI usage.
3029 xhci = hcd_to_xhci(hcd);
3030 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3033 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3035 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3039 /* Check to make sure all endpoints are not already configured for
3040 * streams. While we're at it, find the maximum number of streams that
3041 * all the endpoints will support and check for duplicate endpoints.
3043 spin_lock_irqsave(&xhci->lock, flags);
3044 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3045 num_eps, &num_streams, &changed_ep_bitmask);
3047 xhci_free_command(xhci, config_cmd);
3048 spin_unlock_irqrestore(&xhci->lock, flags);
3051 if (num_streams <= 1) {
3052 xhci_warn(xhci, "WARN: endpoints can't handle "
3053 "more than one stream.\n");
3054 xhci_free_command(xhci, config_cmd);
3055 spin_unlock_irqrestore(&xhci->lock, flags);
3058 vdev = xhci->devs[udev->slot_id];
3059 /* Mark each endpoint as being in transition, so
3060 * xhci_urb_enqueue() will reject all URBs.
3062 for (i = 0; i < num_eps; i++) {
3063 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3064 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3066 spin_unlock_irqrestore(&xhci->lock, flags);
3068 /* Setup internal data structures and allocate HW data structures for
3069 * streams (but don't install the HW structures in the input context
3070 * until we're sure all memory allocation succeeded).
3072 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3073 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3074 num_stream_ctxs, num_streams);
3076 for (i = 0; i < num_eps; i++) {
3077 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3078 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3080 num_streams, mem_flags);
3081 if (!vdev->eps[ep_index].stream_info)
3083 /* Set maxPstreams in endpoint context and update deq ptr to
3084 * point to stream context array. FIXME
3088 /* Set up the input context for a configure endpoint command. */
3089 for (i = 0; i < num_eps; i++) {
3090 struct xhci_ep_ctx *ep_ctx;
3092 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3093 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3095 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3096 vdev->out_ctx, ep_index);
3097 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3098 vdev->eps[ep_index].stream_info);
3100 /* Tell the HW to drop its old copy of the endpoint context info
3101 * and add the updated copy from the input context.
3103 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3104 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3106 /* Issue and wait for the configure endpoint command */
3107 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3110 /* xHC rejected the configure endpoint command for some reason, so we
3111 * leave the old ring intact and free our internal streams data
3117 spin_lock_irqsave(&xhci->lock, flags);
3118 for (i = 0; i < num_eps; i++) {
3119 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3120 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3121 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3122 udev->slot_id, ep_index);
3123 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3125 xhci_free_command(xhci, config_cmd);
3126 spin_unlock_irqrestore(&xhci->lock, flags);
3128 /* Subtract 1 for stream 0, which drivers can't use */
3129 return num_streams - 1;
3132 /* If it didn't work, free the streams! */
3133 for (i = 0; i < num_eps; i++) {
3134 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3135 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3136 vdev->eps[ep_index].stream_info = NULL;
3137 /* FIXME Unset maxPstreams in endpoint context and
3138 * update deq ptr to point to normal string ring.
3140 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3141 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3142 xhci_endpoint_zero(xhci, vdev, eps[i]);
3144 xhci_free_command(xhci, config_cmd);
3148 /* Transition the endpoint from using streams to being a "normal" endpoint
3151 * Modify the endpoint context state, submit a configure endpoint command,
3152 * and free all endpoint rings for streams if that completes successfully.
3154 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3155 struct usb_host_endpoint **eps, unsigned int num_eps,
3159 struct xhci_hcd *xhci;
3160 struct xhci_virt_device *vdev;
3161 struct xhci_command *command;
3162 unsigned int ep_index;
3163 unsigned long flags;
3164 u32 changed_ep_bitmask;
3166 xhci = hcd_to_xhci(hcd);
3167 vdev = xhci->devs[udev->slot_id];
3169 /* Set up a configure endpoint command to remove the streams rings */
3170 spin_lock_irqsave(&xhci->lock, flags);
3171 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3172 udev, eps, num_eps);
3173 if (changed_ep_bitmask == 0) {
3174 spin_unlock_irqrestore(&xhci->lock, flags);
3178 /* Use the xhci_command structure from the first endpoint. We may have
3179 * allocated too many, but the driver may call xhci_free_streams() for
3180 * each endpoint it grouped into one call to xhci_alloc_streams().
3182 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3183 command = vdev->eps[ep_index].stream_info->free_streams_command;
3184 for (i = 0; i < num_eps; i++) {
3185 struct xhci_ep_ctx *ep_ctx;
3187 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3188 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3189 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3190 EP_GETTING_NO_STREAMS;
3192 xhci_endpoint_copy(xhci, command->in_ctx,
3193 vdev->out_ctx, ep_index);
3194 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3195 &vdev->eps[ep_index]);
3197 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3198 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3199 spin_unlock_irqrestore(&xhci->lock, flags);
3201 /* Issue and wait for the configure endpoint command,
3202 * which must succeed.
3204 ret = xhci_configure_endpoint(xhci, udev, command,
3207 /* xHC rejected the configure endpoint command for some reason, so we
3208 * leave the streams rings intact.
3213 spin_lock_irqsave(&xhci->lock, flags);
3214 for (i = 0; i < num_eps; i++) {
3215 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3216 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3217 vdev->eps[ep_index].stream_info = NULL;
3218 /* FIXME Unset maxPstreams in endpoint context and
3219 * update deq ptr to point to normal string ring.
3221 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3222 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3224 spin_unlock_irqrestore(&xhci->lock, flags);
3230 * Deletes endpoint resources for endpoints that were active before a Reset
3231 * Device command, or a Disable Slot command. The Reset Device command leaves
3232 * the control endpoint intact, whereas the Disable Slot command deletes it.
3234 * Must be called with xhci->lock held.
3236 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3237 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3240 unsigned int num_dropped_eps = 0;
3241 unsigned int drop_flags = 0;
3243 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3244 if (virt_dev->eps[i].ring) {
3245 drop_flags |= 1 << i;
3249 xhci->num_active_eps -= num_dropped_eps;
3250 if (num_dropped_eps)
3251 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3253 num_dropped_eps, drop_flags,
3254 xhci->num_active_eps);
3258 * This submits a Reset Device Command, which will set the device state to 0,
3259 * set the device address to 0, and disable all the endpoints except the default
3260 * control endpoint. The USB core should come back and call
3261 * xhci_address_device(), and then re-set up the configuration. If this is
3262 * called because of a usb_reset_and_verify_device(), then the old alternate
3263 * settings will be re-installed through the normal bandwidth allocation
3266 * Wait for the Reset Device command to finish. Remove all structures
3267 * associated with the endpoints that were disabled. Clear the input device
3268 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3270 * If the virt_dev to be reset does not exist or does not match the udev,
3271 * it means the device is lost, possibly due to the xHC restore error and
3272 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3273 * re-allocate the device.
3275 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3278 unsigned long flags;
3279 struct xhci_hcd *xhci;
3280 unsigned int slot_id;
3281 struct xhci_virt_device *virt_dev;
3282 struct xhci_command *reset_device_cmd;
3284 int last_freed_endpoint;
3285 struct xhci_slot_ctx *slot_ctx;
3286 int old_active_eps = 0;
3288 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3291 xhci = hcd_to_xhci(hcd);
3292 slot_id = udev->slot_id;
3293 virt_dev = xhci->devs[slot_id];
3295 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3296 "not exist. Re-allocate the device\n", slot_id);
3297 ret = xhci_alloc_dev(hcd, udev);
3304 if (virt_dev->udev != udev) {
3305 /* If the virt_dev and the udev does not match, this virt_dev
3306 * may belong to another udev.
3307 * Re-allocate the device.
3309 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3310 "not match the udev. Re-allocate the device\n",
3312 ret = xhci_alloc_dev(hcd, udev);
3319 /* If device is not setup, there is no point in resetting it */
3320 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3321 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3322 SLOT_STATE_DISABLED)
3325 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3326 /* Allocate the command structure that holds the struct completion.
3327 * Assume we're in process context, since the normal device reset
3328 * process has to wait for the device anyway. Storage devices are
3329 * reset as part of error handling, so use GFP_NOIO instead of
3332 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3333 if (!reset_device_cmd) {
3334 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3338 /* Attempt to submit the Reset Device command to the command ring */
3339 spin_lock_irqsave(&xhci->lock, flags);
3340 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3342 /* Enqueue pointer can be left pointing to the link TRB,
3343 * we must handle that
3345 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3346 reset_device_cmd->command_trb =
3347 xhci->cmd_ring->enq_seg->next->trbs;
3349 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3350 ret = xhci_queue_reset_device(xhci, slot_id);
3352 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3353 list_del(&reset_device_cmd->cmd_list);
3354 spin_unlock_irqrestore(&xhci->lock, flags);
3355 goto command_cleanup;
3357 xhci_ring_cmd_db(xhci);
3358 spin_unlock_irqrestore(&xhci->lock, flags);
3360 /* Wait for the Reset Device command to finish */
3361 timeleft = wait_for_completion_interruptible_timeout(
3362 reset_device_cmd->completion,
3363 USB_CTRL_SET_TIMEOUT);
3364 if (timeleft <= 0) {
3365 xhci_warn(xhci, "%s while waiting for reset device command\n",
3366 timeleft == 0 ? "Timeout" : "Signal");
3367 spin_lock_irqsave(&xhci->lock, flags);
3368 /* The timeout might have raced with the event ring handler, so
3369 * only delete from the list if the item isn't poisoned.
3371 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3372 list_del(&reset_device_cmd->cmd_list);
3373 spin_unlock_irqrestore(&xhci->lock, flags);
3375 goto command_cleanup;
3378 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3379 * unless we tried to reset a slot ID that wasn't enabled,
3380 * or the device wasn't in the addressed or configured state.
3382 ret = reset_device_cmd->status;
3384 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3385 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3386 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3388 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3389 xhci_info(xhci, "Not freeing device rings.\n");
3390 /* Don't treat this as an error. May change my mind later. */
3392 goto command_cleanup;
3394 xhci_dbg(xhci, "Successful reset device command.\n");
3397 if (xhci_is_vendor_info_code(xhci, ret))
3399 xhci_warn(xhci, "Unknown completion code %u for "
3400 "reset device command.\n", ret);
3402 goto command_cleanup;
3405 /* Free up host controller endpoint resources */
3406 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3407 spin_lock_irqsave(&xhci->lock, flags);
3408 /* Don't delete the default control endpoint resources */
3409 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3410 spin_unlock_irqrestore(&xhci->lock, flags);
3413 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3414 last_freed_endpoint = 1;
3415 for (i = 1; i < 31; ++i) {
3416 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3418 if (ep->ep_state & EP_HAS_STREAMS) {
3419 xhci_free_stream_info(xhci, ep->stream_info);
3420 ep->stream_info = NULL;
3421 ep->ep_state &= ~EP_HAS_STREAMS;
3425 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3426 last_freed_endpoint = i;
3428 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3429 xhci_drop_ep_from_interval_table(xhci,
3430 &virt_dev->eps[i].bw_info,
3435 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3437 /* If necessary, update the number of active TTs on this root port */
3438 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3440 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3441 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3445 xhci_free_command(xhci, reset_device_cmd);
3450 * At this point, the struct usb_device is about to go away, the device has
3451 * disconnected, and all traffic has been stopped and the endpoints have been
3452 * disabled. Free any HC data structures associated with that device.
3454 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3456 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3457 struct xhci_virt_device *virt_dev;
3458 unsigned long flags;
3462 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3463 /* If the host is halted due to driver unload, we still need to free the
3466 if (ret <= 0 && ret != -ENODEV)
3469 virt_dev = xhci->devs[udev->slot_id];
3471 /* Stop any wayward timer functions (which may grab the lock) */
3472 for (i = 0; i < 31; ++i) {
3473 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3474 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3477 if (udev->usb2_hw_lpm_enabled) {
3478 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3479 udev->usb2_hw_lpm_enabled = 0;
3482 spin_lock_irqsave(&xhci->lock, flags);
3483 /* Don't disable the slot if the host controller is dead. */
3484 state = xhci_readl(xhci, &xhci->op_regs->status);
3485 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3486 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3487 xhci_free_virt_device(xhci, udev->slot_id);
3488 spin_unlock_irqrestore(&xhci->lock, flags);
3492 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3493 spin_unlock_irqrestore(&xhci->lock, flags);
3494 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3497 xhci_ring_cmd_db(xhci);
3498 spin_unlock_irqrestore(&xhci->lock, flags);
3500 * Event command completion handler will free any data structures
3501 * associated with the slot. XXX Can free sleep?
3506 * Checks if we have enough host controller resources for the default control
3509 * Must be called with xhci->lock held.
3511 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3513 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3514 xhci_dbg(xhci, "Not enough ep ctxs: "
3515 "%u active, need to add 1, limit is %u.\n",
3516 xhci->num_active_eps, xhci->limit_active_eps);
3519 xhci->num_active_eps += 1;
3520 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3521 xhci->num_active_eps);
3527 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3528 * timed out, or allocating memory failed. Returns 1 on success.
3530 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3532 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3533 unsigned long flags;
3537 spin_lock_irqsave(&xhci->lock, flags);
3538 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3540 spin_unlock_irqrestore(&xhci->lock, flags);
3541 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3544 xhci_ring_cmd_db(xhci);
3545 spin_unlock_irqrestore(&xhci->lock, flags);
3547 /* XXX: how much time for xHC slot assignment? */
3548 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3549 USB_CTRL_SET_TIMEOUT);
3550 if (timeleft <= 0) {
3551 xhci_warn(xhci, "%s while waiting for a slot\n",
3552 timeleft == 0 ? "Timeout" : "Signal");
3553 /* FIXME cancel the enable slot request */
3557 if (!xhci->slot_id) {
3558 xhci_err(xhci, "Error while assigning device slot ID\n");
3562 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3563 spin_lock_irqsave(&xhci->lock, flags);
3564 ret = xhci_reserve_host_control_ep_resources(xhci);
3566 spin_unlock_irqrestore(&xhci->lock, flags);
3567 xhci_warn(xhci, "Not enough host resources, "
3568 "active endpoint contexts = %u\n",
3569 xhci->num_active_eps);
3572 spin_unlock_irqrestore(&xhci->lock, flags);
3574 /* Use GFP_NOIO, since this function can be called from
3575 * xhci_discover_or_reset_device(), which may be called as part of
3576 * mass storage driver error handling.
3578 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3579 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3582 udev->slot_id = xhci->slot_id;
3583 /* Is this a LS or FS device under a HS hub? */
3584 /* Hub or peripherial? */
3588 /* Disable slot, if we can do it without mem alloc */
3589 spin_lock_irqsave(&xhci->lock, flags);
3590 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3591 xhci_ring_cmd_db(xhci);
3592 spin_unlock_irqrestore(&xhci->lock, flags);
3597 * Issue an Address Device command (which will issue a SetAddress request to
3599 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3600 * we should only issue and wait on one address command at the same time.
3602 * We add one to the device address issued by the hardware because the USB core
3603 * uses address 1 for the root hubs (even though they're not really devices).
3605 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3607 unsigned long flags;
3609 struct xhci_virt_device *virt_dev;
3611 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3612 struct xhci_slot_ctx *slot_ctx;
3613 struct xhci_input_control_ctx *ctrl_ctx;
3616 if (!udev->slot_id) {
3617 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3621 virt_dev = xhci->devs[udev->slot_id];
3623 if (WARN_ON(!virt_dev)) {
3625 * In plug/unplug torture test with an NEC controller,
3626 * a zero-dereference was observed once due to virt_dev = 0.
3627 * Print useful debug rather than crash if it is observed again!
3629 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3634 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3636 * If this is the first Set Address since device plug-in or
3637 * virt_device realloaction after a resume with an xHCI power loss,
3638 * then set up the slot context.
3640 if (!slot_ctx->dev_info)
3641 xhci_setup_addressable_virt_dev(xhci, udev);
3642 /* Otherwise, update the control endpoint ring enqueue pointer. */
3644 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3645 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3646 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3647 ctrl_ctx->drop_flags = 0;
3649 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3650 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3652 spin_lock_irqsave(&xhci->lock, flags);
3653 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3656 spin_unlock_irqrestore(&xhci->lock, flags);
3657 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3660 xhci_ring_cmd_db(xhci);
3661 spin_unlock_irqrestore(&xhci->lock, flags);
3663 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3664 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3665 USB_CTRL_SET_TIMEOUT);
3666 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3667 * the SetAddress() "recovery interval" required by USB and aborting the
3668 * command on a timeout.
3670 if (timeleft <= 0) {
3671 xhci_warn(xhci, "%s while waiting for address device command\n",
3672 timeleft == 0 ? "Timeout" : "Signal");
3673 /* FIXME cancel the address device command */
3677 switch (virt_dev->cmd_status) {
3678 case COMP_CTX_STATE:
3680 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3685 dev_warn(&udev->dev, "Device not responding to set address.\n");
3689 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3690 "device command.\n");
3694 xhci_dbg(xhci, "Successful Address Device command\n");
3697 xhci_err(xhci, "ERROR: unexpected command completion "
3698 "code 0x%x.\n", virt_dev->cmd_status);
3699 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3700 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3707 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3708 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3709 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3711 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3712 (unsigned long long)
3713 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3714 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3715 (unsigned long long)virt_dev->out_ctx->dma);
3716 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3717 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3718 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3719 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3721 * USB core uses address 1 for the roothubs, so we add one to the
3722 * address given back to us by the HC.
3724 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3725 /* Use kernel assigned address for devices; store xHC assigned
3726 * address locally. */
3727 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3729 /* Zero the input context control for later use */
3730 ctrl_ctx->add_flags = 0;
3731 ctrl_ctx->drop_flags = 0;
3733 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3738 #ifdef CONFIG_USB_SUSPEND
3740 /* BESL to HIRD Encoding array for USB2 LPM */
3741 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3742 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3744 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3745 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3750 for (hird = 0; hird < 16; hird++) {
3751 if (xhci_besl_encoding[hird] >= u2del)
3758 hird = (u2del - 51) / 75 + 1;
3767 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3768 struct usb_device *udev)
3770 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3771 struct dev_info *dev_info;
3772 __le32 __iomem **port_array;
3773 __le32 __iomem *addr, *pm_addr;
3775 unsigned int port_num;
3776 unsigned long flags;
3780 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3784 /* we only support lpm for non-hub device connected to root hub yet */
3785 if (!udev->parent || udev->parent->parent ||
3786 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3789 spin_lock_irqsave(&xhci->lock, flags);
3791 /* Look for devices in lpm_failed_devs list */
3792 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3793 le16_to_cpu(udev->descriptor.idProduct);
3794 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3795 if (dev_info->dev_id == dev_id) {
3801 port_array = xhci->usb2_ports;
3802 port_num = udev->portnum - 1;
3804 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3805 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3811 * Test USB 2.0 software LPM.
3812 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3813 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3814 * in the June 2011 errata release.
3816 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3818 * Set L1 Device Slot and HIRD/BESL.
3819 * Check device's USB 2.0 extension descriptor to determine whether
3820 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3822 pm_addr = port_array[port_num] + 1;
3823 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3824 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3825 hird = xhci_calculate_hird_besl(u2del, 1);
3827 hird = xhci_calculate_hird_besl(u2del, 0);
3829 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3830 xhci_writel(xhci, temp, pm_addr);
3832 /* Set port link state to U2(L1) */
3833 addr = port_array[port_num];
3834 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3837 spin_unlock_irqrestore(&xhci->lock, flags);
3839 spin_lock_irqsave(&xhci->lock, flags);
3841 /* Check L1 Status */
3842 ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3843 if (ret != -ETIMEDOUT) {
3844 /* enter L1 successfully */
3845 temp = xhci_readl(xhci, addr);
3846 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3850 temp = xhci_readl(xhci, pm_addr);
3851 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3852 port_num, temp & PORT_L1S_MASK);
3856 /* Resume the port */
3857 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3859 spin_unlock_irqrestore(&xhci->lock, flags);
3861 spin_lock_irqsave(&xhci->lock, flags);
3864 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3866 /* Check PORTSC to make sure the device is in the right state */
3868 temp = xhci_readl(xhci, addr);
3869 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3870 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3871 (temp & PORT_PLS_MASK) != XDEV_U0) {
3872 xhci_dbg(xhci, "port L1 resume fail\n");
3878 /* Insert dev to lpm_failed_devs list */
3879 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3881 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3886 dev_info->dev_id = dev_id;
3887 INIT_LIST_HEAD(&dev_info->list);
3888 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3890 xhci_ring_device(xhci, udev->slot_id);
3894 spin_unlock_irqrestore(&xhci->lock, flags);
3898 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3899 struct usb_device *udev, int enable)
3901 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3902 __le32 __iomem **port_array;
3903 __le32 __iomem *pm_addr;
3905 unsigned int port_num;
3906 unsigned long flags;
3909 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3913 if (!udev->parent || udev->parent->parent ||
3914 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3917 if (udev->usb2_hw_lpm_capable != 1)
3920 spin_lock_irqsave(&xhci->lock, flags);
3922 port_array = xhci->usb2_ports;
3923 port_num = udev->portnum - 1;
3924 pm_addr = port_array[port_num] + 1;
3925 temp = xhci_readl(xhci, pm_addr);
3927 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3928 enable ? "enable" : "disable", port_num);
3930 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3931 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3932 hird = xhci_calculate_hird_besl(u2del, 1);
3934 hird = xhci_calculate_hird_besl(u2del, 0);
3937 temp &= ~PORT_HIRD_MASK;
3938 temp |= PORT_HIRD(hird) | PORT_RWE;
3939 xhci_writel(xhci, temp, pm_addr);
3940 temp = xhci_readl(xhci, pm_addr);
3942 xhci_writel(xhci, temp, pm_addr);
3944 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3945 xhci_writel(xhci, temp, pm_addr);
3948 spin_unlock_irqrestore(&xhci->lock, flags);
3952 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3954 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3957 ret = xhci_usb2_software_lpm_test(hcd, udev);
3959 xhci_dbg(xhci, "software LPM test succeed\n");
3960 if (xhci->hw_lpm_support == 1) {
3961 udev->usb2_hw_lpm_capable = 1;
3962 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3964 udev->usb2_hw_lpm_enabled = 1;
3973 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3974 struct usb_device *udev, int enable)
3979 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3984 #endif /* CONFIG_USB_SUSPEND */
3986 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3987 * internal data structures for the device.
3989 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
3990 struct usb_tt *tt, gfp_t mem_flags)
3992 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3993 struct xhci_virt_device *vdev;
3994 struct xhci_command *config_cmd;
3995 struct xhci_input_control_ctx *ctrl_ctx;
3996 struct xhci_slot_ctx *slot_ctx;
3997 unsigned long flags;
3998 unsigned think_time;
4001 /* Ignore root hubs */
4005 vdev = xhci->devs[hdev->slot_id];
4007 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4010 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4012 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4016 spin_lock_irqsave(&xhci->lock, flags);
4017 if (hdev->speed == USB_SPEED_HIGH &&
4018 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4019 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4020 xhci_free_command(xhci, config_cmd);
4021 spin_unlock_irqrestore(&xhci->lock, flags);
4025 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4026 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4027 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4028 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4029 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4031 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4032 if (xhci->hci_version > 0x95) {
4033 xhci_dbg(xhci, "xHCI version %x needs hub "
4034 "TT think time and number of ports\n",
4035 (unsigned int) xhci->hci_version);
4036 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4037 /* Set TT think time - convert from ns to FS bit times.
4038 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4039 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4041 * xHCI 1.0: this field shall be 0 if the device is not a
4044 think_time = tt->think_time;
4045 if (think_time != 0)
4046 think_time = (think_time / 666) - 1;
4047 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4048 slot_ctx->tt_info |=
4049 cpu_to_le32(TT_THINK_TIME(think_time));
4051 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4052 "TT think time or number of ports\n",
4053 (unsigned int) xhci->hci_version);
4055 slot_ctx->dev_state = 0;
4056 spin_unlock_irqrestore(&xhci->lock, flags);
4058 xhci_dbg(xhci, "Set up %s for hub device.\n",
4059 (xhci->hci_version > 0x95) ?
4060 "configure endpoint" : "evaluate context");
4061 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4062 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4064 /* Issue and wait for the configure endpoint or
4065 * evaluate context command.
4067 if (xhci->hci_version > 0x95)
4068 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4071 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4074 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4075 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4077 xhci_free_command(xhci, config_cmd);
4081 int xhci_get_frame(struct usb_hcd *hcd)
4083 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4084 /* EHCI mods by the periodic size. Why? */
4085 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4088 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4090 struct xhci_hcd *xhci;
4091 struct device *dev = hcd->self.controller;
4095 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
4097 if (usb_hcd_is_primary_hcd(hcd)) {
4098 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4101 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4102 xhci->main_hcd = hcd;
4103 /* Mark the first roothub as being USB 2.0.
4104 * The xHCI driver will register the USB 3.0 roothub.
4106 hcd->speed = HCD_USB2;
4107 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4109 * USB 2.0 roothub under xHCI has an integrated TT,
4110 * (rate matching hub) as opposed to having an OHCI/UHCI
4111 * companion controller.
4115 /* xHCI private pointer was set in xhci_pci_probe for the second
4116 * registered roothub.
4118 xhci = hcd_to_xhci(hcd);
4119 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4120 if (HCC_64BIT_ADDR(temp)) {
4121 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4122 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4124 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4129 xhci->cap_regs = hcd->regs;
4130 xhci->op_regs = hcd->regs +
4131 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4132 xhci->run_regs = hcd->regs +
4133 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4134 /* Cache read-only capability registers */
4135 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4136 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4137 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4138 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4139 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4140 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4141 xhci_print_registers(xhci);
4143 get_quirks(dev, xhci);
4145 /* Make sure the HC is halted. */
4146 retval = xhci_halt(xhci);
4150 xhci_dbg(xhci, "Resetting HCD\n");
4151 /* Reset the internal HC memory state and registers. */
4152 retval = xhci_reset(xhci);
4155 xhci_dbg(xhci, "Reset complete\n");
4157 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4158 if (HCC_64BIT_ADDR(temp)) {
4159 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4160 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4162 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4165 xhci_dbg(xhci, "Calling HCD init\n");
4166 /* Initialize HCD and host controller data structures. */
4167 retval = xhci_init(hcd);
4170 xhci_dbg(xhci, "Called HCD init\n");
4177 MODULE_DESCRIPTION(DRIVER_DESC);
4178 MODULE_AUTHOR(DRIVER_AUTHOR);
4179 MODULE_LICENSE("GPL");
4181 static int __init xhci_hcd_init(void)
4185 retval = xhci_register_pci();
4187 printk(KERN_DEBUG "Problem registering PCI driver.");
4191 * Check the compiler generated sizes of structures that must be laid
4192 * out in specific ways for hardware access.
4194 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4195 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4196 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4197 /* xhci_device_control has eight fields, and also
4198 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4200 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4201 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4202 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4203 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4204 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4205 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4206 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4207 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4210 module_init(xhci_hcd_init);
4212 static void __exit xhci_hcd_cleanup(void)
4214 xhci_unregister_pci();
4216 module_exit(xhci_hcd_cleanup);