xHCI: Increase the timeout for controller save/restore state operation
[pandora-kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 #ifdef CONFIG_PCI
179 static int xhci_free_msi(struct xhci_hcd *xhci)
180 {
181         int i;
182
183         if (!xhci->msix_entries)
184                 return -EINVAL;
185
186         for (i = 0; i < xhci->msix_count; i++)
187                 if (xhci->msix_entries[i].vector)
188                         free_irq(xhci->msix_entries[i].vector,
189                                         xhci_to_hcd(xhci));
190         return 0;
191 }
192
193 /*
194  * Set up MSI
195  */
196 static int xhci_setup_msi(struct xhci_hcd *xhci)
197 {
198         int ret;
199         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
200
201         ret = pci_enable_msi(pdev);
202         if (ret) {
203                 xhci_err(xhci, "failed to allocate MSI entry\n");
204                 return ret;
205         }
206
207         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
208                                 0, "xhci_hcd", xhci_to_hcd(xhci));
209         if (ret) {
210                 xhci_err(xhci, "disable MSI interrupt\n");
211                 pci_disable_msi(pdev);
212         }
213
214         return ret;
215 }
216
217 /*
218  * Free IRQs
219  * free all IRQs request
220  */
221 static void xhci_free_irq(struct xhci_hcd *xhci)
222 {
223         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
224         int ret;
225
226         /* return if using legacy interrupt */
227         if (xhci_to_hcd(xhci)->irq >= 0)
228                 return;
229
230         ret = xhci_free_msi(xhci);
231         if (!ret)
232                 return;
233         if (pdev->irq >= 0)
234                 free_irq(pdev->irq, xhci_to_hcd(xhci));
235
236         return;
237 }
238
239 /*
240  * Set up MSI-X
241  */
242 static int xhci_setup_msix(struct xhci_hcd *xhci)
243 {
244         int i, ret = 0;
245         struct usb_hcd *hcd = xhci_to_hcd(xhci);
246         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
247
248         /*
249          * calculate number of msi-x vectors supported.
250          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
251          *   with max number of interrupters based on the xhci HCSPARAMS1.
252          * - num_online_cpus: maximum msi-x vectors per CPUs core.
253          *   Add additional 1 vector to ensure always available interrupt.
254          */
255         xhci->msix_count = min(num_online_cpus() + 1,
256                                 HCS_MAX_INTRS(xhci->hcs_params1));
257
258         xhci->msix_entries =
259                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
260                                 GFP_KERNEL);
261         if (!xhci->msix_entries) {
262                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
263                 return -ENOMEM;
264         }
265
266         for (i = 0; i < xhci->msix_count; i++) {
267                 xhci->msix_entries[i].entry = i;
268                 xhci->msix_entries[i].vector = 0;
269         }
270
271         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
272         if (ret) {
273                 xhci_err(xhci, "Failed to enable MSI-X\n");
274                 goto free_entries;
275         }
276
277         for (i = 0; i < xhci->msix_count; i++) {
278                 ret = request_irq(xhci->msix_entries[i].vector,
279                                 (irq_handler_t)xhci_msi_irq,
280                                 0, "xhci_hcd", xhci_to_hcd(xhci));
281                 if (ret)
282                         goto disable_msix;
283         }
284
285         hcd->msix_enabled = 1;
286         return ret;
287
288 disable_msix:
289         xhci_err(xhci, "disable MSI-X interrupt\n");
290         xhci_free_irq(xhci);
291         pci_disable_msix(pdev);
292 free_entries:
293         kfree(xhci->msix_entries);
294         xhci->msix_entries = NULL;
295         return ret;
296 }
297
298 /* Free any IRQs and disable MSI-X */
299 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
300 {
301         struct usb_hcd *hcd = xhci_to_hcd(xhci);
302         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
303
304         xhci_free_irq(xhci);
305
306         if (xhci->msix_entries) {
307                 pci_disable_msix(pdev);
308                 kfree(xhci->msix_entries);
309                 xhci->msix_entries = NULL;
310         } else {
311                 pci_disable_msi(pdev);
312         }
313
314         hcd->msix_enabled = 0;
315         return;
316 }
317
318 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
319 {
320         int i;
321
322         if (xhci->msix_entries) {
323                 for (i = 0; i < xhci->msix_count; i++)
324                         synchronize_irq(xhci->msix_entries[i].vector);
325         }
326 }
327
328 static int xhci_try_enable_msi(struct usb_hcd *hcd)
329 {
330         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
331         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
332         int ret;
333
334         /*
335          * Some Fresco Logic host controllers advertise MSI, but fail to
336          * generate interrupts.  Don't even try to enable MSI.
337          */
338         if (xhci->quirks & XHCI_BROKEN_MSI)
339                 return 0;
340
341         /* unregister the legacy interrupt */
342         if (hcd->irq)
343                 free_irq(hcd->irq, hcd);
344         hcd->irq = -1;
345
346         ret = xhci_setup_msix(xhci);
347         if (ret)
348                 /* fall back to msi*/
349                 ret = xhci_setup_msi(xhci);
350
351         if (!ret)
352                 /* hcd->irq is -1, we have MSI */
353                 return 0;
354
355         if (!pdev->irq) {
356                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
357                 return -EINVAL;
358         }
359
360         /* fall back to legacy interrupt*/
361         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
362                         hcd->irq_descr, hcd);
363         if (ret) {
364                 xhci_err(xhci, "request interrupt %d failed\n",
365                                 pdev->irq);
366                 return ret;
367         }
368         hcd->irq = pdev->irq;
369         return 0;
370 }
371
372 #else
373
374 static int xhci_try_enable_msi(struct usb_hcd *hcd)
375 {
376         return 0;
377 }
378
379 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
380 {
381 }
382
383 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
384 {
385 }
386
387 #endif
388
389 /*
390  * Initialize memory for HCD and xHC (one-time init).
391  *
392  * Program the PAGESIZE register, initialize the device context array, create
393  * device contexts (?), set up a command ring segment (or two?), create event
394  * ring (one for now).
395  */
396 int xhci_init(struct usb_hcd *hcd)
397 {
398         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
399         int retval = 0;
400
401         xhci_dbg(xhci, "xhci_init\n");
402         spin_lock_init(&xhci->lock);
403         if (xhci->hci_version == 0x95 && link_quirk) {
404                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
405                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
406         } else {
407                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
408         }
409         retval = xhci_mem_init(xhci, GFP_KERNEL);
410         xhci_dbg(xhci, "Finished xhci_init\n");
411
412         return retval;
413 }
414
415 /*-------------------------------------------------------------------------*/
416
417
418 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
419 static void xhci_event_ring_work(unsigned long arg)
420 {
421         unsigned long flags;
422         int temp;
423         u64 temp_64;
424         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
425         int i, j;
426
427         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
428
429         spin_lock_irqsave(&xhci->lock, flags);
430         temp = xhci_readl(xhci, &xhci->op_regs->status);
431         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
432         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
433                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
434                 xhci_dbg(xhci, "HW died, polling stopped.\n");
435                 spin_unlock_irqrestore(&xhci->lock, flags);
436                 return;
437         }
438
439         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
440         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
441         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
442         xhci->error_bitmask = 0;
443         xhci_dbg(xhci, "Event ring:\n");
444         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
445         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
446         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
447         temp_64 &= ~ERST_PTR_MASK;
448         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
449         xhci_dbg(xhci, "Command ring:\n");
450         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
451         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
452         xhci_dbg_cmd_ptrs(xhci);
453         for (i = 0; i < MAX_HC_SLOTS; ++i) {
454                 if (!xhci->devs[i])
455                         continue;
456                 for (j = 0; j < 31; ++j) {
457                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
458                 }
459         }
460         spin_unlock_irqrestore(&xhci->lock, flags);
461
462         if (!xhci->zombie)
463                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
464         else
465                 xhci_dbg(xhci, "Quit polling the event ring.\n");
466 }
467 #endif
468
469 static int xhci_run_finished(struct xhci_hcd *xhci)
470 {
471         if (xhci_start(xhci)) {
472                 xhci_halt(xhci);
473                 return -ENODEV;
474         }
475         xhci->shared_hcd->state = HC_STATE_RUNNING;
476
477         if (xhci->quirks & XHCI_NEC_HOST)
478                 xhci_ring_cmd_db(xhci);
479
480         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
481         return 0;
482 }
483
484 /*
485  * Start the HC after it was halted.
486  *
487  * This function is called by the USB core when the HC driver is added.
488  * Its opposite is xhci_stop().
489  *
490  * xhci_init() must be called once before this function can be called.
491  * Reset the HC, enable device slot contexts, program DCBAAP, and
492  * set command ring pointer and event ring pointer.
493  *
494  * Setup MSI-X vectors and enable interrupts.
495  */
496 int xhci_run(struct usb_hcd *hcd)
497 {
498         u32 temp;
499         u64 temp_64;
500         int ret;
501         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
502
503         /* Start the xHCI host controller running only after the USB 2.0 roothub
504          * is setup.
505          */
506
507         hcd->uses_new_polling = 1;
508         if (!usb_hcd_is_primary_hcd(hcd))
509                 return xhci_run_finished(xhci);
510
511         xhci_dbg(xhci, "xhci_run\n");
512
513         ret = xhci_try_enable_msi(hcd);
514         if (ret)
515                 return ret;
516
517 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
518         init_timer(&xhci->event_ring_timer);
519         xhci->event_ring_timer.data = (unsigned long) xhci;
520         xhci->event_ring_timer.function = xhci_event_ring_work;
521         /* Poll the event ring */
522         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
523         xhci->zombie = 0;
524         xhci_dbg(xhci, "Setting event ring polling timer\n");
525         add_timer(&xhci->event_ring_timer);
526 #endif
527
528         xhci_dbg(xhci, "Command ring memory map follows:\n");
529         xhci_debug_ring(xhci, xhci->cmd_ring);
530         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
531         xhci_dbg_cmd_ptrs(xhci);
532
533         xhci_dbg(xhci, "ERST memory map follows:\n");
534         xhci_dbg_erst(xhci, &xhci->erst);
535         xhci_dbg(xhci, "Event ring:\n");
536         xhci_debug_ring(xhci, xhci->event_ring);
537         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
538         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
539         temp_64 &= ~ERST_PTR_MASK;
540         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
541
542         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
543         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
544         temp &= ~ER_IRQ_INTERVAL_MASK;
545         temp |= (u32) 160;
546         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
547
548         /* Set the HCD state before we enable the irqs */
549         temp = xhci_readl(xhci, &xhci->op_regs->command);
550         temp |= (CMD_EIE);
551         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
552                         temp);
553         xhci_writel(xhci, temp, &xhci->op_regs->command);
554
555         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
556         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
557                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
558         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
559                         &xhci->ir_set->irq_pending);
560         xhci_print_ir_set(xhci, 0);
561
562         if (xhci->quirks & XHCI_NEC_HOST)
563                 xhci_queue_vendor_command(xhci, 0, 0, 0,
564                                 TRB_TYPE(TRB_NEC_GET_FW));
565
566         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
567         return 0;
568 }
569
570 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
571 {
572         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
573
574         spin_lock_irq(&xhci->lock);
575         xhci_halt(xhci);
576
577         /* The shared_hcd is going to be deallocated shortly (the USB core only
578          * calls this function when allocation fails in usb_add_hcd(), or
579          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
580          */
581         xhci->shared_hcd = NULL;
582         spin_unlock_irq(&xhci->lock);
583 }
584
585 /*
586  * Stop xHCI driver.
587  *
588  * This function is called by the USB core when the HC driver is removed.
589  * Its opposite is xhci_run().
590  *
591  * Disable device contexts, disable IRQs, and quiesce the HC.
592  * Reset the HC, finish any completed transactions, and cleanup memory.
593  */
594 void xhci_stop(struct usb_hcd *hcd)
595 {
596         u32 temp;
597         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
598
599         if (!usb_hcd_is_primary_hcd(hcd)) {
600                 xhci_only_stop_hcd(xhci->shared_hcd);
601                 return;
602         }
603
604         spin_lock_irq(&xhci->lock);
605         /* Make sure the xHC is halted for a USB3 roothub
606          * (xhci_stop() could be called as part of failed init).
607          */
608         xhci_halt(xhci);
609         xhci_reset(xhci);
610         spin_unlock_irq(&xhci->lock);
611
612         xhci_cleanup_msix(xhci);
613
614 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
615         /* Tell the event ring poll function not to reschedule */
616         xhci->zombie = 1;
617         del_timer_sync(&xhci->event_ring_timer);
618 #endif
619
620         if (xhci->quirks & XHCI_AMD_PLL_FIX)
621                 usb_amd_dev_put();
622
623         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
624         temp = xhci_readl(xhci, &xhci->op_regs->status);
625         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
626         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
627         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
628                         &xhci->ir_set->irq_pending);
629         xhci_print_ir_set(xhci, 0);
630
631         xhci_dbg(xhci, "cleaning up memory\n");
632         xhci_mem_cleanup(xhci);
633         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
634                     xhci_readl(xhci, &xhci->op_regs->status));
635 }
636
637 /*
638  * Shutdown HC (not bus-specific)
639  *
640  * This is called when the machine is rebooting or halting.  We assume that the
641  * machine will be powered off, and the HC's internal state will be reset.
642  * Don't bother to free memory.
643  *
644  * This will only ever be called with the main usb_hcd (the USB3 roothub).
645  */
646 void xhci_shutdown(struct usb_hcd *hcd)
647 {
648         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
649
650         spin_lock_irq(&xhci->lock);
651         xhci_halt(xhci);
652         spin_unlock_irq(&xhci->lock);
653
654         xhci_cleanup_msix(xhci);
655
656         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
657                     xhci_readl(xhci, &xhci->op_regs->status));
658 }
659
660 #ifdef CONFIG_PM
661 static void xhci_save_registers(struct xhci_hcd *xhci)
662 {
663         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
664         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
665         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
666         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
667         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
668         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
669         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
670         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
671         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
672 }
673
674 static void xhci_restore_registers(struct xhci_hcd *xhci)
675 {
676         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
677         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
678         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
679         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
680         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
681         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
682         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
683         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
684         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
685 }
686
687 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
688 {
689         u64     val_64;
690
691         /* step 2: initialize command ring buffer */
692         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
693         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
694                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
695                                       xhci->cmd_ring->dequeue) &
696                  (u64) ~CMD_RING_RSVD_BITS) |
697                 xhci->cmd_ring->cycle_state;
698         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
699                         (long unsigned long) val_64);
700         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
701 }
702
703 /*
704  * The whole command ring must be cleared to zero when we suspend the host.
705  *
706  * The host doesn't save the command ring pointer in the suspend well, so we
707  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
708  * aligned, because of the reserved bits in the command ring dequeue pointer
709  * register.  Therefore, we can't just set the dequeue pointer back in the
710  * middle of the ring (TRBs are 16-byte aligned).
711  */
712 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
713 {
714         struct xhci_ring *ring;
715         struct xhci_segment *seg;
716
717         ring = xhci->cmd_ring;
718         seg = ring->deq_seg;
719         do {
720                 memset(seg->trbs, 0,
721                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
722                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
723                         cpu_to_le32(~TRB_CYCLE);
724                 seg = seg->next;
725         } while (seg != ring->deq_seg);
726
727         /* Reset the software enqueue and dequeue pointers */
728         ring->deq_seg = ring->first_seg;
729         ring->dequeue = ring->first_seg->trbs;
730         ring->enq_seg = ring->deq_seg;
731         ring->enqueue = ring->dequeue;
732
733         /*
734          * Ring is now zeroed, so the HW should look for change of ownership
735          * when the cycle bit is set to 1.
736          */
737         ring->cycle_state = 1;
738
739         /*
740          * Reset the hardware dequeue pointer.
741          * Yes, this will need to be re-written after resume, but we're paranoid
742          * and want to make sure the hardware doesn't access bogus memory
743          * because, say, the BIOS or an SMI started the host without changing
744          * the command ring pointers.
745          */
746         xhci_set_cmd_ring_deq(xhci);
747 }
748
749 /*
750  * Stop HC (not bus-specific)
751  *
752  * This is called when the machine transition into S3/S4 mode.
753  *
754  */
755 int xhci_suspend(struct xhci_hcd *xhci)
756 {
757         int                     rc = 0;
758         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
759         u32                     command;
760
761         spin_lock_irq(&xhci->lock);
762         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
763         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
764         /* step 1: stop endpoint */
765         /* skipped assuming that port suspend has done */
766
767         /* step 2: clear Run/Stop bit */
768         command = xhci_readl(xhci, &xhci->op_regs->command);
769         command &= ~CMD_RUN;
770         xhci_writel(xhci, command, &xhci->op_regs->command);
771         if (handshake(xhci, &xhci->op_regs->status,
772                       STS_HALT, STS_HALT, 100*100)) {
773                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
774                 spin_unlock_irq(&xhci->lock);
775                 return -ETIMEDOUT;
776         }
777         xhci_clear_command_ring(xhci);
778
779         /* step 3: save registers */
780         xhci_save_registers(xhci);
781
782         /* step 4: set CSS flag */
783         command = xhci_readl(xhci, &xhci->op_regs->command);
784         command |= CMD_CSS;
785         xhci_writel(xhci, command, &xhci->op_regs->command);
786         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
787                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
788                 spin_unlock_irq(&xhci->lock);
789                 return -ETIMEDOUT;
790         }
791         spin_unlock_irq(&xhci->lock);
792
793         /* step 5: remove core well power */
794         /* synchronize irq when using MSI-X */
795         xhci_msix_sync_irqs(xhci);
796
797         return rc;
798 }
799
800 /*
801  * start xHC (not bus-specific)
802  *
803  * This is called when the machine transition from S3/S4 mode.
804  *
805  */
806 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
807 {
808         u32                     command, temp = 0;
809         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
810         struct usb_hcd          *secondary_hcd;
811         int                     retval = 0;
812
813         /* Wait a bit if either of the roothubs need to settle from the
814          * transition into bus suspend.
815          */
816         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
817                         time_before(jiffies,
818                                 xhci->bus_state[1].next_statechange))
819                 msleep(100);
820
821         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
822         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
823
824         spin_lock_irq(&xhci->lock);
825         if (xhci->quirks & XHCI_RESET_ON_RESUME)
826                 hibernated = true;
827
828         if (!hibernated) {
829                 /* step 1: restore register */
830                 xhci_restore_registers(xhci);
831                 /* step 2: initialize command ring buffer */
832                 xhci_set_cmd_ring_deq(xhci);
833                 /* step 3: restore state and start state*/
834                 /* step 3: set CRS flag */
835                 command = xhci_readl(xhci, &xhci->op_regs->command);
836                 command |= CMD_CRS;
837                 xhci_writel(xhci, command, &xhci->op_regs->command);
838                 if (handshake(xhci, &xhci->op_regs->status,
839                               STS_RESTORE, 0, 10 * 1000)) {
840                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
841                         spin_unlock_irq(&xhci->lock);
842                         return -ETIMEDOUT;
843                 }
844                 temp = xhci_readl(xhci, &xhci->op_regs->status);
845         }
846
847         /* If restore operation fails, re-initialize the HC during resume */
848         if ((temp & STS_SRE) || hibernated) {
849                 /* Let the USB core know _both_ roothubs lost power. */
850                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
851                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
852
853                 xhci_dbg(xhci, "Stop HCD\n");
854                 xhci_halt(xhci);
855                 xhci_reset(xhci);
856                 spin_unlock_irq(&xhci->lock);
857                 xhci_cleanup_msix(xhci);
858
859 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
860                 /* Tell the event ring poll function not to reschedule */
861                 xhci->zombie = 1;
862                 del_timer_sync(&xhci->event_ring_timer);
863 #endif
864
865                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
866                 temp = xhci_readl(xhci, &xhci->op_regs->status);
867                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
868                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
869                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
870                                 &xhci->ir_set->irq_pending);
871                 xhci_print_ir_set(xhci, 0);
872
873                 xhci_dbg(xhci, "cleaning up memory\n");
874                 xhci_mem_cleanup(xhci);
875                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
876                             xhci_readl(xhci, &xhci->op_regs->status));
877
878                 /* USB core calls the PCI reinit and start functions twice:
879                  * first with the primary HCD, and then with the secondary HCD.
880                  * If we don't do the same, the host will never be started.
881                  */
882                 if (!usb_hcd_is_primary_hcd(hcd))
883                         secondary_hcd = hcd;
884                 else
885                         secondary_hcd = xhci->shared_hcd;
886
887                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
888                 retval = xhci_init(hcd->primary_hcd);
889                 if (retval)
890                         return retval;
891                 xhci_dbg(xhci, "Start the primary HCD\n");
892                 retval = xhci_run(hcd->primary_hcd);
893                 if (!retval) {
894                         xhci_dbg(xhci, "Start the secondary HCD\n");
895                         retval = xhci_run(secondary_hcd);
896                 }
897                 hcd->state = HC_STATE_SUSPENDED;
898                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
899                 goto done;
900         }
901
902         /* step 4: set Run/Stop bit */
903         command = xhci_readl(xhci, &xhci->op_regs->command);
904         command |= CMD_RUN;
905         xhci_writel(xhci, command, &xhci->op_regs->command);
906         handshake(xhci, &xhci->op_regs->status, STS_HALT,
907                   0, 250 * 1000);
908
909         /* step 5: walk topology and initialize portsc,
910          * portpmsc and portli
911          */
912         /* this is done in bus_resume */
913
914         /* step 6: restart each of the previously
915          * Running endpoints by ringing their doorbells
916          */
917
918         spin_unlock_irq(&xhci->lock);
919
920  done:
921         if (retval == 0) {
922                 usb_hcd_resume_root_hub(hcd);
923                 usb_hcd_resume_root_hub(xhci->shared_hcd);
924         }
925         return retval;
926 }
927 #endif  /* CONFIG_PM */
928
929 /*-------------------------------------------------------------------------*/
930
931 /**
932  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
933  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
934  * value to right shift 1 for the bitmask.
935  *
936  * Index  = (epnum * 2) + direction - 1,
937  * where direction = 0 for OUT, 1 for IN.
938  * For control endpoints, the IN index is used (OUT index is unused), so
939  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
940  */
941 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
942 {
943         unsigned int index;
944         if (usb_endpoint_xfer_control(desc))
945                 index = (unsigned int) (usb_endpoint_num(desc)*2);
946         else
947                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
948                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
949         return index;
950 }
951
952 /* Find the flag for this endpoint (for use in the control context).  Use the
953  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
954  * bit 1, etc.
955  */
956 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
957 {
958         return 1 << (xhci_get_endpoint_index(desc) + 1);
959 }
960
961 /* Find the flag for this endpoint (for use in the control context).  Use the
962  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
963  * bit 1, etc.
964  */
965 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
966 {
967         return 1 << (ep_index + 1);
968 }
969
970 /* Compute the last valid endpoint context index.  Basically, this is the
971  * endpoint index plus one.  For slot contexts with more than valid endpoint,
972  * we find the most significant bit set in the added contexts flags.
973  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
974  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
975  */
976 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
977 {
978         return fls(added_ctxs) - 1;
979 }
980
981 /* Returns 1 if the arguments are OK;
982  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
983  */
984 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
985                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
986                 const char *func) {
987         struct xhci_hcd *xhci;
988         struct xhci_virt_device *virt_dev;
989
990         if (!hcd || (check_ep && !ep) || !udev) {
991                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
992                                 func);
993                 return -EINVAL;
994         }
995         if (!udev->parent) {
996                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
997                                 func);
998                 return 0;
999         }
1000
1001         xhci = hcd_to_xhci(hcd);
1002         if (xhci->xhc_state & XHCI_STATE_HALTED)
1003                 return -ENODEV;
1004
1005         if (check_virt_dev) {
1006                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1007                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1008                                                 "device\n", func);
1009                         return -EINVAL;
1010                 }
1011
1012                 virt_dev = xhci->devs[udev->slot_id];
1013                 if (virt_dev->udev != udev) {
1014                         printk(KERN_DEBUG "xHCI %s called with udev and "
1015                                           "virt_dev does not match\n", func);
1016                         return -EINVAL;
1017                 }
1018         }
1019
1020         return 1;
1021 }
1022
1023 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1024                 struct usb_device *udev, struct xhci_command *command,
1025                 bool ctx_change, bool must_succeed);
1026
1027 /*
1028  * Full speed devices may have a max packet size greater than 8 bytes, but the
1029  * USB core doesn't know that until it reads the first 8 bytes of the
1030  * descriptor.  If the usb_device's max packet size changes after that point,
1031  * we need to issue an evaluate context command and wait on it.
1032  */
1033 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1034                 unsigned int ep_index, struct urb *urb)
1035 {
1036         struct xhci_container_ctx *in_ctx;
1037         struct xhci_container_ctx *out_ctx;
1038         struct xhci_input_control_ctx *ctrl_ctx;
1039         struct xhci_ep_ctx *ep_ctx;
1040         int max_packet_size;
1041         int hw_max_packet_size;
1042         int ret = 0;
1043
1044         out_ctx = xhci->devs[slot_id]->out_ctx;
1045         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1046         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1047         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1048         if (hw_max_packet_size != max_packet_size) {
1049                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1050                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1051                                 max_packet_size);
1052                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1053                                 hw_max_packet_size);
1054                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1055
1056                 /* Set up the modified control endpoint 0 */
1057                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1058                                 xhci->devs[slot_id]->out_ctx, ep_index);
1059                 in_ctx = xhci->devs[slot_id]->in_ctx;
1060                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1061                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1062                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1063
1064                 /* Set up the input context flags for the command */
1065                 /* FIXME: This won't work if a non-default control endpoint
1066                  * changes max packet sizes.
1067                  */
1068                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1069                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1070                 ctrl_ctx->drop_flags = 0;
1071
1072                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1073                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1074                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1075                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1076
1077                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1078                                 true, false);
1079
1080                 /* Clean up the input context for later use by bandwidth
1081                  * functions.
1082                  */
1083                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1084         }
1085         return ret;
1086 }
1087
1088 /*
1089  * non-error returns are a promise to giveback() the urb later
1090  * we drop ownership so next owner (or urb unlink) can get it
1091  */
1092 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1093 {
1094         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1095         struct xhci_td *buffer;
1096         unsigned long flags;
1097         int ret = 0;
1098         unsigned int slot_id, ep_index;
1099         struct urb_priv *urb_priv;
1100         int size, i;
1101
1102         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1103                                         true, true, __func__) <= 0)
1104                 return -EINVAL;
1105
1106         slot_id = urb->dev->slot_id;
1107         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1108
1109         if (!HCD_HW_ACCESSIBLE(hcd)) {
1110                 if (!in_interrupt())
1111                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1112                 ret = -ESHUTDOWN;
1113                 goto exit;
1114         }
1115
1116         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1117                 size = urb->number_of_packets;
1118         else
1119                 size = 1;
1120
1121         urb_priv = kzalloc(sizeof(struct urb_priv) +
1122                                   size * sizeof(struct xhci_td *), mem_flags);
1123         if (!urb_priv)
1124                 return -ENOMEM;
1125
1126         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1127         if (!buffer) {
1128                 kfree(urb_priv);
1129                 return -ENOMEM;
1130         }
1131
1132         for (i = 0; i < size; i++) {
1133                 urb_priv->td[i] = buffer;
1134                 buffer++;
1135         }
1136
1137         urb_priv->length = size;
1138         urb_priv->td_cnt = 0;
1139         urb->hcpriv = urb_priv;
1140
1141         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1142                 /* Check to see if the max packet size for the default control
1143                  * endpoint changed during FS device enumeration
1144                  */
1145                 if (urb->dev->speed == USB_SPEED_FULL) {
1146                         ret = xhci_check_maxpacket(xhci, slot_id,
1147                                         ep_index, urb);
1148                         if (ret < 0) {
1149                                 xhci_urb_free_priv(xhci, urb_priv);
1150                                 urb->hcpriv = NULL;
1151                                 return ret;
1152                         }
1153                 }
1154
1155                 /* We have a spinlock and interrupts disabled, so we must pass
1156                  * atomic context to this function, which may allocate memory.
1157                  */
1158                 spin_lock_irqsave(&xhci->lock, flags);
1159                 if (xhci->xhc_state & XHCI_STATE_DYING)
1160                         goto dying;
1161                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1162                                 slot_id, ep_index);
1163                 if (ret)
1164                         goto free_priv;
1165                 spin_unlock_irqrestore(&xhci->lock, flags);
1166         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1167                 spin_lock_irqsave(&xhci->lock, flags);
1168                 if (xhci->xhc_state & XHCI_STATE_DYING)
1169                         goto dying;
1170                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1171                                 EP_GETTING_STREAMS) {
1172                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1173                                         "is transitioning to using streams.\n");
1174                         ret = -EINVAL;
1175                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1176                                 EP_GETTING_NO_STREAMS) {
1177                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1178                                         "is transitioning to "
1179                                         "not having streams.\n");
1180                         ret = -EINVAL;
1181                 } else {
1182                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1183                                         slot_id, ep_index);
1184                 }
1185                 if (ret)
1186                         goto free_priv;
1187                 spin_unlock_irqrestore(&xhci->lock, flags);
1188         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1189                 spin_lock_irqsave(&xhci->lock, flags);
1190                 if (xhci->xhc_state & XHCI_STATE_DYING)
1191                         goto dying;
1192                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1193                                 slot_id, ep_index);
1194                 if (ret)
1195                         goto free_priv;
1196                 spin_unlock_irqrestore(&xhci->lock, flags);
1197         } else {
1198                 spin_lock_irqsave(&xhci->lock, flags);
1199                 if (xhci->xhc_state & XHCI_STATE_DYING)
1200                         goto dying;
1201                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1202                                 slot_id, ep_index);
1203                 if (ret)
1204                         goto free_priv;
1205                 spin_unlock_irqrestore(&xhci->lock, flags);
1206         }
1207 exit:
1208         return ret;
1209 dying:
1210         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1211                         "non-responsive xHCI host.\n",
1212                         urb->ep->desc.bEndpointAddress, urb);
1213         ret = -ESHUTDOWN;
1214 free_priv:
1215         xhci_urb_free_priv(xhci, urb_priv);
1216         urb->hcpriv = NULL;
1217         spin_unlock_irqrestore(&xhci->lock, flags);
1218         return ret;
1219 }
1220
1221 /* Get the right ring for the given URB.
1222  * If the endpoint supports streams, boundary check the URB's stream ID.
1223  * If the endpoint doesn't support streams, return the singular endpoint ring.
1224  */
1225 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1226                 struct urb *urb)
1227 {
1228         unsigned int slot_id;
1229         unsigned int ep_index;
1230         unsigned int stream_id;
1231         struct xhci_virt_ep *ep;
1232
1233         slot_id = urb->dev->slot_id;
1234         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1235         stream_id = urb->stream_id;
1236         ep = &xhci->devs[slot_id]->eps[ep_index];
1237         /* Common case: no streams */
1238         if (!(ep->ep_state & EP_HAS_STREAMS))
1239                 return ep->ring;
1240
1241         if (stream_id == 0) {
1242                 xhci_warn(xhci,
1243                                 "WARN: Slot ID %u, ep index %u has streams, "
1244                                 "but URB has no stream ID.\n",
1245                                 slot_id, ep_index);
1246                 return NULL;
1247         }
1248
1249         if (stream_id < ep->stream_info->num_streams)
1250                 return ep->stream_info->stream_rings[stream_id];
1251
1252         xhci_warn(xhci,
1253                         "WARN: Slot ID %u, ep index %u has "
1254                         "stream IDs 1 to %u allocated, "
1255                         "but stream ID %u is requested.\n",
1256                         slot_id, ep_index,
1257                         ep->stream_info->num_streams - 1,
1258                         stream_id);
1259         return NULL;
1260 }
1261
1262 /*
1263  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1264  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1265  * should pick up where it left off in the TD, unless a Set Transfer Ring
1266  * Dequeue Pointer is issued.
1267  *
1268  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1269  * the ring.  Since the ring is a contiguous structure, they can't be physically
1270  * removed.  Instead, there are two options:
1271  *
1272  *  1) If the HC is in the middle of processing the URB to be canceled, we
1273  *     simply move the ring's dequeue pointer past those TRBs using the Set
1274  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1275  *     when drivers timeout on the last submitted URB and attempt to cancel.
1276  *
1277  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1278  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1279  *     HC will need to invalidate the any TRBs it has cached after the stop
1280  *     endpoint command, as noted in the xHCI 0.95 errata.
1281  *
1282  *  3) The TD may have completed by the time the Stop Endpoint Command
1283  *     completes, so software needs to handle that case too.
1284  *
1285  * This function should protect against the TD enqueueing code ringing the
1286  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1287  * It also needs to account for multiple cancellations on happening at the same
1288  * time for the same endpoint.
1289  *
1290  * Note that this function can be called in any context, or so says
1291  * usb_hcd_unlink_urb()
1292  */
1293 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1294 {
1295         unsigned long flags;
1296         int ret, i;
1297         u32 temp;
1298         struct xhci_hcd *xhci;
1299         struct urb_priv *urb_priv;
1300         struct xhci_td *td;
1301         unsigned int ep_index;
1302         struct xhci_ring *ep_ring;
1303         struct xhci_virt_ep *ep;
1304
1305         xhci = hcd_to_xhci(hcd);
1306         spin_lock_irqsave(&xhci->lock, flags);
1307         /* Make sure the URB hasn't completed or been unlinked already */
1308         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1309         if (ret || !urb->hcpriv)
1310                 goto done;
1311         temp = xhci_readl(xhci, &xhci->op_regs->status);
1312         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1313                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1314                 urb_priv = urb->hcpriv;
1315                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1316                         td = urb_priv->td[i];
1317                         if (!list_empty(&td->td_list))
1318                                 list_del_init(&td->td_list);
1319                         if (!list_empty(&td->cancelled_td_list))
1320                                 list_del_init(&td->cancelled_td_list);
1321                 }
1322
1323                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1324                 spin_unlock_irqrestore(&xhci->lock, flags);
1325                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1326                 xhci_urb_free_priv(xhci, urb_priv);
1327                 return ret;
1328         }
1329         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1330                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1331                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1332                                 "non-responsive xHCI host.\n",
1333                                 urb->ep->desc.bEndpointAddress, urb);
1334                 /* Let the stop endpoint command watchdog timer (which set this
1335                  * state) finish cleaning up the endpoint TD lists.  We must
1336                  * have caught it in the middle of dropping a lock and giving
1337                  * back an URB.
1338                  */
1339                 goto done;
1340         }
1341
1342         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1343         xhci_dbg(xhci, "Event ring:\n");
1344         xhci_debug_ring(xhci, xhci->event_ring);
1345         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1346         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1347         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1348         if (!ep_ring) {
1349                 ret = -EINVAL;
1350                 goto done;
1351         }
1352
1353         xhci_dbg(xhci, "Endpoint ring:\n");
1354         xhci_debug_ring(xhci, ep_ring);
1355
1356         urb_priv = urb->hcpriv;
1357
1358         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1359                 td = urb_priv->td[i];
1360                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1361         }
1362
1363         /* Queue a stop endpoint command, but only if this is
1364          * the first cancellation to be handled.
1365          */
1366         if (!(ep->ep_state & EP_HALT_PENDING)) {
1367                 ep->ep_state |= EP_HALT_PENDING;
1368                 ep->stop_cmds_pending++;
1369                 ep->stop_cmd_timer.expires = jiffies +
1370                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1371                 add_timer(&ep->stop_cmd_timer);
1372                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1373                 xhci_ring_cmd_db(xhci);
1374         }
1375 done:
1376         spin_unlock_irqrestore(&xhci->lock, flags);
1377         return ret;
1378 }
1379
1380 /* Drop an endpoint from a new bandwidth configuration for this device.
1381  * Only one call to this function is allowed per endpoint before
1382  * check_bandwidth() or reset_bandwidth() must be called.
1383  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1384  * add the endpoint to the schedule with possibly new parameters denoted by a
1385  * different endpoint descriptor in usb_host_endpoint.
1386  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1387  * not allowed.
1388  *
1389  * The USB core will not allow URBs to be queued to an endpoint that is being
1390  * disabled, so there's no need for mutual exclusion to protect
1391  * the xhci->devs[slot_id] structure.
1392  */
1393 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1394                 struct usb_host_endpoint *ep)
1395 {
1396         struct xhci_hcd *xhci;
1397         struct xhci_container_ctx *in_ctx, *out_ctx;
1398         struct xhci_input_control_ctx *ctrl_ctx;
1399         struct xhci_slot_ctx *slot_ctx;
1400         unsigned int last_ctx;
1401         unsigned int ep_index;
1402         struct xhci_ep_ctx *ep_ctx;
1403         u32 drop_flag;
1404         u32 new_add_flags, new_drop_flags, new_slot_info;
1405         int ret;
1406
1407         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1408         if (ret <= 0)
1409                 return ret;
1410         xhci = hcd_to_xhci(hcd);
1411         if (xhci->xhc_state & XHCI_STATE_DYING)
1412                 return -ENODEV;
1413
1414         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1415         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1416         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1417                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1418                                 __func__, drop_flag);
1419                 return 0;
1420         }
1421
1422         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1423         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1424         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1425         ep_index = xhci_get_endpoint_index(&ep->desc);
1426         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1427         /* If the HC already knows the endpoint is disabled,
1428          * or the HCD has noted it is disabled, ignore this request
1429          */
1430         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1431              cpu_to_le32(EP_STATE_DISABLED)) ||
1432             le32_to_cpu(ctrl_ctx->drop_flags) &
1433             xhci_get_endpoint_flag(&ep->desc)) {
1434                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1435                                 __func__, ep);
1436                 return 0;
1437         }
1438
1439         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1440         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1441
1442         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1443         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1444
1445         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1446         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1447         /* Update the last valid endpoint context, if we deleted the last one */
1448         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1449             LAST_CTX(last_ctx)) {
1450                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1451                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1452         }
1453         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1454
1455         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1456
1457         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1458                         (unsigned int) ep->desc.bEndpointAddress,
1459                         udev->slot_id,
1460                         (unsigned int) new_drop_flags,
1461                         (unsigned int) new_add_flags,
1462                         (unsigned int) new_slot_info);
1463         return 0;
1464 }
1465
1466 /* Add an endpoint to a new possible bandwidth configuration for this device.
1467  * Only one call to this function is allowed per endpoint before
1468  * check_bandwidth() or reset_bandwidth() must be called.
1469  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1470  * add the endpoint to the schedule with possibly new parameters denoted by a
1471  * different endpoint descriptor in usb_host_endpoint.
1472  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1473  * not allowed.
1474  *
1475  * The USB core will not allow URBs to be queued to an endpoint until the
1476  * configuration or alt setting is installed in the device, so there's no need
1477  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1478  */
1479 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1480                 struct usb_host_endpoint *ep)
1481 {
1482         struct xhci_hcd *xhci;
1483         struct xhci_container_ctx *in_ctx, *out_ctx;
1484         unsigned int ep_index;
1485         struct xhci_ep_ctx *ep_ctx;
1486         struct xhci_slot_ctx *slot_ctx;
1487         struct xhci_input_control_ctx *ctrl_ctx;
1488         u32 added_ctxs;
1489         unsigned int last_ctx;
1490         u32 new_add_flags, new_drop_flags, new_slot_info;
1491         struct xhci_virt_device *virt_dev;
1492         int ret = 0;
1493
1494         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1495         if (ret <= 0) {
1496                 /* So we won't queue a reset ep command for a root hub */
1497                 ep->hcpriv = NULL;
1498                 return ret;
1499         }
1500         xhci = hcd_to_xhci(hcd);
1501         if (xhci->xhc_state & XHCI_STATE_DYING)
1502                 return -ENODEV;
1503
1504         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1505         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1506         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1507                 /* FIXME when we have to issue an evaluate endpoint command to
1508                  * deal with ep0 max packet size changing once we get the
1509                  * descriptors
1510                  */
1511                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1512                                 __func__, added_ctxs);
1513                 return 0;
1514         }
1515
1516         virt_dev = xhci->devs[udev->slot_id];
1517         in_ctx = virt_dev->in_ctx;
1518         out_ctx = virt_dev->out_ctx;
1519         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1520         ep_index = xhci_get_endpoint_index(&ep->desc);
1521         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1522
1523         /* If this endpoint is already in use, and the upper layers are trying
1524          * to add it again without dropping it, reject the addition.
1525          */
1526         if (virt_dev->eps[ep_index].ring &&
1527                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1528                                 xhci_get_endpoint_flag(&ep->desc))) {
1529                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1530                                 "without dropping it.\n",
1531                                 (unsigned int) ep->desc.bEndpointAddress);
1532                 return -EINVAL;
1533         }
1534
1535         /* If the HCD has already noted the endpoint is enabled,
1536          * ignore this request.
1537          */
1538         if (le32_to_cpu(ctrl_ctx->add_flags) &
1539             xhci_get_endpoint_flag(&ep->desc)) {
1540                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1541                                 __func__, ep);
1542                 return 0;
1543         }
1544
1545         /*
1546          * Configuration and alternate setting changes must be done in
1547          * process context, not interrupt context (or so documenation
1548          * for usb_set_interface() and usb_set_configuration() claim).
1549          */
1550         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1551                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1552                                 __func__, ep->desc.bEndpointAddress);
1553                 return -ENOMEM;
1554         }
1555
1556         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1557         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1558
1559         /* If xhci_endpoint_disable() was called for this endpoint, but the
1560          * xHC hasn't been notified yet through the check_bandwidth() call,
1561          * this re-adds a new state for the endpoint from the new endpoint
1562          * descriptors.  We must drop and re-add this endpoint, so we leave the
1563          * drop flags alone.
1564          */
1565         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1566
1567         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1568         /* Update the last valid endpoint context, if we just added one past */
1569         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1570             LAST_CTX(last_ctx)) {
1571                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1572                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1573         }
1574         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1575
1576         /* Store the usb_device pointer for later use */
1577         ep->hcpriv = udev;
1578
1579         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1580                         (unsigned int) ep->desc.bEndpointAddress,
1581                         udev->slot_id,
1582                         (unsigned int) new_drop_flags,
1583                         (unsigned int) new_add_flags,
1584                         (unsigned int) new_slot_info);
1585         return 0;
1586 }
1587
1588 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1589 {
1590         struct xhci_input_control_ctx *ctrl_ctx;
1591         struct xhci_ep_ctx *ep_ctx;
1592         struct xhci_slot_ctx *slot_ctx;
1593         int i;
1594
1595         /* When a device's add flag and drop flag are zero, any subsequent
1596          * configure endpoint command will leave that endpoint's state
1597          * untouched.  Make sure we don't leave any old state in the input
1598          * endpoint contexts.
1599          */
1600         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1601         ctrl_ctx->drop_flags = 0;
1602         ctrl_ctx->add_flags = 0;
1603         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1604         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1605         /* Endpoint 0 is always valid */
1606         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1607         for (i = 1; i < 31; ++i) {
1608                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1609                 ep_ctx->ep_info = 0;
1610                 ep_ctx->ep_info2 = 0;
1611                 ep_ctx->deq = 0;
1612                 ep_ctx->tx_info = 0;
1613         }
1614 }
1615
1616 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1617                 struct usb_device *udev, u32 *cmd_status)
1618 {
1619         int ret;
1620
1621         switch (*cmd_status) {
1622         case COMP_ENOMEM:
1623                 dev_warn(&udev->dev, "Not enough host controller resources "
1624                                 "for new device state.\n");
1625                 ret = -ENOMEM;
1626                 /* FIXME: can we allocate more resources for the HC? */
1627                 break;
1628         case COMP_BW_ERR:
1629         case COMP_2ND_BW_ERR:
1630                 dev_warn(&udev->dev, "Not enough bandwidth "
1631                                 "for new device state.\n");
1632                 ret = -ENOSPC;
1633                 /* FIXME: can we go back to the old state? */
1634                 break;
1635         case COMP_TRB_ERR:
1636                 /* the HCD set up something wrong */
1637                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1638                                 "add flag = 1, "
1639                                 "and endpoint is not disabled.\n");
1640                 ret = -EINVAL;
1641                 break;
1642         case COMP_DEV_ERR:
1643                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1644                                 "configure command.\n");
1645                 ret = -ENODEV;
1646                 break;
1647         case COMP_SUCCESS:
1648                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1649                 ret = 0;
1650                 break;
1651         default:
1652                 xhci_err(xhci, "ERROR: unexpected command completion "
1653                                 "code 0x%x.\n", *cmd_status);
1654                 ret = -EINVAL;
1655                 break;
1656         }
1657         return ret;
1658 }
1659
1660 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1661                 struct usb_device *udev, u32 *cmd_status)
1662 {
1663         int ret;
1664         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1665
1666         switch (*cmd_status) {
1667         case COMP_EINVAL:
1668                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1669                                 "context command.\n");
1670                 ret = -EINVAL;
1671                 break;
1672         case COMP_EBADSLT:
1673                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1674                                 "evaluate context command.\n");
1675         case COMP_CTX_STATE:
1676                 dev_warn(&udev->dev, "WARN: invalid context state for "
1677                                 "evaluate context command.\n");
1678                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1679                 ret = -EINVAL;
1680                 break;
1681         case COMP_DEV_ERR:
1682                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1683                                 "context command.\n");
1684                 ret = -ENODEV;
1685                 break;
1686         case COMP_MEL_ERR:
1687                 /* Max Exit Latency too large error */
1688                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1689                 ret = -EINVAL;
1690                 break;
1691         case COMP_SUCCESS:
1692                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1693                 ret = 0;
1694                 break;
1695         default:
1696                 xhci_err(xhci, "ERROR: unexpected command completion "
1697                                 "code 0x%x.\n", *cmd_status);
1698                 ret = -EINVAL;
1699                 break;
1700         }
1701         return ret;
1702 }
1703
1704 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1705                 struct xhci_container_ctx *in_ctx)
1706 {
1707         struct xhci_input_control_ctx *ctrl_ctx;
1708         u32 valid_add_flags;
1709         u32 valid_drop_flags;
1710
1711         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1712         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1713          * (bit 1).  The default control endpoint is added during the Address
1714          * Device command and is never removed until the slot is disabled.
1715          */
1716         valid_add_flags = ctrl_ctx->add_flags >> 2;
1717         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1718
1719         /* Use hweight32 to count the number of ones in the add flags, or
1720          * number of endpoints added.  Don't count endpoints that are changed
1721          * (both added and dropped).
1722          */
1723         return hweight32(valid_add_flags) -
1724                 hweight32(valid_add_flags & valid_drop_flags);
1725 }
1726
1727 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1728                 struct xhci_container_ctx *in_ctx)
1729 {
1730         struct xhci_input_control_ctx *ctrl_ctx;
1731         u32 valid_add_flags;
1732         u32 valid_drop_flags;
1733
1734         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1735         valid_add_flags = ctrl_ctx->add_flags >> 2;
1736         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1737
1738         return hweight32(valid_drop_flags) -
1739                 hweight32(valid_add_flags & valid_drop_flags);
1740 }
1741
1742 /*
1743  * We need to reserve the new number of endpoints before the configure endpoint
1744  * command completes.  We can't subtract the dropped endpoints from the number
1745  * of active endpoints until the command completes because we can oversubscribe
1746  * the host in this case:
1747  *
1748  *  - the first configure endpoint command drops more endpoints than it adds
1749  *  - a second configure endpoint command that adds more endpoints is queued
1750  *  - the first configure endpoint command fails, so the config is unchanged
1751  *  - the second command may succeed, even though there isn't enough resources
1752  *
1753  * Must be called with xhci->lock held.
1754  */
1755 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1756                 struct xhci_container_ctx *in_ctx)
1757 {
1758         u32 added_eps;
1759
1760         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1761         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1762                 xhci_dbg(xhci, "Not enough ep ctxs: "
1763                                 "%u active, need to add %u, limit is %u.\n",
1764                                 xhci->num_active_eps, added_eps,
1765                                 xhci->limit_active_eps);
1766                 return -ENOMEM;
1767         }
1768         xhci->num_active_eps += added_eps;
1769         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1770                         xhci->num_active_eps);
1771         return 0;
1772 }
1773
1774 /*
1775  * The configure endpoint was failed by the xHC for some other reason, so we
1776  * need to revert the resources that failed configuration would have used.
1777  *
1778  * Must be called with xhci->lock held.
1779  */
1780 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1781                 struct xhci_container_ctx *in_ctx)
1782 {
1783         u32 num_failed_eps;
1784
1785         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1786         xhci->num_active_eps -= num_failed_eps;
1787         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1788                         num_failed_eps,
1789                         xhci->num_active_eps);
1790 }
1791
1792 /*
1793  * Now that the command has completed, clean up the active endpoint count by
1794  * subtracting out the endpoints that were dropped (but not changed).
1795  *
1796  * Must be called with xhci->lock held.
1797  */
1798 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1799                 struct xhci_container_ctx *in_ctx)
1800 {
1801         u32 num_dropped_eps;
1802
1803         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1804         xhci->num_active_eps -= num_dropped_eps;
1805         if (num_dropped_eps)
1806                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1807                                 num_dropped_eps,
1808                                 xhci->num_active_eps);
1809 }
1810
1811 unsigned int xhci_get_block_size(struct usb_device *udev)
1812 {
1813         switch (udev->speed) {
1814         case USB_SPEED_LOW:
1815         case USB_SPEED_FULL:
1816                 return FS_BLOCK;
1817         case USB_SPEED_HIGH:
1818                 return HS_BLOCK;
1819         case USB_SPEED_SUPER:
1820                 return SS_BLOCK;
1821         case USB_SPEED_UNKNOWN:
1822         case USB_SPEED_WIRELESS:
1823         default:
1824                 /* Should never happen */
1825                 return 1;
1826         }
1827 }
1828
1829 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1830 {
1831         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1832                 return LS_OVERHEAD;
1833         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1834                 return FS_OVERHEAD;
1835         return HS_OVERHEAD;
1836 }
1837
1838 /* If we are changing a LS/FS device under a HS hub,
1839  * make sure (if we are activating a new TT) that the HS bus has enough
1840  * bandwidth for this new TT.
1841  */
1842 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1843                 struct xhci_virt_device *virt_dev,
1844                 int old_active_eps)
1845 {
1846         struct xhci_interval_bw_table *bw_table;
1847         struct xhci_tt_bw_info *tt_info;
1848
1849         /* Find the bandwidth table for the root port this TT is attached to. */
1850         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1851         tt_info = virt_dev->tt_info;
1852         /* If this TT already had active endpoints, the bandwidth for this TT
1853          * has already been added.  Removing all periodic endpoints (and thus
1854          * making the TT enactive) will only decrease the bandwidth used.
1855          */
1856         if (old_active_eps)
1857                 return 0;
1858         if (old_active_eps == 0 && tt_info->active_eps != 0) {
1859                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1860                         return -ENOMEM;
1861                 return 0;
1862         }
1863         /* Not sure why we would have no new active endpoints...
1864          *
1865          * Maybe because of an Evaluate Context change for a hub update or a
1866          * control endpoint 0 max packet size change?
1867          * FIXME: skip the bandwidth calculation in that case.
1868          */
1869         return 0;
1870 }
1871
1872 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
1873                 struct xhci_virt_device *virt_dev)
1874 {
1875         unsigned int bw_reserved;
1876
1877         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
1878         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
1879                 return -ENOMEM;
1880
1881         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
1882         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
1883                 return -ENOMEM;
1884
1885         return 0;
1886 }
1887
1888 /*
1889  * This algorithm is a very conservative estimate of the worst-case scheduling
1890  * scenario for any one interval.  The hardware dynamically schedules the
1891  * packets, so we can't tell which microframe could be the limiting factor in
1892  * the bandwidth scheduling.  This only takes into account periodic endpoints.
1893  *
1894  * Obviously, we can't solve an NP complete problem to find the minimum worst
1895  * case scenario.  Instead, we come up with an estimate that is no less than
1896  * the worst case bandwidth used for any one microframe, but may be an
1897  * over-estimate.
1898  *
1899  * We walk the requirements for each endpoint by interval, starting with the
1900  * smallest interval, and place packets in the schedule where there is only one
1901  * possible way to schedule packets for that interval.  In order to simplify
1902  * this algorithm, we record the largest max packet size for each interval, and
1903  * assume all packets will be that size.
1904  *
1905  * For interval 0, we obviously must schedule all packets for each interval.
1906  * The bandwidth for interval 0 is just the amount of data to be transmitted
1907  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1908  * the number of packets).
1909  *
1910  * For interval 1, we have two possible microframes to schedule those packets
1911  * in.  For this algorithm, if we can schedule the same number of packets for
1912  * each possible scheduling opportunity (each microframe), we will do so.  The
1913  * remaining number of packets will be saved to be transmitted in the gaps in
1914  * the next interval's scheduling sequence.
1915  *
1916  * As we move those remaining packets to be scheduled with interval 2 packets,
1917  * we have to double the number of remaining packets to transmit.  This is
1918  * because the intervals are actually powers of 2, and we would be transmitting
1919  * the previous interval's packets twice in this interval.  We also have to be
1920  * sure that when we look at the largest max packet size for this interval, we
1921  * also look at the largest max packet size for the remaining packets and take
1922  * the greater of the two.
1923  *
1924  * The algorithm continues to evenly distribute packets in each scheduling
1925  * opportunity, and push the remaining packets out, until we get to the last
1926  * interval.  Then those packets and their associated overhead are just added
1927  * to the bandwidth used.
1928  */
1929 static int xhci_check_bw_table(struct xhci_hcd *xhci,
1930                 struct xhci_virt_device *virt_dev,
1931                 int old_active_eps)
1932 {
1933         unsigned int bw_reserved;
1934         unsigned int max_bandwidth;
1935         unsigned int bw_used;
1936         unsigned int block_size;
1937         struct xhci_interval_bw_table *bw_table;
1938         unsigned int packet_size = 0;
1939         unsigned int overhead = 0;
1940         unsigned int packets_transmitted = 0;
1941         unsigned int packets_remaining = 0;
1942         unsigned int i;
1943
1944         if (virt_dev->udev->speed == USB_SPEED_SUPER)
1945                 return xhci_check_ss_bw(xhci, virt_dev);
1946
1947         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
1948                 max_bandwidth = HS_BW_LIMIT;
1949                 /* Convert percent of bus BW reserved to blocks reserved */
1950                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
1951         } else {
1952                 max_bandwidth = FS_BW_LIMIT;
1953                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
1954         }
1955
1956         bw_table = virt_dev->bw_table;
1957         /* We need to translate the max packet size and max ESIT payloads into
1958          * the units the hardware uses.
1959          */
1960         block_size = xhci_get_block_size(virt_dev->udev);
1961
1962         /* If we are manipulating a LS/FS device under a HS hub, double check
1963          * that the HS bus has enough bandwidth if we are activing a new TT.
1964          */
1965         if (virt_dev->tt_info) {
1966                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1967                                 virt_dev->real_port);
1968                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
1969                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
1970                                         "newly activated TT.\n");
1971                         return -ENOMEM;
1972                 }
1973                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
1974                                 virt_dev->tt_info->slot_id,
1975                                 virt_dev->tt_info->ttport);
1976         } else {
1977                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1978                                 virt_dev->real_port);
1979         }
1980
1981         /* Add in how much bandwidth will be used for interval zero, or the
1982          * rounded max ESIT payload + number of packets * largest overhead.
1983          */
1984         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
1985                 bw_table->interval_bw[0].num_packets *
1986                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
1987
1988         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
1989                 unsigned int bw_added;
1990                 unsigned int largest_mps;
1991                 unsigned int interval_overhead;
1992
1993                 /*
1994                  * How many packets could we transmit in this interval?
1995                  * If packets didn't fit in the previous interval, we will need
1996                  * to transmit that many packets twice within this interval.
1997                  */
1998                 packets_remaining = 2 * packets_remaining +
1999                         bw_table->interval_bw[i].num_packets;
2000
2001                 /* Find the largest max packet size of this or the previous
2002                  * interval.
2003                  */
2004                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2005                         largest_mps = 0;
2006                 else {
2007                         struct xhci_virt_ep *virt_ep;
2008                         struct list_head *ep_entry;
2009
2010                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2011                         virt_ep = list_entry(ep_entry,
2012                                         struct xhci_virt_ep, bw_endpoint_list);
2013                         /* Convert to blocks, rounding up */
2014                         largest_mps = DIV_ROUND_UP(
2015                                         virt_ep->bw_info.max_packet_size,
2016                                         block_size);
2017                 }
2018                 if (largest_mps > packet_size)
2019                         packet_size = largest_mps;
2020
2021                 /* Use the larger overhead of this or the previous interval. */
2022                 interval_overhead = xhci_get_largest_overhead(
2023                                 &bw_table->interval_bw[i]);
2024                 if (interval_overhead > overhead)
2025                         overhead = interval_overhead;
2026
2027                 /* How many packets can we evenly distribute across
2028                  * (1 << (i + 1)) possible scheduling opportunities?
2029                  */
2030                 packets_transmitted = packets_remaining >> (i + 1);
2031
2032                 /* Add in the bandwidth used for those scheduled packets */
2033                 bw_added = packets_transmitted * (overhead + packet_size);
2034
2035                 /* How many packets do we have remaining to transmit? */
2036                 packets_remaining = packets_remaining % (1 << (i + 1));
2037
2038                 /* What largest max packet size should those packets have? */
2039                 /* If we've transmitted all packets, don't carry over the
2040                  * largest packet size.
2041                  */
2042                 if (packets_remaining == 0) {
2043                         packet_size = 0;
2044                         overhead = 0;
2045                 } else if (packets_transmitted > 0) {
2046                         /* Otherwise if we do have remaining packets, and we've
2047                          * scheduled some packets in this interval, take the
2048                          * largest max packet size from endpoints with this
2049                          * interval.
2050                          */
2051                         packet_size = largest_mps;
2052                         overhead = interval_overhead;
2053                 }
2054                 /* Otherwise carry over packet_size and overhead from the last
2055                  * time we had a remainder.
2056                  */
2057                 bw_used += bw_added;
2058                 if (bw_used > max_bandwidth) {
2059                         xhci_warn(xhci, "Not enough bandwidth. "
2060                                         "Proposed: %u, Max: %u\n",
2061                                 bw_used, max_bandwidth);
2062                         return -ENOMEM;
2063                 }
2064         }
2065         /*
2066          * Ok, we know we have some packets left over after even-handedly
2067          * scheduling interval 15.  We don't know which microframes they will
2068          * fit into, so we over-schedule and say they will be scheduled every
2069          * microframe.
2070          */
2071         if (packets_remaining > 0)
2072                 bw_used += overhead + packet_size;
2073
2074         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2075                 unsigned int port_index = virt_dev->real_port - 1;
2076
2077                 /* OK, we're manipulating a HS device attached to a
2078                  * root port bandwidth domain.  Include the number of active TTs
2079                  * in the bandwidth used.
2080                  */
2081                 bw_used += TT_HS_OVERHEAD *
2082                         xhci->rh_bw[port_index].num_active_tts;
2083         }
2084
2085         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2086                 "Available: %u " "percent\n",
2087                 bw_used, max_bandwidth, bw_reserved,
2088                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2089                 max_bandwidth);
2090
2091         bw_used += bw_reserved;
2092         if (bw_used > max_bandwidth) {
2093                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2094                                 bw_used, max_bandwidth);
2095                 return -ENOMEM;
2096         }
2097
2098         bw_table->bw_used = bw_used;
2099         return 0;
2100 }
2101
2102 static bool xhci_is_async_ep(unsigned int ep_type)
2103 {
2104         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2105                                         ep_type != ISOC_IN_EP &&
2106                                         ep_type != INT_IN_EP);
2107 }
2108
2109 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2110 {
2111         return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2112 }
2113
2114 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2115 {
2116         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2117
2118         if (ep_bw->ep_interval == 0)
2119                 return SS_OVERHEAD_BURST +
2120                         (ep_bw->mult * ep_bw->num_packets *
2121                                         (SS_OVERHEAD + mps));
2122         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2123                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2124                                 1 << ep_bw->ep_interval);
2125
2126 }
2127
2128 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2129                 struct xhci_bw_info *ep_bw,
2130                 struct xhci_interval_bw_table *bw_table,
2131                 struct usb_device *udev,
2132                 struct xhci_virt_ep *virt_ep,
2133                 struct xhci_tt_bw_info *tt_info)
2134 {
2135         struct xhci_interval_bw *interval_bw;
2136         int normalized_interval;
2137
2138         if (xhci_is_async_ep(ep_bw->type))
2139                 return;
2140
2141         if (udev->speed == USB_SPEED_SUPER) {
2142                 if (xhci_is_sync_in_ep(ep_bw->type))
2143                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2144                                 xhci_get_ss_bw_consumed(ep_bw);
2145                 else
2146                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2147                                 xhci_get_ss_bw_consumed(ep_bw);
2148                 return;
2149         }
2150
2151         /* SuperSpeed endpoints never get added to intervals in the table, so
2152          * this check is only valid for HS/FS/LS devices.
2153          */
2154         if (list_empty(&virt_ep->bw_endpoint_list))
2155                 return;
2156         /* For LS/FS devices, we need to translate the interval expressed in
2157          * microframes to frames.
2158          */
2159         if (udev->speed == USB_SPEED_HIGH)
2160                 normalized_interval = ep_bw->ep_interval;
2161         else
2162                 normalized_interval = ep_bw->ep_interval - 3;
2163
2164         if (normalized_interval == 0)
2165                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2166         interval_bw = &bw_table->interval_bw[normalized_interval];
2167         interval_bw->num_packets -= ep_bw->num_packets;
2168         switch (udev->speed) {
2169         case USB_SPEED_LOW:
2170                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2171                 break;
2172         case USB_SPEED_FULL:
2173                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2174                 break;
2175         case USB_SPEED_HIGH:
2176                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2177                 break;
2178         case USB_SPEED_SUPER:
2179         case USB_SPEED_UNKNOWN:
2180         case USB_SPEED_WIRELESS:
2181                 /* Should never happen because only LS/FS/HS endpoints will get
2182                  * added to the endpoint list.
2183                  */
2184                 return;
2185         }
2186         if (tt_info)
2187                 tt_info->active_eps -= 1;
2188         list_del_init(&virt_ep->bw_endpoint_list);
2189 }
2190
2191 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2192                 struct xhci_bw_info *ep_bw,
2193                 struct xhci_interval_bw_table *bw_table,
2194                 struct usb_device *udev,
2195                 struct xhci_virt_ep *virt_ep,
2196                 struct xhci_tt_bw_info *tt_info)
2197 {
2198         struct xhci_interval_bw *interval_bw;
2199         struct xhci_virt_ep *smaller_ep;
2200         int normalized_interval;
2201
2202         if (xhci_is_async_ep(ep_bw->type))
2203                 return;
2204
2205         if (udev->speed == USB_SPEED_SUPER) {
2206                 if (xhci_is_sync_in_ep(ep_bw->type))
2207                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2208                                 xhci_get_ss_bw_consumed(ep_bw);
2209                 else
2210                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2211                                 xhci_get_ss_bw_consumed(ep_bw);
2212                 return;
2213         }
2214
2215         /* For LS/FS devices, we need to translate the interval expressed in
2216          * microframes to frames.
2217          */
2218         if (udev->speed == USB_SPEED_HIGH)
2219                 normalized_interval = ep_bw->ep_interval;
2220         else
2221                 normalized_interval = ep_bw->ep_interval - 3;
2222
2223         if (normalized_interval == 0)
2224                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2225         interval_bw = &bw_table->interval_bw[normalized_interval];
2226         interval_bw->num_packets += ep_bw->num_packets;
2227         switch (udev->speed) {
2228         case USB_SPEED_LOW:
2229                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2230                 break;
2231         case USB_SPEED_FULL:
2232                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2233                 break;
2234         case USB_SPEED_HIGH:
2235                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2236                 break;
2237         case USB_SPEED_SUPER:
2238         case USB_SPEED_UNKNOWN:
2239         case USB_SPEED_WIRELESS:
2240                 /* Should never happen because only LS/FS/HS endpoints will get
2241                  * added to the endpoint list.
2242                  */
2243                 return;
2244         }
2245
2246         if (tt_info)
2247                 tt_info->active_eps += 1;
2248         /* Insert the endpoint into the list, largest max packet size first. */
2249         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2250                         bw_endpoint_list) {
2251                 if (ep_bw->max_packet_size >=
2252                                 smaller_ep->bw_info.max_packet_size) {
2253                         /* Add the new ep before the smaller endpoint */
2254                         list_add_tail(&virt_ep->bw_endpoint_list,
2255                                         &smaller_ep->bw_endpoint_list);
2256                         return;
2257                 }
2258         }
2259         /* Add the new endpoint at the end of the list. */
2260         list_add_tail(&virt_ep->bw_endpoint_list,
2261                         &interval_bw->endpoints);
2262 }
2263
2264 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2265                 struct xhci_virt_device *virt_dev,
2266                 int old_active_eps)
2267 {
2268         struct xhci_root_port_bw_info *rh_bw_info;
2269         if (!virt_dev->tt_info)
2270                 return;
2271
2272         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2273         if (old_active_eps == 0 &&
2274                                 virt_dev->tt_info->active_eps != 0) {
2275                 rh_bw_info->num_active_tts += 1;
2276                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2277         } else if (old_active_eps != 0 &&
2278                                 virt_dev->tt_info->active_eps == 0) {
2279                 rh_bw_info->num_active_tts -= 1;
2280                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2281         }
2282 }
2283
2284 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2285                 struct xhci_virt_device *virt_dev,
2286                 struct xhci_container_ctx *in_ctx)
2287 {
2288         struct xhci_bw_info ep_bw_info[31];
2289         int i;
2290         struct xhci_input_control_ctx *ctrl_ctx;
2291         int old_active_eps = 0;
2292
2293         if (virt_dev->tt_info)
2294                 old_active_eps = virt_dev->tt_info->active_eps;
2295
2296         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2297
2298         for (i = 0; i < 31; i++) {
2299                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2300                         continue;
2301
2302                 /* Make a copy of the BW info in case we need to revert this */
2303                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2304                                 sizeof(ep_bw_info[i]));
2305                 /* Drop the endpoint from the interval table if the endpoint is
2306                  * being dropped or changed.
2307                  */
2308                 if (EP_IS_DROPPED(ctrl_ctx, i))
2309                         xhci_drop_ep_from_interval_table(xhci,
2310                                         &virt_dev->eps[i].bw_info,
2311                                         virt_dev->bw_table,
2312                                         virt_dev->udev,
2313                                         &virt_dev->eps[i],
2314                                         virt_dev->tt_info);
2315         }
2316         /* Overwrite the information stored in the endpoints' bw_info */
2317         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2318         for (i = 0; i < 31; i++) {
2319                 /* Add any changed or added endpoints to the interval table */
2320                 if (EP_IS_ADDED(ctrl_ctx, i))
2321                         xhci_add_ep_to_interval_table(xhci,
2322                                         &virt_dev->eps[i].bw_info,
2323                                         virt_dev->bw_table,
2324                                         virt_dev->udev,
2325                                         &virt_dev->eps[i],
2326                                         virt_dev->tt_info);
2327         }
2328
2329         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2330                 /* Ok, this fits in the bandwidth we have.
2331                  * Update the number of active TTs.
2332                  */
2333                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2334                 return 0;
2335         }
2336
2337         /* We don't have enough bandwidth for this, revert the stored info. */
2338         for (i = 0; i < 31; i++) {
2339                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2340                         continue;
2341
2342                 /* Drop the new copies of any added or changed endpoints from
2343                  * the interval table.
2344                  */
2345                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2346                         xhci_drop_ep_from_interval_table(xhci,
2347                                         &virt_dev->eps[i].bw_info,
2348                                         virt_dev->bw_table,
2349                                         virt_dev->udev,
2350                                         &virt_dev->eps[i],
2351                                         virt_dev->tt_info);
2352                 }
2353                 /* Revert the endpoint back to its old information */
2354                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2355                                 sizeof(ep_bw_info[i]));
2356                 /* Add any changed or dropped endpoints back into the table */
2357                 if (EP_IS_DROPPED(ctrl_ctx, i))
2358                         xhci_add_ep_to_interval_table(xhci,
2359                                         &virt_dev->eps[i].bw_info,
2360                                         virt_dev->bw_table,
2361                                         virt_dev->udev,
2362                                         &virt_dev->eps[i],
2363                                         virt_dev->tt_info);
2364         }
2365         return -ENOMEM;
2366 }
2367
2368
2369 /* Issue a configure endpoint command or evaluate context command
2370  * and wait for it to finish.
2371  */
2372 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2373                 struct usb_device *udev,
2374                 struct xhci_command *command,
2375                 bool ctx_change, bool must_succeed)
2376 {
2377         int ret;
2378         int timeleft;
2379         unsigned long flags;
2380         struct xhci_container_ctx *in_ctx;
2381         struct completion *cmd_completion;
2382         u32 *cmd_status;
2383         struct xhci_virt_device *virt_dev;
2384
2385         spin_lock_irqsave(&xhci->lock, flags);
2386         virt_dev = xhci->devs[udev->slot_id];
2387
2388         if (command)
2389                 in_ctx = command->in_ctx;
2390         else
2391                 in_ctx = virt_dev->in_ctx;
2392
2393         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2394                         xhci_reserve_host_resources(xhci, in_ctx)) {
2395                 spin_unlock_irqrestore(&xhci->lock, flags);
2396                 xhci_warn(xhci, "Not enough host resources, "
2397                                 "active endpoint contexts = %u\n",
2398                                 xhci->num_active_eps);
2399                 return -ENOMEM;
2400         }
2401         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2402                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2403                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2404                         xhci_free_host_resources(xhci, in_ctx);
2405                 spin_unlock_irqrestore(&xhci->lock, flags);
2406                 xhci_warn(xhci, "Not enough bandwidth\n");
2407                 return -ENOMEM;
2408         }
2409
2410         if (command) {
2411                 cmd_completion = command->completion;
2412                 cmd_status = &command->status;
2413                 command->command_trb = xhci->cmd_ring->enqueue;
2414
2415                 /* Enqueue pointer can be left pointing to the link TRB,
2416                  * we must handle that
2417                  */
2418                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2419                         command->command_trb =
2420                                 xhci->cmd_ring->enq_seg->next->trbs;
2421
2422                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2423         } else {
2424                 cmd_completion = &virt_dev->cmd_completion;
2425                 cmd_status = &virt_dev->cmd_status;
2426         }
2427         init_completion(cmd_completion);
2428
2429         if (!ctx_change)
2430                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2431                                 udev->slot_id, must_succeed);
2432         else
2433                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2434                                 udev->slot_id);
2435         if (ret < 0) {
2436                 if (command)
2437                         list_del(&command->cmd_list);
2438                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2439                         xhci_free_host_resources(xhci, in_ctx);
2440                 spin_unlock_irqrestore(&xhci->lock, flags);
2441                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2442                 return -ENOMEM;
2443         }
2444         xhci_ring_cmd_db(xhci);
2445         spin_unlock_irqrestore(&xhci->lock, flags);
2446
2447         /* Wait for the configure endpoint command to complete */
2448         timeleft = wait_for_completion_interruptible_timeout(
2449                         cmd_completion,
2450                         USB_CTRL_SET_TIMEOUT);
2451         if (timeleft <= 0) {
2452                 xhci_warn(xhci, "%s while waiting for %s command\n",
2453                                 timeleft == 0 ? "Timeout" : "Signal",
2454                                 ctx_change == 0 ?
2455                                         "configure endpoint" :
2456                                         "evaluate context");
2457                 /* FIXME cancel the configure endpoint command */
2458                 return -ETIME;
2459         }
2460
2461         if (!ctx_change)
2462                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2463         else
2464                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2465
2466         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2467                 spin_lock_irqsave(&xhci->lock, flags);
2468                 /* If the command failed, remove the reserved resources.
2469                  * Otherwise, clean up the estimate to include dropped eps.
2470                  */
2471                 if (ret)
2472                         xhci_free_host_resources(xhci, in_ctx);
2473                 else
2474                         xhci_finish_resource_reservation(xhci, in_ctx);
2475                 spin_unlock_irqrestore(&xhci->lock, flags);
2476         }
2477         return ret;
2478 }
2479
2480 /* Called after one or more calls to xhci_add_endpoint() or
2481  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2482  * to call xhci_reset_bandwidth().
2483  *
2484  * Since we are in the middle of changing either configuration or
2485  * installing a new alt setting, the USB core won't allow URBs to be
2486  * enqueued for any endpoint on the old config or interface.  Nothing
2487  * else should be touching the xhci->devs[slot_id] structure, so we
2488  * don't need to take the xhci->lock for manipulating that.
2489  */
2490 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2491 {
2492         int i;
2493         int ret = 0;
2494         struct xhci_hcd *xhci;
2495         struct xhci_virt_device *virt_dev;
2496         struct xhci_input_control_ctx *ctrl_ctx;
2497         struct xhci_slot_ctx *slot_ctx;
2498
2499         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2500         if (ret <= 0)
2501                 return ret;
2502         xhci = hcd_to_xhci(hcd);
2503         if (xhci->xhc_state & XHCI_STATE_DYING)
2504                 return -ENODEV;
2505
2506         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2507         virt_dev = xhci->devs[udev->slot_id];
2508
2509         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2510         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2511         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2512         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2513         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2514
2515         /* Don't issue the command if there's no endpoints to update. */
2516         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2517                         ctrl_ctx->drop_flags == 0)
2518                 return 0;
2519
2520         xhci_dbg(xhci, "New Input Control Context:\n");
2521         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2522         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2523                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2524
2525         ret = xhci_configure_endpoint(xhci, udev, NULL,
2526                         false, false);
2527         if (ret) {
2528                 /* Callee should call reset_bandwidth() */
2529                 return ret;
2530         }
2531
2532         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2533         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2534                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2535
2536         /* Free any rings that were dropped, but not changed. */
2537         for (i = 1; i < 31; ++i) {
2538                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2539                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2540                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2541         }
2542         xhci_zero_in_ctx(xhci, virt_dev);
2543         /*
2544          * Install any rings for completely new endpoints or changed endpoints,
2545          * and free or cache any old rings from changed endpoints.
2546          */
2547         for (i = 1; i < 31; ++i) {
2548                 if (!virt_dev->eps[i].new_ring)
2549                         continue;
2550                 /* Only cache or free the old ring if it exists.
2551                  * It may not if this is the first add of an endpoint.
2552                  */
2553                 if (virt_dev->eps[i].ring) {
2554                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2555                 }
2556                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2557                 virt_dev->eps[i].new_ring = NULL;
2558         }
2559
2560         return ret;
2561 }
2562
2563 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2564 {
2565         struct xhci_hcd *xhci;
2566         struct xhci_virt_device *virt_dev;
2567         int i, ret;
2568
2569         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2570         if (ret <= 0)
2571                 return;
2572         xhci = hcd_to_xhci(hcd);
2573
2574         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2575         virt_dev = xhci->devs[udev->slot_id];
2576         /* Free any rings allocated for added endpoints */
2577         for (i = 0; i < 31; ++i) {
2578                 if (virt_dev->eps[i].new_ring) {
2579                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2580                         virt_dev->eps[i].new_ring = NULL;
2581                 }
2582         }
2583         xhci_zero_in_ctx(xhci, virt_dev);
2584 }
2585
2586 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2587                 struct xhci_container_ctx *in_ctx,
2588                 struct xhci_container_ctx *out_ctx,
2589                 u32 add_flags, u32 drop_flags)
2590 {
2591         struct xhci_input_control_ctx *ctrl_ctx;
2592         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2593         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2594         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2595         xhci_slot_copy(xhci, in_ctx, out_ctx);
2596         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2597
2598         xhci_dbg(xhci, "Input Context:\n");
2599         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2600 }
2601
2602 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2603                 unsigned int slot_id, unsigned int ep_index,
2604                 struct xhci_dequeue_state *deq_state)
2605 {
2606         struct xhci_container_ctx *in_ctx;
2607         struct xhci_ep_ctx *ep_ctx;
2608         u32 added_ctxs;
2609         dma_addr_t addr;
2610
2611         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2612                         xhci->devs[slot_id]->out_ctx, ep_index);
2613         in_ctx = xhci->devs[slot_id]->in_ctx;
2614         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2615         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2616                         deq_state->new_deq_ptr);
2617         if (addr == 0) {
2618                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2619                                 "reset ep command\n");
2620                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2621                                 deq_state->new_deq_seg,
2622                                 deq_state->new_deq_ptr);
2623                 return;
2624         }
2625         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2626
2627         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2628         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2629                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2630 }
2631
2632 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2633                 struct usb_device *udev, unsigned int ep_index)
2634 {
2635         struct xhci_dequeue_state deq_state;
2636         struct xhci_virt_ep *ep;
2637
2638         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2639         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2640         /* We need to move the HW's dequeue pointer past this TD,
2641          * or it will attempt to resend it on the next doorbell ring.
2642          */
2643         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2644                         ep_index, ep->stopped_stream, ep->stopped_td,
2645                         &deq_state);
2646
2647         /* HW with the reset endpoint quirk will use the saved dequeue state to
2648          * issue a configure endpoint command later.
2649          */
2650         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2651                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2652                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2653                                 ep_index, ep->stopped_stream, &deq_state);
2654         } else {
2655                 /* Better hope no one uses the input context between now and the
2656                  * reset endpoint completion!
2657                  * XXX: No idea how this hardware will react when stream rings
2658                  * are enabled.
2659                  */
2660                 xhci_dbg(xhci, "Setting up input context for "
2661                                 "configure endpoint command\n");
2662                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2663                                 ep_index, &deq_state);
2664         }
2665 }
2666
2667 /* Deal with stalled endpoints.  The core should have sent the control message
2668  * to clear the halt condition.  However, we need to make the xHCI hardware
2669  * reset its sequence number, since a device will expect a sequence number of
2670  * zero after the halt condition is cleared.
2671  * Context: in_interrupt
2672  */
2673 void xhci_endpoint_reset(struct usb_hcd *hcd,
2674                 struct usb_host_endpoint *ep)
2675 {
2676         struct xhci_hcd *xhci;
2677         struct usb_device *udev;
2678         unsigned int ep_index;
2679         unsigned long flags;
2680         int ret;
2681         struct xhci_virt_ep *virt_ep;
2682
2683         xhci = hcd_to_xhci(hcd);
2684         udev = (struct usb_device *) ep->hcpriv;
2685         /* Called with a root hub endpoint (or an endpoint that wasn't added
2686          * with xhci_add_endpoint()
2687          */
2688         if (!ep->hcpriv)
2689                 return;
2690         ep_index = xhci_get_endpoint_index(&ep->desc);
2691         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2692         if (!virt_ep->stopped_td) {
2693                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2694                                 ep->desc.bEndpointAddress);
2695                 return;
2696         }
2697         if (usb_endpoint_xfer_control(&ep->desc)) {
2698                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2699                 return;
2700         }
2701
2702         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2703         spin_lock_irqsave(&xhci->lock, flags);
2704         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2705         /*
2706          * Can't change the ring dequeue pointer until it's transitioned to the
2707          * stopped state, which is only upon a successful reset endpoint
2708          * command.  Better hope that last command worked!
2709          */
2710         if (!ret) {
2711                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2712                 kfree(virt_ep->stopped_td);
2713                 xhci_ring_cmd_db(xhci);
2714         }
2715         virt_ep->stopped_td = NULL;
2716         virt_ep->stopped_trb = NULL;
2717         virt_ep->stopped_stream = 0;
2718         spin_unlock_irqrestore(&xhci->lock, flags);
2719
2720         if (ret)
2721                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2722 }
2723
2724 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2725                 struct usb_device *udev, struct usb_host_endpoint *ep,
2726                 unsigned int slot_id)
2727 {
2728         int ret;
2729         unsigned int ep_index;
2730         unsigned int ep_state;
2731
2732         if (!ep)
2733                 return -EINVAL;
2734         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2735         if (ret <= 0)
2736                 return -EINVAL;
2737         if (ep->ss_ep_comp.bmAttributes == 0) {
2738                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2739                                 " descriptor for ep 0x%x does not support streams\n",
2740                                 ep->desc.bEndpointAddress);
2741                 return -EINVAL;
2742         }
2743
2744         ep_index = xhci_get_endpoint_index(&ep->desc);
2745         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2746         if (ep_state & EP_HAS_STREAMS ||
2747                         ep_state & EP_GETTING_STREAMS) {
2748                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2749                                 "already has streams set up.\n",
2750                                 ep->desc.bEndpointAddress);
2751                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2752                                 "dynamic stream context array reallocation.\n");
2753                 return -EINVAL;
2754         }
2755         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2756                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2757                                 "endpoint 0x%x; URBs are pending.\n",
2758                                 ep->desc.bEndpointAddress);
2759                 return -EINVAL;
2760         }
2761         return 0;
2762 }
2763
2764 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2765                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2766 {
2767         unsigned int max_streams;
2768
2769         /* The stream context array size must be a power of two */
2770         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2771         /*
2772          * Find out how many primary stream array entries the host controller
2773          * supports.  Later we may use secondary stream arrays (similar to 2nd
2774          * level page entries), but that's an optional feature for xHCI host
2775          * controllers. xHCs must support at least 4 stream IDs.
2776          */
2777         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2778         if (*num_stream_ctxs > max_streams) {
2779                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2780                                 max_streams);
2781                 *num_stream_ctxs = max_streams;
2782                 *num_streams = max_streams;
2783         }
2784 }
2785
2786 /* Returns an error code if one of the endpoint already has streams.
2787  * This does not change any data structures, it only checks and gathers
2788  * information.
2789  */
2790 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2791                 struct usb_device *udev,
2792                 struct usb_host_endpoint **eps, unsigned int num_eps,
2793                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2794 {
2795         unsigned int max_streams;
2796         unsigned int endpoint_flag;
2797         int i;
2798         int ret;
2799
2800         for (i = 0; i < num_eps; i++) {
2801                 ret = xhci_check_streams_endpoint(xhci, udev,
2802                                 eps[i], udev->slot_id);
2803                 if (ret < 0)
2804                         return ret;
2805
2806                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2807                 if (max_streams < (*num_streams - 1)) {
2808                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2809                                         eps[i]->desc.bEndpointAddress,
2810                                         max_streams);
2811                         *num_streams = max_streams+1;
2812                 }
2813
2814                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2815                 if (*changed_ep_bitmask & endpoint_flag)
2816                         return -EINVAL;
2817                 *changed_ep_bitmask |= endpoint_flag;
2818         }
2819         return 0;
2820 }
2821
2822 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2823                 struct usb_device *udev,
2824                 struct usb_host_endpoint **eps, unsigned int num_eps)
2825 {
2826         u32 changed_ep_bitmask = 0;
2827         unsigned int slot_id;
2828         unsigned int ep_index;
2829         unsigned int ep_state;
2830         int i;
2831
2832         slot_id = udev->slot_id;
2833         if (!xhci->devs[slot_id])
2834                 return 0;
2835
2836         for (i = 0; i < num_eps; i++) {
2837                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2838                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2839                 /* Are streams already being freed for the endpoint? */
2840                 if (ep_state & EP_GETTING_NO_STREAMS) {
2841                         xhci_warn(xhci, "WARN Can't disable streams for "
2842                                         "endpoint 0x%x\n, "
2843                                         "streams are being disabled already.",
2844                                         eps[i]->desc.bEndpointAddress);
2845                         return 0;
2846                 }
2847                 /* Are there actually any streams to free? */
2848                 if (!(ep_state & EP_HAS_STREAMS) &&
2849                                 !(ep_state & EP_GETTING_STREAMS)) {
2850                         xhci_warn(xhci, "WARN Can't disable streams for "
2851                                         "endpoint 0x%x\n, "
2852                                         "streams are already disabled!",
2853                                         eps[i]->desc.bEndpointAddress);
2854                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2855                                         "with non-streams endpoint\n");
2856                         return 0;
2857                 }
2858                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2859         }
2860         return changed_ep_bitmask;
2861 }
2862
2863 /*
2864  * The USB device drivers use this function (though the HCD interface in USB
2865  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2866  * coordinate mass storage command queueing across multiple endpoints (basically
2867  * a stream ID == a task ID).
2868  *
2869  * Setting up streams involves allocating the same size stream context array
2870  * for each endpoint and issuing a configure endpoint command for all endpoints.
2871  *
2872  * Don't allow the call to succeed if one endpoint only supports one stream
2873  * (which means it doesn't support streams at all).
2874  *
2875  * Drivers may get less stream IDs than they asked for, if the host controller
2876  * hardware or endpoints claim they can't support the number of requested
2877  * stream IDs.
2878  */
2879 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2880                 struct usb_host_endpoint **eps, unsigned int num_eps,
2881                 unsigned int num_streams, gfp_t mem_flags)
2882 {
2883         int i, ret;
2884         struct xhci_hcd *xhci;
2885         struct xhci_virt_device *vdev;
2886         struct xhci_command *config_cmd;
2887         unsigned int ep_index;
2888         unsigned int num_stream_ctxs;
2889         unsigned long flags;
2890         u32 changed_ep_bitmask = 0;
2891
2892         if (!eps)
2893                 return -EINVAL;
2894
2895         /* Add one to the number of streams requested to account for
2896          * stream 0 that is reserved for xHCI usage.
2897          */
2898         num_streams += 1;
2899         xhci = hcd_to_xhci(hcd);
2900         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2901                         num_streams);
2902
2903         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2904         if (!config_cmd) {
2905                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2906                 return -ENOMEM;
2907         }
2908
2909         /* Check to make sure all endpoints are not already configured for
2910          * streams.  While we're at it, find the maximum number of streams that
2911          * all the endpoints will support and check for duplicate endpoints.
2912          */
2913         spin_lock_irqsave(&xhci->lock, flags);
2914         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2915                         num_eps, &num_streams, &changed_ep_bitmask);
2916         if (ret < 0) {
2917                 xhci_free_command(xhci, config_cmd);
2918                 spin_unlock_irqrestore(&xhci->lock, flags);
2919                 return ret;
2920         }
2921         if (num_streams <= 1) {
2922                 xhci_warn(xhci, "WARN: endpoints can't handle "
2923                                 "more than one stream.\n");
2924                 xhci_free_command(xhci, config_cmd);
2925                 spin_unlock_irqrestore(&xhci->lock, flags);
2926                 return -EINVAL;
2927         }
2928         vdev = xhci->devs[udev->slot_id];
2929         /* Mark each endpoint as being in transition, so
2930          * xhci_urb_enqueue() will reject all URBs.
2931          */
2932         for (i = 0; i < num_eps; i++) {
2933                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2934                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2935         }
2936         spin_unlock_irqrestore(&xhci->lock, flags);
2937
2938         /* Setup internal data structures and allocate HW data structures for
2939          * streams (but don't install the HW structures in the input context
2940          * until we're sure all memory allocation succeeded).
2941          */
2942         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2943         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2944                         num_stream_ctxs, num_streams);
2945
2946         for (i = 0; i < num_eps; i++) {
2947                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2948                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2949                                 num_stream_ctxs,
2950                                 num_streams, mem_flags);
2951                 if (!vdev->eps[ep_index].stream_info)
2952                         goto cleanup;
2953                 /* Set maxPstreams in endpoint context and update deq ptr to
2954                  * point to stream context array. FIXME
2955                  */
2956         }
2957
2958         /* Set up the input context for a configure endpoint command. */
2959         for (i = 0; i < num_eps; i++) {
2960                 struct xhci_ep_ctx *ep_ctx;
2961
2962                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2963                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2964
2965                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2966                                 vdev->out_ctx, ep_index);
2967                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2968                                 vdev->eps[ep_index].stream_info);
2969         }
2970         /* Tell the HW to drop its old copy of the endpoint context info
2971          * and add the updated copy from the input context.
2972          */
2973         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2974                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2975
2976         /* Issue and wait for the configure endpoint command */
2977         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2978                         false, false);
2979
2980         /* xHC rejected the configure endpoint command for some reason, so we
2981          * leave the old ring intact and free our internal streams data
2982          * structure.
2983          */
2984         if (ret < 0)
2985                 goto cleanup;
2986
2987         spin_lock_irqsave(&xhci->lock, flags);
2988         for (i = 0; i < num_eps; i++) {
2989                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2990                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2991                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2992                          udev->slot_id, ep_index);
2993                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2994         }
2995         xhci_free_command(xhci, config_cmd);
2996         spin_unlock_irqrestore(&xhci->lock, flags);
2997
2998         /* Subtract 1 for stream 0, which drivers can't use */
2999         return num_streams - 1;
3000
3001 cleanup:
3002         /* If it didn't work, free the streams! */
3003         for (i = 0; i < num_eps; i++) {
3004                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3005                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3006                 vdev->eps[ep_index].stream_info = NULL;
3007                 /* FIXME Unset maxPstreams in endpoint context and
3008                  * update deq ptr to point to normal string ring.
3009                  */
3010                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3011                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3012                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3013         }
3014         xhci_free_command(xhci, config_cmd);
3015         return -ENOMEM;
3016 }
3017
3018 /* Transition the endpoint from using streams to being a "normal" endpoint
3019  * without streams.
3020  *
3021  * Modify the endpoint context state, submit a configure endpoint command,
3022  * and free all endpoint rings for streams if that completes successfully.
3023  */
3024 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3025                 struct usb_host_endpoint **eps, unsigned int num_eps,
3026                 gfp_t mem_flags)
3027 {
3028         int i, ret;
3029         struct xhci_hcd *xhci;
3030         struct xhci_virt_device *vdev;
3031         struct xhci_command *command;
3032         unsigned int ep_index;
3033         unsigned long flags;
3034         u32 changed_ep_bitmask;
3035
3036         xhci = hcd_to_xhci(hcd);
3037         vdev = xhci->devs[udev->slot_id];
3038
3039         /* Set up a configure endpoint command to remove the streams rings */
3040         spin_lock_irqsave(&xhci->lock, flags);
3041         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3042                         udev, eps, num_eps);
3043         if (changed_ep_bitmask == 0) {
3044                 spin_unlock_irqrestore(&xhci->lock, flags);
3045                 return -EINVAL;
3046         }
3047
3048         /* Use the xhci_command structure from the first endpoint.  We may have
3049          * allocated too many, but the driver may call xhci_free_streams() for
3050          * each endpoint it grouped into one call to xhci_alloc_streams().
3051          */
3052         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3053         command = vdev->eps[ep_index].stream_info->free_streams_command;
3054         for (i = 0; i < num_eps; i++) {
3055                 struct xhci_ep_ctx *ep_ctx;
3056
3057                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3058                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3059                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3060                         EP_GETTING_NO_STREAMS;
3061
3062                 xhci_endpoint_copy(xhci, command->in_ctx,
3063                                 vdev->out_ctx, ep_index);
3064                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3065                                 &vdev->eps[ep_index]);
3066         }
3067         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3068                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3069         spin_unlock_irqrestore(&xhci->lock, flags);
3070
3071         /* Issue and wait for the configure endpoint command,
3072          * which must succeed.
3073          */
3074         ret = xhci_configure_endpoint(xhci, udev, command,
3075                         false, true);
3076
3077         /* xHC rejected the configure endpoint command for some reason, so we
3078          * leave the streams rings intact.
3079          */
3080         if (ret < 0)
3081                 return ret;
3082
3083         spin_lock_irqsave(&xhci->lock, flags);
3084         for (i = 0; i < num_eps; i++) {
3085                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3086                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3087                 vdev->eps[ep_index].stream_info = NULL;
3088                 /* FIXME Unset maxPstreams in endpoint context and
3089                  * update deq ptr to point to normal string ring.
3090                  */
3091                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3092                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3093         }
3094         spin_unlock_irqrestore(&xhci->lock, flags);
3095
3096         return 0;
3097 }
3098
3099 /*
3100  * Deletes endpoint resources for endpoints that were active before a Reset
3101  * Device command, or a Disable Slot command.  The Reset Device command leaves
3102  * the control endpoint intact, whereas the Disable Slot command deletes it.
3103  *
3104  * Must be called with xhci->lock held.
3105  */
3106 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3107         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3108 {
3109         int i;
3110         unsigned int num_dropped_eps = 0;
3111         unsigned int drop_flags = 0;
3112
3113         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3114                 if (virt_dev->eps[i].ring) {
3115                         drop_flags |= 1 << i;
3116                         num_dropped_eps++;
3117                 }
3118         }
3119         xhci->num_active_eps -= num_dropped_eps;
3120         if (num_dropped_eps)
3121                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3122                                 "%u now active.\n",
3123                                 num_dropped_eps, drop_flags,
3124                                 xhci->num_active_eps);
3125 }
3126
3127 /*
3128  * This submits a Reset Device Command, which will set the device state to 0,
3129  * set the device address to 0, and disable all the endpoints except the default
3130  * control endpoint.  The USB core should come back and call
3131  * xhci_address_device(), and then re-set up the configuration.  If this is
3132  * called because of a usb_reset_and_verify_device(), then the old alternate
3133  * settings will be re-installed through the normal bandwidth allocation
3134  * functions.
3135  *
3136  * Wait for the Reset Device command to finish.  Remove all structures
3137  * associated with the endpoints that were disabled.  Clear the input device
3138  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3139  *
3140  * If the virt_dev to be reset does not exist or does not match the udev,
3141  * it means the device is lost, possibly due to the xHC restore error and
3142  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3143  * re-allocate the device.
3144  */
3145 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3146 {
3147         int ret, i;
3148         unsigned long flags;
3149         struct xhci_hcd *xhci;
3150         unsigned int slot_id;
3151         struct xhci_virt_device *virt_dev;
3152         struct xhci_command *reset_device_cmd;
3153         int timeleft;
3154         int last_freed_endpoint;
3155         struct xhci_slot_ctx *slot_ctx;
3156         int old_active_eps = 0;
3157
3158         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3159         if (ret <= 0)
3160                 return ret;
3161         xhci = hcd_to_xhci(hcd);
3162         slot_id = udev->slot_id;
3163         virt_dev = xhci->devs[slot_id];
3164         if (!virt_dev) {
3165                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3166                                 "not exist. Re-allocate the device\n", slot_id);
3167                 ret = xhci_alloc_dev(hcd, udev);
3168                 if (ret == 1)
3169                         return 0;
3170                 else
3171                         return -EINVAL;
3172         }
3173
3174         if (virt_dev->udev != udev) {
3175                 /* If the virt_dev and the udev does not match, this virt_dev
3176                  * may belong to another udev.
3177                  * Re-allocate the device.
3178                  */
3179                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3180                                 "not match the udev. Re-allocate the device\n",
3181                                 slot_id);
3182                 ret = xhci_alloc_dev(hcd, udev);
3183                 if (ret == 1)
3184                         return 0;
3185                 else
3186                         return -EINVAL;
3187         }
3188
3189         /* If device is not setup, there is no point in resetting it */
3190         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3191         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3192                                                 SLOT_STATE_DISABLED)
3193                 return 0;
3194
3195         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3196         /* Allocate the command structure that holds the struct completion.
3197          * Assume we're in process context, since the normal device reset
3198          * process has to wait for the device anyway.  Storage devices are
3199          * reset as part of error handling, so use GFP_NOIO instead of
3200          * GFP_KERNEL.
3201          */
3202         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3203         if (!reset_device_cmd) {
3204                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3205                 return -ENOMEM;
3206         }
3207
3208         /* Attempt to submit the Reset Device command to the command ring */
3209         spin_lock_irqsave(&xhci->lock, flags);
3210         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3211
3212         /* Enqueue pointer can be left pointing to the link TRB,
3213          * we must handle that
3214          */
3215         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3216                 reset_device_cmd->command_trb =
3217                         xhci->cmd_ring->enq_seg->next->trbs;
3218
3219         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3220         ret = xhci_queue_reset_device(xhci, slot_id);
3221         if (ret) {
3222                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3223                 list_del(&reset_device_cmd->cmd_list);
3224                 spin_unlock_irqrestore(&xhci->lock, flags);
3225                 goto command_cleanup;
3226         }
3227         xhci_ring_cmd_db(xhci);
3228         spin_unlock_irqrestore(&xhci->lock, flags);
3229
3230         /* Wait for the Reset Device command to finish */
3231         timeleft = wait_for_completion_interruptible_timeout(
3232                         reset_device_cmd->completion,
3233                         USB_CTRL_SET_TIMEOUT);
3234         if (timeleft <= 0) {
3235                 xhci_warn(xhci, "%s while waiting for reset device command\n",
3236                                 timeleft == 0 ? "Timeout" : "Signal");
3237                 spin_lock_irqsave(&xhci->lock, flags);
3238                 /* The timeout might have raced with the event ring handler, so
3239                  * only delete from the list if the item isn't poisoned.
3240                  */
3241                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3242                         list_del(&reset_device_cmd->cmd_list);
3243                 spin_unlock_irqrestore(&xhci->lock, flags);
3244                 ret = -ETIME;
3245                 goto command_cleanup;
3246         }
3247
3248         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3249          * unless we tried to reset a slot ID that wasn't enabled,
3250          * or the device wasn't in the addressed or configured state.
3251          */
3252         ret = reset_device_cmd->status;
3253         switch (ret) {
3254         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3255         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3256                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3257                                 slot_id,
3258                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3259                 xhci_info(xhci, "Not freeing device rings.\n");
3260                 /* Don't treat this as an error.  May change my mind later. */
3261                 ret = 0;
3262                 goto command_cleanup;
3263         case COMP_SUCCESS:
3264                 xhci_dbg(xhci, "Successful reset device command.\n");
3265                 break;
3266         default:
3267                 if (xhci_is_vendor_info_code(xhci, ret))
3268                         break;
3269                 xhci_warn(xhci, "Unknown completion code %u for "
3270                                 "reset device command.\n", ret);
3271                 ret = -EINVAL;
3272                 goto command_cleanup;
3273         }
3274
3275         /* Free up host controller endpoint resources */
3276         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3277                 spin_lock_irqsave(&xhci->lock, flags);
3278                 /* Don't delete the default control endpoint resources */
3279                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3280                 spin_unlock_irqrestore(&xhci->lock, flags);
3281         }
3282
3283         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3284         last_freed_endpoint = 1;
3285         for (i = 1; i < 31; ++i) {
3286                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3287
3288                 if (ep->ep_state & EP_HAS_STREAMS) {
3289                         xhci_free_stream_info(xhci, ep->stream_info);
3290                         ep->stream_info = NULL;
3291                         ep->ep_state &= ~EP_HAS_STREAMS;
3292                 }
3293
3294                 if (ep->ring) {
3295                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3296                         last_freed_endpoint = i;
3297                 }
3298                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3299                         xhci_drop_ep_from_interval_table(xhci,
3300                                         &virt_dev->eps[i].bw_info,
3301                                         virt_dev->bw_table,
3302                                         udev,
3303                                         &virt_dev->eps[i],
3304                                         virt_dev->tt_info);
3305                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3306         }
3307         /* If necessary, update the number of active TTs on this root port */
3308         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3309
3310         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3311         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3312         ret = 0;
3313
3314 command_cleanup:
3315         xhci_free_command(xhci, reset_device_cmd);
3316         return ret;
3317 }
3318
3319 /*
3320  * At this point, the struct usb_device is about to go away, the device has
3321  * disconnected, and all traffic has been stopped and the endpoints have been
3322  * disabled.  Free any HC data structures associated with that device.
3323  */
3324 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3325 {
3326         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3327         struct xhci_virt_device *virt_dev;
3328         unsigned long flags;
3329         u32 state;
3330         int i, ret;
3331
3332         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3333         /* If the host is halted due to driver unload, we still need to free the
3334          * device.
3335          */
3336         if (ret <= 0 && ret != -ENODEV)
3337                 return;
3338
3339         virt_dev = xhci->devs[udev->slot_id];
3340
3341         /* Stop any wayward timer functions (which may grab the lock) */
3342         for (i = 0; i < 31; ++i) {
3343                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3344                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3345         }
3346
3347         if (udev->usb2_hw_lpm_enabled) {
3348                 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3349                 udev->usb2_hw_lpm_enabled = 0;
3350         }
3351
3352         spin_lock_irqsave(&xhci->lock, flags);
3353         /* Don't disable the slot if the host controller is dead. */
3354         state = xhci_readl(xhci, &xhci->op_regs->status);
3355         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3356                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3357                 xhci_free_virt_device(xhci, udev->slot_id);
3358                 spin_unlock_irqrestore(&xhci->lock, flags);
3359                 return;
3360         }
3361
3362         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3363                 spin_unlock_irqrestore(&xhci->lock, flags);
3364                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3365                 return;
3366         }
3367         xhci_ring_cmd_db(xhci);
3368         spin_unlock_irqrestore(&xhci->lock, flags);
3369         /*
3370          * Event command completion handler will free any data structures
3371          * associated with the slot.  XXX Can free sleep?
3372          */
3373 }
3374
3375 /*
3376  * Checks if we have enough host controller resources for the default control
3377  * endpoint.
3378  *
3379  * Must be called with xhci->lock held.
3380  */
3381 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3382 {
3383         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3384                 xhci_dbg(xhci, "Not enough ep ctxs: "
3385                                 "%u active, need to add 1, limit is %u.\n",
3386                                 xhci->num_active_eps, xhci->limit_active_eps);
3387                 return -ENOMEM;
3388         }
3389         xhci->num_active_eps += 1;
3390         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3391                         xhci->num_active_eps);
3392         return 0;
3393 }
3394
3395
3396 /*
3397  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3398  * timed out, or allocating memory failed.  Returns 1 on success.
3399  */
3400 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3401 {
3402         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3403         unsigned long flags;
3404         int timeleft;
3405         int ret;
3406
3407         spin_lock_irqsave(&xhci->lock, flags);
3408         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3409         if (ret) {
3410                 spin_unlock_irqrestore(&xhci->lock, flags);
3411                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3412                 return 0;
3413         }
3414         xhci_ring_cmd_db(xhci);
3415         spin_unlock_irqrestore(&xhci->lock, flags);
3416
3417         /* XXX: how much time for xHC slot assignment? */
3418         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3419                         USB_CTRL_SET_TIMEOUT);
3420         if (timeleft <= 0) {
3421                 xhci_warn(xhci, "%s while waiting for a slot\n",
3422                                 timeleft == 0 ? "Timeout" : "Signal");
3423                 /* FIXME cancel the enable slot request */
3424                 return 0;
3425         }
3426
3427         if (!xhci->slot_id) {
3428                 xhci_err(xhci, "Error while assigning device slot ID\n");
3429                 return 0;
3430         }
3431
3432         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3433                 spin_lock_irqsave(&xhci->lock, flags);
3434                 ret = xhci_reserve_host_control_ep_resources(xhci);
3435                 if (ret) {
3436                         spin_unlock_irqrestore(&xhci->lock, flags);
3437                         xhci_warn(xhci, "Not enough host resources, "
3438                                         "active endpoint contexts = %u\n",
3439                                         xhci->num_active_eps);
3440                         goto disable_slot;
3441                 }
3442                 spin_unlock_irqrestore(&xhci->lock, flags);
3443         }
3444         /* Use GFP_NOIO, since this function can be called from
3445          * xhci_discover_or_reset_device(), which may be called as part of
3446          * mass storage driver error handling.
3447          */
3448         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3449                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3450                 goto disable_slot;
3451         }
3452         udev->slot_id = xhci->slot_id;
3453         /* Is this a LS or FS device under a HS hub? */
3454         /* Hub or peripherial? */
3455         return 1;
3456
3457 disable_slot:
3458         /* Disable slot, if we can do it without mem alloc */
3459         spin_lock_irqsave(&xhci->lock, flags);
3460         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3461                 xhci_ring_cmd_db(xhci);
3462         spin_unlock_irqrestore(&xhci->lock, flags);
3463         return 0;
3464 }
3465
3466 /*
3467  * Issue an Address Device command (which will issue a SetAddress request to
3468  * the device).
3469  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3470  * we should only issue and wait on one address command at the same time.
3471  *
3472  * We add one to the device address issued by the hardware because the USB core
3473  * uses address 1 for the root hubs (even though they're not really devices).
3474  */
3475 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3476 {
3477         unsigned long flags;
3478         int timeleft;
3479         struct xhci_virt_device *virt_dev;
3480         int ret = 0;
3481         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3482         struct xhci_slot_ctx *slot_ctx;
3483         struct xhci_input_control_ctx *ctrl_ctx;
3484         u64 temp_64;
3485
3486         if (!udev->slot_id) {
3487                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3488                 return -EINVAL;
3489         }
3490
3491         virt_dev = xhci->devs[udev->slot_id];
3492
3493         if (WARN_ON(!virt_dev)) {
3494                 /*
3495                  * In plug/unplug torture test with an NEC controller,
3496                  * a zero-dereference was observed once due to virt_dev = 0.
3497                  * Print useful debug rather than crash if it is observed again!
3498                  */
3499                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3500                         udev->slot_id);
3501                 return -EINVAL;
3502         }
3503
3504         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3505         /*
3506          * If this is the first Set Address since device plug-in or
3507          * virt_device realloaction after a resume with an xHCI power loss,
3508          * then set up the slot context.
3509          */
3510         if (!slot_ctx->dev_info)
3511                 xhci_setup_addressable_virt_dev(xhci, udev);
3512         /* Otherwise, update the control endpoint ring enqueue pointer. */
3513         else
3514                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3515         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3516         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3517         ctrl_ctx->drop_flags = 0;
3518
3519         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3520         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3521
3522         spin_lock_irqsave(&xhci->lock, flags);
3523         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3524                                         udev->slot_id);
3525         if (ret) {
3526                 spin_unlock_irqrestore(&xhci->lock, flags);
3527                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3528                 return ret;
3529         }
3530         xhci_ring_cmd_db(xhci);
3531         spin_unlock_irqrestore(&xhci->lock, flags);
3532
3533         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3534         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3535                         USB_CTRL_SET_TIMEOUT);
3536         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3537          * the SetAddress() "recovery interval" required by USB and aborting the
3538          * command on a timeout.
3539          */
3540         if (timeleft <= 0) {
3541                 xhci_warn(xhci, "%s while waiting for address device command\n",
3542                                 timeleft == 0 ? "Timeout" : "Signal");
3543                 /* FIXME cancel the address device command */
3544                 return -ETIME;
3545         }
3546
3547         switch (virt_dev->cmd_status) {
3548         case COMP_CTX_STATE:
3549         case COMP_EBADSLT:
3550                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3551                                 udev->slot_id);
3552                 ret = -EINVAL;
3553                 break;
3554         case COMP_TX_ERR:
3555                 dev_warn(&udev->dev, "Device not responding to set address.\n");
3556                 ret = -EPROTO;
3557                 break;
3558         case COMP_DEV_ERR:
3559                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3560                                 "device command.\n");
3561                 ret = -ENODEV;
3562                 break;
3563         case COMP_SUCCESS:
3564                 xhci_dbg(xhci, "Successful Address Device command\n");
3565                 break;
3566         default:
3567                 xhci_err(xhci, "ERROR: unexpected command completion "
3568                                 "code 0x%x.\n", virt_dev->cmd_status);
3569                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3570                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3571                 ret = -EINVAL;
3572                 break;
3573         }
3574         if (ret) {
3575                 return ret;
3576         }
3577         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3578         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3579         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3580                  udev->slot_id,
3581                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3582                  (unsigned long long)
3583                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3584         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3585                         (unsigned long long)virt_dev->out_ctx->dma);
3586         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3587         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3588         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3589         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3590         /*
3591          * USB core uses address 1 for the roothubs, so we add one to the
3592          * address given back to us by the HC.
3593          */
3594         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3595         /* Use kernel assigned address for devices; store xHC assigned
3596          * address locally. */
3597         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3598                 + 1;
3599         /* Zero the input context control for later use */
3600         ctrl_ctx->add_flags = 0;
3601         ctrl_ctx->drop_flags = 0;
3602
3603         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3604
3605         return 0;
3606 }
3607
3608 #ifdef CONFIG_USB_SUSPEND
3609
3610 /* BESL to HIRD Encoding array for USB2 LPM */
3611 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3612         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3613
3614 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3615 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3616 {
3617         int hird;
3618
3619         if (use_besl) {
3620                 for (hird = 0; hird < 16; hird++) {
3621                         if (xhci_besl_encoding[hird] >= u2del)
3622                                 break;
3623                 }
3624         } else {
3625                 if (u2del <= 50)
3626                         hird = 0;
3627                 else
3628                         hird = (u2del - 51) / 75 + 1;
3629
3630                 if (hird > 15)
3631                         hird = 15;
3632         }
3633
3634         return hird;
3635 }
3636
3637 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3638                                         struct usb_device *udev)
3639 {
3640         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3641         struct dev_info *dev_info;
3642         __le32 __iomem  **port_array;
3643         __le32 __iomem  *addr, *pm_addr;
3644         u32             temp, dev_id;
3645         unsigned int    port_num;
3646         unsigned long   flags;
3647         int             u2del, hird;
3648         int             ret;
3649
3650         if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3651                         !udev->lpm_capable)
3652                 return -EINVAL;
3653
3654         /* we only support lpm for non-hub device connected to root hub yet */
3655         if (!udev->parent || udev->parent->parent ||
3656                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3657                 return -EINVAL;
3658
3659         spin_lock_irqsave(&xhci->lock, flags);
3660
3661         /* Look for devices in lpm_failed_devs list */
3662         dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3663                         le16_to_cpu(udev->descriptor.idProduct);
3664         list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3665                 if (dev_info->dev_id == dev_id) {
3666                         ret = -EINVAL;
3667                         goto finish;
3668                 }
3669         }
3670
3671         port_array = xhci->usb2_ports;
3672         port_num = udev->portnum - 1;
3673
3674         if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3675                 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3676                 ret = -EINVAL;
3677                 goto finish;
3678         }
3679
3680         /*
3681          * Test USB 2.0 software LPM.
3682          * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3683          * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3684          * in the June 2011 errata release.
3685          */
3686         xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3687         /*
3688          * Set L1 Device Slot and HIRD/BESL.
3689          * Check device's USB 2.0 extension descriptor to determine whether
3690          * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3691          */
3692         pm_addr = port_array[port_num] + 1;
3693         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3694         if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3695                 hird = xhci_calculate_hird_besl(u2del, 1);
3696         else
3697                 hird = xhci_calculate_hird_besl(u2del, 0);
3698
3699         temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3700         xhci_writel(xhci, temp, pm_addr);
3701
3702         /* Set port link state to U2(L1) */
3703         addr = port_array[port_num];
3704         xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3705
3706         /* wait for ACK */
3707         spin_unlock_irqrestore(&xhci->lock, flags);
3708         msleep(10);
3709         spin_lock_irqsave(&xhci->lock, flags);
3710
3711         /* Check L1 Status */
3712         ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3713         if (ret != -ETIMEDOUT) {
3714                 /* enter L1 successfully */
3715                 temp = xhci_readl(xhci, addr);
3716                 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3717                                 port_num, temp);
3718                 ret = 0;
3719         } else {
3720                 temp = xhci_readl(xhci, pm_addr);
3721                 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3722                                 port_num, temp & PORT_L1S_MASK);
3723                 ret = -EINVAL;
3724         }
3725
3726         /* Resume the port */
3727         xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3728
3729         spin_unlock_irqrestore(&xhci->lock, flags);
3730         msleep(10);
3731         spin_lock_irqsave(&xhci->lock, flags);
3732
3733         /* Clear PLC */
3734         xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3735
3736         /* Check PORTSC to make sure the device is in the right state */
3737         if (!ret) {
3738                 temp = xhci_readl(xhci, addr);
3739                 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3740                 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3741                                 (temp & PORT_PLS_MASK) != XDEV_U0) {
3742                         xhci_dbg(xhci, "port L1 resume fail\n");
3743                         ret = -EINVAL;
3744                 }
3745         }
3746
3747         if (ret) {
3748                 /* Insert dev to lpm_failed_devs list */
3749                 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3750                                 "re-enumerate\n");
3751                 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3752                 if (!dev_info) {
3753                         ret = -ENOMEM;
3754                         goto finish;
3755                 }
3756                 dev_info->dev_id = dev_id;
3757                 INIT_LIST_HEAD(&dev_info->list);
3758                 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3759         } else {
3760                 xhci_ring_device(xhci, udev->slot_id);
3761         }
3762
3763 finish:
3764         spin_unlock_irqrestore(&xhci->lock, flags);
3765         return ret;
3766 }
3767
3768 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3769                         struct usb_device *udev, int enable)
3770 {
3771         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3772         __le32 __iomem  **port_array;
3773         __le32 __iomem  *pm_addr;
3774         u32             temp;
3775         unsigned int    port_num;
3776         unsigned long   flags;
3777         int             u2del, hird;
3778
3779         if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3780                         !udev->lpm_capable)
3781                 return -EPERM;
3782
3783         if (!udev->parent || udev->parent->parent ||
3784                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3785                 return -EPERM;
3786
3787         if (udev->usb2_hw_lpm_capable != 1)
3788                 return -EPERM;
3789
3790         spin_lock_irqsave(&xhci->lock, flags);
3791
3792         port_array = xhci->usb2_ports;
3793         port_num = udev->portnum - 1;
3794         pm_addr = port_array[port_num] + 1;
3795         temp = xhci_readl(xhci, pm_addr);
3796
3797         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3798                         enable ? "enable" : "disable", port_num);
3799
3800         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3801         if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3802                 hird = xhci_calculate_hird_besl(u2del, 1);
3803         else
3804                 hird = xhci_calculate_hird_besl(u2del, 0);
3805
3806         if (enable) {
3807                 temp &= ~PORT_HIRD_MASK;
3808                 temp |= PORT_HIRD(hird) | PORT_RWE;
3809                 xhci_writel(xhci, temp, pm_addr);
3810                 temp = xhci_readl(xhci, pm_addr);
3811                 temp |= PORT_HLE;
3812                 xhci_writel(xhci, temp, pm_addr);
3813         } else {
3814                 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3815                 xhci_writel(xhci, temp, pm_addr);
3816         }
3817
3818         spin_unlock_irqrestore(&xhci->lock, flags);
3819         return 0;
3820 }
3821
3822 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3823 {
3824         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3825         int             ret;
3826
3827         ret = xhci_usb2_software_lpm_test(hcd, udev);
3828         if (!ret) {
3829                 xhci_dbg(xhci, "software LPM test succeed\n");
3830                 if (xhci->hw_lpm_support == 1) {
3831                         udev->usb2_hw_lpm_capable = 1;
3832                         ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3833                         if (!ret)
3834                                 udev->usb2_hw_lpm_enabled = 1;
3835                 }
3836         }
3837
3838         return 0;
3839 }
3840
3841 #else
3842
3843 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3844                                 struct usb_device *udev, int enable)
3845 {
3846         return 0;
3847 }
3848
3849 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3850 {
3851         return 0;
3852 }
3853
3854 #endif /* CONFIG_USB_SUSPEND */
3855
3856 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3857  * internal data structures for the device.
3858  */
3859 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
3860                         struct usb_tt *tt, gfp_t mem_flags)
3861 {
3862         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3863         struct xhci_virt_device *vdev;
3864         struct xhci_command *config_cmd;
3865         struct xhci_input_control_ctx *ctrl_ctx;
3866         struct xhci_slot_ctx *slot_ctx;
3867         unsigned long flags;
3868         unsigned think_time;
3869         int ret;
3870
3871         /* Ignore root hubs */
3872         if (!hdev->parent)
3873                 return 0;
3874
3875         vdev = xhci->devs[hdev->slot_id];
3876         if (!vdev) {
3877                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
3878                 return -EINVAL;
3879         }
3880         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3881         if (!config_cmd) {
3882                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3883                 return -ENOMEM;
3884         }
3885
3886         spin_lock_irqsave(&xhci->lock, flags);
3887         if (hdev->speed == USB_SPEED_HIGH &&
3888                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
3889                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
3890                 xhci_free_command(xhci, config_cmd);
3891                 spin_unlock_irqrestore(&xhci->lock, flags);
3892                 return -ENOMEM;
3893         }
3894
3895         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
3896         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3897         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3898         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
3899         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
3900         if (tt->multi)
3901                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
3902         if (xhci->hci_version > 0x95) {
3903                 xhci_dbg(xhci, "xHCI version %x needs hub "
3904                                 "TT think time and number of ports\n",
3905                                 (unsigned int) xhci->hci_version);
3906                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
3907                 /* Set TT think time - convert from ns to FS bit times.
3908                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
3909                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
3910                  *
3911                  * xHCI 1.0: this field shall be 0 if the device is not a
3912                  * High-spped hub.
3913                  */
3914                 think_time = tt->think_time;
3915                 if (think_time != 0)
3916                         think_time = (think_time / 666) - 1;
3917                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3918                         slot_ctx->tt_info |=
3919                                 cpu_to_le32(TT_THINK_TIME(think_time));
3920         } else {
3921                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3922                                 "TT think time or number of ports\n",
3923                                 (unsigned int) xhci->hci_version);
3924         }
3925         slot_ctx->dev_state = 0;
3926         spin_unlock_irqrestore(&xhci->lock, flags);
3927
3928         xhci_dbg(xhci, "Set up %s for hub device.\n",
3929                         (xhci->hci_version > 0x95) ?
3930                         "configure endpoint" : "evaluate context");
3931         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3932         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3933
3934         /* Issue and wait for the configure endpoint or
3935          * evaluate context command.
3936          */
3937         if (xhci->hci_version > 0x95)
3938                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3939                                 false, false);
3940         else
3941                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3942                                 true, false);
3943
3944         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3945         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3946
3947         xhci_free_command(xhci, config_cmd);
3948         return ret;
3949 }
3950
3951 int xhci_get_frame(struct usb_hcd *hcd)
3952 {
3953         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3954         /* EHCI mods by the periodic size.  Why? */
3955         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3956 }
3957
3958 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
3959 {
3960         struct xhci_hcd         *xhci;
3961         struct device           *dev = hcd->self.controller;
3962         int                     retval;
3963         u32                     temp;
3964
3965         hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
3966
3967         if (usb_hcd_is_primary_hcd(hcd)) {
3968                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
3969                 if (!xhci)
3970                         return -ENOMEM;
3971                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
3972                 xhci->main_hcd = hcd;
3973                 /* Mark the first roothub as being USB 2.0.
3974                  * The xHCI driver will register the USB 3.0 roothub.
3975                  */
3976                 hcd->speed = HCD_USB2;
3977                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
3978                 /*
3979                  * USB 2.0 roothub under xHCI has an integrated TT,
3980                  * (rate matching hub) as opposed to having an OHCI/UHCI
3981                  * companion controller.
3982                  */
3983                 hcd->has_tt = 1;
3984         } else {
3985                 /* xHCI private pointer was set in xhci_pci_probe for the second
3986                  * registered roothub.
3987                  */
3988                 xhci = hcd_to_xhci(hcd);
3989                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
3990                 if (HCC_64BIT_ADDR(temp)) {
3991                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
3992                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
3993                 } else {
3994                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
3995                 }
3996                 return 0;
3997         }
3998
3999         xhci->cap_regs = hcd->regs;
4000         xhci->op_regs = hcd->regs +
4001                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4002         xhci->run_regs = hcd->regs +
4003                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4004         /* Cache read-only capability registers */
4005         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4006         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4007         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4008         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4009         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4010         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4011         xhci_print_registers(xhci);
4012
4013         get_quirks(dev, xhci);
4014
4015         /* Make sure the HC is halted. */
4016         retval = xhci_halt(xhci);
4017         if (retval)
4018                 goto error;
4019
4020         xhci_dbg(xhci, "Resetting HCD\n");
4021         /* Reset the internal HC memory state and registers. */
4022         retval = xhci_reset(xhci);
4023         if (retval)
4024                 goto error;
4025         xhci_dbg(xhci, "Reset complete\n");
4026
4027         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4028         if (HCC_64BIT_ADDR(temp)) {
4029                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4030                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4031         } else {
4032                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4033         }
4034
4035         xhci_dbg(xhci, "Calling HCD init\n");
4036         /* Initialize HCD and host controller data structures. */
4037         retval = xhci_init(hcd);
4038         if (retval)
4039                 goto error;
4040         xhci_dbg(xhci, "Called HCD init\n");
4041         return 0;
4042 error:
4043         kfree(xhci);
4044         return retval;
4045 }
4046
4047 MODULE_DESCRIPTION(DRIVER_DESC);
4048 MODULE_AUTHOR(DRIVER_AUTHOR);
4049 MODULE_LICENSE("GPL");
4050
4051 static int __init xhci_hcd_init(void)
4052 {
4053         int retval;
4054
4055         retval = xhci_register_pci();
4056         if (retval < 0) {
4057                 printk(KERN_DEBUG "Problem registering PCI driver.");
4058                 return retval;
4059         }
4060         /*
4061          * Check the compiler generated sizes of structures that must be laid
4062          * out in specific ways for hardware access.
4063          */
4064         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4065         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4066         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4067         /* xhci_device_control has eight fields, and also
4068          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4069          */
4070         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4071         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4072         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4073         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4074         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4075         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4076         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4077         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4078         return 0;
4079 }
4080 module_init(xhci_hcd_init);
4081
4082 static void __exit xhci_hcd_cleanup(void)
4083 {
4084         xhci_unregister_pci();
4085 }
4086 module_exit(xhci_hcd_cleanup);