2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56 u32 mask, u32 done, int usec)
61 result = xhci_readl(xhci, ptr);
62 if (result == ~(u32)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd *xhci)
83 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
87 cmd = xhci_readl(xhci, &xhci->op_regs->command);
89 xhci_writel(xhci, cmd, &xhci->op_regs->command);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd *xhci)
103 xhci_dbg(xhci, "// Halt the HC\n");
106 ret = handshake(xhci, &xhci->op_regs->status,
107 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109 xhci->xhc_state |= XHCI_STATE_HALTED;
110 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
112 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd *xhci)
125 temp = xhci_readl(xhci, &xhci->op_regs->command);
127 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci, temp, &xhci->op_regs->command);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret = handshake(xhci, &xhci->op_regs->status,
136 STS_HALT, 0, XHCI_MAX_HALT_USEC);
137 if (ret == -ETIMEDOUT)
138 xhci_err(xhci, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci->xhc_state &= ~XHCI_STATE_HALTED;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd *xhci)
159 state = xhci_readl(xhci, &xhci->op_regs->status);
160 if ((state & STS_HALT) == 0) {
161 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci, "// Reset the HC\n");
166 command = xhci_readl(xhci, &xhci->op_regs->command);
167 command |= CMD_RESET;
168 xhci_writel(xhci, command, &xhci->op_regs->command);
170 ret = handshake(xhci, &xhci->op_regs->command,
171 CMD_RESET, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 return handshake(xhci, &xhci->op_regs->status,
181 STS_CNR, 0, 10 * 1000 * 1000);
185 static int xhci_free_msi(struct xhci_hcd *xhci)
189 if (!xhci->msix_entries)
192 for (i = 0; i < xhci->msix_count; i++)
193 if (xhci->msix_entries[i].vector)
194 free_irq(xhci->msix_entries[i].vector,
202 static int xhci_setup_msi(struct xhci_hcd *xhci)
205 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
207 ret = pci_enable_msi(pdev);
209 xhci_dbg(xhci, "failed to allocate MSI entry\n");
213 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
214 0, "xhci_hcd", xhci_to_hcd(xhci));
216 xhci_dbg(xhci, "disable MSI interrupt\n");
217 pci_disable_msi(pdev);
225 * free all IRQs request
227 static void xhci_free_irq(struct xhci_hcd *xhci)
229 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
232 /* return if using legacy interrupt */
233 if (xhci_to_hcd(xhci)->irq >= 0)
236 ret = xhci_free_msi(xhci);
240 free_irq(pdev->irq, xhci_to_hcd(xhci));
248 static int xhci_setup_msix(struct xhci_hcd *xhci)
251 struct usb_hcd *hcd = xhci_to_hcd(xhci);
252 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
255 * calculate number of msi-x vectors supported.
256 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
257 * with max number of interrupters based on the xhci HCSPARAMS1.
258 * - num_online_cpus: maximum msi-x vectors per CPUs core.
259 * Add additional 1 vector to ensure always available interrupt.
261 xhci->msix_count = min(num_online_cpus() + 1,
262 HCS_MAX_INTRS(xhci->hcs_params1));
265 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
267 if (!xhci->msix_entries) {
268 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
272 for (i = 0; i < xhci->msix_count; i++) {
273 xhci->msix_entries[i].entry = i;
274 xhci->msix_entries[i].vector = 0;
277 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
279 xhci_dbg(xhci, "Failed to enable MSI-X\n");
283 for (i = 0; i < xhci->msix_count; i++) {
284 ret = request_irq(xhci->msix_entries[i].vector,
285 (irq_handler_t)xhci_msi_irq,
286 0, "xhci_hcd", xhci_to_hcd(xhci));
291 hcd->msix_enabled = 1;
295 xhci_dbg(xhci, "disable MSI-X interrupt\n");
297 pci_disable_msix(pdev);
299 kfree(xhci->msix_entries);
300 xhci->msix_entries = NULL;
304 /* Free any IRQs and disable MSI-X */
305 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
307 struct usb_hcd *hcd = xhci_to_hcd(xhci);
308 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
312 if (xhci->msix_entries) {
313 pci_disable_msix(pdev);
314 kfree(xhci->msix_entries);
315 xhci->msix_entries = NULL;
317 pci_disable_msi(pdev);
320 hcd->msix_enabled = 0;
324 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
328 if (xhci->msix_entries) {
329 for (i = 0; i < xhci->msix_count; i++)
330 synchronize_irq(xhci->msix_entries[i].vector);
334 static int xhci_try_enable_msi(struct usb_hcd *hcd)
336 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
337 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
341 * Some Fresco Logic host controllers advertise MSI, but fail to
342 * generate interrupts. Don't even try to enable MSI.
344 if (xhci->quirks & XHCI_BROKEN_MSI)
347 /* unregister the legacy interrupt */
349 free_irq(hcd->irq, hcd);
352 ret = xhci_setup_msix(xhci);
354 /* fall back to msi*/
355 ret = xhci_setup_msi(xhci);
358 /* hcd->irq is -1, we have MSI */
362 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
367 /* fall back to legacy interrupt*/
368 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
369 hcd->irq_descr, hcd);
371 xhci_err(xhci, "request interrupt %d failed\n",
375 hcd->irq = pdev->irq;
381 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
386 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
390 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
396 static void compliance_mode_recovery(unsigned long arg)
398 struct xhci_hcd *xhci;
403 xhci = (struct xhci_hcd *)arg;
405 for (i = 0; i < xhci->num_usb3_ports; i++) {
406 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
407 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
409 * Compliance Mode Detected. Letting USB Core
410 * handle the Warm Reset
412 xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
414 xhci_dbg(xhci, "Attempting Recovery routine!\n");
415 hcd = xhci->shared_hcd;
417 if (hcd->state == HC_STATE_SUSPENDED)
418 usb_hcd_resume_root_hub(hcd);
420 usb_hcd_poll_rh_status(hcd);
424 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
425 mod_timer(&xhci->comp_mode_recovery_timer,
426 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
430 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
431 * that causes ports behind that hardware to enter compliance mode sometimes.
432 * The quirk creates a timer that polls every 2 seconds the link state of
433 * each host controller's port and recovers it by issuing a Warm reset
434 * if Compliance mode is detected, otherwise the port will become "dead" (no
435 * device connections or disconnections will be detected anymore). Becasue no
436 * status event is generated when entering compliance mode (per xhci spec),
437 * this quirk is needed on systems that have the failing hardware installed.
439 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
441 xhci->port_status_u0 = 0;
442 init_timer(&xhci->comp_mode_recovery_timer);
444 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
445 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
446 xhci->comp_mode_recovery_timer.expires = jiffies +
447 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
449 set_timer_slack(&xhci->comp_mode_recovery_timer,
450 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
451 add_timer(&xhci->comp_mode_recovery_timer);
452 xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
456 * This function identifies the systems that have installed the SN65LVPE502CP
457 * USB3.0 re-driver and that need the Compliance Mode Quirk.
459 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
461 static bool compliance_mode_recovery_timer_quirk_check(void)
463 const char *dmi_product_name, *dmi_sys_vendor;
465 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
466 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
467 if (!dmi_product_name || !dmi_sys_vendor)
470 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
473 if (strstr(dmi_product_name, "Z420") ||
474 strstr(dmi_product_name, "Z620") ||
475 strstr(dmi_product_name, "Z820") ||
476 strstr(dmi_product_name, "Z1 Workstation"))
482 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
484 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
489 * Initialize memory for HCD and xHC (one-time init).
491 * Program the PAGESIZE register, initialize the device context array, create
492 * device contexts (?), set up a command ring segment (or two?), create event
493 * ring (one for now).
495 int xhci_init(struct usb_hcd *hcd)
497 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
500 xhci_dbg(xhci, "xhci_init\n");
501 spin_lock_init(&xhci->lock);
502 if (xhci->hci_version == 0x95 && link_quirk) {
503 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
504 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
506 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
508 retval = xhci_mem_init(xhci, GFP_KERNEL);
509 xhci_dbg(xhci, "Finished xhci_init\n");
511 /* Initializing Compliance Mode Recovery Data If Needed */
512 if (compliance_mode_recovery_timer_quirk_check()) {
513 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
514 compliance_mode_recovery_timer_init(xhci);
520 /*-------------------------------------------------------------------------*/
523 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
524 static void xhci_event_ring_work(unsigned long arg)
529 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
532 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
534 spin_lock_irqsave(&xhci->lock, flags);
535 temp = xhci_readl(xhci, &xhci->op_regs->status);
536 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
537 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
538 (xhci->xhc_state & XHCI_STATE_HALTED)) {
539 xhci_dbg(xhci, "HW died, polling stopped.\n");
540 spin_unlock_irqrestore(&xhci->lock, flags);
544 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
545 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
546 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
547 xhci->error_bitmask = 0;
548 xhci_dbg(xhci, "Event ring:\n");
549 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
550 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
551 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
552 temp_64 &= ~ERST_PTR_MASK;
553 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
554 xhci_dbg(xhci, "Command ring:\n");
555 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
556 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
557 xhci_dbg_cmd_ptrs(xhci);
558 for (i = 0; i < MAX_HC_SLOTS; ++i) {
561 for (j = 0; j < 31; ++j) {
562 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
565 spin_unlock_irqrestore(&xhci->lock, flags);
568 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
570 xhci_dbg(xhci, "Quit polling the event ring.\n");
574 static int xhci_run_finished(struct xhci_hcd *xhci)
576 if (xhci_start(xhci)) {
580 xhci->shared_hcd->state = HC_STATE_RUNNING;
581 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
583 if (xhci->quirks & XHCI_NEC_HOST)
584 xhci_ring_cmd_db(xhci);
586 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
591 * Start the HC after it was halted.
593 * This function is called by the USB core when the HC driver is added.
594 * Its opposite is xhci_stop().
596 * xhci_init() must be called once before this function can be called.
597 * Reset the HC, enable device slot contexts, program DCBAAP, and
598 * set command ring pointer and event ring pointer.
600 * Setup MSI-X vectors and enable interrupts.
602 int xhci_run(struct usb_hcd *hcd)
607 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
609 /* Start the xHCI host controller running only after the USB 2.0 roothub
613 hcd->uses_new_polling = 1;
614 if (!usb_hcd_is_primary_hcd(hcd))
615 return xhci_run_finished(xhci);
617 xhci_dbg(xhci, "xhci_run\n");
619 ret = xhci_try_enable_msi(hcd);
623 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
624 init_timer(&xhci->event_ring_timer);
625 xhci->event_ring_timer.data = (unsigned long) xhci;
626 xhci->event_ring_timer.function = xhci_event_ring_work;
627 /* Poll the event ring */
628 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
630 xhci_dbg(xhci, "Setting event ring polling timer\n");
631 add_timer(&xhci->event_ring_timer);
634 xhci_dbg(xhci, "Command ring memory map follows:\n");
635 xhci_debug_ring(xhci, xhci->cmd_ring);
636 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
637 xhci_dbg_cmd_ptrs(xhci);
639 xhci_dbg(xhci, "ERST memory map follows:\n");
640 xhci_dbg_erst(xhci, &xhci->erst);
641 xhci_dbg(xhci, "Event ring:\n");
642 xhci_debug_ring(xhci, xhci->event_ring);
643 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
644 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
645 temp_64 &= ~ERST_PTR_MASK;
646 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
648 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
649 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
650 temp &= ~ER_IRQ_INTERVAL_MASK;
652 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
654 /* Set the HCD state before we enable the irqs */
655 temp = xhci_readl(xhci, &xhci->op_regs->command);
657 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
659 xhci_writel(xhci, temp, &xhci->op_regs->command);
661 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
662 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
663 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
664 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
665 &xhci->ir_set->irq_pending);
666 xhci_print_ir_set(xhci, 0);
668 if (xhci->quirks & XHCI_NEC_HOST)
669 xhci_queue_vendor_command(xhci, 0, 0, 0,
670 TRB_TYPE(TRB_NEC_GET_FW));
672 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
676 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
678 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
680 spin_lock_irq(&xhci->lock);
683 /* The shared_hcd is going to be deallocated shortly (the USB core only
684 * calls this function when allocation fails in usb_add_hcd(), or
685 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
687 xhci->shared_hcd = NULL;
688 spin_unlock_irq(&xhci->lock);
694 * This function is called by the USB core when the HC driver is removed.
695 * Its opposite is xhci_run().
697 * Disable device contexts, disable IRQs, and quiesce the HC.
698 * Reset the HC, finish any completed transactions, and cleanup memory.
700 void xhci_stop(struct usb_hcd *hcd)
703 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
705 if (!usb_hcd_is_primary_hcd(hcd)) {
706 xhci_only_stop_hcd(xhci->shared_hcd);
710 spin_lock_irq(&xhci->lock);
711 /* Make sure the xHC is halted for a USB3 roothub
712 * (xhci_stop() could be called as part of failed init).
716 spin_unlock_irq(&xhci->lock);
718 xhci_cleanup_msix(xhci);
720 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
721 /* Tell the event ring poll function not to reschedule */
723 del_timer_sync(&xhci->event_ring_timer);
726 /* Deleting Compliance Mode Recovery Timer */
727 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
728 (!(xhci_all_ports_seen_u0(xhci))))
729 del_timer_sync(&xhci->comp_mode_recovery_timer);
731 if (xhci->quirks & XHCI_AMD_PLL_FIX)
734 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
735 temp = xhci_readl(xhci, &xhci->op_regs->status);
736 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
737 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
738 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
739 &xhci->ir_set->irq_pending);
740 xhci_print_ir_set(xhci, 0);
742 xhci_dbg(xhci, "cleaning up memory\n");
743 xhci_mem_cleanup(xhci);
744 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
745 xhci_readl(xhci, &xhci->op_regs->status));
749 * Shutdown HC (not bus-specific)
751 * This is called when the machine is rebooting or halting. We assume that the
752 * machine will be powered off, and the HC's internal state will be reset.
753 * Don't bother to free memory.
755 * This will only ever be called with the main usb_hcd (the USB3 roothub).
757 void xhci_shutdown(struct usb_hcd *hcd)
759 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
761 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
762 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
764 spin_lock_irq(&xhci->lock);
766 /* Workaround for spurious wakeups at shutdown with HSW */
767 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
769 spin_unlock_irq(&xhci->lock);
771 xhci_cleanup_msix(xhci);
773 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
774 xhci_readl(xhci, &xhci->op_regs->status));
776 /* Yet another workaround for spurious wakeups at shutdown with HSW */
777 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
778 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
782 static void xhci_save_registers(struct xhci_hcd *xhci)
784 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
785 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
786 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
787 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
788 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
789 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
790 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
791 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
792 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
795 static void xhci_restore_registers(struct xhci_hcd *xhci)
797 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
798 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
799 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
800 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
801 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
802 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
803 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
804 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
805 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
808 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
812 /* step 2: initialize command ring buffer */
813 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
814 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
815 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
816 xhci->cmd_ring->dequeue) &
817 (u64) ~CMD_RING_RSVD_BITS) |
818 xhci->cmd_ring->cycle_state;
819 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
820 (long unsigned long) val_64);
821 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
825 * The whole command ring must be cleared to zero when we suspend the host.
827 * The host doesn't save the command ring pointer in the suspend well, so we
828 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
829 * aligned, because of the reserved bits in the command ring dequeue pointer
830 * register. Therefore, we can't just set the dequeue pointer back in the
831 * middle of the ring (TRBs are 16-byte aligned).
833 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
835 struct xhci_ring *ring;
836 struct xhci_segment *seg;
838 ring = xhci->cmd_ring;
842 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
843 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
844 cpu_to_le32(~TRB_CYCLE);
846 } while (seg != ring->deq_seg);
848 /* Reset the software enqueue and dequeue pointers */
849 ring->deq_seg = ring->first_seg;
850 ring->dequeue = ring->first_seg->trbs;
851 ring->enq_seg = ring->deq_seg;
852 ring->enqueue = ring->dequeue;
855 * Ring is now zeroed, so the HW should look for change of ownership
856 * when the cycle bit is set to 1.
858 ring->cycle_state = 1;
861 * Reset the hardware dequeue pointer.
862 * Yes, this will need to be re-written after resume, but we're paranoid
863 * and want to make sure the hardware doesn't access bogus memory
864 * because, say, the BIOS or an SMI started the host without changing
865 * the command ring pointers.
867 xhci_set_cmd_ring_deq(xhci);
871 * Stop HC (not bus-specific)
873 * This is called when the machine transition into S3/S4 mode.
876 int xhci_suspend(struct xhci_hcd *xhci)
879 unsigned int delay = XHCI_MAX_HALT_USEC;
880 struct usb_hcd *hcd = xhci_to_hcd(xhci);
883 /* Don't poll the roothubs on bus suspend. */
884 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
885 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
886 del_timer_sync(&hcd->rh_timer);
888 spin_lock_irq(&xhci->lock);
889 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
890 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
891 /* step 1: stop endpoint */
892 /* skipped assuming that port suspend has done */
894 /* step 2: clear Run/Stop bit */
895 command = xhci_readl(xhci, &xhci->op_regs->command);
897 xhci_writel(xhci, command, &xhci->op_regs->command);
899 /* Some chips from Fresco Logic need an extraordinary delay */
900 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
902 if (handshake(xhci, &xhci->op_regs->status,
903 STS_HALT, STS_HALT, delay)) {
904 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
905 spin_unlock_irq(&xhci->lock);
908 xhci_clear_command_ring(xhci);
910 /* step 3: save registers */
911 xhci_save_registers(xhci);
913 /* step 4: set CSS flag */
914 command = xhci_readl(xhci, &xhci->op_regs->command);
916 xhci_writel(xhci, command, &xhci->op_regs->command);
917 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
918 xhci_warn(xhci, "WARN: xHC save state timeout\n");
919 spin_unlock_irq(&xhci->lock);
922 spin_unlock_irq(&xhci->lock);
925 * Deleting Compliance Mode Recovery Timer because the xHCI Host
926 * is about to be suspended.
928 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
929 (!(xhci_all_ports_seen_u0(xhci)))) {
930 del_timer_sync(&xhci->comp_mode_recovery_timer);
931 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
934 /* step 5: remove core well power */
935 /* synchronize irq when using MSI-X */
936 xhci_msix_sync_irqs(xhci);
942 * start xHC (not bus-specific)
944 * This is called when the machine transition from S3/S4 mode.
947 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
949 u32 command, temp = 0, status;
950 struct usb_hcd *hcd = xhci_to_hcd(xhci);
951 struct usb_hcd *secondary_hcd;
953 bool comp_timer_running = false;
955 /* Wait a bit if either of the roothubs need to settle from the
956 * transition into bus suspend.
958 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
960 xhci->bus_state[1].next_statechange))
963 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
964 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
966 spin_lock_irq(&xhci->lock);
967 if (xhci->quirks & XHCI_RESET_ON_RESUME)
971 /* step 1: restore register */
972 xhci_restore_registers(xhci);
973 /* step 2: initialize command ring buffer */
974 xhci_set_cmd_ring_deq(xhci);
975 /* step 3: restore state and start state*/
976 /* step 3: set CRS flag */
977 command = xhci_readl(xhci, &xhci->op_regs->command);
979 xhci_writel(xhci, command, &xhci->op_regs->command);
980 if (handshake(xhci, &xhci->op_regs->status,
981 STS_RESTORE, 0, 10 * 1000)) {
982 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
983 spin_unlock_irq(&xhci->lock);
986 temp = xhci_readl(xhci, &xhci->op_regs->status);
989 /* If restore operation fails, re-initialize the HC during resume */
990 if ((temp & STS_SRE) || hibernated) {
992 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
993 !(xhci_all_ports_seen_u0(xhci))) {
994 del_timer_sync(&xhci->comp_mode_recovery_timer);
995 xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
998 /* Let the USB core know _both_ roothubs lost power. */
999 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1000 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1002 xhci_dbg(xhci, "Stop HCD\n");
1005 spin_unlock_irq(&xhci->lock);
1006 xhci_cleanup_msix(xhci);
1008 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1009 /* Tell the event ring poll function not to reschedule */
1011 del_timer_sync(&xhci->event_ring_timer);
1014 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1015 temp = xhci_readl(xhci, &xhci->op_regs->status);
1016 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1017 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1018 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1019 &xhci->ir_set->irq_pending);
1020 xhci_print_ir_set(xhci, 0);
1022 xhci_dbg(xhci, "cleaning up memory\n");
1023 xhci_mem_cleanup(xhci);
1024 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1025 xhci_readl(xhci, &xhci->op_regs->status));
1027 /* USB core calls the PCI reinit and start functions twice:
1028 * first with the primary HCD, and then with the secondary HCD.
1029 * If we don't do the same, the host will never be started.
1031 if (!usb_hcd_is_primary_hcd(hcd))
1032 secondary_hcd = hcd;
1034 secondary_hcd = xhci->shared_hcd;
1036 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1037 retval = xhci_init(hcd->primary_hcd);
1040 comp_timer_running = true;
1042 xhci_dbg(xhci, "Start the primary HCD\n");
1043 retval = xhci_run(hcd->primary_hcd);
1045 xhci_dbg(xhci, "Start the secondary HCD\n");
1046 retval = xhci_run(secondary_hcd);
1048 hcd->state = HC_STATE_SUSPENDED;
1049 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1053 /* step 4: set Run/Stop bit */
1054 command = xhci_readl(xhci, &xhci->op_regs->command);
1056 xhci_writel(xhci, command, &xhci->op_regs->command);
1057 handshake(xhci, &xhci->op_regs->status, STS_HALT,
1060 /* step 5: walk topology and initialize portsc,
1061 * portpmsc and portli
1063 /* this is done in bus_resume */
1065 /* step 6: restart each of the previously
1066 * Running endpoints by ringing their doorbells
1069 spin_unlock_irq(&xhci->lock);
1073 /* Resume root hubs only when have pending events. */
1074 status = readl(&xhci->op_regs->status);
1075 if (status & STS_EINT) {
1076 usb_hcd_resume_root_hub(hcd);
1077 usb_hcd_resume_root_hub(xhci->shared_hcd);
1082 * If system is subject to the Quirk, Compliance Mode Timer needs to
1083 * be re-initialized Always after a system resume. Ports are subject
1084 * to suffer the Compliance Mode issue again. It doesn't matter if
1085 * ports have entered previously to U0 before system's suspension.
1087 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1088 compliance_mode_recovery_timer_init(xhci);
1090 /* Re-enable port polling. */
1091 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1092 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1093 usb_hcd_poll_rh_status(hcd);
1097 #endif /* CONFIG_PM */
1099 /*-------------------------------------------------------------------------*/
1102 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1103 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1104 * value to right shift 1 for the bitmask.
1106 * Index = (epnum * 2) + direction - 1,
1107 * where direction = 0 for OUT, 1 for IN.
1108 * For control endpoints, the IN index is used (OUT index is unused), so
1109 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1111 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1114 if (usb_endpoint_xfer_control(desc))
1115 index = (unsigned int) (usb_endpoint_num(desc)*2);
1117 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1118 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1122 /* Find the flag for this endpoint (for use in the control context). Use the
1123 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1126 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1128 return 1 << (xhci_get_endpoint_index(desc) + 1);
1131 /* Find the flag for this endpoint (for use in the control context). Use the
1132 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1135 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1137 return 1 << (ep_index + 1);
1140 /* Compute the last valid endpoint context index. Basically, this is the
1141 * endpoint index plus one. For slot contexts with more than valid endpoint,
1142 * we find the most significant bit set in the added contexts flags.
1143 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1144 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1146 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1148 return fls(added_ctxs) - 1;
1151 /* Returns 1 if the arguments are OK;
1152 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1154 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1155 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1157 struct xhci_hcd *xhci;
1158 struct xhci_virt_device *virt_dev;
1160 if (!hcd || (check_ep && !ep) || !udev) {
1161 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1165 if (!udev->parent) {
1166 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1171 xhci = hcd_to_xhci(hcd);
1172 if (check_virt_dev) {
1173 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1174 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1179 virt_dev = xhci->devs[udev->slot_id];
1180 if (virt_dev->udev != udev) {
1181 printk(KERN_DEBUG "xHCI %s called with udev and "
1182 "virt_dev does not match\n", func);
1187 if (xhci->xhc_state & XHCI_STATE_HALTED)
1193 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1194 struct usb_device *udev, struct xhci_command *command,
1195 bool ctx_change, bool must_succeed);
1198 * Full speed devices may have a max packet size greater than 8 bytes, but the
1199 * USB core doesn't know that until it reads the first 8 bytes of the
1200 * descriptor. If the usb_device's max packet size changes after that point,
1201 * we need to issue an evaluate context command and wait on it.
1203 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1204 unsigned int ep_index, struct urb *urb)
1206 struct xhci_container_ctx *in_ctx;
1207 struct xhci_container_ctx *out_ctx;
1208 struct xhci_input_control_ctx *ctrl_ctx;
1209 struct xhci_ep_ctx *ep_ctx;
1210 int max_packet_size;
1211 int hw_max_packet_size;
1214 out_ctx = xhci->devs[slot_id]->out_ctx;
1215 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1216 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1217 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1218 if (hw_max_packet_size != max_packet_size) {
1219 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1220 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1222 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1223 hw_max_packet_size);
1224 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1226 /* Set up the modified control endpoint 0 */
1227 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1228 xhci->devs[slot_id]->out_ctx, ep_index);
1229 in_ctx = xhci->devs[slot_id]->in_ctx;
1230 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1231 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1232 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1234 /* Set up the input context flags for the command */
1235 /* FIXME: This won't work if a non-default control endpoint
1236 * changes max packet sizes.
1238 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1239 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1240 ctrl_ctx->drop_flags = 0;
1242 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1243 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1244 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1245 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1247 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1250 /* Clean up the input context for later use by bandwidth
1253 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1259 * non-error returns are a promise to giveback() the urb later
1260 * we drop ownership so next owner (or urb unlink) can get it
1262 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1264 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1265 struct xhci_td *buffer;
1266 unsigned long flags;
1268 unsigned int slot_id, ep_index;
1269 struct urb_priv *urb_priv;
1272 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1273 true, true, __func__) <= 0)
1276 slot_id = urb->dev->slot_id;
1277 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1279 if (!HCD_HW_ACCESSIBLE(hcd)) {
1280 if (!in_interrupt())
1281 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1286 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1287 size = urb->number_of_packets;
1291 urb_priv = kzalloc(sizeof(struct urb_priv) +
1292 size * sizeof(struct xhci_td *), mem_flags);
1296 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1302 for (i = 0; i < size; i++) {
1303 urb_priv->td[i] = buffer;
1307 urb_priv->length = size;
1308 urb_priv->td_cnt = 0;
1309 urb->hcpriv = urb_priv;
1311 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1312 /* Check to see if the max packet size for the default control
1313 * endpoint changed during FS device enumeration
1315 if (urb->dev->speed == USB_SPEED_FULL) {
1316 ret = xhci_check_maxpacket(xhci, slot_id,
1319 xhci_urb_free_priv(xhci, urb_priv);
1325 /* We have a spinlock and interrupts disabled, so we must pass
1326 * atomic context to this function, which may allocate memory.
1328 spin_lock_irqsave(&xhci->lock, flags);
1329 if (xhci->xhc_state & XHCI_STATE_DYING)
1331 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1335 spin_unlock_irqrestore(&xhci->lock, flags);
1336 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1337 spin_lock_irqsave(&xhci->lock, flags);
1338 if (xhci->xhc_state & XHCI_STATE_DYING)
1340 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1341 EP_GETTING_STREAMS) {
1342 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1343 "is transitioning to using streams.\n");
1345 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1346 EP_GETTING_NO_STREAMS) {
1347 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1348 "is transitioning to "
1349 "not having streams.\n");
1352 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1357 spin_unlock_irqrestore(&xhci->lock, flags);
1358 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1359 spin_lock_irqsave(&xhci->lock, flags);
1360 if (xhci->xhc_state & XHCI_STATE_DYING)
1362 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1366 spin_unlock_irqrestore(&xhci->lock, flags);
1368 spin_lock_irqsave(&xhci->lock, flags);
1369 if (xhci->xhc_state & XHCI_STATE_DYING)
1371 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1375 spin_unlock_irqrestore(&xhci->lock, flags);
1380 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1381 "non-responsive xHCI host.\n",
1382 urb->ep->desc.bEndpointAddress, urb);
1385 xhci_urb_free_priv(xhci, urb_priv);
1387 spin_unlock_irqrestore(&xhci->lock, flags);
1391 /* Get the right ring for the given URB.
1392 * If the endpoint supports streams, boundary check the URB's stream ID.
1393 * If the endpoint doesn't support streams, return the singular endpoint ring.
1395 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1398 unsigned int slot_id;
1399 unsigned int ep_index;
1400 unsigned int stream_id;
1401 struct xhci_virt_ep *ep;
1403 slot_id = urb->dev->slot_id;
1404 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1405 stream_id = urb->stream_id;
1406 ep = &xhci->devs[slot_id]->eps[ep_index];
1407 /* Common case: no streams */
1408 if (!(ep->ep_state & EP_HAS_STREAMS))
1411 if (stream_id == 0) {
1413 "WARN: Slot ID %u, ep index %u has streams, "
1414 "but URB has no stream ID.\n",
1419 if (stream_id < ep->stream_info->num_streams)
1420 return ep->stream_info->stream_rings[stream_id];
1423 "WARN: Slot ID %u, ep index %u has "
1424 "stream IDs 1 to %u allocated, "
1425 "but stream ID %u is requested.\n",
1427 ep->stream_info->num_streams - 1,
1433 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1434 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1435 * should pick up where it left off in the TD, unless a Set Transfer Ring
1436 * Dequeue Pointer is issued.
1438 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1439 * the ring. Since the ring is a contiguous structure, they can't be physically
1440 * removed. Instead, there are two options:
1442 * 1) If the HC is in the middle of processing the URB to be canceled, we
1443 * simply move the ring's dequeue pointer past those TRBs using the Set
1444 * Transfer Ring Dequeue Pointer command. This will be the common case,
1445 * when drivers timeout on the last submitted URB and attempt to cancel.
1447 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1448 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1449 * HC will need to invalidate the any TRBs it has cached after the stop
1450 * endpoint command, as noted in the xHCI 0.95 errata.
1452 * 3) The TD may have completed by the time the Stop Endpoint Command
1453 * completes, so software needs to handle that case too.
1455 * This function should protect against the TD enqueueing code ringing the
1456 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1457 * It also needs to account for multiple cancellations on happening at the same
1458 * time for the same endpoint.
1460 * Note that this function can be called in any context, or so says
1461 * usb_hcd_unlink_urb()
1463 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1465 unsigned long flags;
1468 struct xhci_hcd *xhci;
1469 struct urb_priv *urb_priv;
1471 unsigned int ep_index;
1472 struct xhci_ring *ep_ring;
1473 struct xhci_virt_ep *ep;
1475 xhci = hcd_to_xhci(hcd);
1476 spin_lock_irqsave(&xhci->lock, flags);
1477 /* Make sure the URB hasn't completed or been unlinked already */
1478 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1479 if (ret || !urb->hcpriv)
1481 temp = xhci_readl(xhci, &xhci->op_regs->status);
1482 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1483 xhci_dbg(xhci, "HW died, freeing TD.\n");
1484 urb_priv = urb->hcpriv;
1485 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1486 td = urb_priv->td[i];
1487 if (!list_empty(&td->td_list))
1488 list_del_init(&td->td_list);
1489 if (!list_empty(&td->cancelled_td_list))
1490 list_del_init(&td->cancelled_td_list);
1493 usb_hcd_unlink_urb_from_ep(hcd, urb);
1494 spin_unlock_irqrestore(&xhci->lock, flags);
1495 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1496 xhci_urb_free_priv(xhci, urb_priv);
1499 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1500 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1501 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1502 "non-responsive xHCI host.\n",
1503 urb->ep->desc.bEndpointAddress, urb);
1504 /* Let the stop endpoint command watchdog timer (which set this
1505 * state) finish cleaning up the endpoint TD lists. We must
1506 * have caught it in the middle of dropping a lock and giving
1512 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1513 xhci_dbg(xhci, "Event ring:\n");
1514 xhci_debug_ring(xhci, xhci->event_ring);
1515 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1516 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1517 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1523 xhci_dbg(xhci, "Endpoint ring:\n");
1524 xhci_debug_ring(xhci, ep_ring);
1526 urb_priv = urb->hcpriv;
1528 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1529 td = urb_priv->td[i];
1530 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1533 /* Queue a stop endpoint command, but only if this is
1534 * the first cancellation to be handled.
1536 if (!(ep->ep_state & EP_HALT_PENDING)) {
1537 ep->ep_state |= EP_HALT_PENDING;
1538 ep->stop_cmds_pending++;
1539 ep->stop_cmd_timer.expires = jiffies +
1540 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1541 add_timer(&ep->stop_cmd_timer);
1542 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1543 xhci_ring_cmd_db(xhci);
1546 spin_unlock_irqrestore(&xhci->lock, flags);
1550 /* Drop an endpoint from a new bandwidth configuration for this device.
1551 * Only one call to this function is allowed per endpoint before
1552 * check_bandwidth() or reset_bandwidth() must be called.
1553 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1554 * add the endpoint to the schedule with possibly new parameters denoted by a
1555 * different endpoint descriptor in usb_host_endpoint.
1556 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1559 * The USB core will not allow URBs to be queued to an endpoint that is being
1560 * disabled, so there's no need for mutual exclusion to protect
1561 * the xhci->devs[slot_id] structure.
1563 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1564 struct usb_host_endpoint *ep)
1566 struct xhci_hcd *xhci;
1567 struct xhci_container_ctx *in_ctx, *out_ctx;
1568 struct xhci_input_control_ctx *ctrl_ctx;
1569 struct xhci_slot_ctx *slot_ctx;
1570 unsigned int last_ctx;
1571 unsigned int ep_index;
1572 struct xhci_ep_ctx *ep_ctx;
1574 u32 new_add_flags, new_drop_flags, new_slot_info;
1577 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1580 xhci = hcd_to_xhci(hcd);
1581 if (xhci->xhc_state & XHCI_STATE_DYING)
1584 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1585 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1586 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1587 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1588 __func__, drop_flag);
1592 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1593 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1594 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1595 ep_index = xhci_get_endpoint_index(&ep->desc);
1596 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1597 /* If the HC already knows the endpoint is disabled,
1598 * or the HCD has noted it is disabled, ignore this request
1600 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1601 cpu_to_le32(EP_STATE_DISABLED)) ||
1602 le32_to_cpu(ctrl_ctx->drop_flags) &
1603 xhci_get_endpoint_flag(&ep->desc)) {
1604 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1609 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1610 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1612 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1613 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1615 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1616 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1617 /* Update the last valid endpoint context, if we deleted the last one */
1618 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1619 LAST_CTX(last_ctx)) {
1620 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1621 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1623 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1625 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1627 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1628 (unsigned int) ep->desc.bEndpointAddress,
1630 (unsigned int) new_drop_flags,
1631 (unsigned int) new_add_flags,
1632 (unsigned int) new_slot_info);
1636 /* Add an endpoint to a new possible bandwidth configuration for this device.
1637 * Only one call to this function is allowed per endpoint before
1638 * check_bandwidth() or reset_bandwidth() must be called.
1639 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1640 * add the endpoint to the schedule with possibly new parameters denoted by a
1641 * different endpoint descriptor in usb_host_endpoint.
1642 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1645 * The USB core will not allow URBs to be queued to an endpoint until the
1646 * configuration or alt setting is installed in the device, so there's no need
1647 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1649 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1650 struct usb_host_endpoint *ep)
1652 struct xhci_hcd *xhci;
1653 struct xhci_container_ctx *in_ctx, *out_ctx;
1654 unsigned int ep_index;
1655 struct xhci_ep_ctx *ep_ctx;
1656 struct xhci_slot_ctx *slot_ctx;
1657 struct xhci_input_control_ctx *ctrl_ctx;
1659 unsigned int last_ctx;
1660 u32 new_add_flags, new_drop_flags, new_slot_info;
1661 struct xhci_virt_device *virt_dev;
1664 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1666 /* So we won't queue a reset ep command for a root hub */
1670 xhci = hcd_to_xhci(hcd);
1671 if (xhci->xhc_state & XHCI_STATE_DYING)
1674 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1675 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1676 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1677 /* FIXME when we have to issue an evaluate endpoint command to
1678 * deal with ep0 max packet size changing once we get the
1681 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1682 __func__, added_ctxs);
1686 virt_dev = xhci->devs[udev->slot_id];
1687 in_ctx = virt_dev->in_ctx;
1688 out_ctx = virt_dev->out_ctx;
1689 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1690 ep_index = xhci_get_endpoint_index(&ep->desc);
1691 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1693 /* If this endpoint is already in use, and the upper layers are trying
1694 * to add it again without dropping it, reject the addition.
1696 if (virt_dev->eps[ep_index].ring &&
1697 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1698 xhci_get_endpoint_flag(&ep->desc))) {
1699 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1700 "without dropping it.\n",
1701 (unsigned int) ep->desc.bEndpointAddress);
1705 /* If the HCD has already noted the endpoint is enabled,
1706 * ignore this request.
1708 if (le32_to_cpu(ctrl_ctx->add_flags) &
1709 xhci_get_endpoint_flag(&ep->desc)) {
1710 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1716 * Configuration and alternate setting changes must be done in
1717 * process context, not interrupt context (or so documenation
1718 * for usb_set_interface() and usb_set_configuration() claim).
1720 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1721 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1722 __func__, ep->desc.bEndpointAddress);
1726 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1727 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1729 /* If xhci_endpoint_disable() was called for this endpoint, but the
1730 * xHC hasn't been notified yet through the check_bandwidth() call,
1731 * this re-adds a new state for the endpoint from the new endpoint
1732 * descriptors. We must drop and re-add this endpoint, so we leave the
1735 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1737 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1738 /* Update the last valid endpoint context, if we just added one past */
1739 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1740 LAST_CTX(last_ctx)) {
1741 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1742 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1744 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1746 /* Store the usb_device pointer for later use */
1749 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1750 (unsigned int) ep->desc.bEndpointAddress,
1752 (unsigned int) new_drop_flags,
1753 (unsigned int) new_add_flags,
1754 (unsigned int) new_slot_info);
1758 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1760 struct xhci_input_control_ctx *ctrl_ctx;
1761 struct xhci_ep_ctx *ep_ctx;
1762 struct xhci_slot_ctx *slot_ctx;
1765 /* When a device's add flag and drop flag are zero, any subsequent
1766 * configure endpoint command will leave that endpoint's state
1767 * untouched. Make sure we don't leave any old state in the input
1768 * endpoint contexts.
1770 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1771 ctrl_ctx->drop_flags = 0;
1772 ctrl_ctx->add_flags = 0;
1773 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1774 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1775 /* Endpoint 0 is always valid */
1776 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1777 for (i = 1; i < 31; ++i) {
1778 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1779 ep_ctx->ep_info = 0;
1780 ep_ctx->ep_info2 = 0;
1782 ep_ctx->tx_info = 0;
1786 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1787 struct usb_device *udev, u32 *cmd_status)
1791 switch (*cmd_status) {
1793 dev_warn(&udev->dev, "Not enough host controller resources "
1794 "for new device state.\n");
1796 /* FIXME: can we allocate more resources for the HC? */
1799 case COMP_2ND_BW_ERR:
1800 dev_warn(&udev->dev, "Not enough bandwidth "
1801 "for new device state.\n");
1803 /* FIXME: can we go back to the old state? */
1806 /* the HCD set up something wrong */
1807 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1809 "and endpoint is not disabled.\n");
1813 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1814 "configure command.\n");
1818 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1822 xhci_err(xhci, "ERROR: unexpected command completion "
1823 "code 0x%x.\n", *cmd_status);
1830 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1831 struct usb_device *udev, u32 *cmd_status)
1834 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1836 switch (*cmd_status) {
1838 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1839 "context command.\n");
1843 dev_warn(&udev->dev, "WARN: slot not enabled for"
1844 "evaluate context command.\n");
1845 case COMP_CTX_STATE:
1846 dev_warn(&udev->dev, "WARN: invalid context state for "
1847 "evaluate context command.\n");
1848 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1852 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1853 "context command.\n");
1857 /* Max Exit Latency too large error */
1858 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1862 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1866 xhci_err(xhci, "ERROR: unexpected command completion "
1867 "code 0x%x.\n", *cmd_status);
1874 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1875 struct xhci_container_ctx *in_ctx)
1877 struct xhci_input_control_ctx *ctrl_ctx;
1878 u32 valid_add_flags;
1879 u32 valid_drop_flags;
1881 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1882 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1883 * (bit 1). The default control endpoint is added during the Address
1884 * Device command and is never removed until the slot is disabled.
1886 valid_add_flags = ctrl_ctx->add_flags >> 2;
1887 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1889 /* Use hweight32 to count the number of ones in the add flags, or
1890 * number of endpoints added. Don't count endpoints that are changed
1891 * (both added and dropped).
1893 return hweight32(valid_add_flags) -
1894 hweight32(valid_add_flags & valid_drop_flags);
1897 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1898 struct xhci_container_ctx *in_ctx)
1900 struct xhci_input_control_ctx *ctrl_ctx;
1901 u32 valid_add_flags;
1902 u32 valid_drop_flags;
1904 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1905 valid_add_flags = ctrl_ctx->add_flags >> 2;
1906 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1908 return hweight32(valid_drop_flags) -
1909 hweight32(valid_add_flags & valid_drop_flags);
1913 * We need to reserve the new number of endpoints before the configure endpoint
1914 * command completes. We can't subtract the dropped endpoints from the number
1915 * of active endpoints until the command completes because we can oversubscribe
1916 * the host in this case:
1918 * - the first configure endpoint command drops more endpoints than it adds
1919 * - a second configure endpoint command that adds more endpoints is queued
1920 * - the first configure endpoint command fails, so the config is unchanged
1921 * - the second command may succeed, even though there isn't enough resources
1923 * Must be called with xhci->lock held.
1925 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1926 struct xhci_container_ctx *in_ctx)
1930 added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1931 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1932 xhci_dbg(xhci, "Not enough ep ctxs: "
1933 "%u active, need to add %u, limit is %u.\n",
1934 xhci->num_active_eps, added_eps,
1935 xhci->limit_active_eps);
1938 xhci->num_active_eps += added_eps;
1939 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1940 xhci->num_active_eps);
1945 * The configure endpoint was failed by the xHC for some other reason, so we
1946 * need to revert the resources that failed configuration would have used.
1948 * Must be called with xhci->lock held.
1950 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1951 struct xhci_container_ctx *in_ctx)
1955 num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1956 xhci->num_active_eps -= num_failed_eps;
1957 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1959 xhci->num_active_eps);
1963 * Now that the command has completed, clean up the active endpoint count by
1964 * subtracting out the endpoints that were dropped (but not changed).
1966 * Must be called with xhci->lock held.
1968 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1969 struct xhci_container_ctx *in_ctx)
1971 u32 num_dropped_eps;
1973 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1974 xhci->num_active_eps -= num_dropped_eps;
1975 if (num_dropped_eps)
1976 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1978 xhci->num_active_eps);
1981 unsigned int xhci_get_block_size(struct usb_device *udev)
1983 switch (udev->speed) {
1985 case USB_SPEED_FULL:
1987 case USB_SPEED_HIGH:
1989 case USB_SPEED_SUPER:
1991 case USB_SPEED_UNKNOWN:
1992 case USB_SPEED_WIRELESS:
1994 /* Should never happen */
1999 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2001 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2003 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2008 /* If we are changing a LS/FS device under a HS hub,
2009 * make sure (if we are activating a new TT) that the HS bus has enough
2010 * bandwidth for this new TT.
2012 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2013 struct xhci_virt_device *virt_dev,
2016 struct xhci_interval_bw_table *bw_table;
2017 struct xhci_tt_bw_info *tt_info;
2019 /* Find the bandwidth table for the root port this TT is attached to. */
2020 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2021 tt_info = virt_dev->tt_info;
2022 /* If this TT already had active endpoints, the bandwidth for this TT
2023 * has already been added. Removing all periodic endpoints (and thus
2024 * making the TT enactive) will only decrease the bandwidth used.
2028 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2029 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2033 /* Not sure why we would have no new active endpoints...
2035 * Maybe because of an Evaluate Context change for a hub update or a
2036 * control endpoint 0 max packet size change?
2037 * FIXME: skip the bandwidth calculation in that case.
2042 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2043 struct xhci_virt_device *virt_dev)
2045 unsigned int bw_reserved;
2047 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2048 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2051 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2052 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2059 * This algorithm is a very conservative estimate of the worst-case scheduling
2060 * scenario for any one interval. The hardware dynamically schedules the
2061 * packets, so we can't tell which microframe could be the limiting factor in
2062 * the bandwidth scheduling. This only takes into account periodic endpoints.
2064 * Obviously, we can't solve an NP complete problem to find the minimum worst
2065 * case scenario. Instead, we come up with an estimate that is no less than
2066 * the worst case bandwidth used for any one microframe, but may be an
2069 * We walk the requirements for each endpoint by interval, starting with the
2070 * smallest interval, and place packets in the schedule where there is only one
2071 * possible way to schedule packets for that interval. In order to simplify
2072 * this algorithm, we record the largest max packet size for each interval, and
2073 * assume all packets will be that size.
2075 * For interval 0, we obviously must schedule all packets for each interval.
2076 * The bandwidth for interval 0 is just the amount of data to be transmitted
2077 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2078 * the number of packets).
2080 * For interval 1, we have two possible microframes to schedule those packets
2081 * in. For this algorithm, if we can schedule the same number of packets for
2082 * each possible scheduling opportunity (each microframe), we will do so. The
2083 * remaining number of packets will be saved to be transmitted in the gaps in
2084 * the next interval's scheduling sequence.
2086 * As we move those remaining packets to be scheduled with interval 2 packets,
2087 * we have to double the number of remaining packets to transmit. This is
2088 * because the intervals are actually powers of 2, and we would be transmitting
2089 * the previous interval's packets twice in this interval. We also have to be
2090 * sure that when we look at the largest max packet size for this interval, we
2091 * also look at the largest max packet size for the remaining packets and take
2092 * the greater of the two.
2094 * The algorithm continues to evenly distribute packets in each scheduling
2095 * opportunity, and push the remaining packets out, until we get to the last
2096 * interval. Then those packets and their associated overhead are just added
2097 * to the bandwidth used.
2099 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2100 struct xhci_virt_device *virt_dev,
2103 unsigned int bw_reserved;
2104 unsigned int max_bandwidth;
2105 unsigned int bw_used;
2106 unsigned int block_size;
2107 struct xhci_interval_bw_table *bw_table;
2108 unsigned int packet_size = 0;
2109 unsigned int overhead = 0;
2110 unsigned int packets_transmitted = 0;
2111 unsigned int packets_remaining = 0;
2114 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2115 return xhci_check_ss_bw(xhci, virt_dev);
2117 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2118 max_bandwidth = HS_BW_LIMIT;
2119 /* Convert percent of bus BW reserved to blocks reserved */
2120 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2122 max_bandwidth = FS_BW_LIMIT;
2123 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2126 bw_table = virt_dev->bw_table;
2127 /* We need to translate the max packet size and max ESIT payloads into
2128 * the units the hardware uses.
2130 block_size = xhci_get_block_size(virt_dev->udev);
2132 /* If we are manipulating a LS/FS device under a HS hub, double check
2133 * that the HS bus has enough bandwidth if we are activing a new TT.
2135 if (virt_dev->tt_info) {
2136 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2137 virt_dev->real_port);
2138 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2139 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2140 "newly activated TT.\n");
2143 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2144 virt_dev->tt_info->slot_id,
2145 virt_dev->tt_info->ttport);
2147 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2148 virt_dev->real_port);
2151 /* Add in how much bandwidth will be used for interval zero, or the
2152 * rounded max ESIT payload + number of packets * largest overhead.
2154 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2155 bw_table->interval_bw[0].num_packets *
2156 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2158 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2159 unsigned int bw_added;
2160 unsigned int largest_mps;
2161 unsigned int interval_overhead;
2164 * How many packets could we transmit in this interval?
2165 * If packets didn't fit in the previous interval, we will need
2166 * to transmit that many packets twice within this interval.
2168 packets_remaining = 2 * packets_remaining +
2169 bw_table->interval_bw[i].num_packets;
2171 /* Find the largest max packet size of this or the previous
2174 if (list_empty(&bw_table->interval_bw[i].endpoints))
2177 struct xhci_virt_ep *virt_ep;
2178 struct list_head *ep_entry;
2180 ep_entry = bw_table->interval_bw[i].endpoints.next;
2181 virt_ep = list_entry(ep_entry,
2182 struct xhci_virt_ep, bw_endpoint_list);
2183 /* Convert to blocks, rounding up */
2184 largest_mps = DIV_ROUND_UP(
2185 virt_ep->bw_info.max_packet_size,
2188 if (largest_mps > packet_size)
2189 packet_size = largest_mps;
2191 /* Use the larger overhead of this or the previous interval. */
2192 interval_overhead = xhci_get_largest_overhead(
2193 &bw_table->interval_bw[i]);
2194 if (interval_overhead > overhead)
2195 overhead = interval_overhead;
2197 /* How many packets can we evenly distribute across
2198 * (1 << (i + 1)) possible scheduling opportunities?
2200 packets_transmitted = packets_remaining >> (i + 1);
2202 /* Add in the bandwidth used for those scheduled packets */
2203 bw_added = packets_transmitted * (overhead + packet_size);
2205 /* How many packets do we have remaining to transmit? */
2206 packets_remaining = packets_remaining % (1 << (i + 1));
2208 /* What largest max packet size should those packets have? */
2209 /* If we've transmitted all packets, don't carry over the
2210 * largest packet size.
2212 if (packets_remaining == 0) {
2215 } else if (packets_transmitted > 0) {
2216 /* Otherwise if we do have remaining packets, and we've
2217 * scheduled some packets in this interval, take the
2218 * largest max packet size from endpoints with this
2221 packet_size = largest_mps;
2222 overhead = interval_overhead;
2224 /* Otherwise carry over packet_size and overhead from the last
2225 * time we had a remainder.
2227 bw_used += bw_added;
2228 if (bw_used > max_bandwidth) {
2229 xhci_warn(xhci, "Not enough bandwidth. "
2230 "Proposed: %u, Max: %u\n",
2231 bw_used, max_bandwidth);
2236 * Ok, we know we have some packets left over after even-handedly
2237 * scheduling interval 15. We don't know which microframes they will
2238 * fit into, so we over-schedule and say they will be scheduled every
2241 if (packets_remaining > 0)
2242 bw_used += overhead + packet_size;
2244 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2245 unsigned int port_index = virt_dev->real_port - 1;
2247 /* OK, we're manipulating a HS device attached to a
2248 * root port bandwidth domain. Include the number of active TTs
2249 * in the bandwidth used.
2251 bw_used += TT_HS_OVERHEAD *
2252 xhci->rh_bw[port_index].num_active_tts;
2255 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2256 "Available: %u " "percent\n",
2257 bw_used, max_bandwidth, bw_reserved,
2258 (max_bandwidth - bw_used - bw_reserved) * 100 /
2261 bw_used += bw_reserved;
2262 if (bw_used > max_bandwidth) {
2263 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2264 bw_used, max_bandwidth);
2268 bw_table->bw_used = bw_used;
2272 static bool xhci_is_async_ep(unsigned int ep_type)
2274 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2275 ep_type != ISOC_IN_EP &&
2276 ep_type != INT_IN_EP);
2279 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2281 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2284 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2286 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2288 if (ep_bw->ep_interval == 0)
2289 return SS_OVERHEAD_BURST +
2290 (ep_bw->mult * ep_bw->num_packets *
2291 (SS_OVERHEAD + mps));
2292 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2293 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2294 1 << ep_bw->ep_interval);
2298 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2299 struct xhci_bw_info *ep_bw,
2300 struct xhci_interval_bw_table *bw_table,
2301 struct usb_device *udev,
2302 struct xhci_virt_ep *virt_ep,
2303 struct xhci_tt_bw_info *tt_info)
2305 struct xhci_interval_bw *interval_bw;
2306 int normalized_interval;
2308 if (xhci_is_async_ep(ep_bw->type))
2311 if (udev->speed == USB_SPEED_SUPER) {
2312 if (xhci_is_sync_in_ep(ep_bw->type))
2313 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2314 xhci_get_ss_bw_consumed(ep_bw);
2316 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2317 xhci_get_ss_bw_consumed(ep_bw);
2321 /* SuperSpeed endpoints never get added to intervals in the table, so
2322 * this check is only valid for HS/FS/LS devices.
2324 if (list_empty(&virt_ep->bw_endpoint_list))
2326 /* For LS/FS devices, we need to translate the interval expressed in
2327 * microframes to frames.
2329 if (udev->speed == USB_SPEED_HIGH)
2330 normalized_interval = ep_bw->ep_interval;
2332 normalized_interval = ep_bw->ep_interval - 3;
2334 if (normalized_interval == 0)
2335 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2336 interval_bw = &bw_table->interval_bw[normalized_interval];
2337 interval_bw->num_packets -= ep_bw->num_packets;
2338 switch (udev->speed) {
2340 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2342 case USB_SPEED_FULL:
2343 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2345 case USB_SPEED_HIGH:
2346 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2348 case USB_SPEED_SUPER:
2349 case USB_SPEED_UNKNOWN:
2350 case USB_SPEED_WIRELESS:
2351 /* Should never happen because only LS/FS/HS endpoints will get
2352 * added to the endpoint list.
2357 tt_info->active_eps -= 1;
2358 list_del_init(&virt_ep->bw_endpoint_list);
2361 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2362 struct xhci_bw_info *ep_bw,
2363 struct xhci_interval_bw_table *bw_table,
2364 struct usb_device *udev,
2365 struct xhci_virt_ep *virt_ep,
2366 struct xhci_tt_bw_info *tt_info)
2368 struct xhci_interval_bw *interval_bw;
2369 struct xhci_virt_ep *smaller_ep;
2370 int normalized_interval;
2372 if (xhci_is_async_ep(ep_bw->type))
2375 if (udev->speed == USB_SPEED_SUPER) {
2376 if (xhci_is_sync_in_ep(ep_bw->type))
2377 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2378 xhci_get_ss_bw_consumed(ep_bw);
2380 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2381 xhci_get_ss_bw_consumed(ep_bw);
2385 /* For LS/FS devices, we need to translate the interval expressed in
2386 * microframes to frames.
2388 if (udev->speed == USB_SPEED_HIGH)
2389 normalized_interval = ep_bw->ep_interval;
2391 normalized_interval = ep_bw->ep_interval - 3;
2393 if (normalized_interval == 0)
2394 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2395 interval_bw = &bw_table->interval_bw[normalized_interval];
2396 interval_bw->num_packets += ep_bw->num_packets;
2397 switch (udev->speed) {
2399 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2401 case USB_SPEED_FULL:
2402 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2404 case USB_SPEED_HIGH:
2405 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2407 case USB_SPEED_SUPER:
2408 case USB_SPEED_UNKNOWN:
2409 case USB_SPEED_WIRELESS:
2410 /* Should never happen because only LS/FS/HS endpoints will get
2411 * added to the endpoint list.
2417 tt_info->active_eps += 1;
2418 /* Insert the endpoint into the list, largest max packet size first. */
2419 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2421 if (ep_bw->max_packet_size >=
2422 smaller_ep->bw_info.max_packet_size) {
2423 /* Add the new ep before the smaller endpoint */
2424 list_add_tail(&virt_ep->bw_endpoint_list,
2425 &smaller_ep->bw_endpoint_list);
2429 /* Add the new endpoint at the end of the list. */
2430 list_add_tail(&virt_ep->bw_endpoint_list,
2431 &interval_bw->endpoints);
2434 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2435 struct xhci_virt_device *virt_dev,
2438 struct xhci_root_port_bw_info *rh_bw_info;
2439 if (!virt_dev->tt_info)
2442 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2443 if (old_active_eps == 0 &&
2444 virt_dev->tt_info->active_eps != 0) {
2445 rh_bw_info->num_active_tts += 1;
2446 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2447 } else if (old_active_eps != 0 &&
2448 virt_dev->tt_info->active_eps == 0) {
2449 rh_bw_info->num_active_tts -= 1;
2450 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2454 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2455 struct xhci_virt_device *virt_dev,
2456 struct xhci_container_ctx *in_ctx)
2458 struct xhci_bw_info ep_bw_info[31];
2460 struct xhci_input_control_ctx *ctrl_ctx;
2461 int old_active_eps = 0;
2463 if (virt_dev->tt_info)
2464 old_active_eps = virt_dev->tt_info->active_eps;
2466 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2468 for (i = 0; i < 31; i++) {
2469 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2472 /* Make a copy of the BW info in case we need to revert this */
2473 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2474 sizeof(ep_bw_info[i]));
2475 /* Drop the endpoint from the interval table if the endpoint is
2476 * being dropped or changed.
2478 if (EP_IS_DROPPED(ctrl_ctx, i))
2479 xhci_drop_ep_from_interval_table(xhci,
2480 &virt_dev->eps[i].bw_info,
2486 /* Overwrite the information stored in the endpoints' bw_info */
2487 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2488 for (i = 0; i < 31; i++) {
2489 /* Add any changed or added endpoints to the interval table */
2490 if (EP_IS_ADDED(ctrl_ctx, i))
2491 xhci_add_ep_to_interval_table(xhci,
2492 &virt_dev->eps[i].bw_info,
2499 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2500 /* Ok, this fits in the bandwidth we have.
2501 * Update the number of active TTs.
2503 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2507 /* We don't have enough bandwidth for this, revert the stored info. */
2508 for (i = 0; i < 31; i++) {
2509 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2512 /* Drop the new copies of any added or changed endpoints from
2513 * the interval table.
2515 if (EP_IS_ADDED(ctrl_ctx, i)) {
2516 xhci_drop_ep_from_interval_table(xhci,
2517 &virt_dev->eps[i].bw_info,
2523 /* Revert the endpoint back to its old information */
2524 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2525 sizeof(ep_bw_info[i]));
2526 /* Add any changed or dropped endpoints back into the table */
2527 if (EP_IS_DROPPED(ctrl_ctx, i))
2528 xhci_add_ep_to_interval_table(xhci,
2529 &virt_dev->eps[i].bw_info,
2539 /* Issue a configure endpoint command or evaluate context command
2540 * and wait for it to finish.
2542 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2543 struct usb_device *udev,
2544 struct xhci_command *command,
2545 bool ctx_change, bool must_succeed)
2549 unsigned long flags;
2550 struct xhci_container_ctx *in_ctx;
2551 struct completion *cmd_completion;
2553 struct xhci_virt_device *virt_dev;
2554 union xhci_trb *cmd_trb;
2556 spin_lock_irqsave(&xhci->lock, flags);
2557 virt_dev = xhci->devs[udev->slot_id];
2560 in_ctx = command->in_ctx;
2562 in_ctx = virt_dev->in_ctx;
2564 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2565 xhci_reserve_host_resources(xhci, in_ctx)) {
2566 spin_unlock_irqrestore(&xhci->lock, flags);
2567 xhci_warn(xhci, "Not enough host resources, "
2568 "active endpoint contexts = %u\n",
2569 xhci->num_active_eps);
2572 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2573 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2574 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2575 xhci_free_host_resources(xhci, in_ctx);
2576 spin_unlock_irqrestore(&xhci->lock, flags);
2577 xhci_warn(xhci, "Not enough bandwidth\n");
2582 cmd_completion = command->completion;
2583 cmd_status = &command->status;
2584 command->command_trb = xhci->cmd_ring->enqueue;
2586 /* Enqueue pointer can be left pointing to the link TRB,
2587 * we must handle that
2589 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2590 command->command_trb =
2591 xhci->cmd_ring->enq_seg->next->trbs;
2593 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2595 cmd_completion = &virt_dev->cmd_completion;
2596 cmd_status = &virt_dev->cmd_status;
2598 init_completion(cmd_completion);
2600 cmd_trb = xhci->cmd_ring->dequeue;
2602 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2603 udev->slot_id, must_succeed);
2605 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2609 list_del(&command->cmd_list);
2610 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2611 xhci_free_host_resources(xhci, in_ctx);
2612 spin_unlock_irqrestore(&xhci->lock, flags);
2613 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2616 xhci_ring_cmd_db(xhci);
2617 spin_unlock_irqrestore(&xhci->lock, flags);
2619 /* Wait for the configure endpoint command to complete */
2620 timeleft = wait_for_completion_interruptible_timeout(
2622 XHCI_CMD_DEFAULT_TIMEOUT);
2623 if (timeleft <= 0) {
2624 xhci_warn(xhci, "%s while waiting for %s command\n",
2625 timeleft == 0 ? "Timeout" : "Signal",
2627 "configure endpoint" :
2628 "evaluate context");
2629 /* cancel the configure endpoint command */
2630 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2637 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2639 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2641 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2642 spin_lock_irqsave(&xhci->lock, flags);
2643 /* If the command failed, remove the reserved resources.
2644 * Otherwise, clean up the estimate to include dropped eps.
2647 xhci_free_host_resources(xhci, in_ctx);
2649 xhci_finish_resource_reservation(xhci, in_ctx);
2650 spin_unlock_irqrestore(&xhci->lock, flags);
2655 /* Called after one or more calls to xhci_add_endpoint() or
2656 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2657 * to call xhci_reset_bandwidth().
2659 * Since we are in the middle of changing either configuration or
2660 * installing a new alt setting, the USB core won't allow URBs to be
2661 * enqueued for any endpoint on the old config or interface. Nothing
2662 * else should be touching the xhci->devs[slot_id] structure, so we
2663 * don't need to take the xhci->lock for manipulating that.
2665 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2669 struct xhci_hcd *xhci;
2670 struct xhci_virt_device *virt_dev;
2671 struct xhci_input_control_ctx *ctrl_ctx;
2672 struct xhci_slot_ctx *slot_ctx;
2674 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2677 xhci = hcd_to_xhci(hcd);
2678 if (xhci->xhc_state & XHCI_STATE_DYING)
2681 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2682 virt_dev = xhci->devs[udev->slot_id];
2684 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2685 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2686 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2687 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2688 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2690 /* Don't issue the command if there's no endpoints to update. */
2691 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2692 ctrl_ctx->drop_flags == 0)
2695 xhci_dbg(xhci, "New Input Control Context:\n");
2696 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2697 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2698 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2700 ret = xhci_configure_endpoint(xhci, udev, NULL,
2703 /* Callee should call reset_bandwidth() */
2707 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2708 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2709 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2711 /* Free any rings that were dropped, but not changed. */
2712 for (i = 1; i < 31; ++i) {
2713 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2714 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2715 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2717 xhci_zero_in_ctx(xhci, virt_dev);
2719 * Install any rings for completely new endpoints or changed endpoints,
2720 * and free or cache any old rings from changed endpoints.
2722 for (i = 1; i < 31; ++i) {
2723 if (!virt_dev->eps[i].new_ring)
2725 /* Only cache or free the old ring if it exists.
2726 * It may not if this is the first add of an endpoint.
2728 if (virt_dev->eps[i].ring) {
2729 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2731 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2732 virt_dev->eps[i].new_ring = NULL;
2738 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2740 struct xhci_hcd *xhci;
2741 struct xhci_virt_device *virt_dev;
2744 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2747 xhci = hcd_to_xhci(hcd);
2749 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2750 virt_dev = xhci->devs[udev->slot_id];
2751 /* Free any rings allocated for added endpoints */
2752 for (i = 0; i < 31; ++i) {
2753 if (virt_dev->eps[i].new_ring) {
2754 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2755 virt_dev->eps[i].new_ring = NULL;
2758 xhci_zero_in_ctx(xhci, virt_dev);
2761 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2762 struct xhci_container_ctx *in_ctx,
2763 struct xhci_container_ctx *out_ctx,
2764 u32 add_flags, u32 drop_flags)
2766 struct xhci_input_control_ctx *ctrl_ctx;
2767 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2768 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2769 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2770 xhci_slot_copy(xhci, in_ctx, out_ctx);
2771 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2773 xhci_dbg(xhci, "Input Context:\n");
2774 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2777 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2778 unsigned int slot_id, unsigned int ep_index,
2779 struct xhci_dequeue_state *deq_state)
2781 struct xhci_container_ctx *in_ctx;
2782 struct xhci_ep_ctx *ep_ctx;
2786 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2787 xhci->devs[slot_id]->out_ctx, ep_index);
2788 in_ctx = xhci->devs[slot_id]->in_ctx;
2789 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2790 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2791 deq_state->new_deq_ptr);
2793 xhci_warn(xhci, "WARN Cannot submit config ep after "
2794 "reset ep command\n");
2795 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2796 deq_state->new_deq_seg,
2797 deq_state->new_deq_ptr);
2800 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2802 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2803 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2804 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2807 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2808 struct usb_device *udev, unsigned int ep_index)
2810 struct xhci_dequeue_state deq_state;
2811 struct xhci_virt_ep *ep;
2813 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2814 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2815 /* We need to move the HW's dequeue pointer past this TD,
2816 * or it will attempt to resend it on the next doorbell ring.
2818 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2819 ep_index, ep->stopped_stream, ep->stopped_td,
2822 /* HW with the reset endpoint quirk will use the saved dequeue state to
2823 * issue a configure endpoint command later.
2825 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2826 xhci_dbg(xhci, "Queueing new dequeue state\n");
2827 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2828 ep_index, ep->stopped_stream, &deq_state);
2830 /* Better hope no one uses the input context between now and the
2831 * reset endpoint completion!
2832 * XXX: No idea how this hardware will react when stream rings
2835 xhci_dbg(xhci, "Setting up input context for "
2836 "configure endpoint command\n");
2837 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2838 ep_index, &deq_state);
2842 /* Deal with stalled endpoints. The core should have sent the control message
2843 * to clear the halt condition. However, we need to make the xHCI hardware
2844 * reset its sequence number, since a device will expect a sequence number of
2845 * zero after the halt condition is cleared.
2846 * Context: in_interrupt
2848 void xhci_endpoint_reset(struct usb_hcd *hcd,
2849 struct usb_host_endpoint *ep)
2851 struct xhci_hcd *xhci;
2852 struct usb_device *udev;
2853 unsigned int ep_index;
2854 unsigned long flags;
2856 struct xhci_virt_ep *virt_ep;
2858 xhci = hcd_to_xhci(hcd);
2859 udev = (struct usb_device *) ep->hcpriv;
2860 /* Called with a root hub endpoint (or an endpoint that wasn't added
2861 * with xhci_add_endpoint()
2865 ep_index = xhci_get_endpoint_index(&ep->desc);
2866 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2867 if (!virt_ep->stopped_td) {
2868 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2869 ep->desc.bEndpointAddress);
2872 if (usb_endpoint_xfer_control(&ep->desc)) {
2873 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2877 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2878 spin_lock_irqsave(&xhci->lock, flags);
2879 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2881 * Can't change the ring dequeue pointer until it's transitioned to the
2882 * stopped state, which is only upon a successful reset endpoint
2883 * command. Better hope that last command worked!
2886 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2887 kfree(virt_ep->stopped_td);
2888 xhci_ring_cmd_db(xhci);
2890 virt_ep->stopped_td = NULL;
2891 virt_ep->stopped_stream = 0;
2892 spin_unlock_irqrestore(&xhci->lock, flags);
2895 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2898 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2899 struct usb_device *udev, struct usb_host_endpoint *ep,
2900 unsigned int slot_id)
2903 unsigned int ep_index;
2904 unsigned int ep_state;
2908 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2911 if (ep->ss_ep_comp.bmAttributes == 0) {
2912 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2913 " descriptor for ep 0x%x does not support streams\n",
2914 ep->desc.bEndpointAddress);
2918 ep_index = xhci_get_endpoint_index(&ep->desc);
2919 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2920 if (ep_state & EP_HAS_STREAMS ||
2921 ep_state & EP_GETTING_STREAMS) {
2922 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2923 "already has streams set up.\n",
2924 ep->desc.bEndpointAddress);
2925 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2926 "dynamic stream context array reallocation.\n");
2929 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2930 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2931 "endpoint 0x%x; URBs are pending.\n",
2932 ep->desc.bEndpointAddress);
2938 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2939 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2941 unsigned int max_streams;
2943 /* The stream context array size must be a power of two */
2944 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2946 * Find out how many primary stream array entries the host controller
2947 * supports. Later we may use secondary stream arrays (similar to 2nd
2948 * level page entries), but that's an optional feature for xHCI host
2949 * controllers. xHCs must support at least 4 stream IDs.
2951 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2952 if (*num_stream_ctxs > max_streams) {
2953 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2955 *num_stream_ctxs = max_streams;
2956 *num_streams = max_streams;
2960 /* Returns an error code if one of the endpoint already has streams.
2961 * This does not change any data structures, it only checks and gathers
2964 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2965 struct usb_device *udev,
2966 struct usb_host_endpoint **eps, unsigned int num_eps,
2967 unsigned int *num_streams, u32 *changed_ep_bitmask)
2969 unsigned int max_streams;
2970 unsigned int endpoint_flag;
2974 for (i = 0; i < num_eps; i++) {
2975 ret = xhci_check_streams_endpoint(xhci, udev,
2976 eps[i], udev->slot_id);
2980 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2981 if (max_streams < (*num_streams - 1)) {
2982 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2983 eps[i]->desc.bEndpointAddress,
2985 *num_streams = max_streams+1;
2988 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2989 if (*changed_ep_bitmask & endpoint_flag)
2991 *changed_ep_bitmask |= endpoint_flag;
2996 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2997 struct usb_device *udev,
2998 struct usb_host_endpoint **eps, unsigned int num_eps)
3000 u32 changed_ep_bitmask = 0;
3001 unsigned int slot_id;
3002 unsigned int ep_index;
3003 unsigned int ep_state;
3006 slot_id = udev->slot_id;
3007 if (!xhci->devs[slot_id])
3010 for (i = 0; i < num_eps; i++) {
3011 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3012 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3013 /* Are streams already being freed for the endpoint? */
3014 if (ep_state & EP_GETTING_NO_STREAMS) {
3015 xhci_warn(xhci, "WARN Can't disable streams for "
3017 "streams are being disabled already.",
3018 eps[i]->desc.bEndpointAddress);
3021 /* Are there actually any streams to free? */
3022 if (!(ep_state & EP_HAS_STREAMS) &&
3023 !(ep_state & EP_GETTING_STREAMS)) {
3024 xhci_warn(xhci, "WARN Can't disable streams for "
3026 "streams are already disabled!",
3027 eps[i]->desc.bEndpointAddress);
3028 xhci_warn(xhci, "WARN xhci_free_streams() called "
3029 "with non-streams endpoint\n");
3032 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3034 return changed_ep_bitmask;
3038 * The USB device drivers use this function (though the HCD interface in USB
3039 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3040 * coordinate mass storage command queueing across multiple endpoints (basically
3041 * a stream ID == a task ID).
3043 * Setting up streams involves allocating the same size stream context array
3044 * for each endpoint and issuing a configure endpoint command for all endpoints.
3046 * Don't allow the call to succeed if one endpoint only supports one stream
3047 * (which means it doesn't support streams at all).
3049 * Drivers may get less stream IDs than they asked for, if the host controller
3050 * hardware or endpoints claim they can't support the number of requested
3053 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3054 struct usb_host_endpoint **eps, unsigned int num_eps,
3055 unsigned int num_streams, gfp_t mem_flags)
3058 struct xhci_hcd *xhci;
3059 struct xhci_virt_device *vdev;
3060 struct xhci_command *config_cmd;
3061 unsigned int ep_index;
3062 unsigned int num_stream_ctxs;
3063 unsigned long flags;
3064 u32 changed_ep_bitmask = 0;
3069 /* Add one to the number of streams requested to account for
3070 * stream 0 that is reserved for xHCI usage.
3073 xhci = hcd_to_xhci(hcd);
3074 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3077 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3079 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3083 /* Check to make sure all endpoints are not already configured for
3084 * streams. While we're at it, find the maximum number of streams that
3085 * all the endpoints will support and check for duplicate endpoints.
3087 spin_lock_irqsave(&xhci->lock, flags);
3088 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3089 num_eps, &num_streams, &changed_ep_bitmask);
3091 xhci_free_command(xhci, config_cmd);
3092 spin_unlock_irqrestore(&xhci->lock, flags);
3095 if (num_streams <= 1) {
3096 xhci_warn(xhci, "WARN: endpoints can't handle "
3097 "more than one stream.\n");
3098 xhci_free_command(xhci, config_cmd);
3099 spin_unlock_irqrestore(&xhci->lock, flags);
3102 vdev = xhci->devs[udev->slot_id];
3103 /* Mark each endpoint as being in transition, so
3104 * xhci_urb_enqueue() will reject all URBs.
3106 for (i = 0; i < num_eps; i++) {
3107 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3108 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3110 spin_unlock_irqrestore(&xhci->lock, flags);
3112 /* Setup internal data structures and allocate HW data structures for
3113 * streams (but don't install the HW structures in the input context
3114 * until we're sure all memory allocation succeeded).
3116 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3117 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3118 num_stream_ctxs, num_streams);
3120 for (i = 0; i < num_eps; i++) {
3121 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3122 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3124 num_streams, mem_flags);
3125 if (!vdev->eps[ep_index].stream_info)
3127 /* Set maxPstreams in endpoint context and update deq ptr to
3128 * point to stream context array. FIXME
3132 /* Set up the input context for a configure endpoint command. */
3133 for (i = 0; i < num_eps; i++) {
3134 struct xhci_ep_ctx *ep_ctx;
3136 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3137 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3139 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3140 vdev->out_ctx, ep_index);
3141 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3142 vdev->eps[ep_index].stream_info);
3144 /* Tell the HW to drop its old copy of the endpoint context info
3145 * and add the updated copy from the input context.
3147 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3148 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3150 /* Issue and wait for the configure endpoint command */
3151 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3154 /* xHC rejected the configure endpoint command for some reason, so we
3155 * leave the old ring intact and free our internal streams data
3161 spin_lock_irqsave(&xhci->lock, flags);
3162 for (i = 0; i < num_eps; i++) {
3163 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3164 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3165 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3166 udev->slot_id, ep_index);
3167 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3169 xhci_free_command(xhci, config_cmd);
3170 spin_unlock_irqrestore(&xhci->lock, flags);
3172 /* Subtract 1 for stream 0, which drivers can't use */
3173 return num_streams - 1;
3176 /* If it didn't work, free the streams! */
3177 for (i = 0; i < num_eps; i++) {
3178 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3179 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3180 vdev->eps[ep_index].stream_info = NULL;
3181 /* FIXME Unset maxPstreams in endpoint context and
3182 * update deq ptr to point to normal string ring.
3184 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3185 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3186 xhci_endpoint_zero(xhci, vdev, eps[i]);
3188 xhci_free_command(xhci, config_cmd);
3192 /* Transition the endpoint from using streams to being a "normal" endpoint
3195 * Modify the endpoint context state, submit a configure endpoint command,
3196 * and free all endpoint rings for streams if that completes successfully.
3198 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3199 struct usb_host_endpoint **eps, unsigned int num_eps,
3203 struct xhci_hcd *xhci;
3204 struct xhci_virt_device *vdev;
3205 struct xhci_command *command;
3206 unsigned int ep_index;
3207 unsigned long flags;
3208 u32 changed_ep_bitmask;
3210 xhci = hcd_to_xhci(hcd);
3211 vdev = xhci->devs[udev->slot_id];
3213 /* Set up a configure endpoint command to remove the streams rings */
3214 spin_lock_irqsave(&xhci->lock, flags);
3215 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3216 udev, eps, num_eps);
3217 if (changed_ep_bitmask == 0) {
3218 spin_unlock_irqrestore(&xhci->lock, flags);
3222 /* Use the xhci_command structure from the first endpoint. We may have
3223 * allocated too many, but the driver may call xhci_free_streams() for
3224 * each endpoint it grouped into one call to xhci_alloc_streams().
3226 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3227 command = vdev->eps[ep_index].stream_info->free_streams_command;
3228 for (i = 0; i < num_eps; i++) {
3229 struct xhci_ep_ctx *ep_ctx;
3231 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3232 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3233 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3234 EP_GETTING_NO_STREAMS;
3236 xhci_endpoint_copy(xhci, command->in_ctx,
3237 vdev->out_ctx, ep_index);
3238 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3239 &vdev->eps[ep_index]);
3241 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3242 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3243 spin_unlock_irqrestore(&xhci->lock, flags);
3245 /* Issue and wait for the configure endpoint command,
3246 * which must succeed.
3248 ret = xhci_configure_endpoint(xhci, udev, command,
3251 /* xHC rejected the configure endpoint command for some reason, so we
3252 * leave the streams rings intact.
3257 spin_lock_irqsave(&xhci->lock, flags);
3258 for (i = 0; i < num_eps; i++) {
3259 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3260 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3261 vdev->eps[ep_index].stream_info = NULL;
3262 /* FIXME Unset maxPstreams in endpoint context and
3263 * update deq ptr to point to normal string ring.
3265 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3266 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3268 spin_unlock_irqrestore(&xhci->lock, flags);
3274 * Deletes endpoint resources for endpoints that were active before a Reset
3275 * Device command, or a Disable Slot command. The Reset Device command leaves
3276 * the control endpoint intact, whereas the Disable Slot command deletes it.
3278 * Must be called with xhci->lock held.
3280 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3281 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3284 unsigned int num_dropped_eps = 0;
3285 unsigned int drop_flags = 0;
3287 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3288 if (virt_dev->eps[i].ring) {
3289 drop_flags |= 1 << i;
3293 xhci->num_active_eps -= num_dropped_eps;
3294 if (num_dropped_eps)
3295 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3297 num_dropped_eps, drop_flags,
3298 xhci->num_active_eps);
3302 * This submits a Reset Device Command, which will set the device state to 0,
3303 * set the device address to 0, and disable all the endpoints except the default
3304 * control endpoint. The USB core should come back and call
3305 * xhci_address_device(), and then re-set up the configuration. If this is
3306 * called because of a usb_reset_and_verify_device(), then the old alternate
3307 * settings will be re-installed through the normal bandwidth allocation
3310 * Wait for the Reset Device command to finish. Remove all structures
3311 * associated with the endpoints that were disabled. Clear the input device
3312 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3314 * If the virt_dev to be reset does not exist or does not match the udev,
3315 * it means the device is lost, possibly due to the xHC restore error and
3316 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3317 * re-allocate the device.
3319 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3322 unsigned long flags;
3323 struct xhci_hcd *xhci;
3324 unsigned int slot_id;
3325 struct xhci_virt_device *virt_dev;
3326 struct xhci_command *reset_device_cmd;
3328 int last_freed_endpoint;
3329 struct xhci_slot_ctx *slot_ctx;
3330 int old_active_eps = 0;
3332 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3335 xhci = hcd_to_xhci(hcd);
3336 slot_id = udev->slot_id;
3337 virt_dev = xhci->devs[slot_id];
3339 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3340 "not exist. Re-allocate the device\n", slot_id);
3341 ret = xhci_alloc_dev(hcd, udev);
3348 if (virt_dev->udev != udev) {
3349 /* If the virt_dev and the udev does not match, this virt_dev
3350 * may belong to another udev.
3351 * Re-allocate the device.
3353 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3354 "not match the udev. Re-allocate the device\n",
3356 ret = xhci_alloc_dev(hcd, udev);
3363 /* If device is not setup, there is no point in resetting it */
3364 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3365 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3366 SLOT_STATE_DISABLED)
3369 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3370 /* Allocate the command structure that holds the struct completion.
3371 * Assume we're in process context, since the normal device reset
3372 * process has to wait for the device anyway. Storage devices are
3373 * reset as part of error handling, so use GFP_NOIO instead of
3376 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3377 if (!reset_device_cmd) {
3378 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3382 /* Attempt to submit the Reset Device command to the command ring */
3383 spin_lock_irqsave(&xhci->lock, flags);
3384 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3386 /* Enqueue pointer can be left pointing to the link TRB,
3387 * we must handle that
3389 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3390 reset_device_cmd->command_trb =
3391 xhci->cmd_ring->enq_seg->next->trbs;
3393 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3394 ret = xhci_queue_reset_device(xhci, slot_id);
3396 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3397 list_del(&reset_device_cmd->cmd_list);
3398 spin_unlock_irqrestore(&xhci->lock, flags);
3399 goto command_cleanup;
3401 xhci_ring_cmd_db(xhci);
3402 spin_unlock_irqrestore(&xhci->lock, flags);
3404 /* Wait for the Reset Device command to finish */
3405 timeleft = wait_for_completion_interruptible_timeout(
3406 reset_device_cmd->completion,
3407 USB_CTRL_SET_TIMEOUT);
3408 if (timeleft <= 0) {
3409 xhci_warn(xhci, "%s while waiting for reset device command\n",
3410 timeleft == 0 ? "Timeout" : "Signal");
3411 spin_lock_irqsave(&xhci->lock, flags);
3412 /* The timeout might have raced with the event ring handler, so
3413 * only delete from the list if the item isn't poisoned.
3415 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3416 list_del(&reset_device_cmd->cmd_list);
3417 spin_unlock_irqrestore(&xhci->lock, flags);
3419 goto command_cleanup;
3422 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3423 * unless we tried to reset a slot ID that wasn't enabled,
3424 * or the device wasn't in the addressed or configured state.
3426 ret = reset_device_cmd->status;
3428 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3429 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3430 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3432 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3433 xhci_info(xhci, "Not freeing device rings.\n");
3434 /* Don't treat this as an error. May change my mind later. */
3436 goto command_cleanup;
3438 xhci_dbg(xhci, "Successful reset device command.\n");
3441 if (xhci_is_vendor_info_code(xhci, ret))
3443 xhci_warn(xhci, "Unknown completion code %u for "
3444 "reset device command.\n", ret);
3446 goto command_cleanup;
3449 /* Free up host controller endpoint resources */
3450 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3451 spin_lock_irqsave(&xhci->lock, flags);
3452 /* Don't delete the default control endpoint resources */
3453 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3454 spin_unlock_irqrestore(&xhci->lock, flags);
3457 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3458 last_freed_endpoint = 1;
3459 for (i = 1; i < 31; ++i) {
3460 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3462 if (ep->ep_state & EP_HAS_STREAMS) {
3463 xhci_free_stream_info(xhci, ep->stream_info);
3464 ep->stream_info = NULL;
3465 ep->ep_state &= ~EP_HAS_STREAMS;
3469 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3470 last_freed_endpoint = i;
3472 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3473 xhci_drop_ep_from_interval_table(xhci,
3474 &virt_dev->eps[i].bw_info,
3479 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3481 /* If necessary, update the number of active TTs on this root port */
3482 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3484 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3485 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3489 xhci_free_command(xhci, reset_device_cmd);
3494 * At this point, the struct usb_device is about to go away, the device has
3495 * disconnected, and all traffic has been stopped and the endpoints have been
3496 * disabled. Free any HC data structures associated with that device.
3498 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3500 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3501 struct xhci_virt_device *virt_dev;
3502 struct device *dev = hcd->self.controller;
3503 unsigned long flags;
3507 #ifndef CONFIG_USB_DEFAULT_PERSIST
3509 * We called pm_runtime_get_noresume when the device was attached.
3510 * Decrement the counter here to allow controller to runtime suspend
3511 * if no devices remain.
3513 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3514 pm_runtime_put_noidle(dev);
3517 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3518 /* If the host is halted due to driver unload, we still need to free the
3521 if (ret <= 0 && ret != -ENODEV)
3524 virt_dev = xhci->devs[udev->slot_id];
3526 /* Stop any wayward timer functions (which may grab the lock) */
3527 for (i = 0; i < 31; ++i) {
3528 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3529 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3532 if (udev->usb2_hw_lpm_enabled) {
3533 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3534 udev->usb2_hw_lpm_enabled = 0;
3537 spin_lock_irqsave(&xhci->lock, flags);
3538 /* Don't disable the slot if the host controller is dead. */
3539 state = xhci_readl(xhci, &xhci->op_regs->status);
3540 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3541 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3542 xhci_free_virt_device(xhci, udev->slot_id);
3543 spin_unlock_irqrestore(&xhci->lock, flags);
3547 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3548 spin_unlock_irqrestore(&xhci->lock, flags);
3549 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3552 xhci_ring_cmd_db(xhci);
3553 spin_unlock_irqrestore(&xhci->lock, flags);
3555 * Event command completion handler will free any data structures
3556 * associated with the slot. XXX Can free sleep?
3561 * Checks if we have enough host controller resources for the default control
3564 * Must be called with xhci->lock held.
3566 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3568 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3569 xhci_dbg(xhci, "Not enough ep ctxs: "
3570 "%u active, need to add 1, limit is %u.\n",
3571 xhci->num_active_eps, xhci->limit_active_eps);
3574 xhci->num_active_eps += 1;
3575 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3576 xhci->num_active_eps);
3582 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3583 * timed out, or allocating memory failed. Returns 1 on success.
3585 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3587 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3588 struct device *dev = hcd->self.controller;
3589 unsigned long flags;
3592 union xhci_trb *cmd_trb;
3594 spin_lock_irqsave(&xhci->lock, flags);
3595 cmd_trb = xhci->cmd_ring->dequeue;
3596 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3598 spin_unlock_irqrestore(&xhci->lock, flags);
3599 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3602 xhci_ring_cmd_db(xhci);
3603 spin_unlock_irqrestore(&xhci->lock, flags);
3605 /* XXX: how much time for xHC slot assignment? */
3606 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3607 XHCI_CMD_DEFAULT_TIMEOUT);
3608 if (timeleft <= 0) {
3609 xhci_warn(xhci, "%s while waiting for a slot\n",
3610 timeleft == 0 ? "Timeout" : "Signal");
3611 /* cancel the enable slot request */
3612 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3615 if (!xhci->slot_id) {
3616 xhci_err(xhci, "Error while assigning device slot ID\n");
3620 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3621 spin_lock_irqsave(&xhci->lock, flags);
3622 ret = xhci_reserve_host_control_ep_resources(xhci);
3624 spin_unlock_irqrestore(&xhci->lock, flags);
3625 xhci_warn(xhci, "Not enough host resources, "
3626 "active endpoint contexts = %u\n",
3627 xhci->num_active_eps);
3630 spin_unlock_irqrestore(&xhci->lock, flags);
3632 /* Use GFP_NOIO, since this function can be called from
3633 * xhci_discover_or_reset_device(), which may be called as part of
3634 * mass storage driver error handling.
3636 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3637 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3640 udev->slot_id = xhci->slot_id;
3642 #ifndef CONFIG_USB_DEFAULT_PERSIST
3644 * If resetting upon resume, we can't put the controller into runtime
3645 * suspend if there is a device attached.
3647 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3648 pm_runtime_get_noresume(dev);
3651 /* Is this a LS or FS device under a HS hub? */
3652 /* Hub or peripherial? */
3656 /* Disable slot, if we can do it without mem alloc */
3657 spin_lock_irqsave(&xhci->lock, flags);
3658 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3659 xhci_ring_cmd_db(xhci);
3660 spin_unlock_irqrestore(&xhci->lock, flags);
3665 * Issue an Address Device command (which will issue a SetAddress request to
3667 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3668 * we should only issue and wait on one address command at the same time.
3670 * We add one to the device address issued by the hardware because the USB core
3671 * uses address 1 for the root hubs (even though they're not really devices).
3673 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3675 unsigned long flags;
3677 struct xhci_virt_device *virt_dev;
3679 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3680 struct xhci_slot_ctx *slot_ctx;
3681 struct xhci_input_control_ctx *ctrl_ctx;
3683 union xhci_trb *cmd_trb;
3685 if (!udev->slot_id) {
3686 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3690 virt_dev = xhci->devs[udev->slot_id];
3692 if (WARN_ON(!virt_dev)) {
3694 * In plug/unplug torture test with an NEC controller,
3695 * a zero-dereference was observed once due to virt_dev = 0.
3696 * Print useful debug rather than crash if it is observed again!
3698 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3703 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3705 * If this is the first Set Address since device plug-in or
3706 * virt_device realloaction after a resume with an xHCI power loss,
3707 * then set up the slot context.
3709 if (!slot_ctx->dev_info)
3710 xhci_setup_addressable_virt_dev(xhci, udev);
3711 /* Otherwise, update the control endpoint ring enqueue pointer. */
3713 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3714 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3715 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3716 ctrl_ctx->drop_flags = 0;
3718 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3719 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3721 spin_lock_irqsave(&xhci->lock, flags);
3722 cmd_trb = xhci->cmd_ring->dequeue;
3723 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3726 spin_unlock_irqrestore(&xhci->lock, flags);
3727 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3730 xhci_ring_cmd_db(xhci);
3731 spin_unlock_irqrestore(&xhci->lock, flags);
3733 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3734 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3735 XHCI_CMD_DEFAULT_TIMEOUT);
3736 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3737 * the SetAddress() "recovery interval" required by USB and aborting the
3738 * command on a timeout.
3740 if (timeleft <= 0) {
3741 xhci_warn(xhci, "%s while waiting for address device command\n",
3742 timeleft == 0 ? "Timeout" : "Signal");
3743 /* cancel the address device command */
3744 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3750 switch (virt_dev->cmd_status) {
3751 case COMP_CTX_STATE:
3753 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3758 dev_warn(&udev->dev, "Device not responding to set address.\n");
3762 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3763 "device command.\n");
3767 xhci_dbg(xhci, "Successful Address Device command\n");
3770 xhci_err(xhci, "ERROR: unexpected command completion "
3771 "code 0x%x.\n", virt_dev->cmd_status);
3772 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3773 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3780 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3781 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3782 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3784 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3785 (unsigned long long)
3786 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3787 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3788 (unsigned long long)virt_dev->out_ctx->dma);
3789 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3790 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3791 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3792 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3794 * USB core uses address 1 for the roothubs, so we add one to the
3795 * address given back to us by the HC.
3797 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3798 /* Use kernel assigned address for devices; store xHC assigned
3799 * address locally. */
3800 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3802 /* Zero the input context control for later use */
3803 ctrl_ctx->add_flags = 0;
3804 ctrl_ctx->drop_flags = 0;
3806 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3811 #ifdef CONFIG_USB_SUSPEND
3813 /* BESL to HIRD Encoding array for USB2 LPM */
3814 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3815 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3817 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3818 static int xhci_calculate_hird_besl(int u2del, bool use_besl)
3823 for (hird = 0; hird < 16; hird++) {
3824 if (xhci_besl_encoding[hird] >= u2del)
3831 hird = (u2del - 51) / 75 + 1;
3840 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3841 struct usb_device *udev)
3843 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3844 struct dev_info *dev_info;
3845 __le32 __iomem **port_array;
3846 __le32 __iomem *addr, *pm_addr;
3848 unsigned int port_num;
3849 unsigned long flags;
3853 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3857 /* we only support lpm for non-hub device connected to root hub yet */
3858 if (!udev->parent || udev->parent->parent ||
3859 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3862 spin_lock_irqsave(&xhci->lock, flags);
3864 /* Look for devices in lpm_failed_devs list */
3865 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3866 le16_to_cpu(udev->descriptor.idProduct);
3867 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3868 if (dev_info->dev_id == dev_id) {
3874 port_array = xhci->usb2_ports;
3875 port_num = udev->portnum - 1;
3877 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3878 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3884 * Test USB 2.0 software LPM.
3885 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3886 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3887 * in the June 2011 errata release.
3889 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3891 * Set L1 Device Slot and HIRD/BESL.
3892 * Check device's USB 2.0 extension descriptor to determine whether
3893 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3895 pm_addr = port_array[port_num] + 1;
3896 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3897 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
3898 hird = xhci_calculate_hird_besl(u2del, 1);
3900 hird = xhci_calculate_hird_besl(u2del, 0);
3902 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3903 xhci_writel(xhci, temp, pm_addr);
3905 /* Set port link state to U2(L1) */
3906 addr = port_array[port_num];
3907 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3910 spin_unlock_irqrestore(&xhci->lock, flags);
3912 spin_lock_irqsave(&xhci->lock, flags);
3914 /* Check L1 Status */
3915 ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3916 if (ret != -ETIMEDOUT) {
3917 /* enter L1 successfully */
3918 temp = xhci_readl(xhci, addr);
3919 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3923 temp = xhci_readl(xhci, pm_addr);
3924 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3925 port_num, temp & PORT_L1S_MASK);
3929 /* Resume the port */
3930 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3932 spin_unlock_irqrestore(&xhci->lock, flags);
3934 spin_lock_irqsave(&xhci->lock, flags);
3937 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3939 /* Check PORTSC to make sure the device is in the right state */
3941 temp = xhci_readl(xhci, addr);
3942 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3943 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3944 (temp & PORT_PLS_MASK) != XDEV_U0) {
3945 xhci_dbg(xhci, "port L1 resume fail\n");
3951 /* Insert dev to lpm_failed_devs list */
3952 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3954 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3959 dev_info->dev_id = dev_id;
3960 INIT_LIST_HEAD(&dev_info->list);
3961 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3963 xhci_ring_device(xhci, udev->slot_id);
3967 spin_unlock_irqrestore(&xhci->lock, flags);
3971 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3972 struct usb_device *udev, int enable)
3974 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3975 __le32 __iomem **port_array;
3976 __le32 __iomem *pm_addr;
3978 unsigned int port_num;
3979 unsigned long flags;
3982 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3986 if (!udev->parent || udev->parent->parent ||
3987 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3990 if (udev->usb2_hw_lpm_capable != 1)
3993 spin_lock_irqsave(&xhci->lock, flags);
3995 port_array = xhci->usb2_ports;
3996 port_num = udev->portnum - 1;
3997 pm_addr = port_array[port_num] + 1;
3998 temp = xhci_readl(xhci, pm_addr);
4000 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4001 enable ? "enable" : "disable", port_num);
4003 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4004 if (le32_to_cpu(udev->bos->ext_cap->bmAttributes) & (1 << 2))
4005 hird = xhci_calculate_hird_besl(u2del, 1);
4007 hird = xhci_calculate_hird_besl(u2del, 0);
4010 temp &= ~PORT_HIRD_MASK;
4011 temp |= PORT_HIRD(hird) | PORT_RWE;
4012 xhci_writel(xhci, temp, pm_addr);
4013 temp = xhci_readl(xhci, pm_addr);
4015 xhci_writel(xhci, temp, pm_addr);
4017 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4018 xhci_writel(xhci, temp, pm_addr);
4021 spin_unlock_irqrestore(&xhci->lock, flags);
4025 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4027 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4030 ret = xhci_usb2_software_lpm_test(hcd, udev);
4032 xhci_dbg(xhci, "software LPM test succeed\n");
4033 if (xhci->hw_lpm_support == 1) {
4034 udev->usb2_hw_lpm_capable = 1;
4035 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4037 udev->usb2_hw_lpm_enabled = 1;
4046 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4047 struct usb_device *udev, int enable)
4052 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4057 #endif /* CONFIG_USB_SUSPEND */
4059 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4060 * internal data structures for the device.
4062 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4063 struct usb_tt *tt, gfp_t mem_flags)
4065 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4066 struct xhci_virt_device *vdev;
4067 struct xhci_command *config_cmd;
4068 struct xhci_input_control_ctx *ctrl_ctx;
4069 struct xhci_slot_ctx *slot_ctx;
4070 unsigned long flags;
4071 unsigned think_time;
4074 /* Ignore root hubs */
4078 vdev = xhci->devs[hdev->slot_id];
4080 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4083 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4085 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4089 spin_lock_irqsave(&xhci->lock, flags);
4090 if (hdev->speed == USB_SPEED_HIGH &&
4091 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4092 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4093 xhci_free_command(xhci, config_cmd);
4094 spin_unlock_irqrestore(&xhci->lock, flags);
4098 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4099 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4100 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4101 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4102 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4104 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4105 if (xhci->hci_version > 0x95) {
4106 xhci_dbg(xhci, "xHCI version %x needs hub "
4107 "TT think time and number of ports\n",
4108 (unsigned int) xhci->hci_version);
4109 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4110 /* Set TT think time - convert from ns to FS bit times.
4111 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4112 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4114 * xHCI 1.0: this field shall be 0 if the device is not a
4117 think_time = tt->think_time;
4118 if (think_time != 0)
4119 think_time = (think_time / 666) - 1;
4120 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4121 slot_ctx->tt_info |=
4122 cpu_to_le32(TT_THINK_TIME(think_time));
4124 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4125 "TT think time or number of ports\n",
4126 (unsigned int) xhci->hci_version);
4128 slot_ctx->dev_state = 0;
4129 spin_unlock_irqrestore(&xhci->lock, flags);
4131 xhci_dbg(xhci, "Set up %s for hub device.\n",
4132 (xhci->hci_version > 0x95) ?
4133 "configure endpoint" : "evaluate context");
4134 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4135 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4137 /* Issue and wait for the configure endpoint or
4138 * evaluate context command.
4140 if (xhci->hci_version > 0x95)
4141 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4144 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4147 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4148 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4150 xhci_free_command(xhci, config_cmd);
4154 int xhci_get_frame(struct usb_hcd *hcd)
4156 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4157 /* EHCI mods by the periodic size. Why? */
4158 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4161 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4163 struct xhci_hcd *xhci;
4164 struct device *dev = hcd->self.controller;
4168 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
4170 if (usb_hcd_is_primary_hcd(hcd)) {
4171 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4174 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4175 xhci->main_hcd = hcd;
4176 /* Mark the first roothub as being USB 2.0.
4177 * The xHCI driver will register the USB 3.0 roothub.
4179 hcd->speed = HCD_USB2;
4180 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4182 * USB 2.0 roothub under xHCI has an integrated TT,
4183 * (rate matching hub) as opposed to having an OHCI/UHCI
4184 * companion controller.
4188 /* xHCI private pointer was set in xhci_pci_probe for the second
4189 * registered roothub.
4191 xhci = hcd_to_xhci(hcd);
4192 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4193 if (HCC_64BIT_ADDR(temp)) {
4194 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4195 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4197 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4202 xhci->cap_regs = hcd->regs;
4203 xhci->op_regs = hcd->regs +
4204 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4205 xhci->run_regs = hcd->regs +
4206 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4207 /* Cache read-only capability registers */
4208 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4209 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4210 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4211 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4212 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4213 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4214 xhci_print_registers(xhci);
4216 get_quirks(dev, xhci);
4218 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4219 * success event after a short transfer. This quirk will ignore such
4222 if (xhci->hci_version > 0x96)
4223 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4225 /* Make sure the HC is halted. */
4226 retval = xhci_halt(xhci);
4230 xhci_dbg(xhci, "Resetting HCD\n");
4231 /* Reset the internal HC memory state and registers. */
4232 retval = xhci_reset(xhci);
4235 xhci_dbg(xhci, "Reset complete\n");
4237 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4238 if (HCC_64BIT_ADDR(temp)) {
4239 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4240 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4242 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4245 xhci_dbg(xhci, "Calling HCD init\n");
4246 /* Initialize HCD and host controller data structures. */
4247 retval = xhci_init(hcd);
4250 xhci_dbg(xhci, "Called HCD init\n");
4257 MODULE_DESCRIPTION(DRIVER_DESC);
4258 MODULE_AUTHOR(DRIVER_AUTHOR);
4259 MODULE_LICENSE("GPL");
4261 static int __init xhci_hcd_init(void)
4265 retval = xhci_register_pci();
4267 printk(KERN_DEBUG "Problem registering PCI driver.");
4271 * Check the compiler generated sizes of structures that must be laid
4272 * out in specific ways for hardware access.
4274 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4275 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4276 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4277 /* xhci_device_control has eight fields, and also
4278 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4280 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4281 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4282 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4283 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4284 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4285 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4286 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4287 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4290 module_init(xhci_hcd_init);
4292 static void __exit xhci_hcd_cleanup(void)
4294 xhci_unregister_pci();
4296 module_exit(xhci_hcd_cleanup);