Merge branch 'for-usb-linus' of git+ssh://master.kernel.org/pub/scm/linux/kernel...
[pandora-kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 /*
179  * Free IRQs
180  * free all IRQs request
181  */
182 static void xhci_free_irq(struct xhci_hcd *xhci)
183 {
184         int i;
185         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
186
187         /* return if using legacy interrupt */
188         if (xhci_to_hcd(xhci)->irq >= 0)
189                 return;
190
191         if (xhci->msix_entries) {
192                 for (i = 0; i < xhci->msix_count; i++)
193                         if (xhci->msix_entries[i].vector)
194                                 free_irq(xhci->msix_entries[i].vector,
195                                                 xhci_to_hcd(xhci));
196         } else if (pdev->irq >= 0)
197                 free_irq(pdev->irq, xhci_to_hcd(xhci));
198
199         return;
200 }
201
202 /*
203  * Set up MSI
204  */
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
206 {
207         int ret;
208         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
209
210         ret = pci_enable_msi(pdev);
211         if (ret) {
212                 xhci_err(xhci, "failed to allocate MSI entry\n");
213                 return ret;
214         }
215
216         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217                                 0, "xhci_hcd", xhci_to_hcd(xhci));
218         if (ret) {
219                 xhci_err(xhci, "disable MSI interrupt\n");
220                 pci_disable_msi(pdev);
221         }
222
223         return ret;
224 }
225
226 /*
227  * Set up MSI-X
228  */
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
230 {
231         int i, ret = 0;
232         struct usb_hcd *hcd = xhci_to_hcd(xhci);
233         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
234
235         /*
236          * calculate number of msi-x vectors supported.
237          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238          *   with max number of interrupters based on the xhci HCSPARAMS1.
239          * - num_online_cpus: maximum msi-x vectors per CPUs core.
240          *   Add additional 1 vector to ensure always available interrupt.
241          */
242         xhci->msix_count = min(num_online_cpus() + 1,
243                                 HCS_MAX_INTRS(xhci->hcs_params1));
244
245         xhci->msix_entries =
246                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247                                 GFP_KERNEL);
248         if (!xhci->msix_entries) {
249                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250                 return -ENOMEM;
251         }
252
253         for (i = 0; i < xhci->msix_count; i++) {
254                 xhci->msix_entries[i].entry = i;
255                 xhci->msix_entries[i].vector = 0;
256         }
257
258         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259         if (ret) {
260                 xhci_err(xhci, "Failed to enable MSI-X\n");
261                 goto free_entries;
262         }
263
264         for (i = 0; i < xhci->msix_count; i++) {
265                 ret = request_irq(xhci->msix_entries[i].vector,
266                                 (irq_handler_t)xhci_msi_irq,
267                                 0, "xhci_hcd", xhci_to_hcd(xhci));
268                 if (ret)
269                         goto disable_msix;
270         }
271
272         hcd->msix_enabled = 1;
273         return ret;
274
275 disable_msix:
276         xhci_err(xhci, "disable MSI-X interrupt\n");
277         xhci_free_irq(xhci);
278         pci_disable_msix(pdev);
279 free_entries:
280         kfree(xhci->msix_entries);
281         xhci->msix_entries = NULL;
282         return ret;
283 }
284
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
287 {
288         struct usb_hcd *hcd = xhci_to_hcd(xhci);
289         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
290
291         xhci_free_irq(xhci);
292
293         if (xhci->msix_entries) {
294                 pci_disable_msix(pdev);
295                 kfree(xhci->msix_entries);
296                 xhci->msix_entries = NULL;
297         } else {
298                 pci_disable_msi(pdev);
299         }
300
301         hcd->msix_enabled = 0;
302         return;
303 }
304
305 /*
306  * Initialize memory for HCD and xHC (one-time init).
307  *
308  * Program the PAGESIZE register, initialize the device context array, create
309  * device contexts (?), set up a command ring segment (or two?), create event
310  * ring (one for now).
311  */
312 int xhci_init(struct usb_hcd *hcd)
313 {
314         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315         int retval = 0;
316
317         xhci_dbg(xhci, "xhci_init\n");
318         spin_lock_init(&xhci->lock);
319         if (link_quirk) {
320                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322         } else {
323                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
324         }
325         retval = xhci_mem_init(xhci, GFP_KERNEL);
326         xhci_dbg(xhci, "Finished xhci_init\n");
327
328         return retval;
329 }
330
331 /*-------------------------------------------------------------------------*/
332
333
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
336 {
337         unsigned long flags;
338         int temp;
339         u64 temp_64;
340         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341         int i, j;
342
343         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
344
345         spin_lock_irqsave(&xhci->lock, flags);
346         temp = xhci_readl(xhci, &xhci->op_regs->status);
347         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
349                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
350                 xhci_dbg(xhci, "HW died, polling stopped.\n");
351                 spin_unlock_irqrestore(&xhci->lock, flags);
352                 return;
353         }
354
355         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
356         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
357         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
358         xhci->error_bitmask = 0;
359         xhci_dbg(xhci, "Event ring:\n");
360         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
361         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
362         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
363         temp_64 &= ~ERST_PTR_MASK;
364         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
365         xhci_dbg(xhci, "Command ring:\n");
366         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
367         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
368         xhci_dbg_cmd_ptrs(xhci);
369         for (i = 0; i < MAX_HC_SLOTS; ++i) {
370                 if (!xhci->devs[i])
371                         continue;
372                 for (j = 0; j < 31; ++j) {
373                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
374                 }
375         }
376         spin_unlock_irqrestore(&xhci->lock, flags);
377
378         if (!xhci->zombie)
379                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
380         else
381                 xhci_dbg(xhci, "Quit polling the event ring.\n");
382 }
383 #endif
384
385 static int xhci_run_finished(struct xhci_hcd *xhci)
386 {
387         if (xhci_start(xhci)) {
388                 xhci_halt(xhci);
389                 return -ENODEV;
390         }
391         xhci->shared_hcd->state = HC_STATE_RUNNING;
392
393         if (xhci->quirks & XHCI_NEC_HOST)
394                 xhci_ring_cmd_db(xhci);
395
396         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
397         return 0;
398 }
399
400 /*
401  * Start the HC after it was halted.
402  *
403  * This function is called by the USB core when the HC driver is added.
404  * Its opposite is xhci_stop().
405  *
406  * xhci_init() must be called once before this function can be called.
407  * Reset the HC, enable device slot contexts, program DCBAAP, and
408  * set command ring pointer and event ring pointer.
409  *
410  * Setup MSI-X vectors and enable interrupts.
411  */
412 int xhci_run(struct usb_hcd *hcd)
413 {
414         u32 temp;
415         u64 temp_64;
416         u32 ret;
417         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
418         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
419
420         /* Start the xHCI host controller running only after the USB 2.0 roothub
421          * is setup.
422          */
423
424         hcd->uses_new_polling = 1;
425         if (!usb_hcd_is_primary_hcd(hcd))
426                 return xhci_run_finished(xhci);
427
428         xhci_dbg(xhci, "xhci_run\n");
429         /* unregister the legacy interrupt */
430         if (hcd->irq)
431                 free_irq(hcd->irq, hcd);
432         hcd->irq = -1;
433
434         /* Some Fresco Logic host controllers advertise MSI, but fail to
435          * generate interrupts.  Don't even try to enable MSI.
436          */
437         if (xhci->quirks & XHCI_BROKEN_MSI)
438                 goto legacy_irq;
439
440         ret = xhci_setup_msix(xhci);
441         if (ret)
442                 /* fall back to msi*/
443                 ret = xhci_setup_msi(xhci);
444
445         if (ret) {
446 legacy_irq:
447                 /* fall back to legacy interrupt*/
448                 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
449                                         hcd->irq_descr, hcd);
450                 if (ret) {
451                         xhci_err(xhci, "request interrupt %d failed\n",
452                                         pdev->irq);
453                         return ret;
454                 }
455                 hcd->irq = pdev->irq;
456         }
457
458 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
459         init_timer(&xhci->event_ring_timer);
460         xhci->event_ring_timer.data = (unsigned long) xhci;
461         xhci->event_ring_timer.function = xhci_event_ring_work;
462         /* Poll the event ring */
463         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
464         xhci->zombie = 0;
465         xhci_dbg(xhci, "Setting event ring polling timer\n");
466         add_timer(&xhci->event_ring_timer);
467 #endif
468
469         xhci_dbg(xhci, "Command ring memory map follows:\n");
470         xhci_debug_ring(xhci, xhci->cmd_ring);
471         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
472         xhci_dbg_cmd_ptrs(xhci);
473
474         xhci_dbg(xhci, "ERST memory map follows:\n");
475         xhci_dbg_erst(xhci, &xhci->erst);
476         xhci_dbg(xhci, "Event ring:\n");
477         xhci_debug_ring(xhci, xhci->event_ring);
478         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
479         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
480         temp_64 &= ~ERST_PTR_MASK;
481         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
482
483         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
484         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
485         temp &= ~ER_IRQ_INTERVAL_MASK;
486         temp |= (u32) 160;
487         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
488
489         /* Set the HCD state before we enable the irqs */
490         temp = xhci_readl(xhci, &xhci->op_regs->command);
491         temp |= (CMD_EIE);
492         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
493                         temp);
494         xhci_writel(xhci, temp, &xhci->op_regs->command);
495
496         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
497         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
498                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
499         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
500                         &xhci->ir_set->irq_pending);
501         xhci_print_ir_set(xhci, 0);
502
503         if (xhci->quirks & XHCI_NEC_HOST)
504                 xhci_queue_vendor_command(xhci, 0, 0, 0,
505                                 TRB_TYPE(TRB_NEC_GET_FW));
506
507         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
508         return 0;
509 }
510
511 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
512 {
513         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
514
515         spin_lock_irq(&xhci->lock);
516         xhci_halt(xhci);
517
518         /* The shared_hcd is going to be deallocated shortly (the USB core only
519          * calls this function when allocation fails in usb_add_hcd(), or
520          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
521          */
522         xhci->shared_hcd = NULL;
523         spin_unlock_irq(&xhci->lock);
524 }
525
526 /*
527  * Stop xHCI driver.
528  *
529  * This function is called by the USB core when the HC driver is removed.
530  * Its opposite is xhci_run().
531  *
532  * Disable device contexts, disable IRQs, and quiesce the HC.
533  * Reset the HC, finish any completed transactions, and cleanup memory.
534  */
535 void xhci_stop(struct usb_hcd *hcd)
536 {
537         u32 temp;
538         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
539
540         if (!usb_hcd_is_primary_hcd(hcd)) {
541                 xhci_only_stop_hcd(xhci->shared_hcd);
542                 return;
543         }
544
545         spin_lock_irq(&xhci->lock);
546         /* Make sure the xHC is halted for a USB3 roothub
547          * (xhci_stop() could be called as part of failed init).
548          */
549         xhci_halt(xhci);
550         xhci_reset(xhci);
551         spin_unlock_irq(&xhci->lock);
552
553         xhci_cleanup_msix(xhci);
554
555 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
556         /* Tell the event ring poll function not to reschedule */
557         xhci->zombie = 1;
558         del_timer_sync(&xhci->event_ring_timer);
559 #endif
560
561         if (xhci->quirks & XHCI_AMD_PLL_FIX)
562                 usb_amd_dev_put();
563
564         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
565         temp = xhci_readl(xhci, &xhci->op_regs->status);
566         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
567         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
568         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
569                         &xhci->ir_set->irq_pending);
570         xhci_print_ir_set(xhci, 0);
571
572         xhci_dbg(xhci, "cleaning up memory\n");
573         xhci_mem_cleanup(xhci);
574         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
575                     xhci_readl(xhci, &xhci->op_regs->status));
576 }
577
578 /*
579  * Shutdown HC (not bus-specific)
580  *
581  * This is called when the machine is rebooting or halting.  We assume that the
582  * machine will be powered off, and the HC's internal state will be reset.
583  * Don't bother to free memory.
584  *
585  * This will only ever be called with the main usb_hcd (the USB3 roothub).
586  */
587 void xhci_shutdown(struct usb_hcd *hcd)
588 {
589         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
590
591         spin_lock_irq(&xhci->lock);
592         xhci_halt(xhci);
593         spin_unlock_irq(&xhci->lock);
594
595         xhci_cleanup_msix(xhci);
596
597         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
598                     xhci_readl(xhci, &xhci->op_regs->status));
599 }
600
601 #ifdef CONFIG_PM
602 static void xhci_save_registers(struct xhci_hcd *xhci)
603 {
604         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
605         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
606         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
607         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
608         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
609         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
610         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
611         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
612         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
613 }
614
615 static void xhci_restore_registers(struct xhci_hcd *xhci)
616 {
617         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
618         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
619         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
620         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
621         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
622         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
623         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
624         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
625 }
626
627 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
628 {
629         u64     val_64;
630
631         /* step 2: initialize command ring buffer */
632         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
633         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
634                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
635                                       xhci->cmd_ring->dequeue) &
636                  (u64) ~CMD_RING_RSVD_BITS) |
637                 xhci->cmd_ring->cycle_state;
638         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
639                         (long unsigned long) val_64);
640         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
641 }
642
643 /*
644  * The whole command ring must be cleared to zero when we suspend the host.
645  *
646  * The host doesn't save the command ring pointer in the suspend well, so we
647  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
648  * aligned, because of the reserved bits in the command ring dequeue pointer
649  * register.  Therefore, we can't just set the dequeue pointer back in the
650  * middle of the ring (TRBs are 16-byte aligned).
651  */
652 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
653 {
654         struct xhci_ring *ring;
655         struct xhci_segment *seg;
656
657         ring = xhci->cmd_ring;
658         seg = ring->deq_seg;
659         do {
660                 memset(seg->trbs, 0, SEGMENT_SIZE);
661                 seg = seg->next;
662         } while (seg != ring->deq_seg);
663
664         /* Reset the software enqueue and dequeue pointers */
665         ring->deq_seg = ring->first_seg;
666         ring->dequeue = ring->first_seg->trbs;
667         ring->enq_seg = ring->deq_seg;
668         ring->enqueue = ring->dequeue;
669
670         /*
671          * Ring is now zeroed, so the HW should look for change of ownership
672          * when the cycle bit is set to 1.
673          */
674         ring->cycle_state = 1;
675
676         /*
677          * Reset the hardware dequeue pointer.
678          * Yes, this will need to be re-written after resume, but we're paranoid
679          * and want to make sure the hardware doesn't access bogus memory
680          * because, say, the BIOS or an SMI started the host without changing
681          * the command ring pointers.
682          */
683         xhci_set_cmd_ring_deq(xhci);
684 }
685
686 /*
687  * Stop HC (not bus-specific)
688  *
689  * This is called when the machine transition into S3/S4 mode.
690  *
691  */
692 int xhci_suspend(struct xhci_hcd *xhci)
693 {
694         int                     rc = 0;
695         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
696         u32                     command;
697         int                     i;
698
699         spin_lock_irq(&xhci->lock);
700         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
701         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
702         /* step 1: stop endpoint */
703         /* skipped assuming that port suspend has done */
704
705         /* step 2: clear Run/Stop bit */
706         command = xhci_readl(xhci, &xhci->op_regs->command);
707         command &= ~CMD_RUN;
708         xhci_writel(xhci, command, &xhci->op_regs->command);
709         if (handshake(xhci, &xhci->op_regs->status,
710                       STS_HALT, STS_HALT, 100*100)) {
711                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
712                 spin_unlock_irq(&xhci->lock);
713                 return -ETIMEDOUT;
714         }
715         xhci_clear_command_ring(xhci);
716
717         /* step 3: save registers */
718         xhci_save_registers(xhci);
719
720         /* step 4: set CSS flag */
721         command = xhci_readl(xhci, &xhci->op_regs->command);
722         command |= CMD_CSS;
723         xhci_writel(xhci, command, &xhci->op_regs->command);
724         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
725                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
726                 spin_unlock_irq(&xhci->lock);
727                 return -ETIMEDOUT;
728         }
729         spin_unlock_irq(&xhci->lock);
730
731         /* step 5: remove core well power */
732         /* synchronize irq when using MSI-X */
733         if (xhci->msix_entries) {
734                 for (i = 0; i < xhci->msix_count; i++)
735                         synchronize_irq(xhci->msix_entries[i].vector);
736         }
737
738         return rc;
739 }
740
741 /*
742  * start xHC (not bus-specific)
743  *
744  * This is called when the machine transition from S3/S4 mode.
745  *
746  */
747 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
748 {
749         u32                     command, temp = 0;
750         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
751         struct usb_hcd          *secondary_hcd;
752         int                     retval;
753
754         /* Wait a bit if either of the roothubs need to settle from the
755          * transition into bus suspend.
756          */
757         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
758                         time_before(jiffies,
759                                 xhci->bus_state[1].next_statechange))
760                 msleep(100);
761
762         spin_lock_irq(&xhci->lock);
763         if (xhci->quirks & XHCI_RESET_ON_RESUME)
764                 hibernated = true;
765
766         if (!hibernated) {
767                 /* step 1: restore register */
768                 xhci_restore_registers(xhci);
769                 /* step 2: initialize command ring buffer */
770                 xhci_set_cmd_ring_deq(xhci);
771                 /* step 3: restore state and start state*/
772                 /* step 3: set CRS flag */
773                 command = xhci_readl(xhci, &xhci->op_regs->command);
774                 command |= CMD_CRS;
775                 xhci_writel(xhci, command, &xhci->op_regs->command);
776                 if (handshake(xhci, &xhci->op_regs->status,
777                               STS_RESTORE, 0, 10*100)) {
778                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
779                         spin_unlock_irq(&xhci->lock);
780                         return -ETIMEDOUT;
781                 }
782                 temp = xhci_readl(xhci, &xhci->op_regs->status);
783         }
784
785         /* If restore operation fails, re-initialize the HC during resume */
786         if ((temp & STS_SRE) || hibernated) {
787                 /* Let the USB core know _both_ roothubs lost power. */
788                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
789                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
790
791                 xhci_dbg(xhci, "Stop HCD\n");
792                 xhci_halt(xhci);
793                 xhci_reset(xhci);
794                 spin_unlock_irq(&xhci->lock);
795                 xhci_cleanup_msix(xhci);
796
797 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
798                 /* Tell the event ring poll function not to reschedule */
799                 xhci->zombie = 1;
800                 del_timer_sync(&xhci->event_ring_timer);
801 #endif
802
803                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
804                 temp = xhci_readl(xhci, &xhci->op_regs->status);
805                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
806                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
807                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
808                                 &xhci->ir_set->irq_pending);
809                 xhci_print_ir_set(xhci, 0);
810
811                 xhci_dbg(xhci, "cleaning up memory\n");
812                 xhci_mem_cleanup(xhci);
813                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
814                             xhci_readl(xhci, &xhci->op_regs->status));
815
816                 /* USB core calls the PCI reinit and start functions twice:
817                  * first with the primary HCD, and then with the secondary HCD.
818                  * If we don't do the same, the host will never be started.
819                  */
820                 if (!usb_hcd_is_primary_hcd(hcd))
821                         secondary_hcd = hcd;
822                 else
823                         secondary_hcd = xhci->shared_hcd;
824
825                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
826                 retval = xhci_init(hcd->primary_hcd);
827                 if (retval)
828                         return retval;
829                 xhci_dbg(xhci, "Start the primary HCD\n");
830                 retval = xhci_run(hcd->primary_hcd);
831                 if (retval)
832                         goto failed_restart;
833
834                 xhci_dbg(xhci, "Start the secondary HCD\n");
835                 retval = xhci_run(secondary_hcd);
836                 if (!retval) {
837                         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
838                         set_bit(HCD_FLAG_HW_ACCESSIBLE,
839                                         &xhci->shared_hcd->flags);
840                 }
841 failed_restart:
842                 hcd->state = HC_STATE_SUSPENDED;
843                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
844                 return retval;
845         }
846
847         /* step 4: set Run/Stop bit */
848         command = xhci_readl(xhci, &xhci->op_regs->command);
849         command |= CMD_RUN;
850         xhci_writel(xhci, command, &xhci->op_regs->command);
851         handshake(xhci, &xhci->op_regs->status, STS_HALT,
852                   0, 250 * 1000);
853
854         /* step 5: walk topology and initialize portsc,
855          * portpmsc and portli
856          */
857         /* this is done in bus_resume */
858
859         /* step 6: restart each of the previously
860          * Running endpoints by ringing their doorbells
861          */
862
863         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
864         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
865
866         spin_unlock_irq(&xhci->lock);
867         return 0;
868 }
869 #endif  /* CONFIG_PM */
870
871 /*-------------------------------------------------------------------------*/
872
873 /**
874  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
875  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
876  * value to right shift 1 for the bitmask.
877  *
878  * Index  = (epnum * 2) + direction - 1,
879  * where direction = 0 for OUT, 1 for IN.
880  * For control endpoints, the IN index is used (OUT index is unused), so
881  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
882  */
883 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
884 {
885         unsigned int index;
886         if (usb_endpoint_xfer_control(desc))
887                 index = (unsigned int) (usb_endpoint_num(desc)*2);
888         else
889                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
890                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
891         return index;
892 }
893
894 /* Find the flag for this endpoint (for use in the control context).  Use the
895  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
896  * bit 1, etc.
897  */
898 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
899 {
900         return 1 << (xhci_get_endpoint_index(desc) + 1);
901 }
902
903 /* Find the flag for this endpoint (for use in the control context).  Use the
904  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
905  * bit 1, etc.
906  */
907 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
908 {
909         return 1 << (ep_index + 1);
910 }
911
912 /* Compute the last valid endpoint context index.  Basically, this is the
913  * endpoint index plus one.  For slot contexts with more than valid endpoint,
914  * we find the most significant bit set in the added contexts flags.
915  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
916  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
917  */
918 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
919 {
920         return fls(added_ctxs) - 1;
921 }
922
923 /* Returns 1 if the arguments are OK;
924  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
925  */
926 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
927                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
928                 const char *func) {
929         struct xhci_hcd *xhci;
930         struct xhci_virt_device *virt_dev;
931
932         if (!hcd || (check_ep && !ep) || !udev) {
933                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
934                                 func);
935                 return -EINVAL;
936         }
937         if (!udev->parent) {
938                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
939                                 func);
940                 return 0;
941         }
942
943         xhci = hcd_to_xhci(hcd);
944         if (xhci->xhc_state & XHCI_STATE_HALTED)
945                 return -ENODEV;
946
947         if (check_virt_dev) {
948                 if (!udev->slot_id || !xhci->devs
949                         || !xhci->devs[udev->slot_id]) {
950                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
951                                                 "device\n", func);
952                         return -EINVAL;
953                 }
954
955                 virt_dev = xhci->devs[udev->slot_id];
956                 if (virt_dev->udev != udev) {
957                         printk(KERN_DEBUG "xHCI %s called with udev and "
958                                           "virt_dev does not match\n", func);
959                         return -EINVAL;
960                 }
961         }
962
963         return 1;
964 }
965
966 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
967                 struct usb_device *udev, struct xhci_command *command,
968                 bool ctx_change, bool must_succeed);
969
970 /*
971  * Full speed devices may have a max packet size greater than 8 bytes, but the
972  * USB core doesn't know that until it reads the first 8 bytes of the
973  * descriptor.  If the usb_device's max packet size changes after that point,
974  * we need to issue an evaluate context command and wait on it.
975  */
976 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
977                 unsigned int ep_index, struct urb *urb)
978 {
979         struct xhci_container_ctx *in_ctx;
980         struct xhci_container_ctx *out_ctx;
981         struct xhci_input_control_ctx *ctrl_ctx;
982         struct xhci_ep_ctx *ep_ctx;
983         int max_packet_size;
984         int hw_max_packet_size;
985         int ret = 0;
986
987         out_ctx = xhci->devs[slot_id]->out_ctx;
988         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
989         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
990         max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
991         if (hw_max_packet_size != max_packet_size) {
992                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
993                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
994                                 max_packet_size);
995                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
996                                 hw_max_packet_size);
997                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
998
999                 /* Set up the modified control endpoint 0 */
1000                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1001                                 xhci->devs[slot_id]->out_ctx, ep_index);
1002                 in_ctx = xhci->devs[slot_id]->in_ctx;
1003                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1004                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1005                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1006
1007                 /* Set up the input context flags for the command */
1008                 /* FIXME: This won't work if a non-default control endpoint
1009                  * changes max packet sizes.
1010                  */
1011                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1012                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1013                 ctrl_ctx->drop_flags = 0;
1014
1015                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1016                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1017                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1018                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1019
1020                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1021                                 true, false);
1022
1023                 /* Clean up the input context for later use by bandwidth
1024                  * functions.
1025                  */
1026                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1027         }
1028         return ret;
1029 }
1030
1031 /*
1032  * non-error returns are a promise to giveback() the urb later
1033  * we drop ownership so next owner (or urb unlink) can get it
1034  */
1035 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1036 {
1037         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1038         unsigned long flags;
1039         int ret = 0;
1040         unsigned int slot_id, ep_index;
1041         struct urb_priv *urb_priv;
1042         int size, i;
1043
1044         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1045                                         true, true, __func__) <= 0)
1046                 return -EINVAL;
1047
1048         slot_id = urb->dev->slot_id;
1049         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1050
1051         if (!HCD_HW_ACCESSIBLE(hcd)) {
1052                 if (!in_interrupt())
1053                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1054                 ret = -ESHUTDOWN;
1055                 goto exit;
1056         }
1057
1058         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1059                 size = urb->number_of_packets;
1060         else
1061                 size = 1;
1062
1063         urb_priv = kzalloc(sizeof(struct urb_priv) +
1064                                   size * sizeof(struct xhci_td *), mem_flags);
1065         if (!urb_priv)
1066                 return -ENOMEM;
1067
1068         for (i = 0; i < size; i++) {
1069                 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1070                 if (!urb_priv->td[i]) {
1071                         urb_priv->length = i;
1072                         xhci_urb_free_priv(xhci, urb_priv);
1073                         return -ENOMEM;
1074                 }
1075         }
1076
1077         urb_priv->length = size;
1078         urb_priv->td_cnt = 0;
1079         urb->hcpriv = urb_priv;
1080
1081         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1082                 /* Check to see if the max packet size for the default control
1083                  * endpoint changed during FS device enumeration
1084                  */
1085                 if (urb->dev->speed == USB_SPEED_FULL) {
1086                         ret = xhci_check_maxpacket(xhci, slot_id,
1087                                         ep_index, urb);
1088                         if (ret < 0)
1089                                 return ret;
1090                 }
1091
1092                 /* We have a spinlock and interrupts disabled, so we must pass
1093                  * atomic context to this function, which may allocate memory.
1094                  */
1095                 spin_lock_irqsave(&xhci->lock, flags);
1096                 if (xhci->xhc_state & XHCI_STATE_DYING)
1097                         goto dying;
1098                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1099                                 slot_id, ep_index);
1100                 spin_unlock_irqrestore(&xhci->lock, flags);
1101         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1102                 spin_lock_irqsave(&xhci->lock, flags);
1103                 if (xhci->xhc_state & XHCI_STATE_DYING)
1104                         goto dying;
1105                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1106                                 EP_GETTING_STREAMS) {
1107                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1108                                         "is transitioning to using streams.\n");
1109                         ret = -EINVAL;
1110                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1111                                 EP_GETTING_NO_STREAMS) {
1112                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1113                                         "is transitioning to "
1114                                         "not having streams.\n");
1115                         ret = -EINVAL;
1116                 } else {
1117                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1118                                         slot_id, ep_index);
1119                 }
1120                 spin_unlock_irqrestore(&xhci->lock, flags);
1121         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1122                 spin_lock_irqsave(&xhci->lock, flags);
1123                 if (xhci->xhc_state & XHCI_STATE_DYING)
1124                         goto dying;
1125                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1126                                 slot_id, ep_index);
1127                 spin_unlock_irqrestore(&xhci->lock, flags);
1128         } else {
1129                 spin_lock_irqsave(&xhci->lock, flags);
1130                 if (xhci->xhc_state & XHCI_STATE_DYING)
1131                         goto dying;
1132                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1133                                 slot_id, ep_index);
1134                 spin_unlock_irqrestore(&xhci->lock, flags);
1135         }
1136 exit:
1137         return ret;
1138 dying:
1139         xhci_urb_free_priv(xhci, urb_priv);
1140         urb->hcpriv = NULL;
1141         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1142                         "non-responsive xHCI host.\n",
1143                         urb->ep->desc.bEndpointAddress, urb);
1144         spin_unlock_irqrestore(&xhci->lock, flags);
1145         return -ESHUTDOWN;
1146 }
1147
1148 /* Get the right ring for the given URB.
1149  * If the endpoint supports streams, boundary check the URB's stream ID.
1150  * If the endpoint doesn't support streams, return the singular endpoint ring.
1151  */
1152 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1153                 struct urb *urb)
1154 {
1155         unsigned int slot_id;
1156         unsigned int ep_index;
1157         unsigned int stream_id;
1158         struct xhci_virt_ep *ep;
1159
1160         slot_id = urb->dev->slot_id;
1161         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1162         stream_id = urb->stream_id;
1163         ep = &xhci->devs[slot_id]->eps[ep_index];
1164         /* Common case: no streams */
1165         if (!(ep->ep_state & EP_HAS_STREAMS))
1166                 return ep->ring;
1167
1168         if (stream_id == 0) {
1169                 xhci_warn(xhci,
1170                                 "WARN: Slot ID %u, ep index %u has streams, "
1171                                 "but URB has no stream ID.\n",
1172                                 slot_id, ep_index);
1173                 return NULL;
1174         }
1175
1176         if (stream_id < ep->stream_info->num_streams)
1177                 return ep->stream_info->stream_rings[stream_id];
1178
1179         xhci_warn(xhci,
1180                         "WARN: Slot ID %u, ep index %u has "
1181                         "stream IDs 1 to %u allocated, "
1182                         "but stream ID %u is requested.\n",
1183                         slot_id, ep_index,
1184                         ep->stream_info->num_streams - 1,
1185                         stream_id);
1186         return NULL;
1187 }
1188
1189 /*
1190  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1191  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1192  * should pick up where it left off in the TD, unless a Set Transfer Ring
1193  * Dequeue Pointer is issued.
1194  *
1195  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1196  * the ring.  Since the ring is a contiguous structure, they can't be physically
1197  * removed.  Instead, there are two options:
1198  *
1199  *  1) If the HC is in the middle of processing the URB to be canceled, we
1200  *     simply move the ring's dequeue pointer past those TRBs using the Set
1201  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1202  *     when drivers timeout on the last submitted URB and attempt to cancel.
1203  *
1204  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1205  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1206  *     HC will need to invalidate the any TRBs it has cached after the stop
1207  *     endpoint command, as noted in the xHCI 0.95 errata.
1208  *
1209  *  3) The TD may have completed by the time the Stop Endpoint Command
1210  *     completes, so software needs to handle that case too.
1211  *
1212  * This function should protect against the TD enqueueing code ringing the
1213  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1214  * It also needs to account for multiple cancellations on happening at the same
1215  * time for the same endpoint.
1216  *
1217  * Note that this function can be called in any context, or so says
1218  * usb_hcd_unlink_urb()
1219  */
1220 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1221 {
1222         unsigned long flags;
1223         int ret, i;
1224         u32 temp;
1225         struct xhci_hcd *xhci;
1226         struct urb_priv *urb_priv;
1227         struct xhci_td *td;
1228         unsigned int ep_index;
1229         struct xhci_ring *ep_ring;
1230         struct xhci_virt_ep *ep;
1231
1232         xhci = hcd_to_xhci(hcd);
1233         spin_lock_irqsave(&xhci->lock, flags);
1234         /* Make sure the URB hasn't completed or been unlinked already */
1235         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1236         if (ret || !urb->hcpriv)
1237                 goto done;
1238         temp = xhci_readl(xhci, &xhci->op_regs->status);
1239         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1240                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1241                 urb_priv = urb->hcpriv;
1242
1243                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1244                 spin_unlock_irqrestore(&xhci->lock, flags);
1245                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1246                 xhci_urb_free_priv(xhci, urb_priv);
1247                 return ret;
1248         }
1249         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1250                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1251                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1252                                 "non-responsive xHCI host.\n",
1253                                 urb->ep->desc.bEndpointAddress, urb);
1254                 /* Let the stop endpoint command watchdog timer (which set this
1255                  * state) finish cleaning up the endpoint TD lists.  We must
1256                  * have caught it in the middle of dropping a lock and giving
1257                  * back an URB.
1258                  */
1259                 goto done;
1260         }
1261
1262         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1263         xhci_dbg(xhci, "Event ring:\n");
1264         xhci_debug_ring(xhci, xhci->event_ring);
1265         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1266         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1267         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1268         if (!ep_ring) {
1269                 ret = -EINVAL;
1270                 goto done;
1271         }
1272
1273         xhci_dbg(xhci, "Endpoint ring:\n");
1274         xhci_debug_ring(xhci, ep_ring);
1275
1276         urb_priv = urb->hcpriv;
1277
1278         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1279                 td = urb_priv->td[i];
1280                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1281         }
1282
1283         /* Queue a stop endpoint command, but only if this is
1284          * the first cancellation to be handled.
1285          */
1286         if (!(ep->ep_state & EP_HALT_PENDING)) {
1287                 ep->ep_state |= EP_HALT_PENDING;
1288                 ep->stop_cmds_pending++;
1289                 ep->stop_cmd_timer.expires = jiffies +
1290                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1291                 add_timer(&ep->stop_cmd_timer);
1292                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1293                 xhci_ring_cmd_db(xhci);
1294         }
1295 done:
1296         spin_unlock_irqrestore(&xhci->lock, flags);
1297         return ret;
1298 }
1299
1300 /* Drop an endpoint from a new bandwidth configuration for this device.
1301  * Only one call to this function is allowed per endpoint before
1302  * check_bandwidth() or reset_bandwidth() must be called.
1303  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1304  * add the endpoint to the schedule with possibly new parameters denoted by a
1305  * different endpoint descriptor in usb_host_endpoint.
1306  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1307  * not allowed.
1308  *
1309  * The USB core will not allow URBs to be queued to an endpoint that is being
1310  * disabled, so there's no need for mutual exclusion to protect
1311  * the xhci->devs[slot_id] structure.
1312  */
1313 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1314                 struct usb_host_endpoint *ep)
1315 {
1316         struct xhci_hcd *xhci;
1317         struct xhci_container_ctx *in_ctx, *out_ctx;
1318         struct xhci_input_control_ctx *ctrl_ctx;
1319         struct xhci_slot_ctx *slot_ctx;
1320         unsigned int last_ctx;
1321         unsigned int ep_index;
1322         struct xhci_ep_ctx *ep_ctx;
1323         u32 drop_flag;
1324         u32 new_add_flags, new_drop_flags, new_slot_info;
1325         int ret;
1326
1327         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1328         if (ret <= 0)
1329                 return ret;
1330         xhci = hcd_to_xhci(hcd);
1331         if (xhci->xhc_state & XHCI_STATE_DYING)
1332                 return -ENODEV;
1333
1334         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1335         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1336         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1337                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1338                                 __func__, drop_flag);
1339                 return 0;
1340         }
1341
1342         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1343         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1344         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1345         ep_index = xhci_get_endpoint_index(&ep->desc);
1346         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1347         /* If the HC already knows the endpoint is disabled,
1348          * or the HCD has noted it is disabled, ignore this request
1349          */
1350         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1351              cpu_to_le32(EP_STATE_DISABLED)) ||
1352             le32_to_cpu(ctrl_ctx->drop_flags) &
1353             xhci_get_endpoint_flag(&ep->desc)) {
1354                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1355                                 __func__, ep);
1356                 return 0;
1357         }
1358
1359         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1360         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1361
1362         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1363         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1364
1365         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1366         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1367         /* Update the last valid endpoint context, if we deleted the last one */
1368         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1369             LAST_CTX(last_ctx)) {
1370                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1371                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1372         }
1373         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1374
1375         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1376
1377         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1378                         (unsigned int) ep->desc.bEndpointAddress,
1379                         udev->slot_id,
1380                         (unsigned int) new_drop_flags,
1381                         (unsigned int) new_add_flags,
1382                         (unsigned int) new_slot_info);
1383         return 0;
1384 }
1385
1386 /* Add an endpoint to a new possible bandwidth configuration for this device.
1387  * Only one call to this function is allowed per endpoint before
1388  * check_bandwidth() or reset_bandwidth() must be called.
1389  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1390  * add the endpoint to the schedule with possibly new parameters denoted by a
1391  * different endpoint descriptor in usb_host_endpoint.
1392  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1393  * not allowed.
1394  *
1395  * The USB core will not allow URBs to be queued to an endpoint until the
1396  * configuration or alt setting is installed in the device, so there's no need
1397  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1398  */
1399 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1400                 struct usb_host_endpoint *ep)
1401 {
1402         struct xhci_hcd *xhci;
1403         struct xhci_container_ctx *in_ctx, *out_ctx;
1404         unsigned int ep_index;
1405         struct xhci_ep_ctx *ep_ctx;
1406         struct xhci_slot_ctx *slot_ctx;
1407         struct xhci_input_control_ctx *ctrl_ctx;
1408         u32 added_ctxs;
1409         unsigned int last_ctx;
1410         u32 new_add_flags, new_drop_flags, new_slot_info;
1411         struct xhci_virt_device *virt_dev;
1412         int ret = 0;
1413
1414         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1415         if (ret <= 0) {
1416                 /* So we won't queue a reset ep command for a root hub */
1417                 ep->hcpriv = NULL;
1418                 return ret;
1419         }
1420         xhci = hcd_to_xhci(hcd);
1421         if (xhci->xhc_state & XHCI_STATE_DYING)
1422                 return -ENODEV;
1423
1424         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1425         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1426         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1427                 /* FIXME when we have to issue an evaluate endpoint command to
1428                  * deal with ep0 max packet size changing once we get the
1429                  * descriptors
1430                  */
1431                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1432                                 __func__, added_ctxs);
1433                 return 0;
1434         }
1435
1436         virt_dev = xhci->devs[udev->slot_id];
1437         in_ctx = virt_dev->in_ctx;
1438         out_ctx = virt_dev->out_ctx;
1439         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1440         ep_index = xhci_get_endpoint_index(&ep->desc);
1441         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1442
1443         /* If this endpoint is already in use, and the upper layers are trying
1444          * to add it again without dropping it, reject the addition.
1445          */
1446         if (virt_dev->eps[ep_index].ring &&
1447                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1448                                 xhci_get_endpoint_flag(&ep->desc))) {
1449                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1450                                 "without dropping it.\n",
1451                                 (unsigned int) ep->desc.bEndpointAddress);
1452                 return -EINVAL;
1453         }
1454
1455         /* If the HCD has already noted the endpoint is enabled,
1456          * ignore this request.
1457          */
1458         if (le32_to_cpu(ctrl_ctx->add_flags) &
1459             xhci_get_endpoint_flag(&ep->desc)) {
1460                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1461                                 __func__, ep);
1462                 return 0;
1463         }
1464
1465         /*
1466          * Configuration and alternate setting changes must be done in
1467          * process context, not interrupt context (or so documenation
1468          * for usb_set_interface() and usb_set_configuration() claim).
1469          */
1470         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1471                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1472                                 __func__, ep->desc.bEndpointAddress);
1473                 return -ENOMEM;
1474         }
1475
1476         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1477         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1478
1479         /* If xhci_endpoint_disable() was called for this endpoint, but the
1480          * xHC hasn't been notified yet through the check_bandwidth() call,
1481          * this re-adds a new state for the endpoint from the new endpoint
1482          * descriptors.  We must drop and re-add this endpoint, so we leave the
1483          * drop flags alone.
1484          */
1485         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1486
1487         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1488         /* Update the last valid endpoint context, if we just added one past */
1489         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1490             LAST_CTX(last_ctx)) {
1491                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1492                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1493         }
1494         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1495
1496         /* Store the usb_device pointer for later use */
1497         ep->hcpriv = udev;
1498
1499         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1500                         (unsigned int) ep->desc.bEndpointAddress,
1501                         udev->slot_id,
1502                         (unsigned int) new_drop_flags,
1503                         (unsigned int) new_add_flags,
1504                         (unsigned int) new_slot_info);
1505         return 0;
1506 }
1507
1508 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1509 {
1510         struct xhci_input_control_ctx *ctrl_ctx;
1511         struct xhci_ep_ctx *ep_ctx;
1512         struct xhci_slot_ctx *slot_ctx;
1513         int i;
1514
1515         /* When a device's add flag and drop flag are zero, any subsequent
1516          * configure endpoint command will leave that endpoint's state
1517          * untouched.  Make sure we don't leave any old state in the input
1518          * endpoint contexts.
1519          */
1520         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1521         ctrl_ctx->drop_flags = 0;
1522         ctrl_ctx->add_flags = 0;
1523         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1524         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1525         /* Endpoint 0 is always valid */
1526         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1527         for (i = 1; i < 31; ++i) {
1528                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1529                 ep_ctx->ep_info = 0;
1530                 ep_ctx->ep_info2 = 0;
1531                 ep_ctx->deq = 0;
1532                 ep_ctx->tx_info = 0;
1533         }
1534 }
1535
1536 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1537                 struct usb_device *udev, u32 *cmd_status)
1538 {
1539         int ret;
1540
1541         switch (*cmd_status) {
1542         case COMP_ENOMEM:
1543                 dev_warn(&udev->dev, "Not enough host controller resources "
1544                                 "for new device state.\n");
1545                 ret = -ENOMEM;
1546                 /* FIXME: can we allocate more resources for the HC? */
1547                 break;
1548         case COMP_BW_ERR:
1549                 dev_warn(&udev->dev, "Not enough bandwidth "
1550                                 "for new device state.\n");
1551                 ret = -ENOSPC;
1552                 /* FIXME: can we go back to the old state? */
1553                 break;
1554         case COMP_TRB_ERR:
1555                 /* the HCD set up something wrong */
1556                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1557                                 "add flag = 1, "
1558                                 "and endpoint is not disabled.\n");
1559                 ret = -EINVAL;
1560                 break;
1561         case COMP_DEV_ERR:
1562                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1563                                 "configure command.\n");
1564                 ret = -ENODEV;
1565                 break;
1566         case COMP_SUCCESS:
1567                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1568                 ret = 0;
1569                 break;
1570         default:
1571                 xhci_err(xhci, "ERROR: unexpected command completion "
1572                                 "code 0x%x.\n", *cmd_status);
1573                 ret = -EINVAL;
1574                 break;
1575         }
1576         return ret;
1577 }
1578
1579 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1580                 struct usb_device *udev, u32 *cmd_status)
1581 {
1582         int ret;
1583         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1584
1585         switch (*cmd_status) {
1586         case COMP_EINVAL:
1587                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1588                                 "context command.\n");
1589                 ret = -EINVAL;
1590                 break;
1591         case COMP_EBADSLT:
1592                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1593                                 "evaluate context command.\n");
1594         case COMP_CTX_STATE:
1595                 dev_warn(&udev->dev, "WARN: invalid context state for "
1596                                 "evaluate context command.\n");
1597                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1598                 ret = -EINVAL;
1599                 break;
1600         case COMP_DEV_ERR:
1601                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1602                                 "context command.\n");
1603                 ret = -ENODEV;
1604                 break;
1605         case COMP_MEL_ERR:
1606                 /* Max Exit Latency too large error */
1607                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1608                 ret = -EINVAL;
1609                 break;
1610         case COMP_SUCCESS:
1611                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1612                 ret = 0;
1613                 break;
1614         default:
1615                 xhci_err(xhci, "ERROR: unexpected command completion "
1616                                 "code 0x%x.\n", *cmd_status);
1617                 ret = -EINVAL;
1618                 break;
1619         }
1620         return ret;
1621 }
1622
1623 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1624                 struct xhci_container_ctx *in_ctx)
1625 {
1626         struct xhci_input_control_ctx *ctrl_ctx;
1627         u32 valid_add_flags;
1628         u32 valid_drop_flags;
1629
1630         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1631         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1632          * (bit 1).  The default control endpoint is added during the Address
1633          * Device command and is never removed until the slot is disabled.
1634          */
1635         valid_add_flags = ctrl_ctx->add_flags >> 2;
1636         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1637
1638         /* Use hweight32 to count the number of ones in the add flags, or
1639          * number of endpoints added.  Don't count endpoints that are changed
1640          * (both added and dropped).
1641          */
1642         return hweight32(valid_add_flags) -
1643                 hweight32(valid_add_flags & valid_drop_flags);
1644 }
1645
1646 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1647                 struct xhci_container_ctx *in_ctx)
1648 {
1649         struct xhci_input_control_ctx *ctrl_ctx;
1650         u32 valid_add_flags;
1651         u32 valid_drop_flags;
1652
1653         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1654         valid_add_flags = ctrl_ctx->add_flags >> 2;
1655         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1656
1657         return hweight32(valid_drop_flags) -
1658                 hweight32(valid_add_flags & valid_drop_flags);
1659 }
1660
1661 /*
1662  * We need to reserve the new number of endpoints before the configure endpoint
1663  * command completes.  We can't subtract the dropped endpoints from the number
1664  * of active endpoints until the command completes because we can oversubscribe
1665  * the host in this case:
1666  *
1667  *  - the first configure endpoint command drops more endpoints than it adds
1668  *  - a second configure endpoint command that adds more endpoints is queued
1669  *  - the first configure endpoint command fails, so the config is unchanged
1670  *  - the second command may succeed, even though there isn't enough resources
1671  *
1672  * Must be called with xhci->lock held.
1673  */
1674 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1675                 struct xhci_container_ctx *in_ctx)
1676 {
1677         u32 added_eps;
1678
1679         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1680         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1681                 xhci_dbg(xhci, "Not enough ep ctxs: "
1682                                 "%u active, need to add %u, limit is %u.\n",
1683                                 xhci->num_active_eps, added_eps,
1684                                 xhci->limit_active_eps);
1685                 return -ENOMEM;
1686         }
1687         xhci->num_active_eps += added_eps;
1688         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1689                         xhci->num_active_eps);
1690         return 0;
1691 }
1692
1693 /*
1694  * The configure endpoint was failed by the xHC for some other reason, so we
1695  * need to revert the resources that failed configuration would have used.
1696  *
1697  * Must be called with xhci->lock held.
1698  */
1699 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1700                 struct xhci_container_ctx *in_ctx)
1701 {
1702         u32 num_failed_eps;
1703
1704         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1705         xhci->num_active_eps -= num_failed_eps;
1706         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1707                         num_failed_eps,
1708                         xhci->num_active_eps);
1709 }
1710
1711 /*
1712  * Now that the command has completed, clean up the active endpoint count by
1713  * subtracting out the endpoints that were dropped (but not changed).
1714  *
1715  * Must be called with xhci->lock held.
1716  */
1717 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1718                 struct xhci_container_ctx *in_ctx)
1719 {
1720         u32 num_dropped_eps;
1721
1722         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1723         xhci->num_active_eps -= num_dropped_eps;
1724         if (num_dropped_eps)
1725                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1726                                 num_dropped_eps,
1727                                 xhci->num_active_eps);
1728 }
1729
1730 /* Issue a configure endpoint command or evaluate context command
1731  * and wait for it to finish.
1732  */
1733 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1734                 struct usb_device *udev,
1735                 struct xhci_command *command,
1736                 bool ctx_change, bool must_succeed)
1737 {
1738         int ret;
1739         int timeleft;
1740         unsigned long flags;
1741         struct xhci_container_ctx *in_ctx;
1742         struct completion *cmd_completion;
1743         u32 *cmd_status;
1744         struct xhci_virt_device *virt_dev;
1745
1746         spin_lock_irqsave(&xhci->lock, flags);
1747         virt_dev = xhci->devs[udev->slot_id];
1748         if (command) {
1749                 in_ctx = command->in_ctx;
1750                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1751                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1752                         spin_unlock_irqrestore(&xhci->lock, flags);
1753                         xhci_warn(xhci, "Not enough host resources, "
1754                                         "active endpoint contexts = %u\n",
1755                                         xhci->num_active_eps);
1756                         return -ENOMEM;
1757                 }
1758
1759                 cmd_completion = command->completion;
1760                 cmd_status = &command->status;
1761                 command->command_trb = xhci->cmd_ring->enqueue;
1762
1763                 /* Enqueue pointer can be left pointing to the link TRB,
1764                  * we must handle that
1765                  */
1766                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
1767                         command->command_trb =
1768                                 xhci->cmd_ring->enq_seg->next->trbs;
1769
1770                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1771         } else {
1772                 in_ctx = virt_dev->in_ctx;
1773                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1774                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1775                         spin_unlock_irqrestore(&xhci->lock, flags);
1776                         xhci_warn(xhci, "Not enough host resources, "
1777                                         "active endpoint contexts = %u\n",
1778                                         xhci->num_active_eps);
1779                         return -ENOMEM;
1780                 }
1781                 cmd_completion = &virt_dev->cmd_completion;
1782                 cmd_status = &virt_dev->cmd_status;
1783         }
1784         init_completion(cmd_completion);
1785
1786         if (!ctx_change)
1787                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1788                                 udev->slot_id, must_succeed);
1789         else
1790                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1791                                 udev->slot_id);
1792         if (ret < 0) {
1793                 if (command)
1794                         list_del(&command->cmd_list);
1795                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
1796                         xhci_free_host_resources(xhci, in_ctx);
1797                 spin_unlock_irqrestore(&xhci->lock, flags);
1798                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1799                 return -ENOMEM;
1800         }
1801         xhci_ring_cmd_db(xhci);
1802         spin_unlock_irqrestore(&xhci->lock, flags);
1803
1804         /* Wait for the configure endpoint command to complete */
1805         timeleft = wait_for_completion_interruptible_timeout(
1806                         cmd_completion,
1807                         USB_CTRL_SET_TIMEOUT);
1808         if (timeleft <= 0) {
1809                 xhci_warn(xhci, "%s while waiting for %s command\n",
1810                                 timeleft == 0 ? "Timeout" : "Signal",
1811                                 ctx_change == 0 ?
1812                                         "configure endpoint" :
1813                                         "evaluate context");
1814                 /* FIXME cancel the configure endpoint command */
1815                 return -ETIME;
1816         }
1817
1818         if (!ctx_change)
1819                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
1820         else
1821                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
1822
1823         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
1824                 spin_lock_irqsave(&xhci->lock, flags);
1825                 /* If the command failed, remove the reserved resources.
1826                  * Otherwise, clean up the estimate to include dropped eps.
1827                  */
1828                 if (ret)
1829                         xhci_free_host_resources(xhci, in_ctx);
1830                 else
1831                         xhci_finish_resource_reservation(xhci, in_ctx);
1832                 spin_unlock_irqrestore(&xhci->lock, flags);
1833         }
1834         return ret;
1835 }
1836
1837 /* Called after one or more calls to xhci_add_endpoint() or
1838  * xhci_drop_endpoint().  If this call fails, the USB core is expected
1839  * to call xhci_reset_bandwidth().
1840  *
1841  * Since we are in the middle of changing either configuration or
1842  * installing a new alt setting, the USB core won't allow URBs to be
1843  * enqueued for any endpoint on the old config or interface.  Nothing
1844  * else should be touching the xhci->devs[slot_id] structure, so we
1845  * don't need to take the xhci->lock for manipulating that.
1846  */
1847 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1848 {
1849         int i;
1850         int ret = 0;
1851         struct xhci_hcd *xhci;
1852         struct xhci_virt_device *virt_dev;
1853         struct xhci_input_control_ctx *ctrl_ctx;
1854         struct xhci_slot_ctx *slot_ctx;
1855
1856         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1857         if (ret <= 0)
1858                 return ret;
1859         xhci = hcd_to_xhci(hcd);
1860         if (xhci->xhc_state & XHCI_STATE_DYING)
1861                 return -ENODEV;
1862
1863         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1864         virt_dev = xhci->devs[udev->slot_id];
1865
1866         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1867         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1868         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1869         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1870         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1871         xhci_dbg(xhci, "New Input Control Context:\n");
1872         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1873         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1874                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1875
1876         ret = xhci_configure_endpoint(xhci, udev, NULL,
1877                         false, false);
1878         if (ret) {
1879                 /* Callee should call reset_bandwidth() */
1880                 return ret;
1881         }
1882
1883         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1884         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1885                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1886
1887         /* Free any rings that were dropped, but not changed. */
1888         for (i = 1; i < 31; ++i) {
1889                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
1890                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
1891                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1892         }
1893         xhci_zero_in_ctx(xhci, virt_dev);
1894         /*
1895          * Install any rings for completely new endpoints or changed endpoints,
1896          * and free or cache any old rings from changed endpoints.
1897          */
1898         for (i = 1; i < 31; ++i) {
1899                 if (!virt_dev->eps[i].new_ring)
1900                         continue;
1901                 /* Only cache or free the old ring if it exists.
1902                  * It may not if this is the first add of an endpoint.
1903                  */
1904                 if (virt_dev->eps[i].ring) {
1905                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1906                 }
1907                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1908                 virt_dev->eps[i].new_ring = NULL;
1909         }
1910
1911         return ret;
1912 }
1913
1914 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1915 {
1916         struct xhci_hcd *xhci;
1917         struct xhci_virt_device *virt_dev;
1918         int i, ret;
1919
1920         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1921         if (ret <= 0)
1922                 return;
1923         xhci = hcd_to_xhci(hcd);
1924
1925         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1926         virt_dev = xhci->devs[udev->slot_id];
1927         /* Free any rings allocated for added endpoints */
1928         for (i = 0; i < 31; ++i) {
1929                 if (virt_dev->eps[i].new_ring) {
1930                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1931                         virt_dev->eps[i].new_ring = NULL;
1932                 }
1933         }
1934         xhci_zero_in_ctx(xhci, virt_dev);
1935 }
1936
1937 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1938                 struct xhci_container_ctx *in_ctx,
1939                 struct xhci_container_ctx *out_ctx,
1940                 u32 add_flags, u32 drop_flags)
1941 {
1942         struct xhci_input_control_ctx *ctrl_ctx;
1943         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1944         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1945         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1946         xhci_slot_copy(xhci, in_ctx, out_ctx);
1947         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1948
1949         xhci_dbg(xhci, "Input Context:\n");
1950         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1951 }
1952
1953 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1954                 unsigned int slot_id, unsigned int ep_index,
1955                 struct xhci_dequeue_state *deq_state)
1956 {
1957         struct xhci_container_ctx *in_ctx;
1958         struct xhci_ep_ctx *ep_ctx;
1959         u32 added_ctxs;
1960         dma_addr_t addr;
1961
1962         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1963                         xhci->devs[slot_id]->out_ctx, ep_index);
1964         in_ctx = xhci->devs[slot_id]->in_ctx;
1965         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1966         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1967                         deq_state->new_deq_ptr);
1968         if (addr == 0) {
1969                 xhci_warn(xhci, "WARN Cannot submit config ep after "
1970                                 "reset ep command\n");
1971                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1972                                 deq_state->new_deq_seg,
1973                                 deq_state->new_deq_ptr);
1974                 return;
1975         }
1976         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
1977
1978         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1979         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1980                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1981 }
1982
1983 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1984                 struct usb_device *udev, unsigned int ep_index)
1985 {
1986         struct xhci_dequeue_state deq_state;
1987         struct xhci_virt_ep *ep;
1988
1989         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1990         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1991         /* We need to move the HW's dequeue pointer past this TD,
1992          * or it will attempt to resend it on the next doorbell ring.
1993          */
1994         xhci_find_new_dequeue_state(xhci, udev->slot_id,
1995                         ep_index, ep->stopped_stream, ep->stopped_td,
1996                         &deq_state);
1997
1998         /* HW with the reset endpoint quirk will use the saved dequeue state to
1999          * issue a configure endpoint command later.
2000          */
2001         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2002                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2003                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2004                                 ep_index, ep->stopped_stream, &deq_state);
2005         } else {
2006                 /* Better hope no one uses the input context between now and the
2007                  * reset endpoint completion!
2008                  * XXX: No idea how this hardware will react when stream rings
2009                  * are enabled.
2010                  */
2011                 xhci_dbg(xhci, "Setting up input context for "
2012                                 "configure endpoint command\n");
2013                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2014                                 ep_index, &deq_state);
2015         }
2016 }
2017
2018 /* Deal with stalled endpoints.  The core should have sent the control message
2019  * to clear the halt condition.  However, we need to make the xHCI hardware
2020  * reset its sequence number, since a device will expect a sequence number of
2021  * zero after the halt condition is cleared.
2022  * Context: in_interrupt
2023  */
2024 void xhci_endpoint_reset(struct usb_hcd *hcd,
2025                 struct usb_host_endpoint *ep)
2026 {
2027         struct xhci_hcd *xhci;
2028         struct usb_device *udev;
2029         unsigned int ep_index;
2030         unsigned long flags;
2031         int ret;
2032         struct xhci_virt_ep *virt_ep;
2033
2034         xhci = hcd_to_xhci(hcd);
2035         udev = (struct usb_device *) ep->hcpriv;
2036         /* Called with a root hub endpoint (or an endpoint that wasn't added
2037          * with xhci_add_endpoint()
2038          */
2039         if (!ep->hcpriv)
2040                 return;
2041         ep_index = xhci_get_endpoint_index(&ep->desc);
2042         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2043         if (!virt_ep->stopped_td) {
2044                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2045                                 ep->desc.bEndpointAddress);
2046                 return;
2047         }
2048         if (usb_endpoint_xfer_control(&ep->desc)) {
2049                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2050                 return;
2051         }
2052
2053         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2054         spin_lock_irqsave(&xhci->lock, flags);
2055         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2056         /*
2057          * Can't change the ring dequeue pointer until it's transitioned to the
2058          * stopped state, which is only upon a successful reset endpoint
2059          * command.  Better hope that last command worked!
2060          */
2061         if (!ret) {
2062                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2063                 kfree(virt_ep->stopped_td);
2064                 xhci_ring_cmd_db(xhci);
2065         }
2066         virt_ep->stopped_td = NULL;
2067         virt_ep->stopped_trb = NULL;
2068         virt_ep->stopped_stream = 0;
2069         spin_unlock_irqrestore(&xhci->lock, flags);
2070
2071         if (ret)
2072                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2073 }
2074
2075 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2076                 struct usb_device *udev, struct usb_host_endpoint *ep,
2077                 unsigned int slot_id)
2078 {
2079         int ret;
2080         unsigned int ep_index;
2081         unsigned int ep_state;
2082
2083         if (!ep)
2084                 return -EINVAL;
2085         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2086         if (ret <= 0)
2087                 return -EINVAL;
2088         if (ep->ss_ep_comp.bmAttributes == 0) {
2089                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2090                                 " descriptor for ep 0x%x does not support streams\n",
2091                                 ep->desc.bEndpointAddress);
2092                 return -EINVAL;
2093         }
2094
2095         ep_index = xhci_get_endpoint_index(&ep->desc);
2096         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2097         if (ep_state & EP_HAS_STREAMS ||
2098                         ep_state & EP_GETTING_STREAMS) {
2099                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2100                                 "already has streams set up.\n",
2101                                 ep->desc.bEndpointAddress);
2102                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2103                                 "dynamic stream context array reallocation.\n");
2104                 return -EINVAL;
2105         }
2106         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2107                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2108                                 "endpoint 0x%x; URBs are pending.\n",
2109                                 ep->desc.bEndpointAddress);
2110                 return -EINVAL;
2111         }
2112         return 0;
2113 }
2114
2115 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2116                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2117 {
2118         unsigned int max_streams;
2119
2120         /* The stream context array size must be a power of two */
2121         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2122         /*
2123          * Find out how many primary stream array entries the host controller
2124          * supports.  Later we may use secondary stream arrays (similar to 2nd
2125          * level page entries), but that's an optional feature for xHCI host
2126          * controllers. xHCs must support at least 4 stream IDs.
2127          */
2128         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2129         if (*num_stream_ctxs > max_streams) {
2130                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2131                                 max_streams);
2132                 *num_stream_ctxs = max_streams;
2133                 *num_streams = max_streams;
2134         }
2135 }
2136
2137 /* Returns an error code if one of the endpoint already has streams.
2138  * This does not change any data structures, it only checks and gathers
2139  * information.
2140  */
2141 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2142                 struct usb_device *udev,
2143                 struct usb_host_endpoint **eps, unsigned int num_eps,
2144                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2145 {
2146         unsigned int max_streams;
2147         unsigned int endpoint_flag;
2148         int i;
2149         int ret;
2150
2151         for (i = 0; i < num_eps; i++) {
2152                 ret = xhci_check_streams_endpoint(xhci, udev,
2153                                 eps[i], udev->slot_id);
2154                 if (ret < 0)
2155                         return ret;
2156
2157                 max_streams = USB_SS_MAX_STREAMS(
2158                                 eps[i]->ss_ep_comp.bmAttributes);
2159                 if (max_streams < (*num_streams - 1)) {
2160                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2161                                         eps[i]->desc.bEndpointAddress,
2162                                         max_streams);
2163                         *num_streams = max_streams+1;
2164                 }
2165
2166                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2167                 if (*changed_ep_bitmask & endpoint_flag)
2168                         return -EINVAL;
2169                 *changed_ep_bitmask |= endpoint_flag;
2170         }
2171         return 0;
2172 }
2173
2174 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2175                 struct usb_device *udev,
2176                 struct usb_host_endpoint **eps, unsigned int num_eps)
2177 {
2178         u32 changed_ep_bitmask = 0;
2179         unsigned int slot_id;
2180         unsigned int ep_index;
2181         unsigned int ep_state;
2182         int i;
2183
2184         slot_id = udev->slot_id;
2185         if (!xhci->devs[slot_id])
2186                 return 0;
2187
2188         for (i = 0; i < num_eps; i++) {
2189                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2190                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2191                 /* Are streams already being freed for the endpoint? */
2192                 if (ep_state & EP_GETTING_NO_STREAMS) {
2193                         xhci_warn(xhci, "WARN Can't disable streams for "
2194                                         "endpoint 0x%x\n, "
2195                                         "streams are being disabled already.",
2196                                         eps[i]->desc.bEndpointAddress);
2197                         return 0;
2198                 }
2199                 /* Are there actually any streams to free? */
2200                 if (!(ep_state & EP_HAS_STREAMS) &&
2201                                 !(ep_state & EP_GETTING_STREAMS)) {
2202                         xhci_warn(xhci, "WARN Can't disable streams for "
2203                                         "endpoint 0x%x\n, "
2204                                         "streams are already disabled!",
2205                                         eps[i]->desc.bEndpointAddress);
2206                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2207                                         "with non-streams endpoint\n");
2208                         return 0;
2209                 }
2210                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2211         }
2212         return changed_ep_bitmask;
2213 }
2214
2215 /*
2216  * The USB device drivers use this function (though the HCD interface in USB
2217  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2218  * coordinate mass storage command queueing across multiple endpoints (basically
2219  * a stream ID == a task ID).
2220  *
2221  * Setting up streams involves allocating the same size stream context array
2222  * for each endpoint and issuing a configure endpoint command for all endpoints.
2223  *
2224  * Don't allow the call to succeed if one endpoint only supports one stream
2225  * (which means it doesn't support streams at all).
2226  *
2227  * Drivers may get less stream IDs than they asked for, if the host controller
2228  * hardware or endpoints claim they can't support the number of requested
2229  * stream IDs.
2230  */
2231 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2232                 struct usb_host_endpoint **eps, unsigned int num_eps,
2233                 unsigned int num_streams, gfp_t mem_flags)
2234 {
2235         int i, ret;
2236         struct xhci_hcd *xhci;
2237         struct xhci_virt_device *vdev;
2238         struct xhci_command *config_cmd;
2239         unsigned int ep_index;
2240         unsigned int num_stream_ctxs;
2241         unsigned long flags;
2242         u32 changed_ep_bitmask = 0;
2243
2244         if (!eps)
2245                 return -EINVAL;
2246
2247         /* Add one to the number of streams requested to account for
2248          * stream 0 that is reserved for xHCI usage.
2249          */
2250         num_streams += 1;
2251         xhci = hcd_to_xhci(hcd);
2252         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2253                         num_streams);
2254
2255         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2256         if (!config_cmd) {
2257                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2258                 return -ENOMEM;
2259         }
2260
2261         /* Check to make sure all endpoints are not already configured for
2262          * streams.  While we're at it, find the maximum number of streams that
2263          * all the endpoints will support and check for duplicate endpoints.
2264          */
2265         spin_lock_irqsave(&xhci->lock, flags);
2266         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2267                         num_eps, &num_streams, &changed_ep_bitmask);
2268         if (ret < 0) {
2269                 xhci_free_command(xhci, config_cmd);
2270                 spin_unlock_irqrestore(&xhci->lock, flags);
2271                 return ret;
2272         }
2273         if (num_streams <= 1) {
2274                 xhci_warn(xhci, "WARN: endpoints can't handle "
2275                                 "more than one stream.\n");
2276                 xhci_free_command(xhci, config_cmd);
2277                 spin_unlock_irqrestore(&xhci->lock, flags);
2278                 return -EINVAL;
2279         }
2280         vdev = xhci->devs[udev->slot_id];
2281         /* Mark each endpoint as being in transition, so
2282          * xhci_urb_enqueue() will reject all URBs.
2283          */
2284         for (i = 0; i < num_eps; i++) {
2285                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2286                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2287         }
2288         spin_unlock_irqrestore(&xhci->lock, flags);
2289
2290         /* Setup internal data structures and allocate HW data structures for
2291          * streams (but don't install the HW structures in the input context
2292          * until we're sure all memory allocation succeeded).
2293          */
2294         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2295         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2296                         num_stream_ctxs, num_streams);
2297
2298         for (i = 0; i < num_eps; i++) {
2299                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2300                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2301                                 num_stream_ctxs,
2302                                 num_streams, mem_flags);
2303                 if (!vdev->eps[ep_index].stream_info)
2304                         goto cleanup;
2305                 /* Set maxPstreams in endpoint context and update deq ptr to
2306                  * point to stream context array. FIXME
2307                  */
2308         }
2309
2310         /* Set up the input context for a configure endpoint command. */
2311         for (i = 0; i < num_eps; i++) {
2312                 struct xhci_ep_ctx *ep_ctx;
2313
2314                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2315                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2316
2317                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2318                                 vdev->out_ctx, ep_index);
2319                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2320                                 vdev->eps[ep_index].stream_info);
2321         }
2322         /* Tell the HW to drop its old copy of the endpoint context info
2323          * and add the updated copy from the input context.
2324          */
2325         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2326                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2327
2328         /* Issue and wait for the configure endpoint command */
2329         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2330                         false, false);
2331
2332         /* xHC rejected the configure endpoint command for some reason, so we
2333          * leave the old ring intact and free our internal streams data
2334          * structure.
2335          */
2336         if (ret < 0)
2337                 goto cleanup;
2338
2339         spin_lock_irqsave(&xhci->lock, flags);
2340         for (i = 0; i < num_eps; i++) {
2341                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2342                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2343                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2344                          udev->slot_id, ep_index);
2345                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2346         }
2347         xhci_free_command(xhci, config_cmd);
2348         spin_unlock_irqrestore(&xhci->lock, flags);
2349
2350         /* Subtract 1 for stream 0, which drivers can't use */
2351         return num_streams - 1;
2352
2353 cleanup:
2354         /* If it didn't work, free the streams! */
2355         for (i = 0; i < num_eps; i++) {
2356                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2357                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2358                 vdev->eps[ep_index].stream_info = NULL;
2359                 /* FIXME Unset maxPstreams in endpoint context and
2360                  * update deq ptr to point to normal string ring.
2361                  */
2362                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2363                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2364                 xhci_endpoint_zero(xhci, vdev, eps[i]);
2365         }
2366         xhci_free_command(xhci, config_cmd);
2367         return -ENOMEM;
2368 }
2369
2370 /* Transition the endpoint from using streams to being a "normal" endpoint
2371  * without streams.
2372  *
2373  * Modify the endpoint context state, submit a configure endpoint command,
2374  * and free all endpoint rings for streams if that completes successfully.
2375  */
2376 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2377                 struct usb_host_endpoint **eps, unsigned int num_eps,
2378                 gfp_t mem_flags)
2379 {
2380         int i, ret;
2381         struct xhci_hcd *xhci;
2382         struct xhci_virt_device *vdev;
2383         struct xhci_command *command;
2384         unsigned int ep_index;
2385         unsigned long flags;
2386         u32 changed_ep_bitmask;
2387
2388         xhci = hcd_to_xhci(hcd);
2389         vdev = xhci->devs[udev->slot_id];
2390
2391         /* Set up a configure endpoint command to remove the streams rings */
2392         spin_lock_irqsave(&xhci->lock, flags);
2393         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2394                         udev, eps, num_eps);
2395         if (changed_ep_bitmask == 0) {
2396                 spin_unlock_irqrestore(&xhci->lock, flags);
2397                 return -EINVAL;
2398         }
2399
2400         /* Use the xhci_command structure from the first endpoint.  We may have
2401          * allocated too many, but the driver may call xhci_free_streams() for
2402          * each endpoint it grouped into one call to xhci_alloc_streams().
2403          */
2404         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2405         command = vdev->eps[ep_index].stream_info->free_streams_command;
2406         for (i = 0; i < num_eps; i++) {
2407                 struct xhci_ep_ctx *ep_ctx;
2408
2409                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2410                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2411                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2412                         EP_GETTING_NO_STREAMS;
2413
2414                 xhci_endpoint_copy(xhci, command->in_ctx,
2415                                 vdev->out_ctx, ep_index);
2416                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2417                                 &vdev->eps[ep_index]);
2418         }
2419         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2420                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2421         spin_unlock_irqrestore(&xhci->lock, flags);
2422
2423         /* Issue and wait for the configure endpoint command,
2424          * which must succeed.
2425          */
2426         ret = xhci_configure_endpoint(xhci, udev, command,
2427                         false, true);
2428
2429         /* xHC rejected the configure endpoint command for some reason, so we
2430          * leave the streams rings intact.
2431          */
2432         if (ret < 0)
2433                 return ret;
2434
2435         spin_lock_irqsave(&xhci->lock, flags);
2436         for (i = 0; i < num_eps; i++) {
2437                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2438                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2439                 vdev->eps[ep_index].stream_info = NULL;
2440                 /* FIXME Unset maxPstreams in endpoint context and
2441                  * update deq ptr to point to normal string ring.
2442                  */
2443                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2444                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2445         }
2446         spin_unlock_irqrestore(&xhci->lock, flags);
2447
2448         return 0;
2449 }
2450
2451 /*
2452  * Deletes endpoint resources for endpoints that were active before a Reset
2453  * Device command, or a Disable Slot command.  The Reset Device command leaves
2454  * the control endpoint intact, whereas the Disable Slot command deletes it.
2455  *
2456  * Must be called with xhci->lock held.
2457  */
2458 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2459         struct xhci_virt_device *virt_dev, bool drop_control_ep)
2460 {
2461         int i;
2462         unsigned int num_dropped_eps = 0;
2463         unsigned int drop_flags = 0;
2464
2465         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2466                 if (virt_dev->eps[i].ring) {
2467                         drop_flags |= 1 << i;
2468                         num_dropped_eps++;
2469                 }
2470         }
2471         xhci->num_active_eps -= num_dropped_eps;
2472         if (num_dropped_eps)
2473                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
2474                                 "%u now active.\n",
2475                                 num_dropped_eps, drop_flags,
2476                                 xhci->num_active_eps);
2477 }
2478
2479 /*
2480  * This submits a Reset Device Command, which will set the device state to 0,
2481  * set the device address to 0, and disable all the endpoints except the default
2482  * control endpoint.  The USB core should come back and call
2483  * xhci_address_device(), and then re-set up the configuration.  If this is
2484  * called because of a usb_reset_and_verify_device(), then the old alternate
2485  * settings will be re-installed through the normal bandwidth allocation
2486  * functions.
2487  *
2488  * Wait for the Reset Device command to finish.  Remove all structures
2489  * associated with the endpoints that were disabled.  Clear the input device
2490  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
2491  *
2492  * If the virt_dev to be reset does not exist or does not match the udev,
2493  * it means the device is lost, possibly due to the xHC restore error and
2494  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2495  * re-allocate the device.
2496  */
2497 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2498 {
2499         int ret, i;
2500         unsigned long flags;
2501         struct xhci_hcd *xhci;
2502         unsigned int slot_id;
2503         struct xhci_virt_device *virt_dev;
2504         struct xhci_command *reset_device_cmd;
2505         int timeleft;
2506         int last_freed_endpoint;
2507         struct xhci_slot_ctx *slot_ctx;
2508
2509         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2510         if (ret <= 0)
2511                 return ret;
2512         xhci = hcd_to_xhci(hcd);
2513         slot_id = udev->slot_id;
2514         virt_dev = xhci->devs[slot_id];
2515         if (!virt_dev) {
2516                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2517                                 "not exist. Re-allocate the device\n", slot_id);
2518                 ret = xhci_alloc_dev(hcd, udev);
2519                 if (ret == 1)
2520                         return 0;
2521                 else
2522                         return -EINVAL;
2523         }
2524
2525         if (virt_dev->udev != udev) {
2526                 /* If the virt_dev and the udev does not match, this virt_dev
2527                  * may belong to another udev.
2528                  * Re-allocate the device.
2529                  */
2530                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2531                                 "not match the udev. Re-allocate the device\n",
2532                                 slot_id);
2533                 ret = xhci_alloc_dev(hcd, udev);
2534                 if (ret == 1)
2535                         return 0;
2536                 else
2537                         return -EINVAL;
2538         }
2539
2540         /* If device is not setup, there is no point in resetting it */
2541         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2542         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
2543                                                 SLOT_STATE_DISABLED)
2544                 return 0;
2545
2546         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2547         /* Allocate the command structure that holds the struct completion.
2548          * Assume we're in process context, since the normal device reset
2549          * process has to wait for the device anyway.  Storage devices are
2550          * reset as part of error handling, so use GFP_NOIO instead of
2551          * GFP_KERNEL.
2552          */
2553         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2554         if (!reset_device_cmd) {
2555                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2556                 return -ENOMEM;
2557         }
2558
2559         /* Attempt to submit the Reset Device command to the command ring */
2560         spin_lock_irqsave(&xhci->lock, flags);
2561         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2562
2563         /* Enqueue pointer can be left pointing to the link TRB,
2564          * we must handle that
2565          */
2566         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
2567                 reset_device_cmd->command_trb =
2568                         xhci->cmd_ring->enq_seg->next->trbs;
2569
2570         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2571         ret = xhci_queue_reset_device(xhci, slot_id);
2572         if (ret) {
2573                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2574                 list_del(&reset_device_cmd->cmd_list);
2575                 spin_unlock_irqrestore(&xhci->lock, flags);
2576                 goto command_cleanup;
2577         }
2578         xhci_ring_cmd_db(xhci);
2579         spin_unlock_irqrestore(&xhci->lock, flags);
2580
2581         /* Wait for the Reset Device command to finish */
2582         timeleft = wait_for_completion_interruptible_timeout(
2583                         reset_device_cmd->completion,
2584                         USB_CTRL_SET_TIMEOUT);
2585         if (timeleft <= 0) {
2586                 xhci_warn(xhci, "%s while waiting for reset device command\n",
2587                                 timeleft == 0 ? "Timeout" : "Signal");
2588                 spin_lock_irqsave(&xhci->lock, flags);
2589                 /* The timeout might have raced with the event ring handler, so
2590                  * only delete from the list if the item isn't poisoned.
2591                  */
2592                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2593                         list_del(&reset_device_cmd->cmd_list);
2594                 spin_unlock_irqrestore(&xhci->lock, flags);
2595                 ret = -ETIME;
2596                 goto command_cleanup;
2597         }
2598
2599         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2600          * unless we tried to reset a slot ID that wasn't enabled,
2601          * or the device wasn't in the addressed or configured state.
2602          */
2603         ret = reset_device_cmd->status;
2604         switch (ret) {
2605         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2606         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2607                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2608                                 slot_id,
2609                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2610                 xhci_info(xhci, "Not freeing device rings.\n");
2611                 /* Don't treat this as an error.  May change my mind later. */
2612                 ret = 0;
2613                 goto command_cleanup;
2614         case COMP_SUCCESS:
2615                 xhci_dbg(xhci, "Successful reset device command.\n");
2616                 break;
2617         default:
2618                 if (xhci_is_vendor_info_code(xhci, ret))
2619                         break;
2620                 xhci_warn(xhci, "Unknown completion code %u for "
2621                                 "reset device command.\n", ret);
2622                 ret = -EINVAL;
2623                 goto command_cleanup;
2624         }
2625
2626         /* Free up host controller endpoint resources */
2627         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2628                 spin_lock_irqsave(&xhci->lock, flags);
2629                 /* Don't delete the default control endpoint resources */
2630                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
2631                 spin_unlock_irqrestore(&xhci->lock, flags);
2632         }
2633
2634         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2635         last_freed_endpoint = 1;
2636         for (i = 1; i < 31; ++i) {
2637                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
2638
2639                 if (ep->ep_state & EP_HAS_STREAMS) {
2640                         xhci_free_stream_info(xhci, ep->stream_info);
2641                         ep->stream_info = NULL;
2642                         ep->ep_state &= ~EP_HAS_STREAMS;
2643                 }
2644
2645                 if (ep->ring) {
2646                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2647                         last_freed_endpoint = i;
2648                 }
2649         }
2650         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2651         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2652         ret = 0;
2653
2654 command_cleanup:
2655         xhci_free_command(xhci, reset_device_cmd);
2656         return ret;
2657 }
2658
2659 /*
2660  * At this point, the struct usb_device is about to go away, the device has
2661  * disconnected, and all traffic has been stopped and the endpoints have been
2662  * disabled.  Free any HC data structures associated with that device.
2663  */
2664 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2665 {
2666         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2667         struct xhci_virt_device *virt_dev;
2668         unsigned long flags;
2669         u32 state;
2670         int i, ret;
2671
2672         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2673         /* If the host is halted due to driver unload, we still need to free the
2674          * device.
2675          */
2676         if (ret <= 0 && ret != -ENODEV)
2677                 return;
2678
2679         virt_dev = xhci->devs[udev->slot_id];
2680
2681         /* Stop any wayward timer functions (which may grab the lock) */
2682         for (i = 0; i < 31; ++i) {
2683                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2684                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2685         }
2686
2687         spin_lock_irqsave(&xhci->lock, flags);
2688         /* Don't disable the slot if the host controller is dead. */
2689         state = xhci_readl(xhci, &xhci->op_regs->status);
2690         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
2691                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
2692                 xhci_free_virt_device(xhci, udev->slot_id);
2693                 spin_unlock_irqrestore(&xhci->lock, flags);
2694                 return;
2695         }
2696
2697         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2698                 spin_unlock_irqrestore(&xhci->lock, flags);
2699                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2700                 return;
2701         }
2702         xhci_ring_cmd_db(xhci);
2703         spin_unlock_irqrestore(&xhci->lock, flags);
2704         /*
2705          * Event command completion handler will free any data structures
2706          * associated with the slot.  XXX Can free sleep?
2707          */
2708 }
2709
2710 /*
2711  * Checks if we have enough host controller resources for the default control
2712  * endpoint.
2713  *
2714  * Must be called with xhci->lock held.
2715  */
2716 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
2717 {
2718         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
2719                 xhci_dbg(xhci, "Not enough ep ctxs: "
2720                                 "%u active, need to add 1, limit is %u.\n",
2721                                 xhci->num_active_eps, xhci->limit_active_eps);
2722                 return -ENOMEM;
2723         }
2724         xhci->num_active_eps += 1;
2725         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
2726                         xhci->num_active_eps);
2727         return 0;
2728 }
2729
2730
2731 /*
2732  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2733  * timed out, or allocating memory failed.  Returns 1 on success.
2734  */
2735 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2736 {
2737         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2738         unsigned long flags;
2739         int timeleft;
2740         int ret;
2741
2742         spin_lock_irqsave(&xhci->lock, flags);
2743         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2744         if (ret) {
2745                 spin_unlock_irqrestore(&xhci->lock, flags);
2746                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2747                 return 0;
2748         }
2749         xhci_ring_cmd_db(xhci);
2750         spin_unlock_irqrestore(&xhci->lock, flags);
2751
2752         /* XXX: how much time for xHC slot assignment? */
2753         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2754                         USB_CTRL_SET_TIMEOUT);
2755         if (timeleft <= 0) {
2756                 xhci_warn(xhci, "%s while waiting for a slot\n",
2757                                 timeleft == 0 ? "Timeout" : "Signal");
2758                 /* FIXME cancel the enable slot request */
2759                 return 0;
2760         }
2761
2762         if (!xhci->slot_id) {
2763                 xhci_err(xhci, "Error while assigning device slot ID\n");
2764                 return 0;
2765         }
2766
2767         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2768                 spin_lock_irqsave(&xhci->lock, flags);
2769                 ret = xhci_reserve_host_control_ep_resources(xhci);
2770                 if (ret) {
2771                         spin_unlock_irqrestore(&xhci->lock, flags);
2772                         xhci_warn(xhci, "Not enough host resources, "
2773                                         "active endpoint contexts = %u\n",
2774                                         xhci->num_active_eps);
2775                         goto disable_slot;
2776                 }
2777                 spin_unlock_irqrestore(&xhci->lock, flags);
2778         }
2779         /* Use GFP_NOIO, since this function can be called from
2780          * xhci_discover_or_reset_device(), which may be called as part of
2781          * mass storage driver error handling.
2782          */
2783         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2784                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2785                 goto disable_slot;
2786         }
2787         udev->slot_id = xhci->slot_id;
2788         /* Is this a LS or FS device under a HS hub? */
2789         /* Hub or peripherial? */
2790         return 1;
2791
2792 disable_slot:
2793         /* Disable slot, if we can do it without mem alloc */
2794         spin_lock_irqsave(&xhci->lock, flags);
2795         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2796                 xhci_ring_cmd_db(xhci);
2797         spin_unlock_irqrestore(&xhci->lock, flags);
2798         return 0;
2799 }
2800
2801 /*
2802  * Issue an Address Device command (which will issue a SetAddress request to
2803  * the device).
2804  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2805  * we should only issue and wait on one address command at the same time.
2806  *
2807  * We add one to the device address issued by the hardware because the USB core
2808  * uses address 1 for the root hubs (even though they're not really devices).
2809  */
2810 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2811 {
2812         unsigned long flags;
2813         int timeleft;
2814         struct xhci_virt_device *virt_dev;
2815         int ret = 0;
2816         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2817         struct xhci_slot_ctx *slot_ctx;
2818         struct xhci_input_control_ctx *ctrl_ctx;
2819         u64 temp_64;
2820
2821         if (!udev->slot_id) {
2822                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2823                 return -EINVAL;
2824         }
2825
2826         virt_dev = xhci->devs[udev->slot_id];
2827
2828         if (WARN_ON(!virt_dev)) {
2829                 /*
2830                  * In plug/unplug torture test with an NEC controller,
2831                  * a zero-dereference was observed once due to virt_dev = 0.
2832                  * Print useful debug rather than crash if it is observed again!
2833                  */
2834                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2835                         udev->slot_id);
2836                 return -EINVAL;
2837         }
2838
2839         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2840         /*
2841          * If this is the first Set Address since device plug-in or
2842          * virt_device realloaction after a resume with an xHCI power loss,
2843          * then set up the slot context.
2844          */
2845         if (!slot_ctx->dev_info)
2846                 xhci_setup_addressable_virt_dev(xhci, udev);
2847         /* Otherwise, update the control endpoint ring enqueue pointer. */
2848         else
2849                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2850         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2851         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2852
2853         spin_lock_irqsave(&xhci->lock, flags);
2854         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2855                                         udev->slot_id);
2856         if (ret) {
2857                 spin_unlock_irqrestore(&xhci->lock, flags);
2858                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2859                 return ret;
2860         }
2861         xhci_ring_cmd_db(xhci);
2862         spin_unlock_irqrestore(&xhci->lock, flags);
2863
2864         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2865         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2866                         USB_CTRL_SET_TIMEOUT);
2867         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2868          * the SetAddress() "recovery interval" required by USB and aborting the
2869          * command on a timeout.
2870          */
2871         if (timeleft <= 0) {
2872                 xhci_warn(xhci, "%s while waiting for a slot\n",
2873                                 timeleft == 0 ? "Timeout" : "Signal");
2874                 /* FIXME cancel the address device command */
2875                 return -ETIME;
2876         }
2877
2878         switch (virt_dev->cmd_status) {
2879         case COMP_CTX_STATE:
2880         case COMP_EBADSLT:
2881                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2882                                 udev->slot_id);
2883                 ret = -EINVAL;
2884                 break;
2885         case COMP_TX_ERR:
2886                 dev_warn(&udev->dev, "Device not responding to set address.\n");
2887                 ret = -EPROTO;
2888                 break;
2889         case COMP_DEV_ERR:
2890                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
2891                                 "device command.\n");
2892                 ret = -ENODEV;
2893                 break;
2894         case COMP_SUCCESS:
2895                 xhci_dbg(xhci, "Successful Address Device command\n");
2896                 break;
2897         default:
2898                 xhci_err(xhci, "ERROR: unexpected command completion "
2899                                 "code 0x%x.\n", virt_dev->cmd_status);
2900                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2901                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2902                 ret = -EINVAL;
2903                 break;
2904         }
2905         if (ret) {
2906                 return ret;
2907         }
2908         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2909         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2910         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2911                  udev->slot_id,
2912                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2913                  (unsigned long long)
2914                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2915         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2916                         (unsigned long long)virt_dev->out_ctx->dma);
2917         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2918         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2919         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2920         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2921         /*
2922          * USB core uses address 1 for the roothubs, so we add one to the
2923          * address given back to us by the HC.
2924          */
2925         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2926         /* Use kernel assigned address for devices; store xHC assigned
2927          * address locally. */
2928         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2929                 + 1;
2930         /* Zero the input context control for later use */
2931         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2932         ctrl_ctx->add_flags = 0;
2933         ctrl_ctx->drop_flags = 0;
2934
2935         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2936
2937         return 0;
2938 }
2939
2940 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2941  * internal data structures for the device.
2942  */
2943 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2944                         struct usb_tt *tt, gfp_t mem_flags)
2945 {
2946         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2947         struct xhci_virt_device *vdev;
2948         struct xhci_command *config_cmd;
2949         struct xhci_input_control_ctx *ctrl_ctx;
2950         struct xhci_slot_ctx *slot_ctx;
2951         unsigned long flags;
2952         unsigned think_time;
2953         int ret;
2954
2955         /* Ignore root hubs */
2956         if (!hdev->parent)
2957                 return 0;
2958
2959         vdev = xhci->devs[hdev->slot_id];
2960         if (!vdev) {
2961                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2962                 return -EINVAL;
2963         }
2964         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2965         if (!config_cmd) {
2966                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2967                 return -ENOMEM;
2968         }
2969
2970         spin_lock_irqsave(&xhci->lock, flags);
2971         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2972         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2973         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2974         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2975         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
2976         if (tt->multi)
2977                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
2978         if (xhci->hci_version > 0x95) {
2979                 xhci_dbg(xhci, "xHCI version %x needs hub "
2980                                 "TT think time and number of ports\n",
2981                                 (unsigned int) xhci->hci_version);
2982                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
2983                 /* Set TT think time - convert from ns to FS bit times.
2984                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
2985                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
2986                  *
2987                  * xHCI 1.0: this field shall be 0 if the device is not a
2988                  * High-spped hub.
2989                  */
2990                 think_time = tt->think_time;
2991                 if (think_time != 0)
2992                         think_time = (think_time / 666) - 1;
2993                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
2994                         slot_ctx->tt_info |=
2995                                 cpu_to_le32(TT_THINK_TIME(think_time));
2996         } else {
2997                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2998                                 "TT think time or number of ports\n",
2999                                 (unsigned int) xhci->hci_version);
3000         }
3001         slot_ctx->dev_state = 0;
3002         spin_unlock_irqrestore(&xhci->lock, flags);
3003
3004         xhci_dbg(xhci, "Set up %s for hub device.\n",
3005                         (xhci->hci_version > 0x95) ?
3006                         "configure endpoint" : "evaluate context");
3007         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3008         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3009
3010         /* Issue and wait for the configure endpoint or
3011          * evaluate context command.
3012          */
3013         if (xhci->hci_version > 0x95)
3014                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3015                                 false, false);
3016         else
3017                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3018                                 true, false);
3019
3020         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3021         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3022
3023         xhci_free_command(xhci, config_cmd);
3024         return ret;
3025 }
3026
3027 int xhci_get_frame(struct usb_hcd *hcd)
3028 {
3029         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3030         /* EHCI mods by the periodic size.  Why? */
3031         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3032 }
3033
3034 MODULE_DESCRIPTION(DRIVER_DESC);
3035 MODULE_AUTHOR(DRIVER_AUTHOR);
3036 MODULE_LICENSE("GPL");
3037
3038 static int __init xhci_hcd_init(void)
3039 {
3040 #ifdef CONFIG_PCI
3041         int retval = 0;
3042
3043         retval = xhci_register_pci();
3044
3045         if (retval < 0) {
3046                 printk(KERN_DEBUG "Problem registering PCI driver.");
3047                 return retval;
3048         }
3049 #endif
3050         /*
3051          * Check the compiler generated sizes of structures that must be laid
3052          * out in specific ways for hardware access.
3053          */
3054         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3055         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3056         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3057         /* xhci_device_control has eight fields, and also
3058          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3059          */
3060         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3061         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3062         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3063         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3064         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3065         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3066         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3067         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3068         return 0;
3069 }
3070 module_init(xhci_hcd_init);
3071
3072 static void __exit xhci_hcd_cleanup(void)
3073 {
3074 #ifdef CONFIG_PCI
3075         xhci_unregister_pci();
3076 #endif
3077 }
3078 module_exit(xhci_hcd_cleanup);