Merge branch 'for-linus' of git://git.kernel.dk/linux-block
[pandora-kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 /*
179  * Free IRQs
180  * free all IRQs request
181  */
182 static void xhci_free_irq(struct xhci_hcd *xhci)
183 {
184         int i;
185         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
186
187         /* return if using legacy interrupt */
188         if (xhci_to_hcd(xhci)->irq >= 0)
189                 return;
190
191         if (xhci->msix_entries) {
192                 for (i = 0; i < xhci->msix_count; i++)
193                         if (xhci->msix_entries[i].vector)
194                                 free_irq(xhci->msix_entries[i].vector,
195                                                 xhci_to_hcd(xhci));
196         } else if (pdev->irq >= 0)
197                 free_irq(pdev->irq, xhci_to_hcd(xhci));
198
199         return;
200 }
201
202 /*
203  * Set up MSI
204  */
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
206 {
207         int ret;
208         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
209
210         ret = pci_enable_msi(pdev);
211         if (ret) {
212                 xhci_err(xhci, "failed to allocate MSI entry\n");
213                 return ret;
214         }
215
216         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217                                 0, "xhci_hcd", xhci_to_hcd(xhci));
218         if (ret) {
219                 xhci_err(xhci, "disable MSI interrupt\n");
220                 pci_disable_msi(pdev);
221         }
222
223         return ret;
224 }
225
226 /*
227  * Set up MSI-X
228  */
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
230 {
231         int i, ret = 0;
232         struct usb_hcd *hcd = xhci_to_hcd(xhci);
233         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
234
235         /*
236          * calculate number of msi-x vectors supported.
237          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238          *   with max number of interrupters based on the xhci HCSPARAMS1.
239          * - num_online_cpus: maximum msi-x vectors per CPUs core.
240          *   Add additional 1 vector to ensure always available interrupt.
241          */
242         xhci->msix_count = min(num_online_cpus() + 1,
243                                 HCS_MAX_INTRS(xhci->hcs_params1));
244
245         xhci->msix_entries =
246                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247                                 GFP_KERNEL);
248         if (!xhci->msix_entries) {
249                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250                 return -ENOMEM;
251         }
252
253         for (i = 0; i < xhci->msix_count; i++) {
254                 xhci->msix_entries[i].entry = i;
255                 xhci->msix_entries[i].vector = 0;
256         }
257
258         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259         if (ret) {
260                 xhci_err(xhci, "Failed to enable MSI-X\n");
261                 goto free_entries;
262         }
263
264         for (i = 0; i < xhci->msix_count; i++) {
265                 ret = request_irq(xhci->msix_entries[i].vector,
266                                 (irq_handler_t)xhci_msi_irq,
267                                 0, "xhci_hcd", xhci_to_hcd(xhci));
268                 if (ret)
269                         goto disable_msix;
270         }
271
272         hcd->msix_enabled = 1;
273         return ret;
274
275 disable_msix:
276         xhci_err(xhci, "disable MSI-X interrupt\n");
277         xhci_free_irq(xhci);
278         pci_disable_msix(pdev);
279 free_entries:
280         kfree(xhci->msix_entries);
281         xhci->msix_entries = NULL;
282         return ret;
283 }
284
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
287 {
288         struct usb_hcd *hcd = xhci_to_hcd(xhci);
289         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
290
291         xhci_free_irq(xhci);
292
293         if (xhci->msix_entries) {
294                 pci_disable_msix(pdev);
295                 kfree(xhci->msix_entries);
296                 xhci->msix_entries = NULL;
297         } else {
298                 pci_disable_msi(pdev);
299         }
300
301         hcd->msix_enabled = 0;
302         return;
303 }
304
305 /*
306  * Initialize memory for HCD and xHC (one-time init).
307  *
308  * Program the PAGESIZE register, initialize the device context array, create
309  * device contexts (?), set up a command ring segment (or two?), create event
310  * ring (one for now).
311  */
312 int xhci_init(struct usb_hcd *hcd)
313 {
314         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315         int retval = 0;
316
317         xhci_dbg(xhci, "xhci_init\n");
318         spin_lock_init(&xhci->lock);
319         if (link_quirk) {
320                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322         } else {
323                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
324         }
325         retval = xhci_mem_init(xhci, GFP_KERNEL);
326         xhci_dbg(xhci, "Finished xhci_init\n");
327
328         return retval;
329 }
330
331 /*-------------------------------------------------------------------------*/
332
333
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
336 {
337         unsigned long flags;
338         int temp;
339         u64 temp_64;
340         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341         int i, j;
342
343         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
344
345         spin_lock_irqsave(&xhci->lock, flags);
346         temp = xhci_readl(xhci, &xhci->op_regs->status);
347         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
349                 xhci_dbg(xhci, "HW died, polling stopped.\n");
350                 spin_unlock_irqrestore(&xhci->lock, flags);
351                 return;
352         }
353
354         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
355         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
356         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
357         xhci->error_bitmask = 0;
358         xhci_dbg(xhci, "Event ring:\n");
359         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
360         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
361         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
362         temp_64 &= ~ERST_PTR_MASK;
363         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
364         xhci_dbg(xhci, "Command ring:\n");
365         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
366         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
367         xhci_dbg_cmd_ptrs(xhci);
368         for (i = 0; i < MAX_HC_SLOTS; ++i) {
369                 if (!xhci->devs[i])
370                         continue;
371                 for (j = 0; j < 31; ++j) {
372                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
373                 }
374         }
375         spin_unlock_irqrestore(&xhci->lock, flags);
376
377         if (!xhci->zombie)
378                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
379         else
380                 xhci_dbg(xhci, "Quit polling the event ring.\n");
381 }
382 #endif
383
384 static int xhci_run_finished(struct xhci_hcd *xhci)
385 {
386         if (xhci_start(xhci)) {
387                 xhci_halt(xhci);
388                 return -ENODEV;
389         }
390         xhci->shared_hcd->state = HC_STATE_RUNNING;
391
392         if (xhci->quirks & XHCI_NEC_HOST)
393                 xhci_ring_cmd_db(xhci);
394
395         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
396         return 0;
397 }
398
399 /*
400  * Start the HC after it was halted.
401  *
402  * This function is called by the USB core when the HC driver is added.
403  * Its opposite is xhci_stop().
404  *
405  * xhci_init() must be called once before this function can be called.
406  * Reset the HC, enable device slot contexts, program DCBAAP, and
407  * set command ring pointer and event ring pointer.
408  *
409  * Setup MSI-X vectors and enable interrupts.
410  */
411 int xhci_run(struct usb_hcd *hcd)
412 {
413         u32 temp;
414         u64 temp_64;
415         u32 ret;
416         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
417         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
418
419         /* Start the xHCI host controller running only after the USB 2.0 roothub
420          * is setup.
421          */
422
423         hcd->uses_new_polling = 1;
424         if (!usb_hcd_is_primary_hcd(hcd))
425                 return xhci_run_finished(xhci);
426
427         xhci_dbg(xhci, "xhci_run\n");
428         /* unregister the legacy interrupt */
429         if (hcd->irq)
430                 free_irq(hcd->irq, hcd);
431         hcd->irq = -1;
432
433         /* Some Fresco Logic host controllers advertise MSI, but fail to
434          * generate interrupts.  Don't even try to enable MSI.
435          */
436         if (xhci->quirks & XHCI_BROKEN_MSI)
437                 goto legacy_irq;
438
439         ret = xhci_setup_msix(xhci);
440         if (ret)
441                 /* fall back to msi*/
442                 ret = xhci_setup_msi(xhci);
443
444         if (ret) {
445 legacy_irq:
446                 /* fall back to legacy interrupt*/
447                 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
448                                         hcd->irq_descr, hcd);
449                 if (ret) {
450                         xhci_err(xhci, "request interrupt %d failed\n",
451                                         pdev->irq);
452                         return ret;
453                 }
454                 hcd->irq = pdev->irq;
455         }
456
457 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
458         init_timer(&xhci->event_ring_timer);
459         xhci->event_ring_timer.data = (unsigned long) xhci;
460         xhci->event_ring_timer.function = xhci_event_ring_work;
461         /* Poll the event ring */
462         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
463         xhci->zombie = 0;
464         xhci_dbg(xhci, "Setting event ring polling timer\n");
465         add_timer(&xhci->event_ring_timer);
466 #endif
467
468         xhci_dbg(xhci, "Command ring memory map follows:\n");
469         xhci_debug_ring(xhci, xhci->cmd_ring);
470         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
471         xhci_dbg_cmd_ptrs(xhci);
472
473         xhci_dbg(xhci, "ERST memory map follows:\n");
474         xhci_dbg_erst(xhci, &xhci->erst);
475         xhci_dbg(xhci, "Event ring:\n");
476         xhci_debug_ring(xhci, xhci->event_ring);
477         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
478         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
479         temp_64 &= ~ERST_PTR_MASK;
480         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
481
482         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
483         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
484         temp &= ~ER_IRQ_INTERVAL_MASK;
485         temp |= (u32) 160;
486         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
487
488         /* Set the HCD state before we enable the irqs */
489         temp = xhci_readl(xhci, &xhci->op_regs->command);
490         temp |= (CMD_EIE);
491         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
492                         temp);
493         xhci_writel(xhci, temp, &xhci->op_regs->command);
494
495         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
496         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
497                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
498         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
499                         &xhci->ir_set->irq_pending);
500         xhci_print_ir_set(xhci, 0);
501
502         if (xhci->quirks & XHCI_NEC_HOST)
503                 xhci_queue_vendor_command(xhci, 0, 0, 0,
504                                 TRB_TYPE(TRB_NEC_GET_FW));
505
506         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
507         return 0;
508 }
509
510 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
511 {
512         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
513
514         spin_lock_irq(&xhci->lock);
515         xhci_halt(xhci);
516
517         /* The shared_hcd is going to be deallocated shortly (the USB core only
518          * calls this function when allocation fails in usb_add_hcd(), or
519          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
520          */
521         xhci->shared_hcd = NULL;
522         spin_unlock_irq(&xhci->lock);
523 }
524
525 /*
526  * Stop xHCI driver.
527  *
528  * This function is called by the USB core when the HC driver is removed.
529  * Its opposite is xhci_run().
530  *
531  * Disable device contexts, disable IRQs, and quiesce the HC.
532  * Reset the HC, finish any completed transactions, and cleanup memory.
533  */
534 void xhci_stop(struct usb_hcd *hcd)
535 {
536         u32 temp;
537         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
538
539         if (!usb_hcd_is_primary_hcd(hcd)) {
540                 xhci_only_stop_hcd(xhci->shared_hcd);
541                 return;
542         }
543
544         spin_lock_irq(&xhci->lock);
545         /* Make sure the xHC is halted for a USB3 roothub
546          * (xhci_stop() could be called as part of failed init).
547          */
548         xhci_halt(xhci);
549         xhci_reset(xhci);
550         spin_unlock_irq(&xhci->lock);
551
552         xhci_cleanup_msix(xhci);
553
554 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
555         /* Tell the event ring poll function not to reschedule */
556         xhci->zombie = 1;
557         del_timer_sync(&xhci->event_ring_timer);
558 #endif
559
560         if (xhci->quirks & XHCI_AMD_PLL_FIX)
561                 usb_amd_dev_put();
562
563         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
564         temp = xhci_readl(xhci, &xhci->op_regs->status);
565         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
566         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
567         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
568                         &xhci->ir_set->irq_pending);
569         xhci_print_ir_set(xhci, 0);
570
571         xhci_dbg(xhci, "cleaning up memory\n");
572         xhci_mem_cleanup(xhci);
573         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
574                     xhci_readl(xhci, &xhci->op_regs->status));
575 }
576
577 /*
578  * Shutdown HC (not bus-specific)
579  *
580  * This is called when the machine is rebooting or halting.  We assume that the
581  * machine will be powered off, and the HC's internal state will be reset.
582  * Don't bother to free memory.
583  *
584  * This will only ever be called with the main usb_hcd (the USB3 roothub).
585  */
586 void xhci_shutdown(struct usb_hcd *hcd)
587 {
588         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
589
590         spin_lock_irq(&xhci->lock);
591         xhci_halt(xhci);
592         spin_unlock_irq(&xhci->lock);
593
594         xhci_cleanup_msix(xhci);
595
596         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
597                     xhci_readl(xhci, &xhci->op_regs->status));
598 }
599
600 #ifdef CONFIG_PM
601 static void xhci_save_registers(struct xhci_hcd *xhci)
602 {
603         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
604         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
605         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
606         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
607         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
608         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
609         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
610         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
611         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
612 }
613
614 static void xhci_restore_registers(struct xhci_hcd *xhci)
615 {
616         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
617         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
618         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
619         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
620         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
621         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
622         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
623         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
624 }
625
626 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
627 {
628         u64     val_64;
629
630         /* step 2: initialize command ring buffer */
631         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
632         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
633                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
634                                       xhci->cmd_ring->dequeue) &
635                  (u64) ~CMD_RING_RSVD_BITS) |
636                 xhci->cmd_ring->cycle_state;
637         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
638                         (long unsigned long) val_64);
639         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
640 }
641
642 /*
643  * The whole command ring must be cleared to zero when we suspend the host.
644  *
645  * The host doesn't save the command ring pointer in the suspend well, so we
646  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
647  * aligned, because of the reserved bits in the command ring dequeue pointer
648  * register.  Therefore, we can't just set the dequeue pointer back in the
649  * middle of the ring (TRBs are 16-byte aligned).
650  */
651 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
652 {
653         struct xhci_ring *ring;
654         struct xhci_segment *seg;
655
656         ring = xhci->cmd_ring;
657         seg = ring->deq_seg;
658         do {
659                 memset(seg->trbs, 0, SEGMENT_SIZE);
660                 seg = seg->next;
661         } while (seg != ring->deq_seg);
662
663         /* Reset the software enqueue and dequeue pointers */
664         ring->deq_seg = ring->first_seg;
665         ring->dequeue = ring->first_seg->trbs;
666         ring->enq_seg = ring->deq_seg;
667         ring->enqueue = ring->dequeue;
668
669         /*
670          * Ring is now zeroed, so the HW should look for change of ownership
671          * when the cycle bit is set to 1.
672          */
673         ring->cycle_state = 1;
674
675         /*
676          * Reset the hardware dequeue pointer.
677          * Yes, this will need to be re-written after resume, but we're paranoid
678          * and want to make sure the hardware doesn't access bogus memory
679          * because, say, the BIOS or an SMI started the host without changing
680          * the command ring pointers.
681          */
682         xhci_set_cmd_ring_deq(xhci);
683 }
684
685 /*
686  * Stop HC (not bus-specific)
687  *
688  * This is called when the machine transition into S3/S4 mode.
689  *
690  */
691 int xhci_suspend(struct xhci_hcd *xhci)
692 {
693         int                     rc = 0;
694         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
695         u32                     command;
696         int                     i;
697
698         spin_lock_irq(&xhci->lock);
699         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
700         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
701         /* step 1: stop endpoint */
702         /* skipped assuming that port suspend has done */
703
704         /* step 2: clear Run/Stop bit */
705         command = xhci_readl(xhci, &xhci->op_regs->command);
706         command &= ~CMD_RUN;
707         xhci_writel(xhci, command, &xhci->op_regs->command);
708         if (handshake(xhci, &xhci->op_regs->status,
709                       STS_HALT, STS_HALT, 100*100)) {
710                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
711                 spin_unlock_irq(&xhci->lock);
712                 return -ETIMEDOUT;
713         }
714         xhci_clear_command_ring(xhci);
715
716         /* step 3: save registers */
717         xhci_save_registers(xhci);
718
719         /* step 4: set CSS flag */
720         command = xhci_readl(xhci, &xhci->op_regs->command);
721         command |= CMD_CSS;
722         xhci_writel(xhci, command, &xhci->op_regs->command);
723         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
724                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
725                 spin_unlock_irq(&xhci->lock);
726                 return -ETIMEDOUT;
727         }
728         spin_unlock_irq(&xhci->lock);
729
730         /* step 5: remove core well power */
731         /* synchronize irq when using MSI-X */
732         if (xhci->msix_entries) {
733                 for (i = 0; i < xhci->msix_count; i++)
734                         synchronize_irq(xhci->msix_entries[i].vector);
735         }
736
737         return rc;
738 }
739
740 /*
741  * start xHC (not bus-specific)
742  *
743  * This is called when the machine transition from S3/S4 mode.
744  *
745  */
746 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
747 {
748         u32                     command, temp = 0;
749         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
750         struct usb_hcd          *secondary_hcd;
751         int                     retval;
752
753         /* Wait a bit if either of the roothubs need to settle from the
754          * transition into bus suspend.
755          */
756         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
757                         time_before(jiffies,
758                                 xhci->bus_state[1].next_statechange))
759                 msleep(100);
760
761         spin_lock_irq(&xhci->lock);
762
763         if (!hibernated) {
764                 /* step 1: restore register */
765                 xhci_restore_registers(xhci);
766                 /* step 2: initialize command ring buffer */
767                 xhci_set_cmd_ring_deq(xhci);
768                 /* step 3: restore state and start state*/
769                 /* step 3: set CRS flag */
770                 command = xhci_readl(xhci, &xhci->op_regs->command);
771                 command |= CMD_CRS;
772                 xhci_writel(xhci, command, &xhci->op_regs->command);
773                 if (handshake(xhci, &xhci->op_regs->status,
774                               STS_RESTORE, 0, 10*100)) {
775                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
776                         spin_unlock_irq(&xhci->lock);
777                         return -ETIMEDOUT;
778                 }
779                 temp = xhci_readl(xhci, &xhci->op_regs->status);
780         }
781
782         /* If restore operation fails, re-initialize the HC during resume */
783         if ((temp & STS_SRE) || hibernated) {
784                 /* Let the USB core know _both_ roothubs lost power. */
785                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
786                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
787
788                 xhci_dbg(xhci, "Stop HCD\n");
789                 xhci_halt(xhci);
790                 xhci_reset(xhci);
791                 spin_unlock_irq(&xhci->lock);
792                 xhci_cleanup_msix(xhci);
793
794 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
795                 /* Tell the event ring poll function not to reschedule */
796                 xhci->zombie = 1;
797                 del_timer_sync(&xhci->event_ring_timer);
798 #endif
799
800                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
801                 temp = xhci_readl(xhci, &xhci->op_regs->status);
802                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
803                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
804                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
805                                 &xhci->ir_set->irq_pending);
806                 xhci_print_ir_set(xhci, 0);
807
808                 xhci_dbg(xhci, "cleaning up memory\n");
809                 xhci_mem_cleanup(xhci);
810                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
811                             xhci_readl(xhci, &xhci->op_regs->status));
812
813                 /* USB core calls the PCI reinit and start functions twice:
814                  * first with the primary HCD, and then with the secondary HCD.
815                  * If we don't do the same, the host will never be started.
816                  */
817                 if (!usb_hcd_is_primary_hcd(hcd))
818                         secondary_hcd = hcd;
819                 else
820                         secondary_hcd = xhci->shared_hcd;
821
822                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
823                 retval = xhci_init(hcd->primary_hcd);
824                 if (retval)
825                         return retval;
826                 xhci_dbg(xhci, "Start the primary HCD\n");
827                 retval = xhci_run(hcd->primary_hcd);
828                 if (retval)
829                         goto failed_restart;
830
831                 xhci_dbg(xhci, "Start the secondary HCD\n");
832                 retval = xhci_run(secondary_hcd);
833                 if (!retval) {
834                         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
835                         set_bit(HCD_FLAG_HW_ACCESSIBLE,
836                                         &xhci->shared_hcd->flags);
837                 }
838 failed_restart:
839                 hcd->state = HC_STATE_SUSPENDED;
840                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
841                 return retval;
842         }
843
844         /* step 4: set Run/Stop bit */
845         command = xhci_readl(xhci, &xhci->op_regs->command);
846         command |= CMD_RUN;
847         xhci_writel(xhci, command, &xhci->op_regs->command);
848         handshake(xhci, &xhci->op_regs->status, STS_HALT,
849                   0, 250 * 1000);
850
851         /* step 5: walk topology and initialize portsc,
852          * portpmsc and portli
853          */
854         /* this is done in bus_resume */
855
856         /* step 6: restart each of the previously
857          * Running endpoints by ringing their doorbells
858          */
859
860         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
861         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
862
863         spin_unlock_irq(&xhci->lock);
864         return 0;
865 }
866 #endif  /* CONFIG_PM */
867
868 /*-------------------------------------------------------------------------*/
869
870 /**
871  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
872  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
873  * value to right shift 1 for the bitmask.
874  *
875  * Index  = (epnum * 2) + direction - 1,
876  * where direction = 0 for OUT, 1 for IN.
877  * For control endpoints, the IN index is used (OUT index is unused), so
878  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
879  */
880 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
881 {
882         unsigned int index;
883         if (usb_endpoint_xfer_control(desc))
884                 index = (unsigned int) (usb_endpoint_num(desc)*2);
885         else
886                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
887                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
888         return index;
889 }
890
891 /* Find the flag for this endpoint (for use in the control context).  Use the
892  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
893  * bit 1, etc.
894  */
895 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
896 {
897         return 1 << (xhci_get_endpoint_index(desc) + 1);
898 }
899
900 /* Find the flag for this endpoint (for use in the control context).  Use the
901  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
902  * bit 1, etc.
903  */
904 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
905 {
906         return 1 << (ep_index + 1);
907 }
908
909 /* Compute the last valid endpoint context index.  Basically, this is the
910  * endpoint index plus one.  For slot contexts with more than valid endpoint,
911  * we find the most significant bit set in the added contexts flags.
912  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
913  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
914  */
915 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
916 {
917         return fls(added_ctxs) - 1;
918 }
919
920 /* Returns 1 if the arguments are OK;
921  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
922  */
923 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
924                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
925                 const char *func) {
926         struct xhci_hcd *xhci;
927         struct xhci_virt_device *virt_dev;
928
929         if (!hcd || (check_ep && !ep) || !udev) {
930                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
931                                 func);
932                 return -EINVAL;
933         }
934         if (!udev->parent) {
935                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
936                                 func);
937                 return 0;
938         }
939
940         if (check_virt_dev) {
941                 xhci = hcd_to_xhci(hcd);
942                 if (!udev->slot_id || !xhci->devs
943                         || !xhci->devs[udev->slot_id]) {
944                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
945                                                 "device\n", func);
946                         return -EINVAL;
947                 }
948
949                 virt_dev = xhci->devs[udev->slot_id];
950                 if (virt_dev->udev != udev) {
951                         printk(KERN_DEBUG "xHCI %s called with udev and "
952                                           "virt_dev does not match\n", func);
953                         return -EINVAL;
954                 }
955         }
956
957         return 1;
958 }
959
960 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
961                 struct usb_device *udev, struct xhci_command *command,
962                 bool ctx_change, bool must_succeed);
963
964 /*
965  * Full speed devices may have a max packet size greater than 8 bytes, but the
966  * USB core doesn't know that until it reads the first 8 bytes of the
967  * descriptor.  If the usb_device's max packet size changes after that point,
968  * we need to issue an evaluate context command and wait on it.
969  */
970 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
971                 unsigned int ep_index, struct urb *urb)
972 {
973         struct xhci_container_ctx *in_ctx;
974         struct xhci_container_ctx *out_ctx;
975         struct xhci_input_control_ctx *ctrl_ctx;
976         struct xhci_ep_ctx *ep_ctx;
977         int max_packet_size;
978         int hw_max_packet_size;
979         int ret = 0;
980
981         out_ctx = xhci->devs[slot_id]->out_ctx;
982         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
983         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
984         max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
985         if (hw_max_packet_size != max_packet_size) {
986                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
987                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
988                                 max_packet_size);
989                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
990                                 hw_max_packet_size);
991                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
992
993                 /* Set up the modified control endpoint 0 */
994                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
995                                 xhci->devs[slot_id]->out_ctx, ep_index);
996                 in_ctx = xhci->devs[slot_id]->in_ctx;
997                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
998                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
999                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1000
1001                 /* Set up the input context flags for the command */
1002                 /* FIXME: This won't work if a non-default control endpoint
1003                  * changes max packet sizes.
1004                  */
1005                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1006                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1007                 ctrl_ctx->drop_flags = 0;
1008
1009                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1010                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1011                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1012                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1013
1014                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1015                                 true, false);
1016
1017                 /* Clean up the input context for later use by bandwidth
1018                  * functions.
1019                  */
1020                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1021         }
1022         return ret;
1023 }
1024
1025 /*
1026  * non-error returns are a promise to giveback() the urb later
1027  * we drop ownership so next owner (or urb unlink) can get it
1028  */
1029 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1030 {
1031         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1032         unsigned long flags;
1033         int ret = 0;
1034         unsigned int slot_id, ep_index;
1035         struct urb_priv *urb_priv;
1036         int size, i;
1037
1038         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1039                                         true, true, __func__) <= 0)
1040                 return -EINVAL;
1041
1042         slot_id = urb->dev->slot_id;
1043         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1044
1045         if (!HCD_HW_ACCESSIBLE(hcd)) {
1046                 if (!in_interrupt())
1047                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1048                 ret = -ESHUTDOWN;
1049                 goto exit;
1050         }
1051
1052         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1053                 size = urb->number_of_packets;
1054         else
1055                 size = 1;
1056
1057         urb_priv = kzalloc(sizeof(struct urb_priv) +
1058                                   size * sizeof(struct xhci_td *), mem_flags);
1059         if (!urb_priv)
1060                 return -ENOMEM;
1061
1062         for (i = 0; i < size; i++) {
1063                 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1064                 if (!urb_priv->td[i]) {
1065                         urb_priv->length = i;
1066                         xhci_urb_free_priv(xhci, urb_priv);
1067                         return -ENOMEM;
1068                 }
1069         }
1070
1071         urb_priv->length = size;
1072         urb_priv->td_cnt = 0;
1073         urb->hcpriv = urb_priv;
1074
1075         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1076                 /* Check to see if the max packet size for the default control
1077                  * endpoint changed during FS device enumeration
1078                  */
1079                 if (urb->dev->speed == USB_SPEED_FULL) {
1080                         ret = xhci_check_maxpacket(xhci, slot_id,
1081                                         ep_index, urb);
1082                         if (ret < 0)
1083                                 return ret;
1084                 }
1085
1086                 /* We have a spinlock and interrupts disabled, so we must pass
1087                  * atomic context to this function, which may allocate memory.
1088                  */
1089                 spin_lock_irqsave(&xhci->lock, flags);
1090                 if (xhci->xhc_state & XHCI_STATE_DYING)
1091                         goto dying;
1092                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1093                                 slot_id, ep_index);
1094                 spin_unlock_irqrestore(&xhci->lock, flags);
1095         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1096                 spin_lock_irqsave(&xhci->lock, flags);
1097                 if (xhci->xhc_state & XHCI_STATE_DYING)
1098                         goto dying;
1099                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1100                                 EP_GETTING_STREAMS) {
1101                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1102                                         "is transitioning to using streams.\n");
1103                         ret = -EINVAL;
1104                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1105                                 EP_GETTING_NO_STREAMS) {
1106                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1107                                         "is transitioning to "
1108                                         "not having streams.\n");
1109                         ret = -EINVAL;
1110                 } else {
1111                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1112                                         slot_id, ep_index);
1113                 }
1114                 spin_unlock_irqrestore(&xhci->lock, flags);
1115         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1116                 spin_lock_irqsave(&xhci->lock, flags);
1117                 if (xhci->xhc_state & XHCI_STATE_DYING)
1118                         goto dying;
1119                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1120                                 slot_id, ep_index);
1121                 spin_unlock_irqrestore(&xhci->lock, flags);
1122         } else {
1123                 spin_lock_irqsave(&xhci->lock, flags);
1124                 if (xhci->xhc_state & XHCI_STATE_DYING)
1125                         goto dying;
1126                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1127                                 slot_id, ep_index);
1128                 spin_unlock_irqrestore(&xhci->lock, flags);
1129         }
1130 exit:
1131         return ret;
1132 dying:
1133         xhci_urb_free_priv(xhci, urb_priv);
1134         urb->hcpriv = NULL;
1135         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1136                         "non-responsive xHCI host.\n",
1137                         urb->ep->desc.bEndpointAddress, urb);
1138         spin_unlock_irqrestore(&xhci->lock, flags);
1139         return -ESHUTDOWN;
1140 }
1141
1142 /* Get the right ring for the given URB.
1143  * If the endpoint supports streams, boundary check the URB's stream ID.
1144  * If the endpoint doesn't support streams, return the singular endpoint ring.
1145  */
1146 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1147                 struct urb *urb)
1148 {
1149         unsigned int slot_id;
1150         unsigned int ep_index;
1151         unsigned int stream_id;
1152         struct xhci_virt_ep *ep;
1153
1154         slot_id = urb->dev->slot_id;
1155         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1156         stream_id = urb->stream_id;
1157         ep = &xhci->devs[slot_id]->eps[ep_index];
1158         /* Common case: no streams */
1159         if (!(ep->ep_state & EP_HAS_STREAMS))
1160                 return ep->ring;
1161
1162         if (stream_id == 0) {
1163                 xhci_warn(xhci,
1164                                 "WARN: Slot ID %u, ep index %u has streams, "
1165                                 "but URB has no stream ID.\n",
1166                                 slot_id, ep_index);
1167                 return NULL;
1168         }
1169
1170         if (stream_id < ep->stream_info->num_streams)
1171                 return ep->stream_info->stream_rings[stream_id];
1172
1173         xhci_warn(xhci,
1174                         "WARN: Slot ID %u, ep index %u has "
1175                         "stream IDs 1 to %u allocated, "
1176                         "but stream ID %u is requested.\n",
1177                         slot_id, ep_index,
1178                         ep->stream_info->num_streams - 1,
1179                         stream_id);
1180         return NULL;
1181 }
1182
1183 /*
1184  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1185  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1186  * should pick up where it left off in the TD, unless a Set Transfer Ring
1187  * Dequeue Pointer is issued.
1188  *
1189  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1190  * the ring.  Since the ring is a contiguous structure, they can't be physically
1191  * removed.  Instead, there are two options:
1192  *
1193  *  1) If the HC is in the middle of processing the URB to be canceled, we
1194  *     simply move the ring's dequeue pointer past those TRBs using the Set
1195  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1196  *     when drivers timeout on the last submitted URB and attempt to cancel.
1197  *
1198  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1199  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1200  *     HC will need to invalidate the any TRBs it has cached after the stop
1201  *     endpoint command, as noted in the xHCI 0.95 errata.
1202  *
1203  *  3) The TD may have completed by the time the Stop Endpoint Command
1204  *     completes, so software needs to handle that case too.
1205  *
1206  * This function should protect against the TD enqueueing code ringing the
1207  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1208  * It also needs to account for multiple cancellations on happening at the same
1209  * time for the same endpoint.
1210  *
1211  * Note that this function can be called in any context, or so says
1212  * usb_hcd_unlink_urb()
1213  */
1214 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1215 {
1216         unsigned long flags;
1217         int ret, i;
1218         u32 temp;
1219         struct xhci_hcd *xhci;
1220         struct urb_priv *urb_priv;
1221         struct xhci_td *td;
1222         unsigned int ep_index;
1223         struct xhci_ring *ep_ring;
1224         struct xhci_virt_ep *ep;
1225
1226         xhci = hcd_to_xhci(hcd);
1227         spin_lock_irqsave(&xhci->lock, flags);
1228         /* Make sure the URB hasn't completed or been unlinked already */
1229         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1230         if (ret || !urb->hcpriv)
1231                 goto done;
1232         temp = xhci_readl(xhci, &xhci->op_regs->status);
1233         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1234                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1235                 urb_priv = urb->hcpriv;
1236
1237                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1238                 spin_unlock_irqrestore(&xhci->lock, flags);
1239                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1240                 xhci_urb_free_priv(xhci, urb_priv);
1241                 return ret;
1242         }
1243         if (xhci->xhc_state & XHCI_STATE_DYING) {
1244                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1245                                 "non-responsive xHCI host.\n",
1246                                 urb->ep->desc.bEndpointAddress, urb);
1247                 /* Let the stop endpoint command watchdog timer (which set this
1248                  * state) finish cleaning up the endpoint TD lists.  We must
1249                  * have caught it in the middle of dropping a lock and giving
1250                  * back an URB.
1251                  */
1252                 goto done;
1253         }
1254
1255         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1256         xhci_dbg(xhci, "Event ring:\n");
1257         xhci_debug_ring(xhci, xhci->event_ring);
1258         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1259         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1260         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1261         if (!ep_ring) {
1262                 ret = -EINVAL;
1263                 goto done;
1264         }
1265
1266         xhci_dbg(xhci, "Endpoint ring:\n");
1267         xhci_debug_ring(xhci, ep_ring);
1268
1269         urb_priv = urb->hcpriv;
1270
1271         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1272                 td = urb_priv->td[i];
1273                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1274         }
1275
1276         /* Queue a stop endpoint command, but only if this is
1277          * the first cancellation to be handled.
1278          */
1279         if (!(ep->ep_state & EP_HALT_PENDING)) {
1280                 ep->ep_state |= EP_HALT_PENDING;
1281                 ep->stop_cmds_pending++;
1282                 ep->stop_cmd_timer.expires = jiffies +
1283                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1284                 add_timer(&ep->stop_cmd_timer);
1285                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1286                 xhci_ring_cmd_db(xhci);
1287         }
1288 done:
1289         spin_unlock_irqrestore(&xhci->lock, flags);
1290         return ret;
1291 }
1292
1293 /* Drop an endpoint from a new bandwidth configuration for this device.
1294  * Only one call to this function is allowed per endpoint before
1295  * check_bandwidth() or reset_bandwidth() must be called.
1296  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1297  * add the endpoint to the schedule with possibly new parameters denoted by a
1298  * different endpoint descriptor in usb_host_endpoint.
1299  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1300  * not allowed.
1301  *
1302  * The USB core will not allow URBs to be queued to an endpoint that is being
1303  * disabled, so there's no need for mutual exclusion to protect
1304  * the xhci->devs[slot_id] structure.
1305  */
1306 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1307                 struct usb_host_endpoint *ep)
1308 {
1309         struct xhci_hcd *xhci;
1310         struct xhci_container_ctx *in_ctx, *out_ctx;
1311         struct xhci_input_control_ctx *ctrl_ctx;
1312         struct xhci_slot_ctx *slot_ctx;
1313         unsigned int last_ctx;
1314         unsigned int ep_index;
1315         struct xhci_ep_ctx *ep_ctx;
1316         u32 drop_flag;
1317         u32 new_add_flags, new_drop_flags, new_slot_info;
1318         int ret;
1319
1320         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1321         if (ret <= 0)
1322                 return ret;
1323         xhci = hcd_to_xhci(hcd);
1324         if (xhci->xhc_state & XHCI_STATE_DYING)
1325                 return -ENODEV;
1326
1327         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1328         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1329         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1330                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1331                                 __func__, drop_flag);
1332                 return 0;
1333         }
1334
1335         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1336         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1337         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1338         ep_index = xhci_get_endpoint_index(&ep->desc);
1339         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1340         /* If the HC already knows the endpoint is disabled,
1341          * or the HCD has noted it is disabled, ignore this request
1342          */
1343         if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
1344             EP_STATE_DISABLED ||
1345             le32_to_cpu(ctrl_ctx->drop_flags) &
1346             xhci_get_endpoint_flag(&ep->desc)) {
1347                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1348                                 __func__, ep);
1349                 return 0;
1350         }
1351
1352         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1353         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1354
1355         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1356         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1357
1358         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1359         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1360         /* Update the last valid endpoint context, if we deleted the last one */
1361         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1362             LAST_CTX(last_ctx)) {
1363                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1364                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1365         }
1366         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1367
1368         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1369
1370         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1371                         (unsigned int) ep->desc.bEndpointAddress,
1372                         udev->slot_id,
1373                         (unsigned int) new_drop_flags,
1374                         (unsigned int) new_add_flags,
1375                         (unsigned int) new_slot_info);
1376         return 0;
1377 }
1378
1379 /* Add an endpoint to a new possible bandwidth configuration for this device.
1380  * Only one call to this function is allowed per endpoint before
1381  * check_bandwidth() or reset_bandwidth() must be called.
1382  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1383  * add the endpoint to the schedule with possibly new parameters denoted by a
1384  * different endpoint descriptor in usb_host_endpoint.
1385  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1386  * not allowed.
1387  *
1388  * The USB core will not allow URBs to be queued to an endpoint until the
1389  * configuration or alt setting is installed in the device, so there's no need
1390  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1391  */
1392 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1393                 struct usb_host_endpoint *ep)
1394 {
1395         struct xhci_hcd *xhci;
1396         struct xhci_container_ctx *in_ctx, *out_ctx;
1397         unsigned int ep_index;
1398         struct xhci_ep_ctx *ep_ctx;
1399         struct xhci_slot_ctx *slot_ctx;
1400         struct xhci_input_control_ctx *ctrl_ctx;
1401         u32 added_ctxs;
1402         unsigned int last_ctx;
1403         u32 new_add_flags, new_drop_flags, new_slot_info;
1404         int ret = 0;
1405
1406         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1407         if (ret <= 0) {
1408                 /* So we won't queue a reset ep command for a root hub */
1409                 ep->hcpriv = NULL;
1410                 return ret;
1411         }
1412         xhci = hcd_to_xhci(hcd);
1413         if (xhci->xhc_state & XHCI_STATE_DYING)
1414                 return -ENODEV;
1415
1416         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1417         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1418         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1419                 /* FIXME when we have to issue an evaluate endpoint command to
1420                  * deal with ep0 max packet size changing once we get the
1421                  * descriptors
1422                  */
1423                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1424                                 __func__, added_ctxs);
1425                 return 0;
1426         }
1427
1428         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1429         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1430         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1431         ep_index = xhci_get_endpoint_index(&ep->desc);
1432         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1433         /* If the HCD has already noted the endpoint is enabled,
1434          * ignore this request.
1435          */
1436         if (le32_to_cpu(ctrl_ctx->add_flags) &
1437             xhci_get_endpoint_flag(&ep->desc)) {
1438                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1439                                 __func__, ep);
1440                 return 0;
1441         }
1442
1443         /*
1444          * Configuration and alternate setting changes must be done in
1445          * process context, not interrupt context (or so documenation
1446          * for usb_set_interface() and usb_set_configuration() claim).
1447          */
1448         if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
1449                                 udev, ep, GFP_NOIO) < 0) {
1450                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1451                                 __func__, ep->desc.bEndpointAddress);
1452                 return -ENOMEM;
1453         }
1454
1455         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1456         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1457
1458         /* If xhci_endpoint_disable() was called for this endpoint, but the
1459          * xHC hasn't been notified yet through the check_bandwidth() call,
1460          * this re-adds a new state for the endpoint from the new endpoint
1461          * descriptors.  We must drop and re-add this endpoint, so we leave the
1462          * drop flags alone.
1463          */
1464         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1465
1466         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1467         /* Update the last valid endpoint context, if we just added one past */
1468         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1469             LAST_CTX(last_ctx)) {
1470                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1471                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1472         }
1473         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1474
1475         /* Store the usb_device pointer for later use */
1476         ep->hcpriv = udev;
1477
1478         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1479                         (unsigned int) ep->desc.bEndpointAddress,
1480                         udev->slot_id,
1481                         (unsigned int) new_drop_flags,
1482                         (unsigned int) new_add_flags,
1483                         (unsigned int) new_slot_info);
1484         return 0;
1485 }
1486
1487 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1488 {
1489         struct xhci_input_control_ctx *ctrl_ctx;
1490         struct xhci_ep_ctx *ep_ctx;
1491         struct xhci_slot_ctx *slot_ctx;
1492         int i;
1493
1494         /* When a device's add flag and drop flag are zero, any subsequent
1495          * configure endpoint command will leave that endpoint's state
1496          * untouched.  Make sure we don't leave any old state in the input
1497          * endpoint contexts.
1498          */
1499         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1500         ctrl_ctx->drop_flags = 0;
1501         ctrl_ctx->add_flags = 0;
1502         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1503         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1504         /* Endpoint 0 is always valid */
1505         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1506         for (i = 1; i < 31; ++i) {
1507                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1508                 ep_ctx->ep_info = 0;
1509                 ep_ctx->ep_info2 = 0;
1510                 ep_ctx->deq = 0;
1511                 ep_ctx->tx_info = 0;
1512         }
1513 }
1514
1515 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1516                 struct usb_device *udev, u32 *cmd_status)
1517 {
1518         int ret;
1519
1520         switch (*cmd_status) {
1521         case COMP_ENOMEM:
1522                 dev_warn(&udev->dev, "Not enough host controller resources "
1523                                 "for new device state.\n");
1524                 ret = -ENOMEM;
1525                 /* FIXME: can we allocate more resources for the HC? */
1526                 break;
1527         case COMP_BW_ERR:
1528                 dev_warn(&udev->dev, "Not enough bandwidth "
1529                                 "for new device state.\n");
1530                 ret = -ENOSPC;
1531                 /* FIXME: can we go back to the old state? */
1532                 break;
1533         case COMP_TRB_ERR:
1534                 /* the HCD set up something wrong */
1535                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1536                                 "add flag = 1, "
1537                                 "and endpoint is not disabled.\n");
1538                 ret = -EINVAL;
1539                 break;
1540         case COMP_SUCCESS:
1541                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1542                 ret = 0;
1543                 break;
1544         default:
1545                 xhci_err(xhci, "ERROR: unexpected command completion "
1546                                 "code 0x%x.\n", *cmd_status);
1547                 ret = -EINVAL;
1548                 break;
1549         }
1550         return ret;
1551 }
1552
1553 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1554                 struct usb_device *udev, u32 *cmd_status)
1555 {
1556         int ret;
1557         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1558
1559         switch (*cmd_status) {
1560         case COMP_EINVAL:
1561                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1562                                 "context command.\n");
1563                 ret = -EINVAL;
1564                 break;
1565         case COMP_EBADSLT:
1566                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1567                                 "evaluate context command.\n");
1568         case COMP_CTX_STATE:
1569                 dev_warn(&udev->dev, "WARN: invalid context state for "
1570                                 "evaluate context command.\n");
1571                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1572                 ret = -EINVAL;
1573                 break;
1574         case COMP_MEL_ERR:
1575                 /* Max Exit Latency too large error */
1576                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1577                 ret = -EINVAL;
1578                 break;
1579         case COMP_SUCCESS:
1580                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1581                 ret = 0;
1582                 break;
1583         default:
1584                 xhci_err(xhci, "ERROR: unexpected command completion "
1585                                 "code 0x%x.\n", *cmd_status);
1586                 ret = -EINVAL;
1587                 break;
1588         }
1589         return ret;
1590 }
1591
1592 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1593                 struct xhci_container_ctx *in_ctx)
1594 {
1595         struct xhci_input_control_ctx *ctrl_ctx;
1596         u32 valid_add_flags;
1597         u32 valid_drop_flags;
1598
1599         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1600         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1601          * (bit 1).  The default control endpoint is added during the Address
1602          * Device command and is never removed until the slot is disabled.
1603          */
1604         valid_add_flags = ctrl_ctx->add_flags >> 2;
1605         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1606
1607         /* Use hweight32 to count the number of ones in the add flags, or
1608          * number of endpoints added.  Don't count endpoints that are changed
1609          * (both added and dropped).
1610          */
1611         return hweight32(valid_add_flags) -
1612                 hweight32(valid_add_flags & valid_drop_flags);
1613 }
1614
1615 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1616                 struct xhci_container_ctx *in_ctx)
1617 {
1618         struct xhci_input_control_ctx *ctrl_ctx;
1619         u32 valid_add_flags;
1620         u32 valid_drop_flags;
1621
1622         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1623         valid_add_flags = ctrl_ctx->add_flags >> 2;
1624         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1625
1626         return hweight32(valid_drop_flags) -
1627                 hweight32(valid_add_flags & valid_drop_flags);
1628 }
1629
1630 /*
1631  * We need to reserve the new number of endpoints before the configure endpoint
1632  * command completes.  We can't subtract the dropped endpoints from the number
1633  * of active endpoints until the command completes because we can oversubscribe
1634  * the host in this case:
1635  *
1636  *  - the first configure endpoint command drops more endpoints than it adds
1637  *  - a second configure endpoint command that adds more endpoints is queued
1638  *  - the first configure endpoint command fails, so the config is unchanged
1639  *  - the second command may succeed, even though there isn't enough resources
1640  *
1641  * Must be called with xhci->lock held.
1642  */
1643 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1644                 struct xhci_container_ctx *in_ctx)
1645 {
1646         u32 added_eps;
1647
1648         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1649         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1650                 xhci_dbg(xhci, "Not enough ep ctxs: "
1651                                 "%u active, need to add %u, limit is %u.\n",
1652                                 xhci->num_active_eps, added_eps,
1653                                 xhci->limit_active_eps);
1654                 return -ENOMEM;
1655         }
1656         xhci->num_active_eps += added_eps;
1657         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1658                         xhci->num_active_eps);
1659         return 0;
1660 }
1661
1662 /*
1663  * The configure endpoint was failed by the xHC for some other reason, so we
1664  * need to revert the resources that failed configuration would have used.
1665  *
1666  * Must be called with xhci->lock held.
1667  */
1668 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1669                 struct xhci_container_ctx *in_ctx)
1670 {
1671         u32 num_failed_eps;
1672
1673         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1674         xhci->num_active_eps -= num_failed_eps;
1675         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1676                         num_failed_eps,
1677                         xhci->num_active_eps);
1678 }
1679
1680 /*
1681  * Now that the command has completed, clean up the active endpoint count by
1682  * subtracting out the endpoints that were dropped (but not changed).
1683  *
1684  * Must be called with xhci->lock held.
1685  */
1686 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1687                 struct xhci_container_ctx *in_ctx)
1688 {
1689         u32 num_dropped_eps;
1690
1691         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1692         xhci->num_active_eps -= num_dropped_eps;
1693         if (num_dropped_eps)
1694                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1695                                 num_dropped_eps,
1696                                 xhci->num_active_eps);
1697 }
1698
1699 /* Issue a configure endpoint command or evaluate context command
1700  * and wait for it to finish.
1701  */
1702 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1703                 struct usb_device *udev,
1704                 struct xhci_command *command,
1705                 bool ctx_change, bool must_succeed)
1706 {
1707         int ret;
1708         int timeleft;
1709         unsigned long flags;
1710         struct xhci_container_ctx *in_ctx;
1711         struct completion *cmd_completion;
1712         u32 *cmd_status;
1713         struct xhci_virt_device *virt_dev;
1714
1715         spin_lock_irqsave(&xhci->lock, flags);
1716         virt_dev = xhci->devs[udev->slot_id];
1717         if (command) {
1718                 in_ctx = command->in_ctx;
1719                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1720                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1721                         spin_unlock_irqrestore(&xhci->lock, flags);
1722                         xhci_warn(xhci, "Not enough host resources, "
1723                                         "active endpoint contexts = %u\n",
1724                                         xhci->num_active_eps);
1725                         return -ENOMEM;
1726                 }
1727
1728                 cmd_completion = command->completion;
1729                 cmd_status = &command->status;
1730                 command->command_trb = xhci->cmd_ring->enqueue;
1731
1732                 /* Enqueue pointer can be left pointing to the link TRB,
1733                  * we must handle that
1734                  */
1735                 if ((le32_to_cpu(command->command_trb->link.control)
1736                      & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
1737                         command->command_trb =
1738                                 xhci->cmd_ring->enq_seg->next->trbs;
1739
1740                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1741         } else {
1742                 in_ctx = virt_dev->in_ctx;
1743                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1744                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1745                         spin_unlock_irqrestore(&xhci->lock, flags);
1746                         xhci_warn(xhci, "Not enough host resources, "
1747                                         "active endpoint contexts = %u\n",
1748                                         xhci->num_active_eps);
1749                         return -ENOMEM;
1750                 }
1751                 cmd_completion = &virt_dev->cmd_completion;
1752                 cmd_status = &virt_dev->cmd_status;
1753         }
1754         init_completion(cmd_completion);
1755
1756         if (!ctx_change)
1757                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1758                                 udev->slot_id, must_succeed);
1759         else
1760                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1761                                 udev->slot_id);
1762         if (ret < 0) {
1763                 if (command)
1764                         list_del(&command->cmd_list);
1765                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
1766                         xhci_free_host_resources(xhci, in_ctx);
1767                 spin_unlock_irqrestore(&xhci->lock, flags);
1768                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1769                 return -ENOMEM;
1770         }
1771         xhci_ring_cmd_db(xhci);
1772         spin_unlock_irqrestore(&xhci->lock, flags);
1773
1774         /* Wait for the configure endpoint command to complete */
1775         timeleft = wait_for_completion_interruptible_timeout(
1776                         cmd_completion,
1777                         USB_CTRL_SET_TIMEOUT);
1778         if (timeleft <= 0) {
1779                 xhci_warn(xhci, "%s while waiting for %s command\n",
1780                                 timeleft == 0 ? "Timeout" : "Signal",
1781                                 ctx_change == 0 ?
1782                                         "configure endpoint" :
1783                                         "evaluate context");
1784                 /* FIXME cancel the configure endpoint command */
1785                 return -ETIME;
1786         }
1787
1788         if (!ctx_change)
1789                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
1790         else
1791                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
1792
1793         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
1794                 spin_lock_irqsave(&xhci->lock, flags);
1795                 /* If the command failed, remove the reserved resources.
1796                  * Otherwise, clean up the estimate to include dropped eps.
1797                  */
1798                 if (ret)
1799                         xhci_free_host_resources(xhci, in_ctx);
1800                 else
1801                         xhci_finish_resource_reservation(xhci, in_ctx);
1802                 spin_unlock_irqrestore(&xhci->lock, flags);
1803         }
1804         return ret;
1805 }
1806
1807 /* Called after one or more calls to xhci_add_endpoint() or
1808  * xhci_drop_endpoint().  If this call fails, the USB core is expected
1809  * to call xhci_reset_bandwidth().
1810  *
1811  * Since we are in the middle of changing either configuration or
1812  * installing a new alt setting, the USB core won't allow URBs to be
1813  * enqueued for any endpoint on the old config or interface.  Nothing
1814  * else should be touching the xhci->devs[slot_id] structure, so we
1815  * don't need to take the xhci->lock for manipulating that.
1816  */
1817 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1818 {
1819         int i;
1820         int ret = 0;
1821         struct xhci_hcd *xhci;
1822         struct xhci_virt_device *virt_dev;
1823         struct xhci_input_control_ctx *ctrl_ctx;
1824         struct xhci_slot_ctx *slot_ctx;
1825
1826         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1827         if (ret <= 0)
1828                 return ret;
1829         xhci = hcd_to_xhci(hcd);
1830         if (xhci->xhc_state & XHCI_STATE_DYING)
1831                 return -ENODEV;
1832
1833         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1834         virt_dev = xhci->devs[udev->slot_id];
1835
1836         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1837         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1838         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1839         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1840         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1841         xhci_dbg(xhci, "New Input Control Context:\n");
1842         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1843         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1844                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1845
1846         ret = xhci_configure_endpoint(xhci, udev, NULL,
1847                         false, false);
1848         if (ret) {
1849                 /* Callee should call reset_bandwidth() */
1850                 return ret;
1851         }
1852
1853         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1854         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1855                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1856
1857         /* Free any rings that were dropped, but not changed. */
1858         for (i = 1; i < 31; ++i) {
1859                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
1860                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
1861                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1862         }
1863         xhci_zero_in_ctx(xhci, virt_dev);
1864         /*
1865          * Install any rings for completely new endpoints or changed endpoints,
1866          * and free or cache any old rings from changed endpoints.
1867          */
1868         for (i = 1; i < 31; ++i) {
1869                 if (!virt_dev->eps[i].new_ring)
1870                         continue;
1871                 /* Only cache or free the old ring if it exists.
1872                  * It may not if this is the first add of an endpoint.
1873                  */
1874                 if (virt_dev->eps[i].ring) {
1875                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1876                 }
1877                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1878                 virt_dev->eps[i].new_ring = NULL;
1879         }
1880
1881         return ret;
1882 }
1883
1884 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1885 {
1886         struct xhci_hcd *xhci;
1887         struct xhci_virt_device *virt_dev;
1888         int i, ret;
1889
1890         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1891         if (ret <= 0)
1892                 return;
1893         xhci = hcd_to_xhci(hcd);
1894
1895         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1896         virt_dev = xhci->devs[udev->slot_id];
1897         /* Free any rings allocated for added endpoints */
1898         for (i = 0; i < 31; ++i) {
1899                 if (virt_dev->eps[i].new_ring) {
1900                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1901                         virt_dev->eps[i].new_ring = NULL;
1902                 }
1903         }
1904         xhci_zero_in_ctx(xhci, virt_dev);
1905 }
1906
1907 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1908                 struct xhci_container_ctx *in_ctx,
1909                 struct xhci_container_ctx *out_ctx,
1910                 u32 add_flags, u32 drop_flags)
1911 {
1912         struct xhci_input_control_ctx *ctrl_ctx;
1913         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1914         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1915         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1916         xhci_slot_copy(xhci, in_ctx, out_ctx);
1917         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1918
1919         xhci_dbg(xhci, "Input Context:\n");
1920         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1921 }
1922
1923 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1924                 unsigned int slot_id, unsigned int ep_index,
1925                 struct xhci_dequeue_state *deq_state)
1926 {
1927         struct xhci_container_ctx *in_ctx;
1928         struct xhci_ep_ctx *ep_ctx;
1929         u32 added_ctxs;
1930         dma_addr_t addr;
1931
1932         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1933                         xhci->devs[slot_id]->out_ctx, ep_index);
1934         in_ctx = xhci->devs[slot_id]->in_ctx;
1935         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1936         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1937                         deq_state->new_deq_ptr);
1938         if (addr == 0) {
1939                 xhci_warn(xhci, "WARN Cannot submit config ep after "
1940                                 "reset ep command\n");
1941                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1942                                 deq_state->new_deq_seg,
1943                                 deq_state->new_deq_ptr);
1944                 return;
1945         }
1946         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
1947
1948         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1949         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1950                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1951 }
1952
1953 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1954                 struct usb_device *udev, unsigned int ep_index)
1955 {
1956         struct xhci_dequeue_state deq_state;
1957         struct xhci_virt_ep *ep;
1958
1959         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1960         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1961         /* We need to move the HW's dequeue pointer past this TD,
1962          * or it will attempt to resend it on the next doorbell ring.
1963          */
1964         xhci_find_new_dequeue_state(xhci, udev->slot_id,
1965                         ep_index, ep->stopped_stream, ep->stopped_td,
1966                         &deq_state);
1967
1968         /* HW with the reset endpoint quirk will use the saved dequeue state to
1969          * issue a configure endpoint command later.
1970          */
1971         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1972                 xhci_dbg(xhci, "Queueing new dequeue state\n");
1973                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1974                                 ep_index, ep->stopped_stream, &deq_state);
1975         } else {
1976                 /* Better hope no one uses the input context between now and the
1977                  * reset endpoint completion!
1978                  * XXX: No idea how this hardware will react when stream rings
1979                  * are enabled.
1980                  */
1981                 xhci_dbg(xhci, "Setting up input context for "
1982                                 "configure endpoint command\n");
1983                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
1984                                 ep_index, &deq_state);
1985         }
1986 }
1987
1988 /* Deal with stalled endpoints.  The core should have sent the control message
1989  * to clear the halt condition.  However, we need to make the xHCI hardware
1990  * reset its sequence number, since a device will expect a sequence number of
1991  * zero after the halt condition is cleared.
1992  * Context: in_interrupt
1993  */
1994 void xhci_endpoint_reset(struct usb_hcd *hcd,
1995                 struct usb_host_endpoint *ep)
1996 {
1997         struct xhci_hcd *xhci;
1998         struct usb_device *udev;
1999         unsigned int ep_index;
2000         unsigned long flags;
2001         int ret;
2002         struct xhci_virt_ep *virt_ep;
2003
2004         xhci = hcd_to_xhci(hcd);
2005         udev = (struct usb_device *) ep->hcpriv;
2006         /* Called with a root hub endpoint (or an endpoint that wasn't added
2007          * with xhci_add_endpoint()
2008          */
2009         if (!ep->hcpriv)
2010                 return;
2011         ep_index = xhci_get_endpoint_index(&ep->desc);
2012         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2013         if (!virt_ep->stopped_td) {
2014                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2015                                 ep->desc.bEndpointAddress);
2016                 return;
2017         }
2018         if (usb_endpoint_xfer_control(&ep->desc)) {
2019                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2020                 return;
2021         }
2022
2023         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2024         spin_lock_irqsave(&xhci->lock, flags);
2025         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2026         /*
2027          * Can't change the ring dequeue pointer until it's transitioned to the
2028          * stopped state, which is only upon a successful reset endpoint
2029          * command.  Better hope that last command worked!
2030          */
2031         if (!ret) {
2032                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2033                 kfree(virt_ep->stopped_td);
2034                 xhci_ring_cmd_db(xhci);
2035         }
2036         virt_ep->stopped_td = NULL;
2037         virt_ep->stopped_trb = NULL;
2038         virt_ep->stopped_stream = 0;
2039         spin_unlock_irqrestore(&xhci->lock, flags);
2040
2041         if (ret)
2042                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2043 }
2044
2045 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2046                 struct usb_device *udev, struct usb_host_endpoint *ep,
2047                 unsigned int slot_id)
2048 {
2049         int ret;
2050         unsigned int ep_index;
2051         unsigned int ep_state;
2052
2053         if (!ep)
2054                 return -EINVAL;
2055         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2056         if (ret <= 0)
2057                 return -EINVAL;
2058         if (ep->ss_ep_comp.bmAttributes == 0) {
2059                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2060                                 " descriptor for ep 0x%x does not support streams\n",
2061                                 ep->desc.bEndpointAddress);
2062                 return -EINVAL;
2063         }
2064
2065         ep_index = xhci_get_endpoint_index(&ep->desc);
2066         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2067         if (ep_state & EP_HAS_STREAMS ||
2068                         ep_state & EP_GETTING_STREAMS) {
2069                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2070                                 "already has streams set up.\n",
2071                                 ep->desc.bEndpointAddress);
2072                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2073                                 "dynamic stream context array reallocation.\n");
2074                 return -EINVAL;
2075         }
2076         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2077                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2078                                 "endpoint 0x%x; URBs are pending.\n",
2079                                 ep->desc.bEndpointAddress);
2080                 return -EINVAL;
2081         }
2082         return 0;
2083 }
2084
2085 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2086                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2087 {
2088         unsigned int max_streams;
2089
2090         /* The stream context array size must be a power of two */
2091         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2092         /*
2093          * Find out how many primary stream array entries the host controller
2094          * supports.  Later we may use secondary stream arrays (similar to 2nd
2095          * level page entries), but that's an optional feature for xHCI host
2096          * controllers. xHCs must support at least 4 stream IDs.
2097          */
2098         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2099         if (*num_stream_ctxs > max_streams) {
2100                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2101                                 max_streams);
2102                 *num_stream_ctxs = max_streams;
2103                 *num_streams = max_streams;
2104         }
2105 }
2106
2107 /* Returns an error code if one of the endpoint already has streams.
2108  * This does not change any data structures, it only checks and gathers
2109  * information.
2110  */
2111 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2112                 struct usb_device *udev,
2113                 struct usb_host_endpoint **eps, unsigned int num_eps,
2114                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2115 {
2116         unsigned int max_streams;
2117         unsigned int endpoint_flag;
2118         int i;
2119         int ret;
2120
2121         for (i = 0; i < num_eps; i++) {
2122                 ret = xhci_check_streams_endpoint(xhci, udev,
2123                                 eps[i], udev->slot_id);
2124                 if (ret < 0)
2125                         return ret;
2126
2127                 max_streams = USB_SS_MAX_STREAMS(
2128                                 eps[i]->ss_ep_comp.bmAttributes);
2129                 if (max_streams < (*num_streams - 1)) {
2130                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2131                                         eps[i]->desc.bEndpointAddress,
2132                                         max_streams);
2133                         *num_streams = max_streams+1;
2134                 }
2135
2136                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2137                 if (*changed_ep_bitmask & endpoint_flag)
2138                         return -EINVAL;
2139                 *changed_ep_bitmask |= endpoint_flag;
2140         }
2141         return 0;
2142 }
2143
2144 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2145                 struct usb_device *udev,
2146                 struct usb_host_endpoint **eps, unsigned int num_eps)
2147 {
2148         u32 changed_ep_bitmask = 0;
2149         unsigned int slot_id;
2150         unsigned int ep_index;
2151         unsigned int ep_state;
2152         int i;
2153
2154         slot_id = udev->slot_id;
2155         if (!xhci->devs[slot_id])
2156                 return 0;
2157
2158         for (i = 0; i < num_eps; i++) {
2159                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2160                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2161                 /* Are streams already being freed for the endpoint? */
2162                 if (ep_state & EP_GETTING_NO_STREAMS) {
2163                         xhci_warn(xhci, "WARN Can't disable streams for "
2164                                         "endpoint 0x%x\n, "
2165                                         "streams are being disabled already.",
2166                                         eps[i]->desc.bEndpointAddress);
2167                         return 0;
2168                 }
2169                 /* Are there actually any streams to free? */
2170                 if (!(ep_state & EP_HAS_STREAMS) &&
2171                                 !(ep_state & EP_GETTING_STREAMS)) {
2172                         xhci_warn(xhci, "WARN Can't disable streams for "
2173                                         "endpoint 0x%x\n, "
2174                                         "streams are already disabled!",
2175                                         eps[i]->desc.bEndpointAddress);
2176                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2177                                         "with non-streams endpoint\n");
2178                         return 0;
2179                 }
2180                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2181         }
2182         return changed_ep_bitmask;
2183 }
2184
2185 /*
2186  * The USB device drivers use this function (though the HCD interface in USB
2187  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2188  * coordinate mass storage command queueing across multiple endpoints (basically
2189  * a stream ID == a task ID).
2190  *
2191  * Setting up streams involves allocating the same size stream context array
2192  * for each endpoint and issuing a configure endpoint command for all endpoints.
2193  *
2194  * Don't allow the call to succeed if one endpoint only supports one stream
2195  * (which means it doesn't support streams at all).
2196  *
2197  * Drivers may get less stream IDs than they asked for, if the host controller
2198  * hardware or endpoints claim they can't support the number of requested
2199  * stream IDs.
2200  */
2201 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2202                 struct usb_host_endpoint **eps, unsigned int num_eps,
2203                 unsigned int num_streams, gfp_t mem_flags)
2204 {
2205         int i, ret;
2206         struct xhci_hcd *xhci;
2207         struct xhci_virt_device *vdev;
2208         struct xhci_command *config_cmd;
2209         unsigned int ep_index;
2210         unsigned int num_stream_ctxs;
2211         unsigned long flags;
2212         u32 changed_ep_bitmask = 0;
2213
2214         if (!eps)
2215                 return -EINVAL;
2216
2217         /* Add one to the number of streams requested to account for
2218          * stream 0 that is reserved for xHCI usage.
2219          */
2220         num_streams += 1;
2221         xhci = hcd_to_xhci(hcd);
2222         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2223                         num_streams);
2224
2225         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2226         if (!config_cmd) {
2227                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2228                 return -ENOMEM;
2229         }
2230
2231         /* Check to make sure all endpoints are not already configured for
2232          * streams.  While we're at it, find the maximum number of streams that
2233          * all the endpoints will support and check for duplicate endpoints.
2234          */
2235         spin_lock_irqsave(&xhci->lock, flags);
2236         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2237                         num_eps, &num_streams, &changed_ep_bitmask);
2238         if (ret < 0) {
2239                 xhci_free_command(xhci, config_cmd);
2240                 spin_unlock_irqrestore(&xhci->lock, flags);
2241                 return ret;
2242         }
2243         if (num_streams <= 1) {
2244                 xhci_warn(xhci, "WARN: endpoints can't handle "
2245                                 "more than one stream.\n");
2246                 xhci_free_command(xhci, config_cmd);
2247                 spin_unlock_irqrestore(&xhci->lock, flags);
2248                 return -EINVAL;
2249         }
2250         vdev = xhci->devs[udev->slot_id];
2251         /* Mark each endpoint as being in transition, so
2252          * xhci_urb_enqueue() will reject all URBs.
2253          */
2254         for (i = 0; i < num_eps; i++) {
2255                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2256                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2257         }
2258         spin_unlock_irqrestore(&xhci->lock, flags);
2259
2260         /* Setup internal data structures and allocate HW data structures for
2261          * streams (but don't install the HW structures in the input context
2262          * until we're sure all memory allocation succeeded).
2263          */
2264         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2265         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2266                         num_stream_ctxs, num_streams);
2267
2268         for (i = 0; i < num_eps; i++) {
2269                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2270                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2271                                 num_stream_ctxs,
2272                                 num_streams, mem_flags);
2273                 if (!vdev->eps[ep_index].stream_info)
2274                         goto cleanup;
2275                 /* Set maxPstreams in endpoint context and update deq ptr to
2276                  * point to stream context array. FIXME
2277                  */
2278         }
2279
2280         /* Set up the input context for a configure endpoint command. */
2281         for (i = 0; i < num_eps; i++) {
2282                 struct xhci_ep_ctx *ep_ctx;
2283
2284                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2285                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2286
2287                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2288                                 vdev->out_ctx, ep_index);
2289                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2290                                 vdev->eps[ep_index].stream_info);
2291         }
2292         /* Tell the HW to drop its old copy of the endpoint context info
2293          * and add the updated copy from the input context.
2294          */
2295         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2296                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2297
2298         /* Issue and wait for the configure endpoint command */
2299         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2300                         false, false);
2301
2302         /* xHC rejected the configure endpoint command for some reason, so we
2303          * leave the old ring intact and free our internal streams data
2304          * structure.
2305          */
2306         if (ret < 0)
2307                 goto cleanup;
2308
2309         spin_lock_irqsave(&xhci->lock, flags);
2310         for (i = 0; i < num_eps; i++) {
2311                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2312                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2313                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2314                          udev->slot_id, ep_index);
2315                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2316         }
2317         xhci_free_command(xhci, config_cmd);
2318         spin_unlock_irqrestore(&xhci->lock, flags);
2319
2320         /* Subtract 1 for stream 0, which drivers can't use */
2321         return num_streams - 1;
2322
2323 cleanup:
2324         /* If it didn't work, free the streams! */
2325         for (i = 0; i < num_eps; i++) {
2326                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2327                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2328                 vdev->eps[ep_index].stream_info = NULL;
2329                 /* FIXME Unset maxPstreams in endpoint context and
2330                  * update deq ptr to point to normal string ring.
2331                  */
2332                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2333                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2334                 xhci_endpoint_zero(xhci, vdev, eps[i]);
2335         }
2336         xhci_free_command(xhci, config_cmd);
2337         return -ENOMEM;
2338 }
2339
2340 /* Transition the endpoint from using streams to being a "normal" endpoint
2341  * without streams.
2342  *
2343  * Modify the endpoint context state, submit a configure endpoint command,
2344  * and free all endpoint rings for streams if that completes successfully.
2345  */
2346 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2347                 struct usb_host_endpoint **eps, unsigned int num_eps,
2348                 gfp_t mem_flags)
2349 {
2350         int i, ret;
2351         struct xhci_hcd *xhci;
2352         struct xhci_virt_device *vdev;
2353         struct xhci_command *command;
2354         unsigned int ep_index;
2355         unsigned long flags;
2356         u32 changed_ep_bitmask;
2357
2358         xhci = hcd_to_xhci(hcd);
2359         vdev = xhci->devs[udev->slot_id];
2360
2361         /* Set up a configure endpoint command to remove the streams rings */
2362         spin_lock_irqsave(&xhci->lock, flags);
2363         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2364                         udev, eps, num_eps);
2365         if (changed_ep_bitmask == 0) {
2366                 spin_unlock_irqrestore(&xhci->lock, flags);
2367                 return -EINVAL;
2368         }
2369
2370         /* Use the xhci_command structure from the first endpoint.  We may have
2371          * allocated too many, but the driver may call xhci_free_streams() for
2372          * each endpoint it grouped into one call to xhci_alloc_streams().
2373          */
2374         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2375         command = vdev->eps[ep_index].stream_info->free_streams_command;
2376         for (i = 0; i < num_eps; i++) {
2377                 struct xhci_ep_ctx *ep_ctx;
2378
2379                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2380                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2381                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2382                         EP_GETTING_NO_STREAMS;
2383
2384                 xhci_endpoint_copy(xhci, command->in_ctx,
2385                                 vdev->out_ctx, ep_index);
2386                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2387                                 &vdev->eps[ep_index]);
2388         }
2389         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2390                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2391         spin_unlock_irqrestore(&xhci->lock, flags);
2392
2393         /* Issue and wait for the configure endpoint command,
2394          * which must succeed.
2395          */
2396         ret = xhci_configure_endpoint(xhci, udev, command,
2397                         false, true);
2398
2399         /* xHC rejected the configure endpoint command for some reason, so we
2400          * leave the streams rings intact.
2401          */
2402         if (ret < 0)
2403                 return ret;
2404
2405         spin_lock_irqsave(&xhci->lock, flags);
2406         for (i = 0; i < num_eps; i++) {
2407                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2408                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2409                 vdev->eps[ep_index].stream_info = NULL;
2410                 /* FIXME Unset maxPstreams in endpoint context and
2411                  * update deq ptr to point to normal string ring.
2412                  */
2413                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2414                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2415         }
2416         spin_unlock_irqrestore(&xhci->lock, flags);
2417
2418         return 0;
2419 }
2420
2421 /*
2422  * Deletes endpoint resources for endpoints that were active before a Reset
2423  * Device command, or a Disable Slot command.  The Reset Device command leaves
2424  * the control endpoint intact, whereas the Disable Slot command deletes it.
2425  *
2426  * Must be called with xhci->lock held.
2427  */
2428 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2429         struct xhci_virt_device *virt_dev, bool drop_control_ep)
2430 {
2431         int i;
2432         unsigned int num_dropped_eps = 0;
2433         unsigned int drop_flags = 0;
2434
2435         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2436                 if (virt_dev->eps[i].ring) {
2437                         drop_flags |= 1 << i;
2438                         num_dropped_eps++;
2439                 }
2440         }
2441         xhci->num_active_eps -= num_dropped_eps;
2442         if (num_dropped_eps)
2443                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
2444                                 "%u now active.\n",
2445                                 num_dropped_eps, drop_flags,
2446                                 xhci->num_active_eps);
2447 }
2448
2449 /*
2450  * This submits a Reset Device Command, which will set the device state to 0,
2451  * set the device address to 0, and disable all the endpoints except the default
2452  * control endpoint.  The USB core should come back and call
2453  * xhci_address_device(), and then re-set up the configuration.  If this is
2454  * called because of a usb_reset_and_verify_device(), then the old alternate
2455  * settings will be re-installed through the normal bandwidth allocation
2456  * functions.
2457  *
2458  * Wait for the Reset Device command to finish.  Remove all structures
2459  * associated with the endpoints that were disabled.  Clear the input device
2460  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
2461  *
2462  * If the virt_dev to be reset does not exist or does not match the udev,
2463  * it means the device is lost, possibly due to the xHC restore error and
2464  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2465  * re-allocate the device.
2466  */
2467 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2468 {
2469         int ret, i;
2470         unsigned long flags;
2471         struct xhci_hcd *xhci;
2472         unsigned int slot_id;
2473         struct xhci_virt_device *virt_dev;
2474         struct xhci_command *reset_device_cmd;
2475         int timeleft;
2476         int last_freed_endpoint;
2477         struct xhci_slot_ctx *slot_ctx;
2478
2479         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2480         if (ret <= 0)
2481                 return ret;
2482         xhci = hcd_to_xhci(hcd);
2483         slot_id = udev->slot_id;
2484         virt_dev = xhci->devs[slot_id];
2485         if (!virt_dev) {
2486                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2487                                 "not exist. Re-allocate the device\n", slot_id);
2488                 ret = xhci_alloc_dev(hcd, udev);
2489                 if (ret == 1)
2490                         return 0;
2491                 else
2492                         return -EINVAL;
2493         }
2494
2495         if (virt_dev->udev != udev) {
2496                 /* If the virt_dev and the udev does not match, this virt_dev
2497                  * may belong to another udev.
2498                  * Re-allocate the device.
2499                  */
2500                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2501                                 "not match the udev. Re-allocate the device\n",
2502                                 slot_id);
2503                 ret = xhci_alloc_dev(hcd, udev);
2504                 if (ret == 1)
2505                         return 0;
2506                 else
2507                         return -EINVAL;
2508         }
2509
2510         /* If device is not setup, there is no point in resetting it */
2511         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2512         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
2513                                                 SLOT_STATE_DISABLED)
2514                 return 0;
2515
2516         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2517         /* Allocate the command structure that holds the struct completion.
2518          * Assume we're in process context, since the normal device reset
2519          * process has to wait for the device anyway.  Storage devices are
2520          * reset as part of error handling, so use GFP_NOIO instead of
2521          * GFP_KERNEL.
2522          */
2523         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2524         if (!reset_device_cmd) {
2525                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2526                 return -ENOMEM;
2527         }
2528
2529         /* Attempt to submit the Reset Device command to the command ring */
2530         spin_lock_irqsave(&xhci->lock, flags);
2531         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2532
2533         /* Enqueue pointer can be left pointing to the link TRB,
2534          * we must handle that
2535          */
2536         if ((le32_to_cpu(reset_device_cmd->command_trb->link.control)
2537              & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
2538                 reset_device_cmd->command_trb =
2539                         xhci->cmd_ring->enq_seg->next->trbs;
2540
2541         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2542         ret = xhci_queue_reset_device(xhci, slot_id);
2543         if (ret) {
2544                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2545                 list_del(&reset_device_cmd->cmd_list);
2546                 spin_unlock_irqrestore(&xhci->lock, flags);
2547                 goto command_cleanup;
2548         }
2549         xhci_ring_cmd_db(xhci);
2550         spin_unlock_irqrestore(&xhci->lock, flags);
2551
2552         /* Wait for the Reset Device command to finish */
2553         timeleft = wait_for_completion_interruptible_timeout(
2554                         reset_device_cmd->completion,
2555                         USB_CTRL_SET_TIMEOUT);
2556         if (timeleft <= 0) {
2557                 xhci_warn(xhci, "%s while waiting for reset device command\n",
2558                                 timeleft == 0 ? "Timeout" : "Signal");
2559                 spin_lock_irqsave(&xhci->lock, flags);
2560                 /* The timeout might have raced with the event ring handler, so
2561                  * only delete from the list if the item isn't poisoned.
2562                  */
2563                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2564                         list_del(&reset_device_cmd->cmd_list);
2565                 spin_unlock_irqrestore(&xhci->lock, flags);
2566                 ret = -ETIME;
2567                 goto command_cleanup;
2568         }
2569
2570         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2571          * unless we tried to reset a slot ID that wasn't enabled,
2572          * or the device wasn't in the addressed or configured state.
2573          */
2574         ret = reset_device_cmd->status;
2575         switch (ret) {
2576         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2577         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2578                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2579                                 slot_id,
2580                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2581                 xhci_info(xhci, "Not freeing device rings.\n");
2582                 /* Don't treat this as an error.  May change my mind later. */
2583                 ret = 0;
2584                 goto command_cleanup;
2585         case COMP_SUCCESS:
2586                 xhci_dbg(xhci, "Successful reset device command.\n");
2587                 break;
2588         default:
2589                 if (xhci_is_vendor_info_code(xhci, ret))
2590                         break;
2591                 xhci_warn(xhci, "Unknown completion code %u for "
2592                                 "reset device command.\n", ret);
2593                 ret = -EINVAL;
2594                 goto command_cleanup;
2595         }
2596
2597         /* Free up host controller endpoint resources */
2598         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2599                 spin_lock_irqsave(&xhci->lock, flags);
2600                 /* Don't delete the default control endpoint resources */
2601                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
2602                 spin_unlock_irqrestore(&xhci->lock, flags);
2603         }
2604
2605         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2606         last_freed_endpoint = 1;
2607         for (i = 1; i < 31; ++i) {
2608                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
2609
2610                 if (ep->ep_state & EP_HAS_STREAMS) {
2611                         xhci_free_stream_info(xhci, ep->stream_info);
2612                         ep->stream_info = NULL;
2613                         ep->ep_state &= ~EP_HAS_STREAMS;
2614                 }
2615
2616                 if (ep->ring) {
2617                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2618                         last_freed_endpoint = i;
2619                 }
2620         }
2621         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2622         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2623         ret = 0;
2624
2625 command_cleanup:
2626         xhci_free_command(xhci, reset_device_cmd);
2627         return ret;
2628 }
2629
2630 /*
2631  * At this point, the struct usb_device is about to go away, the device has
2632  * disconnected, and all traffic has been stopped and the endpoints have been
2633  * disabled.  Free any HC data structures associated with that device.
2634  */
2635 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2636 {
2637         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2638         struct xhci_virt_device *virt_dev;
2639         unsigned long flags;
2640         u32 state;
2641         int i, ret;
2642
2643         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2644         if (ret <= 0)
2645                 return;
2646
2647         virt_dev = xhci->devs[udev->slot_id];
2648
2649         /* Stop any wayward timer functions (which may grab the lock) */
2650         for (i = 0; i < 31; ++i) {
2651                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2652                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2653         }
2654
2655         spin_lock_irqsave(&xhci->lock, flags);
2656         /* Don't disable the slot if the host controller is dead. */
2657         state = xhci_readl(xhci, &xhci->op_regs->status);
2658         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2659                 xhci_free_virt_device(xhci, udev->slot_id);
2660                 spin_unlock_irqrestore(&xhci->lock, flags);
2661                 return;
2662         }
2663
2664         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2665                 spin_unlock_irqrestore(&xhci->lock, flags);
2666                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2667                 return;
2668         }
2669         xhci_ring_cmd_db(xhci);
2670         spin_unlock_irqrestore(&xhci->lock, flags);
2671         /*
2672          * Event command completion handler will free any data structures
2673          * associated with the slot.  XXX Can free sleep?
2674          */
2675 }
2676
2677 /*
2678  * Checks if we have enough host controller resources for the default control
2679  * endpoint.
2680  *
2681  * Must be called with xhci->lock held.
2682  */
2683 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
2684 {
2685         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
2686                 xhci_dbg(xhci, "Not enough ep ctxs: "
2687                                 "%u active, need to add 1, limit is %u.\n",
2688                                 xhci->num_active_eps, xhci->limit_active_eps);
2689                 return -ENOMEM;
2690         }
2691         xhci->num_active_eps += 1;
2692         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
2693                         xhci->num_active_eps);
2694         return 0;
2695 }
2696
2697
2698 /*
2699  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2700  * timed out, or allocating memory failed.  Returns 1 on success.
2701  */
2702 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2703 {
2704         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2705         unsigned long flags;
2706         int timeleft;
2707         int ret;
2708
2709         spin_lock_irqsave(&xhci->lock, flags);
2710         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2711         if (ret) {
2712                 spin_unlock_irqrestore(&xhci->lock, flags);
2713                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2714                 return 0;
2715         }
2716         xhci_ring_cmd_db(xhci);
2717         spin_unlock_irqrestore(&xhci->lock, flags);
2718
2719         /* XXX: how much time for xHC slot assignment? */
2720         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2721                         USB_CTRL_SET_TIMEOUT);
2722         if (timeleft <= 0) {
2723                 xhci_warn(xhci, "%s while waiting for a slot\n",
2724                                 timeleft == 0 ? "Timeout" : "Signal");
2725                 /* FIXME cancel the enable slot request */
2726                 return 0;
2727         }
2728
2729         if (!xhci->slot_id) {
2730                 xhci_err(xhci, "Error while assigning device slot ID\n");
2731                 return 0;
2732         }
2733
2734         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2735                 spin_lock_irqsave(&xhci->lock, flags);
2736                 ret = xhci_reserve_host_control_ep_resources(xhci);
2737                 if (ret) {
2738                         spin_unlock_irqrestore(&xhci->lock, flags);
2739                         xhci_warn(xhci, "Not enough host resources, "
2740                                         "active endpoint contexts = %u\n",
2741                                         xhci->num_active_eps);
2742                         goto disable_slot;
2743                 }
2744                 spin_unlock_irqrestore(&xhci->lock, flags);
2745         }
2746         /* Use GFP_NOIO, since this function can be called from
2747          * xhci_discover_or_reset_device(), which may be called as part of
2748          * mass storage driver error handling.
2749          */
2750         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2751                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2752                 goto disable_slot;
2753         }
2754         udev->slot_id = xhci->slot_id;
2755         /* Is this a LS or FS device under a HS hub? */
2756         /* Hub or peripherial? */
2757         return 1;
2758
2759 disable_slot:
2760         /* Disable slot, if we can do it without mem alloc */
2761         spin_lock_irqsave(&xhci->lock, flags);
2762         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2763                 xhci_ring_cmd_db(xhci);
2764         spin_unlock_irqrestore(&xhci->lock, flags);
2765         return 0;
2766 }
2767
2768 /*
2769  * Issue an Address Device command (which will issue a SetAddress request to
2770  * the device).
2771  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2772  * we should only issue and wait on one address command at the same time.
2773  *
2774  * We add one to the device address issued by the hardware because the USB core
2775  * uses address 1 for the root hubs (even though they're not really devices).
2776  */
2777 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2778 {
2779         unsigned long flags;
2780         int timeleft;
2781         struct xhci_virt_device *virt_dev;
2782         int ret = 0;
2783         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2784         struct xhci_slot_ctx *slot_ctx;
2785         struct xhci_input_control_ctx *ctrl_ctx;
2786         u64 temp_64;
2787
2788         if (!udev->slot_id) {
2789                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2790                 return -EINVAL;
2791         }
2792
2793         virt_dev = xhci->devs[udev->slot_id];
2794
2795         if (WARN_ON(!virt_dev)) {
2796                 /*
2797                  * In plug/unplug torture test with an NEC controller,
2798                  * a zero-dereference was observed once due to virt_dev = 0.
2799                  * Print useful debug rather than crash if it is observed again!
2800                  */
2801                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2802                         udev->slot_id);
2803                 return -EINVAL;
2804         }
2805
2806         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2807         /*
2808          * If this is the first Set Address since device plug-in or
2809          * virt_device realloaction after a resume with an xHCI power loss,
2810          * then set up the slot context.
2811          */
2812         if (!slot_ctx->dev_info)
2813                 xhci_setup_addressable_virt_dev(xhci, udev);
2814         /* Otherwise, update the control endpoint ring enqueue pointer. */
2815         else
2816                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2817         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2818         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2819
2820         spin_lock_irqsave(&xhci->lock, flags);
2821         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2822                                         udev->slot_id);
2823         if (ret) {
2824                 spin_unlock_irqrestore(&xhci->lock, flags);
2825                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2826                 return ret;
2827         }
2828         xhci_ring_cmd_db(xhci);
2829         spin_unlock_irqrestore(&xhci->lock, flags);
2830
2831         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2832         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2833                         USB_CTRL_SET_TIMEOUT);
2834         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2835          * the SetAddress() "recovery interval" required by USB and aborting the
2836          * command on a timeout.
2837          */
2838         if (timeleft <= 0) {
2839                 xhci_warn(xhci, "%s while waiting for a slot\n",
2840                                 timeleft == 0 ? "Timeout" : "Signal");
2841                 /* FIXME cancel the address device command */
2842                 return -ETIME;
2843         }
2844
2845         switch (virt_dev->cmd_status) {
2846         case COMP_CTX_STATE:
2847         case COMP_EBADSLT:
2848                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2849                                 udev->slot_id);
2850                 ret = -EINVAL;
2851                 break;
2852         case COMP_TX_ERR:
2853                 dev_warn(&udev->dev, "Device not responding to set address.\n");
2854                 ret = -EPROTO;
2855                 break;
2856         case COMP_SUCCESS:
2857                 xhci_dbg(xhci, "Successful Address Device command\n");
2858                 break;
2859         default:
2860                 xhci_err(xhci, "ERROR: unexpected command completion "
2861                                 "code 0x%x.\n", virt_dev->cmd_status);
2862                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2863                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2864                 ret = -EINVAL;
2865                 break;
2866         }
2867         if (ret) {
2868                 return ret;
2869         }
2870         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2871         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2872         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2873                  udev->slot_id,
2874                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2875                  (unsigned long long)
2876                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2877         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2878                         (unsigned long long)virt_dev->out_ctx->dma);
2879         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2880         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2881         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2882         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2883         /*
2884          * USB core uses address 1 for the roothubs, so we add one to the
2885          * address given back to us by the HC.
2886          */
2887         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2888         /* Use kernel assigned address for devices; store xHC assigned
2889          * address locally. */
2890         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2891                 + 1;
2892         /* Zero the input context control for later use */
2893         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2894         ctrl_ctx->add_flags = 0;
2895         ctrl_ctx->drop_flags = 0;
2896
2897         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2898
2899         return 0;
2900 }
2901
2902 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2903  * internal data structures for the device.
2904  */
2905 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2906                         struct usb_tt *tt, gfp_t mem_flags)
2907 {
2908         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2909         struct xhci_virt_device *vdev;
2910         struct xhci_command *config_cmd;
2911         struct xhci_input_control_ctx *ctrl_ctx;
2912         struct xhci_slot_ctx *slot_ctx;
2913         unsigned long flags;
2914         unsigned think_time;
2915         int ret;
2916
2917         /* Ignore root hubs */
2918         if (!hdev->parent)
2919                 return 0;
2920
2921         vdev = xhci->devs[hdev->slot_id];
2922         if (!vdev) {
2923                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2924                 return -EINVAL;
2925         }
2926         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2927         if (!config_cmd) {
2928                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2929                 return -ENOMEM;
2930         }
2931
2932         spin_lock_irqsave(&xhci->lock, flags);
2933         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2934         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2935         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2936         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2937         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
2938         if (tt->multi)
2939                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
2940         if (xhci->hci_version > 0x95) {
2941                 xhci_dbg(xhci, "xHCI version %x needs hub "
2942                                 "TT think time and number of ports\n",
2943                                 (unsigned int) xhci->hci_version);
2944                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
2945                 /* Set TT think time - convert from ns to FS bit times.
2946                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
2947                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
2948                  *
2949                  * xHCI 1.0: this field shall be 0 if the device is not a
2950                  * High-spped hub.
2951                  */
2952                 think_time = tt->think_time;
2953                 if (think_time != 0)
2954                         think_time = (think_time / 666) - 1;
2955                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
2956                         slot_ctx->tt_info |=
2957                                 cpu_to_le32(TT_THINK_TIME(think_time));
2958         } else {
2959                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2960                                 "TT think time or number of ports\n",
2961                                 (unsigned int) xhci->hci_version);
2962         }
2963         slot_ctx->dev_state = 0;
2964         spin_unlock_irqrestore(&xhci->lock, flags);
2965
2966         xhci_dbg(xhci, "Set up %s for hub device.\n",
2967                         (xhci->hci_version > 0x95) ?
2968                         "configure endpoint" : "evaluate context");
2969         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2970         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
2971
2972         /* Issue and wait for the configure endpoint or
2973          * evaluate context command.
2974          */
2975         if (xhci->hci_version > 0x95)
2976                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2977                                 false, false);
2978         else
2979                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2980                                 true, false);
2981
2982         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
2983         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
2984
2985         xhci_free_command(xhci, config_cmd);
2986         return ret;
2987 }
2988
2989 int xhci_get_frame(struct usb_hcd *hcd)
2990 {
2991         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2992         /* EHCI mods by the periodic size.  Why? */
2993         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
2994 }
2995
2996 MODULE_DESCRIPTION(DRIVER_DESC);
2997 MODULE_AUTHOR(DRIVER_AUTHOR);
2998 MODULE_LICENSE("GPL");
2999
3000 static int __init xhci_hcd_init(void)
3001 {
3002 #ifdef CONFIG_PCI
3003         int retval = 0;
3004
3005         retval = xhci_register_pci();
3006
3007         if (retval < 0) {
3008                 printk(KERN_DEBUG "Problem registering PCI driver.");
3009                 return retval;
3010         }
3011 #endif
3012         /*
3013          * Check the compiler generated sizes of structures that must be laid
3014          * out in specific ways for hardware access.
3015          */
3016         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3017         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3018         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3019         /* xhci_device_control has eight fields, and also
3020          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3021          */
3022         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3023         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3024         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3025         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3026         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3027         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3028         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3029         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3030         return 0;
3031 }
3032 module_init(xhci_hcd_init);
3033
3034 static void __exit xhci_hcd_cleanup(void)
3035 {
3036 #ifdef CONFIG_PCI
3037         xhci_unregister_pci();
3038 #endif
3039 }
3040 module_exit(xhci_hcd_cleanup);