2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
34 #define PCI_VENDOR_ID_ETRON 0x1b6f
35 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
37 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
39 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
40 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
43 static const char hcd_name[] = "xhci_hcd";
45 /* called after powerup, by probe or system-pm "wakeup" */
46 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
49 * TODO: Implement finding debug ports later.
50 * TODO: see if there are any quirks that need to be added to handle
51 * new extended capabilities.
54 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
55 if (!pci_set_mwi(pdev))
56 xhci_dbg(xhci, "MWI active\n");
58 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
62 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
64 struct pci_dev *pdev = to_pci_dev(dev);
66 /* Look for vendor-specific quirks */
67 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
68 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
69 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
70 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
71 pdev->revision == 0x0) {
72 xhci->quirks |= XHCI_RESET_EP_QUIRK;
73 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
74 " endpoint cmd after reset endpoint\n");
76 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
77 pdev->revision == 0x4) {
78 xhci->quirks |= XHCI_SLOW_SUSPEND;
80 "QUIRK: Fresco Logic xHC revision %u"
81 "must be suspended extra slowly",
84 /* Fresco Logic confirms: all revisions of this chip do not
85 * support MSI, even though some of them claim to in their PCI
88 xhci->quirks |= XHCI_BROKEN_MSI;
89 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
90 "has broken MSI implementation\n",
92 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
95 if (pdev->vendor == PCI_VENDOR_ID_NEC)
96 xhci->quirks |= XHCI_NEC_HOST;
98 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
99 xhci->quirks |= XHCI_AMD_0x96_HOST;
102 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
103 xhci->quirks |= XHCI_AMD_PLL_FIX;
105 if (pdev->vendor == PCI_VENDOR_ID_AMD)
106 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
108 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
109 xhci->quirks |= XHCI_AVOID_BEI;
110 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
111 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
112 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
113 xhci->limit_active_eps = 64;
114 xhci->quirks |= XHCI_SW_BW_CHECKING;
116 * PPT desktop boards DH77EB and DH77DF will power back on after
117 * a few seconds of being shutdown. The fix for this is to
118 * switch the ports from xHCI to EHCI on shutdown. We can't use
119 * DMI information to find those particular boards (since each
120 * vendor will change the board name), so we have to key off all
123 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
125 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
126 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
127 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
129 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
130 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
131 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
132 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
133 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
135 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
136 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
137 xhci->quirks |= XHCI_RESET_ON_RESUME;
138 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
139 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
141 if (pdev->vendor == PCI_VENDOR_ID_VIA)
142 xhci->quirks |= XHCI_RESET_ON_RESUME;
146 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
147 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
149 static void xhci_pme_quirk(struct xhci_hcd *xhci)
154 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
156 writel(val | BIT(28), reg);
160 /* called during probe() after chip reset completes */
161 static int xhci_pci_setup(struct usb_hcd *hcd)
163 struct xhci_hcd *xhci;
164 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
167 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
171 xhci = hcd_to_xhci(hcd);
172 if (!usb_hcd_is_primary_hcd(hcd))
175 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
176 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
178 /* Find any debug ports */
179 retval = xhci_pci_reinit(xhci, pdev);
188 * We need to register our own PCI probe function (instead of the USB core's
189 * function) in order to create a second roothub under xHCI.
191 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
194 struct xhci_hcd *xhci;
195 struct hc_driver *driver;
198 driver = (struct hc_driver *)id->driver_data;
199 /* Register the USB 2.0 roothub.
200 * FIXME: USB core must know to register the USB 2.0 roothub first.
201 * This is sort of silly, because we could just set the HCD driver flags
202 * to say USB 2.0, but I'm not sure what the implications would be in
203 * the other parts of the HCD code.
205 retval = usb_hcd_pci_probe(dev, id);
210 /* USB 2.0 roothub is stored in the PCI device now. */
211 hcd = dev_get_drvdata(&dev->dev);
212 xhci = hcd_to_xhci(hcd);
213 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
215 if (!xhci->shared_hcd) {
217 goto dealloc_usb2_hcd;
220 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
221 * is called by usb_add_hcd().
223 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
225 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
229 /* Roothub already marked as USB 3.0 speed */
233 usb_put_hcd(xhci->shared_hcd);
235 usb_hcd_pci_remove(dev);
239 static void xhci_pci_remove(struct pci_dev *dev)
241 struct xhci_hcd *xhci;
243 xhci = hcd_to_xhci(pci_get_drvdata(dev));
244 if (xhci->shared_hcd) {
245 usb_remove_hcd(xhci->shared_hcd);
246 usb_put_hcd(xhci->shared_hcd);
248 usb_hcd_pci_remove(dev);
250 /* Workaround for spurious wakeups at shutdown with HSW */
251 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
252 pci_set_power_state(dev, PCI_D3hot);
258 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
260 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
263 if (hcd->state != HC_STATE_SUSPENDED ||
264 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
267 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
268 xhci_pme_quirk(xhci);
270 retval = xhci_suspend(xhci, do_wakeup);
275 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
277 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
278 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
281 /* The BIOS on systems with the Intel Panther Point chipset may or may
282 * not support xHCI natively. That means that during system resume, it
283 * may switch the ports back to EHCI so that users can use their
284 * keyboard to select a kernel from GRUB after resume from hibernate.
286 * The BIOS is supposed to remember whether the OS had xHCI ports
287 * enabled before resume, and switch the ports back to xHCI when the
288 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
291 * Unconditionally switch the ports back to xHCI after a system resume.
292 * We can't tell whether the EHCI or xHCI controller will be resumed
293 * first, so we have to do the port switchover in both drivers. Writing
294 * a '1' to the port switchover registers should have no effect if the
295 * port was already switched over.
297 if (usb_is_intel_switchable_xhci(pdev))
298 usb_enable_xhci_ports(pdev);
300 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
301 xhci_pme_quirk(xhci);
303 retval = xhci_resume(xhci, hibernated);
306 #endif /* CONFIG_PM */
308 static const struct hc_driver xhci_pci_hc_driver = {
309 .description = hcd_name,
310 .product_desc = "xHCI Host Controller",
311 .hcd_priv_size = sizeof(struct xhci_hcd *),
314 * generic hardware linkage
317 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
320 * basic lifecycle operations
322 .reset = xhci_pci_setup,
325 .pci_suspend = xhci_pci_suspend,
326 .pci_resume = xhci_pci_resume,
329 .shutdown = xhci_shutdown,
332 * managing i/o requests and associated device resources
334 .urb_enqueue = xhci_urb_enqueue,
335 .urb_dequeue = xhci_urb_dequeue,
336 .alloc_dev = xhci_alloc_dev,
337 .free_dev = xhci_free_dev,
338 .alloc_streams = xhci_alloc_streams,
339 .free_streams = xhci_free_streams,
340 .add_endpoint = xhci_add_endpoint,
341 .drop_endpoint = xhci_drop_endpoint,
342 .endpoint_reset = xhci_endpoint_reset,
343 .check_bandwidth = xhci_check_bandwidth,
344 .reset_bandwidth = xhci_reset_bandwidth,
345 .address_device = xhci_address_device,
346 .update_hub_device = xhci_update_hub_device,
347 .reset_device = xhci_discover_or_reset_device,
352 .get_frame_number = xhci_get_frame,
354 /* Root hub support */
355 .hub_control = xhci_hub_control,
356 .hub_status_data = xhci_hub_status_data,
357 .bus_suspend = xhci_bus_suspend,
358 .bus_resume = xhci_bus_resume,
360 * call back when device connected and addressed
362 .update_device = xhci_update_device,
363 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
366 /*-------------------------------------------------------------------------*/
368 /* PCI driver selection metadata; PCI hotplugging uses this */
369 static const struct pci_device_id pci_ids[] = { {
370 /* handle any USB 3.0 xHCI controller */
371 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
372 .driver_data = (unsigned long) &xhci_pci_hc_driver,
374 { /* end: all zeroes */ }
376 MODULE_DEVICE_TABLE(pci, pci_ids);
378 /* pci driver glue; this is a "new style" PCI driver module */
379 static struct pci_driver xhci_pci_driver = {
380 .name = (char *) hcd_name,
383 .probe = xhci_pci_probe,
384 .remove = xhci_pci_remove,
385 /* suspend and resume implemented later */
387 .shutdown = usb_hcd_pci_shutdown,
390 .pm = &usb_hcd_pci_pm_ops
395 int __init xhci_register_pci(void)
397 return pci_register_driver(&xhci_pci_driver);
400 void __exit xhci_unregister_pci(void)
402 pci_unregister_driver(&xhci_pci_driver);