usb: usbmon: Read text within supplied buffer size
[pandora-kernel.git] / drivers / usb / host / xhci-pci.c
1 /*
2  * xHCI host controller driver PCI Bus Glue.
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
26
27 #include "xhci.h"
28
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
33
34 #define PCI_VENDOR_ID_ETRON             0x1b6f
35 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
36
37 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
39 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI        0x9cb1
40 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI             0x22b5
41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI         0xa12f
42 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI        0x9d2f
43 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI              0x0aa8
44 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI              0x1aa8
45 #define PCI_DEVICE_ID_INTEL_APL_XHCI                    0x5aa8
46 #define PCI_DEVICE_ID_INTEL_DNV_XHCI                    0x19d0
47
48 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4                 0x43b9
49 #define PCI_DEVICE_ID_AMD_PROMONTORYA_3                 0x43ba
50 #define PCI_DEVICE_ID_AMD_PROMONTORYA_2                 0x43bb
51 #define PCI_DEVICE_ID_AMD_PROMONTORYA_1                 0x43bc
52
53 static const char hcd_name[] = "xhci_hcd";
54
55 /* called after powerup, by probe or system-pm "wakeup" */
56 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
57 {
58         /*
59          * TODO: Implement finding debug ports later.
60          * TODO: see if there are any quirks that need to be added to handle
61          * new extended capabilities.
62          */
63
64         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
65         if (!pci_set_mwi(pdev))
66                 xhci_dbg(xhci, "MWI active\n");
67
68         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
69         return 0;
70 }
71
72 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
73 {
74         struct pci_dev          *pdev = to_pci_dev(dev);
75
76         /* Look for vendor-specific quirks */
77         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
78                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
79                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
80                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
81                                 pdev->revision == 0x0) {
82                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
83                         xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
84                                         " endpoint cmd after reset endpoint\n");
85                 }
86                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
87                                 pdev->revision == 0x4) {
88                         xhci->quirks |= XHCI_SLOW_SUSPEND;
89                         xhci_dbg(xhci,
90                                 "QUIRK: Fresco Logic xHC revision %u"
91                                 "must be suspended extra slowly",
92                                 pdev->revision);
93                 }
94                 /* Fresco Logic confirms: all revisions of this chip do not
95                  * support MSI, even though some of them claim to in their PCI
96                  * capabilities.
97                  */
98                 xhci->quirks |= XHCI_BROKEN_MSI;
99                 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
100                                 "has broken MSI implementation\n",
101                                 pdev->revision);
102                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
103         }
104
105         if (pdev->vendor == PCI_VENDOR_ID_NEC)
106                 xhci->quirks |= XHCI_NEC_HOST;
107
108         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
109                 xhci->quirks |= XHCI_AMD_0x96_HOST;
110
111         /* AMD PLL quirk */
112         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
113                 xhci->quirks |= XHCI_AMD_PLL_FIX;
114
115         if (pdev->vendor == PCI_VENDOR_ID_AMD)
116                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
117
118         if ((pdev->vendor == PCI_VENDOR_ID_AMD) &&
119                 ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) ||
120                 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_3) ||
121                 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_2) ||
122                 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_1)))
123                 xhci->quirks |= XHCI_U2_DISABLE_WAKE;
124
125         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
126                 xhci->quirks |= XHCI_INTEL_HOST;
127         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
128                 xhci->quirks |= XHCI_AVOID_BEI;
129         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
130                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
131                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
132                 xhci->limit_active_eps = 64;
133                 xhci->quirks |= XHCI_SW_BW_CHECKING;
134                 /*
135                  * PPT desktop boards DH77EB and DH77DF will power back on after
136                  * a few seconds of being shutdown.  The fix for this is to
137                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
138                  * DMI information to find those particular boards (since each
139                  * vendor will change the board name), so we have to key off all
140                  * PPT chipsets.
141                  */
142                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
143         }
144         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
145                 (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI ||
146                  pdev->device == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI)) {
147                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
148                 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
149         }
150         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
151                 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
152                  pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
153                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
154                  pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
155                  pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI ||
156                  pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
157                  pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI)) {
158                 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
159         }
160         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
161             (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
162              pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
163              pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI))
164                 xhci->quirks |= XHCI_MISSING_CAS;
165
166         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
167                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
168                 xhci->quirks |= XHCI_RESET_ON_RESUME;
169                 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
170                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
171         }
172         if (pdev->vendor == PCI_VENDOR_ID_VIA)
173                 xhci->quirks |= XHCI_RESET_ON_RESUME;
174
175         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
176                         pdev->device == 0x1142)
177                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
178 }
179
180 /*
181  * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
182  * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
183  */
184 static void xhci_pme_quirk(struct xhci_hcd *xhci)
185 {
186         u32 val;
187         void __iomem *reg;
188
189         reg = (void __iomem *) xhci->cap_regs + 0x80a4;
190         val = readl(reg);
191         writel(val | BIT(28), reg);
192         readl(reg);
193 }
194
195 /* called during probe() after chip reset completes */
196 static int xhci_pci_setup(struct usb_hcd *hcd)
197 {
198         struct xhci_hcd         *xhci;
199         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
200         int                     retval;
201
202         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
203         if (retval)
204                 return retval;
205
206         xhci = hcd_to_xhci(hcd);
207         if (!usb_hcd_is_primary_hcd(hcd))
208                 return 0;
209
210         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
211         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
212
213         /* Find any debug ports */
214         retval = xhci_pci_reinit(xhci, pdev);
215         if (!retval)
216                 return retval;
217
218         kfree(xhci);
219         return retval;
220 }
221
222 /*
223  * We need to register our own PCI probe function (instead of the USB core's
224  * function) in order to create a second roothub under xHCI.
225  */
226 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
227 {
228         int retval;
229         struct xhci_hcd *xhci;
230         struct hc_driver *driver;
231         struct usb_hcd *hcd;
232
233         driver = (struct hc_driver *)id->driver_data;
234         /* Register the USB 2.0 roothub.
235          * FIXME: USB core must know to register the USB 2.0 roothub first.
236          * This is sort of silly, because we could just set the HCD driver flags
237          * to say USB 2.0, but I'm not sure what the implications would be in
238          * the other parts of the HCD code.
239          */
240         retval = usb_hcd_pci_probe(dev, id);
241
242         if (retval)
243                 return retval;
244
245         /* USB 2.0 roothub is stored in the PCI device now. */
246         hcd = dev_get_drvdata(&dev->dev);
247         xhci = hcd_to_xhci(hcd);
248         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
249                                 pci_name(dev), hcd);
250         if (!xhci->shared_hcd) {
251                 retval = -ENOMEM;
252                 goto dealloc_usb2_hcd;
253         }
254
255         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
256          * is called by usb_add_hcd().
257          */
258         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
259
260         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
261                         IRQF_SHARED);
262         if (retval)
263                 goto put_usb3_hcd;
264         /* Roothub already marked as USB 3.0 speed */
265         return 0;
266
267 put_usb3_hcd:
268         usb_put_hcd(xhci->shared_hcd);
269 dealloc_usb2_hcd:
270         usb_hcd_pci_remove(dev);
271         return retval;
272 }
273
274 static void xhci_pci_remove(struct pci_dev *dev)
275 {
276         struct xhci_hcd *xhci;
277
278         xhci = hcd_to_xhci(pci_get_drvdata(dev));
279         if (xhci->shared_hcd) {
280                 usb_remove_hcd(xhci->shared_hcd);
281                 usb_put_hcd(xhci->shared_hcd);
282         }
283
284         /* Workaround for spurious wakeups at shutdown with HSW */
285         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
286                 pci_set_power_state(dev, PCI_D3hot);
287
288         usb_hcd_pci_remove(dev);
289
290         kfree(xhci);
291 }
292
293 #ifdef CONFIG_PM
294 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
295 {
296         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
297         int     retval = 0;
298
299         if (hcd->state != HC_STATE_SUSPENDED ||
300                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
301                 return -EINVAL;
302
303         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
304                 xhci_pme_quirk(xhci);
305
306         retval = xhci_suspend(xhci, do_wakeup);
307
308         return retval;
309 }
310
311 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
312 {
313         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
314         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
315         int                     retval = 0;
316
317         /* The BIOS on systems with the Intel Panther Point chipset may or may
318          * not support xHCI natively.  That means that during system resume, it
319          * may switch the ports back to EHCI so that users can use their
320          * keyboard to select a kernel from GRUB after resume from hibernate.
321          *
322          * The BIOS is supposed to remember whether the OS had xHCI ports
323          * enabled before resume, and switch the ports back to xHCI when the
324          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
325          * writers.
326          *
327          * Unconditionally switch the ports back to xHCI after a system resume.
328          * We can't tell whether the EHCI or xHCI controller will be resumed
329          * first, so we have to do the port switchover in both drivers.  Writing
330          * a '1' to the port switchover registers should have no effect if the
331          * port was already switched over.
332          */
333         if (usb_is_intel_switchable_xhci(pdev))
334                 usb_enable_xhci_ports(pdev);
335
336         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
337                 xhci_pme_quirk(xhci);
338
339         retval = xhci_resume(xhci, hibernated);
340         return retval;
341 }
342 #endif /* CONFIG_PM */
343
344 static const struct hc_driver xhci_pci_hc_driver = {
345         .description =          hcd_name,
346         .product_desc =         "xHCI Host Controller",
347         .hcd_priv_size =        sizeof(struct xhci_hcd *),
348
349         /*
350          * generic hardware linkage
351          */
352         .irq =                  xhci_irq,
353         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
354
355         /*
356          * basic lifecycle operations
357          */
358         .reset =                xhci_pci_setup,
359         .start =                xhci_run,
360 #ifdef CONFIG_PM
361         .pci_suspend =          xhci_pci_suspend,
362         .pci_resume =           xhci_pci_resume,
363 #endif
364         .stop =                 xhci_stop,
365         .shutdown =             xhci_shutdown,
366
367         /*
368          * managing i/o requests and associated device resources
369          */
370         .urb_enqueue =          xhci_urb_enqueue,
371         .urb_dequeue =          xhci_urb_dequeue,
372         .alloc_dev =            xhci_alloc_dev,
373         .free_dev =             xhci_free_dev,
374         .alloc_streams =        xhci_alloc_streams,
375         .free_streams =         xhci_free_streams,
376         .add_endpoint =         xhci_add_endpoint,
377         .drop_endpoint =        xhci_drop_endpoint,
378         .endpoint_reset =       xhci_endpoint_reset,
379         .check_bandwidth =      xhci_check_bandwidth,
380         .reset_bandwidth =      xhci_reset_bandwidth,
381         .address_device =       xhci_address_device,
382         .update_hub_device =    xhci_update_hub_device,
383         .reset_device =         xhci_discover_or_reset_device,
384
385         /*
386          * scheduling support
387          */
388         .get_frame_number =     xhci_get_frame,
389
390         /* Root hub support */
391         .hub_control =          xhci_hub_control,
392         .hub_status_data =      xhci_hub_status_data,
393         .bus_suspend =          xhci_bus_suspend,
394         .bus_resume =           xhci_bus_resume,
395         /*
396          * call back when device connected and addressed
397          */
398         .update_device =        xhci_update_device,
399         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
400 };
401
402 /*-------------------------------------------------------------------------*/
403
404 /* PCI driver selection metadata; PCI hotplugging uses this */
405 static const struct pci_device_id pci_ids[] = { {
406         /* handle any USB 3.0 xHCI controller */
407         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
408         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
409         },
410         { /* end: all zeroes */ }
411 };
412 MODULE_DEVICE_TABLE(pci, pci_ids);
413
414 /* pci driver glue; this is a "new style" PCI driver module */
415 static struct pci_driver xhci_pci_driver = {
416         .name =         (char *) hcd_name,
417         .id_table =     pci_ids,
418
419         .probe =        xhci_pci_probe,
420         .remove =       xhci_pci_remove,
421         /* suspend and resume implemented later */
422
423         .shutdown =     usb_hcd_pci_shutdown,
424 #ifdef CONFIG_PM
425         .driver = {
426                 .pm = &usb_hcd_pci_pm_ops
427         },
428 #endif
429 };
430
431 int __init xhci_register_pci(void)
432 {
433         return pci_register_driver(&xhci_pci_driver);
434 }
435
436 void __exit xhci_unregister_pci(void)
437 {
438         pci_unregister_driver(&xhci_pci_driver);
439 }