a78f2ebd11b785aabf235bf6dd4e76a529506319
[pandora-kernel.git] / drivers / usb / host / xhci-hub.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <asm/unaligned.h>
24
25 #include "xhci.h"
26
27 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29                          PORT_RC | PORT_PLC | PORT_PE)
30
31 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
32                 struct usb_hub_descriptor *desc, int ports)
33 {
34         u16 temp;
35
36         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
37         desc->bHubContrCurrent = 0;
38
39         desc->bNbrPorts = ports;
40         /* Ugh, these should be #defines, FIXME */
41         /* Using table 11-13 in USB 2.0 spec. */
42         temp = 0;
43         /* Bits 1:0 - support port power switching, or power always on */
44         if (HCC_PPC(xhci->hcc_params))
45                 temp |= 0x0001;
46         else
47                 temp |= 0x0002;
48         /* Bit  2 - root hubs are not part of a compound device */
49         /* Bits 4:3 - individual port over current protection */
50         temp |= 0x0008;
51         /* Bits 6:5 - no TTs in root ports */
52         /* Bit  7 - no port indicators */
53         desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
54 }
55
56 /* Fill in the USB 2.0 roothub descriptor */
57 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
58                 struct usb_hub_descriptor *desc)
59 {
60         int ports;
61         u16 temp;
62         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
63         u32 portsc;
64         unsigned int i;
65
66         ports = xhci->num_usb2_ports;
67
68         xhci_common_hub_descriptor(xhci, desc, ports);
69         desc->bDescriptorType = 0x29;
70         temp = 1 + (ports / 8);
71         desc->bDescLength = 7 + 2 * temp;
72
73         /* The Device Removable bits are reported on a byte granularity.
74          * If the port doesn't exist within that byte, the bit is set to 0.
75          */
76         memset(port_removable, 0, sizeof(port_removable));
77         for (i = 0; i < ports; i++) {
78                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
79                 /* If a device is removable, PORTSC reports a 0, same as in the
80                  * hub descriptor DeviceRemovable bits.
81                  */
82                 if (portsc & PORT_DEV_REMOVE)
83                         /* This math is hairy because bit 0 of DeviceRemovable
84                          * is reserved, and bit 1 is for port 1, etc.
85                          */
86                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
87         }
88
89         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
90          * ports on it.  The USB 2.0 specification says that there are two
91          * variable length fields at the end of the hub descriptor:
92          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
93          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
94          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
95          * 0xFF, so we initialize the both arrays (DeviceRemovable and
96          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
97          * set of ports that actually exist.
98          */
99         memset(desc->u.hs.DeviceRemovable, 0xff,
100                         sizeof(desc->u.hs.DeviceRemovable));
101         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
102                         sizeof(desc->u.hs.PortPwrCtrlMask));
103
104         for (i = 0; i < (ports + 1 + 7) / 8; i++)
105                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
106                                 sizeof(__u8));
107 }
108
109 /* Fill in the USB 3.0 roothub descriptor */
110 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
111                 struct usb_hub_descriptor *desc)
112 {
113         int ports;
114         u16 port_removable;
115         u32 portsc;
116         unsigned int i;
117
118         ports = xhci->num_usb3_ports;
119         xhci_common_hub_descriptor(xhci, desc, ports);
120         desc->bDescriptorType = 0x2a;
121         desc->bDescLength = 12;
122
123         /* header decode latency should be zero for roothubs,
124          * see section 4.23.5.2.
125          */
126         desc->u.ss.bHubHdrDecLat = 0;
127         desc->u.ss.wHubDelay = 0;
128
129         port_removable = 0;
130         /* bit 0 is reserved, bit 1 is for port 1, etc. */
131         for (i = 0; i < ports; i++) {
132                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
133                 if (portsc & PORT_DEV_REMOVE)
134                         port_removable |= 1 << (i + 1);
135         }
136         memset(&desc->u.ss.DeviceRemovable,
137                         (__force __u16) cpu_to_le16(port_removable),
138                         sizeof(__u16));
139 }
140
141 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
142                 struct usb_hub_descriptor *desc)
143 {
144
145         if (hcd->speed == HCD_USB3)
146                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
147         else
148                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
149
150 }
151
152 static unsigned int xhci_port_speed(unsigned int port_status)
153 {
154         if (DEV_LOWSPEED(port_status))
155                 return USB_PORT_STAT_LOW_SPEED;
156         if (DEV_HIGHSPEED(port_status))
157                 return USB_PORT_STAT_HIGH_SPEED;
158         /*
159          * FIXME: Yes, we should check for full speed, but the core uses that as
160          * a default in portspeed() in usb/core/hub.c (which is the only place
161          * USB_PORT_STAT_*_SPEED is used).
162          */
163         return 0;
164 }
165
166 /*
167  * These bits are Read Only (RO) and should be saved and written to the
168  * registers: 0, 3, 10:13, 30
169  * connect status, over-current status, port speed, and device removable.
170  * connect status and port speed are also sticky - meaning they're in
171  * the AUX well and they aren't changed by a hot, warm, or cold reset.
172  */
173 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
174 /*
175  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
176  * bits 5:8, 9, 14:15, 25:27
177  * link state, port power, port indicator state, "wake on" enable state
178  */
179 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
180 /*
181  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
182  * bit 4 (port reset)
183  */
184 #define XHCI_PORT_RW1S  ((1<<4))
185 /*
186  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
187  * bits 1, 17, 18, 19, 20, 21, 22, 23
188  * port enable/disable, and
189  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
190  * over-current, reset, link state, and L1 change
191  */
192 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
193 /*
194  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
195  * latched in
196  */
197 #define XHCI_PORT_RW    ((1<<16))
198 /*
199  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
200  * bits 2, 24, 28:31
201  */
202 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
203
204 /*
205  * Given a port state, this function returns a value that would result in the
206  * port being in the same state, if the value was written to the port status
207  * control register.
208  * Save Read Only (RO) bits and save read/write bits where
209  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
210  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
211  */
212 u32 xhci_port_state_to_neutral(u32 state)
213 {
214         /* Save read-only status and port state */
215         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
216 }
217
218 /*
219  * find slot id based on port number.
220  * @port: The one-based port number from one of the two split roothubs.
221  */
222 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
223                 u16 port)
224 {
225         int slot_id;
226         int i;
227         enum usb_device_speed speed;
228
229         slot_id = 0;
230         for (i = 0; i < MAX_HC_SLOTS; i++) {
231                 if (!xhci->devs[i])
232                         continue;
233                 speed = xhci->devs[i]->udev->speed;
234                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
235                                 && xhci->devs[i]->port == port) {
236                         slot_id = i;
237                         break;
238                 }
239         }
240
241         return slot_id;
242 }
243
244 /*
245  * Stop device
246  * It issues stop endpoint command for EP 0 to 30. And wait the last command
247  * to complete.
248  * suspend will set to 1, if suspend bit need to set in command.
249  */
250 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
251 {
252         struct xhci_virt_device *virt_dev;
253         struct xhci_command *cmd;
254         unsigned long flags;
255         int timeleft;
256         int ret;
257         int i;
258
259         ret = 0;
260         virt_dev = xhci->devs[slot_id];
261         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
262         if (!cmd) {
263                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
264                 return -ENOMEM;
265         }
266
267         spin_lock_irqsave(&xhci->lock, flags);
268         for (i = LAST_EP_INDEX; i > 0; i--) {
269                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
270                         xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
271         }
272         cmd->command_trb = xhci->cmd_ring->enqueue;
273         list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
274         xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
275         xhci_ring_cmd_db(xhci);
276         spin_unlock_irqrestore(&xhci->lock, flags);
277
278         /* Wait for last stop endpoint command to finish */
279         timeleft = wait_for_completion_interruptible_timeout(
280                         cmd->completion,
281                         USB_CTRL_SET_TIMEOUT);
282         if (timeleft <= 0) {
283                 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
284                                 timeleft == 0 ? "Timeout" : "Signal");
285                 spin_lock_irqsave(&xhci->lock, flags);
286                 /* The timeout might have raced with the event ring handler, so
287                  * only delete from the list if the item isn't poisoned.
288                  */
289                 if (cmd->cmd_list.next != LIST_POISON1)
290                         list_del(&cmd->cmd_list);
291                 spin_unlock_irqrestore(&xhci->lock, flags);
292                 ret = -ETIME;
293                 goto command_cleanup;
294         }
295
296 command_cleanup:
297         xhci_free_command(xhci, cmd);
298         return ret;
299 }
300
301 /*
302  * Ring device, it rings the all doorbells unconditionally.
303  */
304 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
305 {
306         int i;
307
308         for (i = 0; i < LAST_EP_INDEX + 1; i++)
309                 if (xhci->devs[slot_id]->eps[i].ring &&
310                     xhci->devs[slot_id]->eps[i].ring->dequeue)
311                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
312
313         return;
314 }
315
316 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
317                 u16 wIndex, u32 __iomem *addr, u32 port_status)
318 {
319         /* Don't allow the USB core to disable SuperSpeed ports. */
320         if (hcd->speed == HCD_USB3) {
321                 xhci_dbg(xhci, "Ignoring request to disable "
322                                 "SuperSpeed port.\n");
323                 return;
324         }
325
326         /* Write 1 to disable the port */
327         xhci_writel(xhci, port_status | PORT_PE, addr);
328         port_status = xhci_readl(xhci, addr);
329         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
330                         wIndex, port_status);
331 }
332
333 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
334                 u16 wIndex, u32 __iomem *addr, u32 port_status)
335 {
336         char *port_change_bit;
337         u32 status;
338
339         switch (wValue) {
340         case USB_PORT_FEAT_C_RESET:
341                 status = PORT_RC;
342                 port_change_bit = "reset";
343                 break;
344         case USB_PORT_FEAT_C_CONNECTION:
345                 status = PORT_CSC;
346                 port_change_bit = "connect";
347                 break;
348         case USB_PORT_FEAT_C_OVER_CURRENT:
349                 status = PORT_OCC;
350                 port_change_bit = "over-current";
351                 break;
352         case USB_PORT_FEAT_C_ENABLE:
353                 status = PORT_PEC;
354                 port_change_bit = "enable/disable";
355                 break;
356         case USB_PORT_FEAT_C_SUSPEND:
357                 status = PORT_PLC;
358                 port_change_bit = "suspend/resume";
359                 break;
360         default:
361                 /* Should never happen */
362                 return;
363         }
364         /* Change bits are all write 1 to clear */
365         xhci_writel(xhci, port_status | status, addr);
366         port_status = xhci_readl(xhci, addr);
367         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
368                         port_change_bit, wIndex, port_status);
369 }
370
371 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
372                 u16 wIndex, char *buf, u16 wLength)
373 {
374         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
375         int ports;
376         unsigned long flags;
377         u32 temp, temp1, status;
378         int retval = 0;
379         u32 __iomem **port_array;
380         int slot_id;
381         struct xhci_bus_state *bus_state;
382
383         if (hcd->speed == HCD_USB3) {
384                 ports = xhci->num_usb3_ports;
385                 port_array = xhci->usb3_ports;
386         } else {
387                 ports = xhci->num_usb2_ports;
388                 port_array = xhci->usb2_ports;
389         }
390         bus_state = &xhci->bus_state[hcd_index(hcd)];
391
392         spin_lock_irqsave(&xhci->lock, flags);
393         switch (typeReq) {
394         case GetHubStatus:
395                 /* No power source, over-current reported per port */
396                 memset(buf, 0, 4);
397                 break;
398         case GetHubDescriptor:
399                 /* Check to make sure userspace is asking for the USB 3.0 hub
400                  * descriptor for the USB 3.0 roothub.  If not, we stall the
401                  * endpoint, like external hubs do.
402                  */
403                 if (hcd->speed == HCD_USB3 &&
404                                 (wLength < USB_DT_SS_HUB_SIZE ||
405                                  wValue != (USB_DT_SS_HUB << 8))) {
406                         xhci_dbg(xhci, "Wrong hub descriptor type for "
407                                         "USB 3.0 roothub.\n");
408                         goto error;
409                 }
410                 xhci_hub_descriptor(hcd, xhci,
411                                 (struct usb_hub_descriptor *) buf);
412                 break;
413         case GetPortStatus:
414                 if (!wIndex || wIndex > ports)
415                         goto error;
416                 wIndex--;
417                 status = 0;
418                 temp = xhci_readl(xhci, port_array[wIndex]);
419                 if (temp == 0xffffffff) {
420                         retval = -ENODEV;
421                         break;
422                 }
423                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
424
425                 /* FIXME - should we return a port status value like the USB
426                  * 3.0 external hubs do?
427                  */
428                 /* wPortChange bits */
429                 if (temp & PORT_CSC)
430                         status |= USB_PORT_STAT_C_CONNECTION << 16;
431                 if (temp & PORT_PEC)
432                         status |= USB_PORT_STAT_C_ENABLE << 16;
433                 if ((temp & PORT_OCC))
434                         status |= USB_PORT_STAT_C_OVERCURRENT << 16;
435                 /*
436                  * FIXME ignoring reset and USB 2.1/3.0 specific
437                  * changes
438                  */
439                 if ((temp & PORT_PLS_MASK) == XDEV_U3
440                         && (temp & PORT_POWER))
441                         status |= 1 << USB_PORT_FEAT_SUSPEND;
442                 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
443                         if ((temp & PORT_RESET) || !(temp & PORT_PE))
444                                 goto error;
445                         if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
446                                                 bus_state->resume_done[wIndex])) {
447                                 xhci_dbg(xhci, "Resume USB2 port %d\n",
448                                         wIndex + 1);
449                                 bus_state->resume_done[wIndex] = 0;
450                                 temp1 = xhci_port_state_to_neutral(temp);
451                                 temp1 &= ~PORT_PLS_MASK;
452                                 temp1 |= PORT_LINK_STROBE | XDEV_U0;
453                                 xhci_writel(xhci, temp1, port_array[wIndex]);
454
455                                 xhci_dbg(xhci, "set port %d resume\n",
456                                         wIndex + 1);
457                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
458                                                                  wIndex + 1);
459                                 if (!slot_id) {
460                                         xhci_dbg(xhci, "slot_id is zero\n");
461                                         goto error;
462                                 }
463                                 xhci_ring_device(xhci, slot_id);
464                                 bus_state->port_c_suspend |= 1 << wIndex;
465                                 bus_state->suspended_ports &= ~(1 << wIndex);
466                         }
467                 }
468                 if ((temp & PORT_PLS_MASK) == XDEV_U0
469                         && (temp & PORT_POWER)
470                         && (bus_state->suspended_ports & (1 << wIndex))) {
471                         bus_state->suspended_ports &= ~(1 << wIndex);
472                         bus_state->port_c_suspend |= 1 << wIndex;
473                 }
474                 if (temp & PORT_CONNECT) {
475                         status |= USB_PORT_STAT_CONNECTION;
476                         status |= xhci_port_speed(temp);
477                 }
478                 if (temp & PORT_PE)
479                         status |= USB_PORT_STAT_ENABLE;
480                 if (temp & PORT_OC)
481                         status |= USB_PORT_STAT_OVERCURRENT;
482                 if (temp & PORT_RESET)
483                         status |= USB_PORT_STAT_RESET;
484                 if (temp & PORT_POWER)
485                         status |= USB_PORT_STAT_POWER;
486                 if (bus_state->port_c_suspend & (1 << wIndex))
487                         status |= 1 << USB_PORT_FEAT_C_SUSPEND;
488                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
489                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
490                 break;
491         case SetPortFeature:
492                 wIndex &= 0xff;
493                 if (!wIndex || wIndex > ports)
494                         goto error;
495                 wIndex--;
496                 temp = xhci_readl(xhci, port_array[wIndex]);
497                 if (temp == 0xffffffff) {
498                         retval = -ENODEV;
499                         break;
500                 }
501                 temp = xhci_port_state_to_neutral(temp);
502                 /* FIXME: What new port features do we need to support? */
503                 switch (wValue) {
504                 case USB_PORT_FEAT_SUSPEND:
505                         temp = xhci_readl(xhci, port_array[wIndex]);
506                         /* In spec software should not attempt to suspend
507                          * a port unless the port reports that it is in the
508                          * enabled (PED = â€˜1’,PLS < â€˜3’) state.
509                          */
510                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
511                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
512                                 xhci_warn(xhci, "USB core suspending device "
513                                           "not in U0/U1/U2.\n");
514                                 goto error;
515                         }
516
517                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
518                                         wIndex + 1);
519                         if (!slot_id) {
520                                 xhci_warn(xhci, "slot_id is zero\n");
521                                 goto error;
522                         }
523                         /* unlock to execute stop endpoint commands */
524                         spin_unlock_irqrestore(&xhci->lock, flags);
525                         xhci_stop_device(xhci, slot_id, 1);
526                         spin_lock_irqsave(&xhci->lock, flags);
527
528                         temp = xhci_port_state_to_neutral(temp);
529                         temp &= ~PORT_PLS_MASK;
530                         temp |= PORT_LINK_STROBE | XDEV_U3;
531                         xhci_writel(xhci, temp, port_array[wIndex]);
532
533                         spin_unlock_irqrestore(&xhci->lock, flags);
534                         msleep(10); /* wait device to enter */
535                         spin_lock_irqsave(&xhci->lock, flags);
536
537                         temp = xhci_readl(xhci, port_array[wIndex]);
538                         bus_state->suspended_ports |= 1 << wIndex;
539                         break;
540                 case USB_PORT_FEAT_POWER:
541                         /*
542                          * Turn on ports, even if there isn't per-port switching.
543                          * HC will report connect events even before this is set.
544                          * However, khubd will ignore the roothub events until
545                          * the roothub is registered.
546                          */
547                         xhci_writel(xhci, temp | PORT_POWER,
548                                         port_array[wIndex]);
549
550                         temp = xhci_readl(xhci, port_array[wIndex]);
551                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
552                         break;
553                 case USB_PORT_FEAT_RESET:
554                         temp = (temp | PORT_RESET);
555                         xhci_writel(xhci, temp, port_array[wIndex]);
556
557                         temp = xhci_readl(xhci, port_array[wIndex]);
558                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
559                         break;
560                 default:
561                         goto error;
562                 }
563                 /* unblock any posted writes */
564                 temp = xhci_readl(xhci, port_array[wIndex]);
565                 break;
566         case ClearPortFeature:
567                 if (!wIndex || wIndex > ports)
568                         goto error;
569                 wIndex--;
570                 temp = xhci_readl(xhci, port_array[wIndex]);
571                 if (temp == 0xffffffff) {
572                         retval = -ENODEV;
573                         break;
574                 }
575                 /* FIXME: What new port features do we need to support? */
576                 temp = xhci_port_state_to_neutral(temp);
577                 switch (wValue) {
578                 case USB_PORT_FEAT_SUSPEND:
579                         temp = xhci_readl(xhci, port_array[wIndex]);
580                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
581                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
582                         if (temp & PORT_RESET)
583                                 goto error;
584                         if (temp & XDEV_U3) {
585                                 if ((temp & PORT_PE) == 0)
586                                         goto error;
587                                 if (DEV_SUPERSPEED(temp)) {
588                                         temp = xhci_port_state_to_neutral(temp);
589                                         temp &= ~PORT_PLS_MASK;
590                                         temp |= PORT_LINK_STROBE | XDEV_U0;
591                                         xhci_writel(xhci, temp,
592                                                         port_array[wIndex]);
593                                         xhci_readl(xhci, port_array[wIndex]);
594                                 } else {
595                                         temp = xhci_port_state_to_neutral(temp);
596                                         temp &= ~PORT_PLS_MASK;
597                                         temp |= PORT_LINK_STROBE | XDEV_RESUME;
598                                         xhci_writel(xhci, temp,
599                                                         port_array[wIndex]);
600
601                                         spin_unlock_irqrestore(&xhci->lock,
602                                                                flags);
603                                         msleep(20);
604                                         spin_lock_irqsave(&xhci->lock, flags);
605
606                                         temp = xhci_readl(xhci,
607                                                         port_array[wIndex]);
608                                         temp = xhci_port_state_to_neutral(temp);
609                                         temp &= ~PORT_PLS_MASK;
610                                         temp |= PORT_LINK_STROBE | XDEV_U0;
611                                         xhci_writel(xhci, temp,
612                                                         port_array[wIndex]);
613                                 }
614                                 bus_state->port_c_suspend |= 1 << wIndex;
615                         }
616
617                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
618                                         wIndex + 1);
619                         if (!slot_id) {
620                                 xhci_dbg(xhci, "slot_id is zero\n");
621                                 goto error;
622                         }
623                         xhci_ring_device(xhci, slot_id);
624                         break;
625                 case USB_PORT_FEAT_C_SUSPEND:
626                         bus_state->port_c_suspend &= ~(1 << wIndex);
627                 case USB_PORT_FEAT_C_RESET:
628                 case USB_PORT_FEAT_C_CONNECTION:
629                 case USB_PORT_FEAT_C_OVER_CURRENT:
630                 case USB_PORT_FEAT_C_ENABLE:
631                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
632                                         port_array[wIndex], temp);
633                         break;
634                 case USB_PORT_FEAT_ENABLE:
635                         xhci_disable_port(hcd, xhci, wIndex,
636                                         port_array[wIndex], temp);
637                         break;
638                 default:
639                         goto error;
640                 }
641                 break;
642         default:
643 error:
644                 /* "stall" on error */
645                 retval = -EPIPE;
646         }
647         spin_unlock_irqrestore(&xhci->lock, flags);
648         return retval;
649 }
650
651 /*
652  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
653  * Ports are 0-indexed from the HCD point of view,
654  * and 1-indexed from the USB core pointer of view.
655  *
656  * Note that the status change bits will be cleared as soon as a port status
657  * change event is generated, so we use the saved status from that event.
658  */
659 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
660 {
661         unsigned long flags;
662         u32 temp, status;
663         u32 mask;
664         int i, retval;
665         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
666         int ports;
667         u32 __iomem **port_array;
668         struct xhci_bus_state *bus_state;
669
670         if (hcd->speed == HCD_USB3) {
671                 ports = xhci->num_usb3_ports;
672                 port_array = xhci->usb3_ports;
673         } else {
674                 ports = xhci->num_usb2_ports;
675                 port_array = xhci->usb2_ports;
676         }
677         bus_state = &xhci->bus_state[hcd_index(hcd)];
678
679         /* Initial status is no changes */
680         retval = (ports + 8) / 8;
681         memset(buf, 0, retval);
682         status = 0;
683
684         mask = PORT_CSC | PORT_PEC | PORT_OCC;
685
686         spin_lock_irqsave(&xhci->lock, flags);
687         /* For each port, did anything change?  If so, set that bit in buf. */
688         for (i = 0; i < ports; i++) {
689                 temp = xhci_readl(xhci, port_array[i]);
690                 if (temp == 0xffffffff) {
691                         retval = -ENODEV;
692                         break;
693                 }
694                 if ((temp & mask) != 0 ||
695                         (bus_state->port_c_suspend & 1 << i) ||
696                         (bus_state->resume_done[i] && time_after_eq(
697                             jiffies, bus_state->resume_done[i]))) {
698                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
699                         status = 1;
700                 }
701         }
702         spin_unlock_irqrestore(&xhci->lock, flags);
703         return status ? retval : 0;
704 }
705
706 #ifdef CONFIG_PM
707
708 int xhci_bus_suspend(struct usb_hcd *hcd)
709 {
710         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
711         int max_ports, port_index;
712         u32 __iomem **port_array;
713         struct xhci_bus_state *bus_state;
714         unsigned long flags;
715
716         if (hcd->speed == HCD_USB3) {
717                 max_ports = xhci->num_usb3_ports;
718                 port_array = xhci->usb3_ports;
719                 xhci_dbg(xhci, "suspend USB 3.0 root hub\n");
720         } else {
721                 max_ports = xhci->num_usb2_ports;
722                 port_array = xhci->usb2_ports;
723                 xhci_dbg(xhci, "suspend USB 2.0 root hub\n");
724         }
725         bus_state = &xhci->bus_state[hcd_index(hcd)];
726
727         spin_lock_irqsave(&xhci->lock, flags);
728
729         if (hcd->self.root_hub->do_remote_wakeup) {
730                 port_index = max_ports;
731                 while (port_index--) {
732                         if (bus_state->resume_done[port_index] != 0) {
733                                 spin_unlock_irqrestore(&xhci->lock, flags);
734                                 xhci_dbg(xhci, "suspend failed because "
735                                                 "port %d is resuming\n",
736                                                 port_index + 1);
737                                 return -EBUSY;
738                         }
739                 }
740         }
741
742         port_index = max_ports;
743         bus_state->bus_suspended = 0;
744         while (port_index--) {
745                 /* suspend the port if the port is not suspended */
746                 u32 t1, t2;
747                 int slot_id;
748
749                 t1 = xhci_readl(xhci, port_array[port_index]);
750                 t2 = xhci_port_state_to_neutral(t1);
751
752                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
753                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
754                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
755                                         port_index + 1);
756                         if (slot_id) {
757                                 spin_unlock_irqrestore(&xhci->lock, flags);
758                                 xhci_stop_device(xhci, slot_id, 1);
759                                 spin_lock_irqsave(&xhci->lock, flags);
760                         }
761                         t2 &= ~PORT_PLS_MASK;
762                         t2 |= PORT_LINK_STROBE | XDEV_U3;
763                         set_bit(port_index, &bus_state->bus_suspended);
764                 }
765                 if (hcd->self.root_hub->do_remote_wakeup) {
766                         if (t1 & PORT_CONNECT) {
767                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
768                                 t2 &= ~PORT_WKCONN_E;
769                         } else {
770                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
771                                 t2 &= ~PORT_WKDISC_E;
772                         }
773                 } else
774                         t2 &= ~PORT_WAKE_BITS;
775
776                 t1 = xhci_port_state_to_neutral(t1);
777                 if (t1 != t2)
778                         xhci_writel(xhci, t2, port_array[port_index]);
779
780                 if (DEV_HIGHSPEED(t1)) {
781                         /* enable remote wake up for USB 2.0 */
782                         u32 __iomem *addr;
783                         u32 tmp;
784
785                         /* Add one to the port status register address to get
786                          * the port power control register address.
787                          */
788                         addr = port_array[port_index] + 1;
789                         tmp = xhci_readl(xhci, addr);
790                         tmp |= PORT_RWE;
791                         xhci_writel(xhci, tmp, addr);
792                 }
793         }
794         hcd->state = HC_STATE_SUSPENDED;
795         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
796         spin_unlock_irqrestore(&xhci->lock, flags);
797         return 0;
798 }
799
800 int xhci_bus_resume(struct usb_hcd *hcd)
801 {
802         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
803         int max_ports, port_index;
804         u32 __iomem **port_array;
805         struct xhci_bus_state *bus_state;
806         u32 temp;
807         unsigned long flags;
808
809         if (hcd->speed == HCD_USB3) {
810                 max_ports = xhci->num_usb3_ports;
811                 port_array = xhci->usb3_ports;
812                 xhci_dbg(xhci, "resume USB 3.0 root hub\n");
813         } else {
814                 max_ports = xhci->num_usb2_ports;
815                 port_array = xhci->usb2_ports;
816                 xhci_dbg(xhci, "resume USB 2.0 root hub\n");
817         }
818         bus_state = &xhci->bus_state[hcd_index(hcd)];
819
820         if (time_before(jiffies, bus_state->next_statechange))
821                 msleep(5);
822
823         spin_lock_irqsave(&xhci->lock, flags);
824         if (!HCD_HW_ACCESSIBLE(hcd)) {
825                 spin_unlock_irqrestore(&xhci->lock, flags);
826                 return -ESHUTDOWN;
827         }
828
829         /* delay the irqs */
830         temp = xhci_readl(xhci, &xhci->op_regs->command);
831         temp &= ~CMD_EIE;
832         xhci_writel(xhci, temp, &xhci->op_regs->command);
833
834         port_index = max_ports;
835         while (port_index--) {
836                 /* Check whether need resume ports. If needed
837                    resume port and disable remote wakeup */
838                 u32 temp;
839                 int slot_id;
840
841                 temp = xhci_readl(xhci, port_array[port_index]);
842                 if (DEV_SUPERSPEED(temp))
843                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
844                 else
845                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
846                 if (test_bit(port_index, &bus_state->bus_suspended) &&
847                     (temp & PORT_PLS_MASK)) {
848                         if (DEV_SUPERSPEED(temp)) {
849                                 temp = xhci_port_state_to_neutral(temp);
850                                 temp &= ~PORT_PLS_MASK;
851                                 temp |= PORT_LINK_STROBE | XDEV_U0;
852                                 xhci_writel(xhci, temp, port_array[port_index]);
853                         } else {
854                                 temp = xhci_port_state_to_neutral(temp);
855                                 temp &= ~PORT_PLS_MASK;
856                                 temp |= PORT_LINK_STROBE | XDEV_RESUME;
857                                 xhci_writel(xhci, temp, port_array[port_index]);
858
859                                 spin_unlock_irqrestore(&xhci->lock, flags);
860                                 msleep(20);
861                                 spin_lock_irqsave(&xhci->lock, flags);
862
863                                 temp = xhci_readl(xhci, port_array[port_index]);
864                                 temp = xhci_port_state_to_neutral(temp);
865                                 temp &= ~PORT_PLS_MASK;
866                                 temp |= PORT_LINK_STROBE | XDEV_U0;
867                                 xhci_writel(xhci, temp, port_array[port_index]);
868                         }
869                         slot_id = xhci_find_slot_id_by_port(hcd,
870                                         xhci, port_index + 1);
871                         if (slot_id)
872                                 xhci_ring_device(xhci, slot_id);
873                 } else
874                         xhci_writel(xhci, temp, port_array[port_index]);
875
876                 if (DEV_HIGHSPEED(temp)) {
877                         /* disable remote wake up for USB 2.0 */
878                         u32 __iomem *addr;
879                         u32 tmp;
880
881                         /* Add one to the port status register address to get
882                          * the port power control register address.
883                          */
884                         addr = port_array[port_index] + 1;
885                         tmp = xhci_readl(xhci, addr);
886                         tmp &= ~PORT_RWE;
887                         xhci_writel(xhci, tmp, addr);
888                 }
889         }
890
891         (void) xhci_readl(xhci, &xhci->op_regs->command);
892
893         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
894         /* re-enable irqs */
895         temp = xhci_readl(xhci, &xhci->op_regs->command);
896         temp |= CMD_EIE;
897         xhci_writel(xhci, temp, &xhci->op_regs->command);
898         temp = xhci_readl(xhci, &xhci->op_regs->command);
899
900         spin_unlock_irqrestore(&xhci->lock, flags);
901         return 0;
902 }
903
904 #endif  /* CONFIG_PM */