drivers/usb/host/uhci-hcd.c

   1 /*
   2  * Universal Host Controller Interface driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Linus Torvalds
   7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   8  * (C) Copyright 1999 Randy Dunlap
   9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16  * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
  17  *
  18  * Intel documents this fairly well, and as far as I know there
  19  * are no royalties or anything like that, but even so there are
  20  * people who decided that they want to do the same thing in a
  21  * completely different way.
  22  *
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/pci.h>
  27 #include <linux/kernel.h>
  28 #include <linux/init.h>
  29 #include <linux/delay.h>
  30 #include <linux/ioport.h>
  31 #include <linux/sched.h>
  32 #include <linux/slab.h>
  33 #include <linux/errno.h>
  34 #include <linux/unistd.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/pm.h>
  39 #include <linux/dmapool.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/usb.h>
  42 #include <linux/bitops.h>
  43 #include <linux/dmi.h>
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/system.h>
  49
  50 #include "../core/hcd.h"
  51 #include "uhci-hcd.h"
  52 #include "pci-quirks.h"
  53
  54 /*
  55  * Version Information
  56  */
  57 #define DRIVER_VERSION "v3.0"
  58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
  59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
  60 Alan Stern"
  61 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
  62
  63 /* for flakey hardware, ignore overcurrent indicators */
  64 static int ignore_oc;
  65 module_param(ignore_oc, bool, S_IRUGO);
  66 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
  67
  68 /*
  69  * debug = 0, no debugging messages
  70  * debug = 1, dump failed URBs except for stalls
  71  * debug = 2, dump all failed URBs (including stalls)
  72  *            show all queues in /debug/uhci/[pci_addr]
  73  * debug = 3, show all TDs in URBs when dumping
  74  */
  75 #ifdef DEBUG
  76 #define DEBUG_CONFIGURED        1
  77 static int debug = 1;
  78 module_param(debug, int, S_IRUGO | S_IWUSR);
  79 MODULE_PARM_DESC(debug, "Debug level");
  80
  81 #else
  82 #define DEBUG_CONFIGURED        0
  83 #define debug                   0
  84 #endif
  85
  86 static char *errbuf;
  87 #define ERRBUF_LEN    (32 * 1024)
  88
  89 static struct kmem_cache *uhci_up_cachep;       /* urb_priv */
  90
  91 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
  92 static void wakeup_rh(struct uhci_hcd *uhci);
  93 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
  94
  95 #include "uhci-debug.c"
  96 #include "uhci-q.c"
  97 #include "uhci-hub.c"
  98
  99 /*
 100  * Finish up a host controller reset and update the recorded state.
 101  */
 102 static void finish_reset(struct uhci_hcd *uhci)
 103 {
 104         int port;
 105
 106         /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
 107          * bits in the port status and control registers.
 108          * We have to clear them by hand.
 109          */
 110         for (port = 0; port < uhci->rh_numports; ++port)
 111                 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
 112
 113         uhci->port_c_suspend = uhci->resuming_ports = 0;
 114         uhci->rh_state = UHCI_RH_RESET;
 115         uhci->is_stopped = UHCI_IS_STOPPED;
 116         uhci_to_hcd(uhci)->state = HC_STATE_HALT;
 117         uhci_to_hcd(uhci)->poll_rh = 0;
 118
 119         uhci->dead = 0;         /* Full reset resurrects the controller */
 120 }
 121
 122 /*
 123  * Last rites for a defunct/nonfunctional controller
 124  * or one we don't want to use any more.
 125  */
 126 static void uhci_hc_died(struct uhci_hcd *uhci)
 127 {
 128         uhci_get_current_frame_number(uhci);
 129         uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
 130         finish_reset(uhci);
 131         uhci->dead = 1;
 132
 133         /* The current frame may already be partway finished */
 134         ++uhci->frame_number;
 135 }
 136
 137 /*
 138  * Initialize a controller that was newly discovered or has lost power
 139  * or otherwise been reset while it was suspended.  In none of these cases
 140  * can we be sure of its previous state.
 141  */
 142 static void check_and_reset_hc(struct uhci_hcd *uhci)
 143 {
 144         if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
 145                 finish_reset(uhci);
 146 }
 147
 148 /*
 149  * Store the basic register settings needed by the controller.
 150  */
 151 static void configure_hc(struct uhci_hcd *uhci)
 152 {
 153         /* Set the frame length to the default: 1 ms exactly */
 154         outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
 155
 156         /* Store the frame list base address */
 157         outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
 158
 159         /* Set the current frame number */
 160         outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
 161                         uhci->io_addr + USBFRNUM);
 162
 163         /* Mark controller as not halted before we enable interrupts */
 164         uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
 165         mb();
 166
 167         /* Enable PIRQ */
 168         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
 169                         USBLEGSUP_DEFAULT);
 170 }
 171
 172
 173 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
 174 {
 175         int port;
 176
 177         /* If we have to ignore overcurrent events then almost by definition
 178          * we can't depend on resume-detect interrupts. */
 179         if (ignore_oc)
 180                 return 1;
 181
 182         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
 183             default:
 184                 break;
 185
 186             case PCI_VENDOR_ID_GENESYS:
 187                 /* Genesys Logic's GL880S controllers don't generate
 188                  * resume-detect interrupts.
 189                  */
 190                 return 1;
 191
 192             case PCI_VENDOR_ID_INTEL:
 193                 /* Some of Intel's USB controllers have a bug that causes
 194                  * resume-detect interrupts if any port has an over-current
 195                  * condition.  To make matters worse, some motherboards
 196                  * hardwire unused USB ports' over-current inputs active!
 197                  * To prevent problems, we will not enable resume-detect
 198                  * interrupts if any ports are OC.
 199                  */
 200                 for (port = 0; port < uhci->rh_numports; ++port) {
 201                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 202                                         USBPORTSC_OC)
 203                                 return 1;
 204                 }
 205                 break;
 206         }
 207         return 0;
 208 }
 209
 210 static int remote_wakeup_is_broken(struct uhci_hcd *uhci)
 211 {
 212         static struct dmi_system_id broken_wakeup_table[] = {
 213                 {
 214                         .ident = "Asus A7V8X",
 215                         .matches = {
 216                                 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK"),
 217                                 DMI_MATCH(DMI_BOARD_NAME, "A7V8X"),
 218                                 DMI_MATCH(DMI_BOARD_VERSION, "REV 1.xx"),
 219                         }
 220                 },
 221                 { }
 222         };
 223         int port;
 224
 225         /* One of Asus's motherboards has a bug which causes it to
 226          * wake up immediately from suspend-to-RAM if any of the ports
 227          * are connected.  In such cases we will not set EGSM.
 228          */
 229         if (dmi_check_system(broken_wakeup_table)) {
 230                 for (port = 0; port < uhci->rh_numports; ++port) {
 231                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 232                                         USBPORTSC_CCS)
 233                                 return 1;
 234                 }
 235         }
 236
 237         return 0;
 238 }
 239
 240 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
 241 __releases(uhci->lock)
 242 __acquires(uhci->lock)
 243 {
 244         int auto_stop;
 245         int int_enable, egsm_enable;
 246
 247         auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
 248         dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
 249                         "%s%s\n", __FUNCTION__,
 250                         (auto_stop ? " (auto-stop)" : ""));
 251
 252         /* If we get a suspend request when we're already auto-stopped
 253          * then there's nothing to do.
 254          */
 255         if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
 256                 uhci->rh_state = new_state;
 257                 return;
 258         }
 259
 260         /* Enable resume-detect interrupts if they work.
 261          * Then enter Global Suspend mode if _it_ works, still configured.
 262          */
 263         egsm_enable = USBCMD_EGSM;
 264         uhci->working_RD = 1;
 265         int_enable = USBINTR_RESUME;
 266         if (remote_wakeup_is_broken(uhci))
 267                 egsm_enable = 0;
 268         if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable)
 269                 uhci->working_RD = int_enable = 0;
 270
 271         outw(int_enable, uhci->io_addr + USBINTR);
 272         outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
 273         mb();
 274         udelay(5);
 275
 276         /* If we're auto-stopping then no devices have been attached
 277          * for a while, so there shouldn't be any active URBs and the
 278          * controller should stop after a few microseconds.  Otherwise
 279          * we will give the controller one frame to stop.
 280          */
 281         if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
 282                 uhci->rh_state = UHCI_RH_SUSPENDING;
 283                 spin_unlock_irq(&uhci->lock);
 284                 msleep(1);
 285                 spin_lock_irq(&uhci->lock);
 286                 if (uhci->dead)
 287                         return;
 288         }
 289         if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
 290                 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,
 291                         "Controller not stopped yet!\n");
 292
 293         uhci_get_current_frame_number(uhci);
 294
 295         uhci->rh_state = new_state;
 296         uhci->is_stopped = UHCI_IS_STOPPED;
 297         uhci_to_hcd(uhci)->poll_rh = !int_enable;
 298
 299         uhci_scan_schedule(uhci);
 300         uhci_fsbr_off(uhci);
 301 }
 302
 303 static void start_rh(struct uhci_hcd *uhci)
 304 {
 305         uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
 306         uhci->is_stopped = 0;
 307
 308         /* Mark it configured and running with a 64-byte max packet.
 309          * All interrupts are enabled, even though RESUME won't do anything.
 310          */
 311         outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
 312         outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
 313                         uhci->io_addr + USBINTR);
 314         mb();
 315         uhci->rh_state = UHCI_RH_RUNNING;
 316         uhci_to_hcd(uhci)->poll_rh = 1;
 317 }
 318
 319 static void wakeup_rh(struct uhci_hcd *uhci)
 320 __releases(uhci->lock)
 321 __acquires(uhci->lock)
 322 {
 323         dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
 324                         "%s%s\n", __FUNCTION__,
 325                         uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
 326                                 " (auto-start)" : "");
 327
 328         /* If we are auto-stopped then no devices are attached so there's
 329          * no need for wakeup signals.  Otherwise we send Global Resume
 330          * for 20 ms.
 331          */
 332         if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 333                 uhci->rh_state = UHCI_RH_RESUMING;
 334                 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
 335                                 uhci->io_addr + USBCMD);
 336                 spin_unlock_irq(&uhci->lock);
 337                 msleep(20);
 338                 spin_lock_irq(&uhci->lock);
 339                 if (uhci->dead)
 340                         return;
 341
 342                 /* End Global Resume and wait for EOP to be sent */
 343                 outw(USBCMD_CF, uhci->io_addr + USBCMD);
 344                 mb();
 345                 udelay(4);
 346                 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
 347                         dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
 348         }
 349
 350         start_rh(uhci);
 351
 352         /* Restart root hub polling */
 353         mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
 354 }
 355
 356 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
 357 {
 358         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 359         unsigned short status;
 360         unsigned long flags;
 361
 362         /*
 363          * Read the interrupt status, and write it back to clear the
 364          * interrupt cause.  Contrary to the UHCI specification, the
 365          * "HC Halted" status bit is persistent: it is RO, not R/WC.
 366          */
 367         status = inw(uhci->io_addr + USBSTS);
 368         if (!(status & ~USBSTS_HCH))    /* shared interrupt, not mine */
 369                 return IRQ_NONE;
 370         outw(status, uhci->io_addr + USBSTS);           /* Clear it */
 371
 372         if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
 373                 if (status & USBSTS_HSE)
 374                         dev_err(uhci_dev(uhci), "host system error, "
 375                                         "PCI problems?\n");
 376                 if (status & USBSTS_HCPE)
 377                         dev_err(uhci_dev(uhci), "host controller process "
 378                                         "error, something bad happened!\n");
 379                 if (status & USBSTS_HCH) {
 380                         spin_lock_irqsave(&uhci->lock, flags);
 381                         if (uhci->rh_state >= UHCI_RH_RUNNING) {
 382                                 dev_err(uhci_dev(uhci),
 383                                         "host controller halted, "
 384                                         "very bad!\n");
 385                                 if (debug > 1 && errbuf) {
 386                                         /* Print the schedule for debugging */
 387                                         uhci_sprint_schedule(uhci,
 388                                                         errbuf, ERRBUF_LEN);
 389                                         lprintk(errbuf);
 390                                 }
 391                                 uhci_hc_died(uhci);
 392
 393                                 /* Force a callback in case there are
 394                                  * pending unlinks */
 395                                 mod_timer(&hcd->rh_timer, jiffies);
 396                         }
 397                         spin_unlock_irqrestore(&uhci->lock, flags);
 398                 }
 399         }
 400
 401         if (status & USBSTS_RD)
 402                 usb_hcd_poll_rh_status(hcd);
 403         else {
 404                 spin_lock_irqsave(&uhci->lock, flags);
 405                 uhci_scan_schedule(uhci);
 406                 spin_unlock_irqrestore(&uhci->lock, flags);
 407         }
 408
 409         return IRQ_HANDLED;
 410 }
 411
 412 /*
 413  * Store the current frame number in uhci->frame_number if the controller
 414  * is runnning.  Expand from 11 bits (of which we use only 10) to a
 415  * full-sized integer.
 416  *
 417  * Like many other parts of the driver, this code relies on being polled
 418  * more than once per second as long as the controller is running.
 419  */
 420 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
 421 {
 422         if (!uhci->is_stopped) {
 423                 unsigned delta;
 424
 425                 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
 426                                 (UHCI_NUMFRAMES - 1);
 427                 uhci->frame_number += delta;
 428         }
 429 }
 430
 431 /*
 432  * De-allocate all resources
 433  */
 434 static void release_uhci(struct uhci_hcd *uhci)
 435 {
 436         int i;
 437
 438         if (DEBUG_CONFIGURED) {
 439                 spin_lock_irq(&uhci->lock);
 440                 uhci->is_initialized = 0;
 441                 spin_unlock_irq(&uhci->lock);
 442
 443                 debugfs_remove(uhci->dentry);
 444         }
 445
 446         for (i = 0; i < UHCI_NUM_SKELQH; i++)
 447                 uhci_free_qh(uhci, uhci->skelqh[i]);
 448
 449         uhci_free_td(uhci, uhci->term_td);
 450
 451         dma_pool_destroy(uhci->qh_pool);
 452
 453         dma_pool_destroy(uhci->td_pool);
 454
 455         kfree(uhci->frame_cpu);
 456
 457         dma_free_coherent(uhci_dev(uhci),
 458                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 459                         uhci->frame, uhci->frame_dma_handle);
 460 }
 461
 462 static int uhci_init(struct usb_hcd *hcd)
 463 {
 464         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 465         unsigned io_size = (unsigned) hcd->rsrc_len;
 466         int port;
 467
 468         uhci->io_addr = (unsigned long) hcd->rsrc_start;
 469
 470         /* The UHCI spec says devices must have 2 ports, and goes on to say
 471          * they may have more but gives no way to determine how many there
 472          * are.  However according to the UHCI spec, Bit 7 of the port
 473          * status and control register is always set to 1.  So we try to
 474          * use this to our advantage.  Another common failure mode when
 475          * a nonexistent register is addressed is to return all ones, so
 476          * we test for that also.
 477          */
 478         for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
 479                 unsigned int portstatus;
 480
 481                 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
 482                 if (!(portstatus & 0x0080) || portstatus == 0xffff)
 483                         break;
 484         }
 485         if (debug)
 486                 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
 487
 488         /* Anything greater than 7 is weird so we'll ignore it. */
 489         if (port > UHCI_RH_MAXCHILD) {
 490                 dev_info(uhci_dev(uhci), "port count misdetected? "
 491                                 "forcing to 2 ports\n");
 492                 port = 2;
 493         }
 494         uhci->rh_numports = port;
 495
 496         /* Kick BIOS off this hardware and reset if the controller
 497          * isn't already safely quiescent.
 498          */
 499         check_and_reset_hc(uhci);
 500         return 0;
 501 }
 502
 503 /* Make sure the controller is quiescent and that we're not using it
 504  * any more.  This is mainly for the benefit of programs which, like kexec,
 505  * expect the hardware to be idle: not doing DMA or generating IRQs.
 506  *
 507  * This routine may be called in a damaged or failing kernel.  Hence we
 508  * do not acquire the spinlock before shutting down the controller.
 509  */
 510 static void uhci_shutdown(struct pci_dev *pdev)
 511 {
 512         struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
 513
 514         uhci_hc_died(hcd_to_uhci(hcd));
 515 }
 516
 517 /*
 518  * Allocate a frame list, and then setup the skeleton
 519  *
 520  * The hardware doesn't really know any difference
 521  * in the queues, but the order does matter for the
 522  * protocols higher up. The order is:
 523  *
 524  *  - any isochronous events handled before any
 525  *    of the queues. We don't do that here, because
 526  *    we'll create the actual TD entries on demand.
 527  *  - The first queue is the interrupt queue.
 528  *  - The second queue is the control queue, split into low- and full-speed
 529  *  - The third queue is bulk queue.
 530  *  - The fourth queue is the bandwidth reclamation queue, which loops back
 531  *    to the full-speed control queue.
 532  */
 533 static int uhci_start(struct usb_hcd *hcd)
 534 {
 535         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 536         int retval = -EBUSY;
 537         int i;
 538         struct dentry *dentry;
 539
 540         hcd->uses_new_polling = 1;
 541
 542         spin_lock_init(&uhci->lock);
 543         setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
 544                         (unsigned long) uhci);
 545         INIT_LIST_HEAD(&uhci->idle_qh_list);
 546         init_waitqueue_head(&uhci->waitqh);
 547
 548         if (DEBUG_CONFIGURED) {
 549                 dentry = debugfs_create_file(hcd->self.bus_name,
 550                                 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
 551                                 uhci, &uhci_debug_operations);
 552                 if (!dentry) {
 553                         dev_err(uhci_dev(uhci), "couldn't create uhci "
 554                                         "debugfs entry\n");
 555                         retval = -ENOMEM;
 556                         goto err_create_debug_entry;
 557                 }
 558                 uhci->dentry = dentry;
 559         }
 560
 561         uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
 562                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 563                         &uhci->frame_dma_handle, 0);
 564         if (!uhci->frame) {
 565                 dev_err(uhci_dev(uhci), "unable to allocate "
 566                                 "consistent memory for frame list\n");
 567                 goto err_alloc_frame;
 568         }
 569         memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
 570
 571         uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
 572                         GFP_KERNEL);
 573         if (!uhci->frame_cpu) {
 574                 dev_err(uhci_dev(uhci), "unable to allocate "
 575                                 "memory for frame pointers\n");
 576                 goto err_alloc_frame_cpu;
 577         }
 578
 579         uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
 580                         sizeof(struct uhci_td), 16, 0);
 581         if (!uhci->td_pool) {
 582                 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
 583                 goto err_create_td_pool;
 584         }
 585
 586         uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
 587                         sizeof(struct uhci_qh), 16, 0);
 588         if (!uhci->qh_pool) {
 589                 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
 590                 goto err_create_qh_pool;
 591         }
 592
 593         uhci->term_td = uhci_alloc_td(uhci);
 594         if (!uhci->term_td) {
 595                 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
 596                 goto err_alloc_term_td;
 597         }
 598
 599         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 600                 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
 601                 if (!uhci->skelqh[i]) {
 602                         dev_err(uhci_dev(uhci), "unable to allocate QH\n");
 603                         goto err_alloc_skelqh;
 604                 }
 605         }
 606
 607         /*
 608          * 8 Interrupt queues; link all higher int queues to int1,
 609          * then link int1 to control and control to bulk
 610          */
 611         uhci->skel_int128_qh->link =
 612                         uhci->skel_int64_qh->link =
 613                         uhci->skel_int32_qh->link =
 614                         uhci->skel_int16_qh->link =
 615                         uhci->skel_int8_qh->link =
 616                         uhci->skel_int4_qh->link =
 617                         uhci->skel_int2_qh->link = UHCI_PTR_QH |
 618                         cpu_to_le32(uhci->skel_int1_qh->dma_handle);
 619
 620         uhci->skel_int1_qh->link = UHCI_PTR_QH |
 621                         cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
 622         uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
 623                         cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
 624         uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
 625                         cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
 626         uhci->skel_bulk_qh->link = UHCI_PTR_QH |
 627                         cpu_to_le32(uhci->skel_term_qh->dma_handle);
 628
 629         /* This dummy TD is to work around a bug in Intel PIIX controllers */
 630         uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
 631                 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
 632         uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
 633
 634         uhci->skel_term_qh->link = UHCI_PTR_TERM;
 635         uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
 636
 637         /*
 638          * Fill the frame list: make all entries point to the proper
 639          * interrupt queue.
 640          *
 641          * The interrupt queues will be interleaved as evenly as possible.
 642          * There's not much to be done about period-1 interrupts; they have
 643          * to occur in every frame.  But we can schedule period-2 interrupts
 644          * in odd-numbered frames, period-4 interrupts in frames congruent
 645          * to 2 (mod 4), and so on.  This way each frame only has two
 646          * interrupt QHs, which will help spread out bandwidth utilization.
 647          */
 648         for (i = 0; i < UHCI_NUMFRAMES; i++) {
 649                 int irq;
 650
 651                 /*
 652                  * ffs (Find First bit Set) does exactly what we need:
 653                  * 1,3,5,...  => ffs = 0 => use skel_int2_qh = skelqh[8],
 654                  * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
 655                  * ffs >= 7 => not on any high-period queue, so use
 656                  *      skel_int1_qh = skelqh[9].
 657                  * Add UHCI_NUMFRAMES to insure at least one bit is set.
 658                  */
 659                 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
 660                 if (irq <= 1)
 661                         irq = 9;
 662
 663                 /* Only place we don't use the frame list routines */
 664                 uhci->frame[i] = UHCI_PTR_QH |
 665                                 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
 666         }
 667
 668         /*
 669          * Some architectures require a full mb() to enforce completion of
 670          * the memory writes above before the I/O transfers in configure_hc().
 671          */
 672         mb();
 673
 674         configure_hc(uhci);
 675         uhci->is_initialized = 1;
 676         start_rh(uhci);
 677         return 0;
 678
 679 /*
 680  * error exits:
 681  */
 682 err_alloc_skelqh:
 683         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 684                 if (uhci->skelqh[i])
 685                         uhci_free_qh(uhci, uhci->skelqh[i]);
 686         }
 687
 688         uhci_free_td(uhci, uhci->term_td);
 689
 690 err_alloc_term_td:
 691         dma_pool_destroy(uhci->qh_pool);
 692
 693 err_create_qh_pool:
 694         dma_pool_destroy(uhci->td_pool);
 695
 696 err_create_td_pool:
 697         kfree(uhci->frame_cpu);
 698
 699 err_alloc_frame_cpu:
 700         dma_free_coherent(uhci_dev(uhci),
 701                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 702                         uhci->frame, uhci->frame_dma_handle);
 703
 704 err_alloc_frame:
 705         debugfs_remove(uhci->dentry);
 706
 707 err_create_debug_entry:
 708         return retval;
 709 }
 710
 711 static void uhci_stop(struct usb_hcd *hcd)
 712 {
 713         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 714
 715         spin_lock_irq(&uhci->lock);
 716         if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
 717                 uhci_hc_died(uhci);
 718         uhci_scan_schedule(uhci);
 719         spin_unlock_irq(&uhci->lock);
 720
 721         del_timer_sync(&uhci->fsbr_timer);
 722         release_uhci(uhci);
 723 }
 724
 725 #ifdef CONFIG_PM
 726 static int uhci_rh_suspend(struct usb_hcd *hcd)
 727 {
 728         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 729         int rc = 0;
 730
 731         spin_lock_irq(&uhci->lock);
 732         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
 733                 rc = -ESHUTDOWN;
 734         else if (!uhci->dead)
 735                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 736         spin_unlock_irq(&uhci->lock);
 737         return rc;
 738 }
 739
 740 static int uhci_rh_resume(struct usb_hcd *hcd)
 741 {
 742         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 743         int rc = 0;
 744
 745         spin_lock_irq(&uhci->lock);
 746         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 747                 dev_warn(&hcd->self.root_hub->dev, "HC isn't running!\n");
 748                 rc = -ESHUTDOWN;
 749         } else if (!uhci->dead)
 750                 wakeup_rh(uhci);
 751         spin_unlock_irq(&uhci->lock);
 752         return rc;
 753 }
 754
 755 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
 756 {
 757         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 758         int rc = 0;
 759
 760         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 761
 762         spin_lock_irq(&uhci->lock);
 763         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
 764                 goto done_okay;         /* Already suspended or dead */
 765
 766         if (uhci->rh_state > UHCI_RH_SUSPENDED) {
 767                 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
 768                 rc = -EBUSY;
 769                 goto done;
 770         };
 771
 772         /* All PCI host controllers are required to disable IRQ generation
 773          * at the source, so we must turn off PIRQ.
 774          */
 775         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
 776         mb();
 777         hcd->poll_rh = 0;
 778
 779         /* FIXME: Enable non-PME# remote wakeup? */
 780
 781         /* make sure snapshot being resumed re-enumerates everything */
 782         if (message.event == PM_EVENT_PRETHAW)
 783                 uhci_hc_died(uhci);
 784
 785 done_okay:
 786         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 787 done:
 788         spin_unlock_irq(&uhci->lock);
 789         return rc;
 790 }
 791
 792 static int uhci_resume(struct usb_hcd *hcd)
 793 {
 794         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 795
 796         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 797
 798         /* Since we aren't in D3 any more, it's safe to set this flag
 799          * even if the controller was dead.
 800          */
 801         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 802         mb();
 803
 804         spin_lock_irq(&uhci->lock);
 805
 806         /* FIXME: Disable non-PME# remote wakeup? */
 807
 808         /* The firmware or a boot kernel may have changed the controller
 809          * settings during a system wakeup.  Check it and reconfigure
 810          * to avoid problems.
 811          */
 812         check_and_reset_hc(uhci);
 813
 814         /* If the controller was dead before, it's back alive now */
 815         configure_hc(uhci);
 816
 817         if (uhci->rh_state == UHCI_RH_RESET) {
 818
 819                 /* The controller had to be reset */
 820                 usb_root_hub_lost_power(hcd->self.root_hub);
 821                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 822         }
 823
 824         spin_unlock_irq(&uhci->lock);
 825
 826         if (!uhci->working_RD) {
 827                 /* Suspended root hub needs to be polled */
 828                 hcd->poll_rh = 1;
 829                 usb_hcd_poll_rh_status(hcd);
 830         }
 831         return 0;
 832 }
 833 #endif
 834
 835 /* Wait until a particular device/endpoint's QH is idle, and free it */
 836 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
 837                 struct usb_host_endpoint *hep)
 838 {
 839         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 840         struct uhci_qh *qh;
 841
 842         spin_lock_irq(&uhci->lock);
 843         qh = (struct uhci_qh *) hep->hcpriv;
 844         if (qh == NULL)
 845                 goto done;
 846
 847         while (qh->state != QH_STATE_IDLE) {
 848                 ++uhci->num_waiting;
 849                 spin_unlock_irq(&uhci->lock);
 850                 wait_event_interruptible(uhci->waitqh,
 851                                 qh->state == QH_STATE_IDLE);
 852                 spin_lock_irq(&uhci->lock);
 853                 --uhci->num_waiting;
 854         }
 855
 856         uhci_free_qh(uhci, qh);
 857 done:
 858         spin_unlock_irq(&uhci->lock);
 859 }
 860
 861 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
 862 {
 863         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 864         unsigned frame_number;
 865         unsigned delta;
 866
 867         /* Minimize latency by avoiding the spinlock */
 868         frame_number = uhci->frame_number;
 869         barrier();
 870         delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
 871                         (UHCI_NUMFRAMES - 1);
 872         return frame_number + delta;
 873 }
 874
 875 static const char hcd_name[] = "uhci_hcd";
 876
 877 static const struct hc_driver uhci_driver = {
 878         .description =          hcd_name,
 879         .product_desc =         "UHCI Host Controller",
 880         .hcd_priv_size =        sizeof(struct uhci_hcd),
 881
 882         /* Generic hardware linkage */
 883         .irq =                  uhci_irq,
 884         .flags =                HCD_USB11,
 885
 886         /* Basic lifecycle operations */
 887         .reset =                uhci_init,
 888         .start =                uhci_start,
 889 #ifdef CONFIG_PM
 890         .suspend =              uhci_suspend,
 891         .resume =               uhci_resume,
 892         .bus_suspend =          uhci_rh_suspend,
 893         .bus_resume =           uhci_rh_resume,
 894 #endif
 895         .stop =                 uhci_stop,
 896
 897         .urb_enqueue =          uhci_urb_enqueue,
 898         .urb_dequeue =          uhci_urb_dequeue,
 899
 900         .endpoint_disable =     uhci_hcd_endpoint_disable,
 901         .get_frame_number =     uhci_hcd_get_frame_number,
 902
 903         .hub_status_data =      uhci_hub_status_data,
 904         .hub_control =          uhci_hub_control,
 905 };
 906
 907 static const struct pci_device_id uhci_pci_ids[] = { {
 908         /* handle any USB UHCI controller */
 909         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
 910         .driver_data =  (unsigned long) &uhci_driver,
 911         }, { /* end: all zeroes */ }
 912 };
 913
 914 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
 915
 916 static struct pci_driver uhci_pci_driver = {
 917         .name =         (char *)hcd_name,
 918         .id_table =     uhci_pci_ids,
 919
 920         .probe =        usb_hcd_pci_probe,
 921         .remove =       usb_hcd_pci_remove,
 922         .shutdown =     uhci_shutdown,
 923
 924 #ifdef  CONFIG_PM
 925         .suspend =      usb_hcd_pci_suspend,
 926         .resume =       usb_hcd_pci_resume,
 927 #endif  /* PM */
 928 };
 929
 930 static int __init uhci_hcd_init(void)
 931 {
 932         int retval = -ENOMEM;
 933
 934         printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n",
 935                         ignore_oc ? ", overcurrent ignored" : "");
 936
 937         if (usb_disabled())
 938                 return -ENODEV;
 939
 940         if (DEBUG_CONFIGURED) {
 941                 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
 942                 if (!errbuf)
 943                         goto errbuf_failed;
 944                 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
 945                 if (!uhci_debugfs_root)
 946                         goto debug_failed;
 947         }
 948
 949         uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
 950                 sizeof(struct urb_priv), 0, 0, NULL, NULL);
 951         if (!uhci_up_cachep)
 952                 goto up_failed;
 953
 954         retval = pci_register_driver(&uhci_pci_driver);
 955         if (retval)
 956                 goto init_failed;
 957
 958         return 0;
 959
 960 init_failed:
 961         kmem_cache_destroy(uhci_up_cachep);
 962
 963 up_failed:
 964         debugfs_remove(uhci_debugfs_root);
 965
 966 debug_failed:
 967         kfree(errbuf);
 968
 969 errbuf_failed:
 970
 971         return retval;
 972 }
 973
 974 static void __exit uhci_hcd_cleanup(void)
 975 {
 976         pci_unregister_driver(&uhci_pci_driver);
 977         kmem_cache_destroy(uhci_up_cachep);
 978         debugfs_remove(uhci_debugfs_root);
 979         kfree(errbuf);
 980 }
 981
 982 module_init(uhci_hcd_init);
 983 module_exit(uhci_hcd_cleanup);
 984
 985 MODULE_AUTHOR(DRIVER_AUTHOR);
 986 MODULE_DESCRIPTION(DRIVER_DESC);
 987 MODULE_LICENSE("GPL");