drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Copyright (c) 2000-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/pci.h>
  21 #include <linux/dmapool.h>
  22 #include <linux/kernel.h>
  23 #include <linux/delay.h>
  24 #include <linux/ioport.h>
  25 #include <linux/sched.h>
  26 #include <linux/vmalloc.h>
  27 #include <linux/errno.h>
  28 #include <linux/init.h>
  29 #include <linux/timer.h>
  30 #include <linux/ktime.h>
  31 #include <linux/list.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/hcd.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/slab.h>
  39 #include <linux/uaccess.h>
  40
  41 #include <asm/byteorder.h>
  42 #include <asm/io.h>
  43 #include <asm/irq.h>
  44 #include <asm/system.h>
  45 #include <asm/unaligned.h>
  46
  47 /*-------------------------------------------------------------------------*/
  48
  49 /*
  50  * EHCI hc_driver implementation ... experimental, incomplete.
  51  * Based on the final 1.0 register interface specification.
  52  *
  53  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  54  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  55  * Next comes "CardBay", using USB 2.0 signals.
  56  *
  57  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  58  * Special thanks to Intel and VIA for providing host controllers to
  59  * test this driver on, and Cypress (including In-System Design) for
  60  * providing early devices for those host controllers to talk to!
  61  */
  62
  63 #define DRIVER_AUTHOR "David Brownell"
  64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  65
  66 static const char       hcd_name [] = "ehci_hcd";
  67
  68
  69 #undef VERBOSE_DEBUG
  70 #undef EHCI_URB_TRACE
  71
  72 #ifdef DEBUG
  73 #define EHCI_STATS
  74 #endif
  75
  76 /* magic numbers that can affect system performance */
  77 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79 #define EHCI_TUNE_RL_TT         0
  80 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81 #define EHCI_TUNE_MULT_TT       1
  82 /*
  83  * Some drivers think it's safe to schedule isochronous transfers more than
  84  * 256 ms into the future (partly as a result of an old bug in the scheduling
  85  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86  * length of 512 frames instead of 256.
  87  */
  88 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  89
  90 #define EHCI_IAA_MSECS          10              /* arbitrary */
  91 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
  92 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
  93 #define EHCI_SHRINK_FRAMES      5               /* async qh unlink delay */
  94
  95 /* Initial IRQ latency:  faster than hw default */
  96 static int log2_irq_thresh = 0;         // 0 to 6
  97 module_param (log2_irq_thresh, int, S_IRUGO);
  98 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  99
 100 /* initial park setting:  slower than hw default */
 101 static unsigned park = 0;
 102 module_param (park, uint, S_IRUGO);
 103 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 104
 105 /* for flakey hardware, ignore overcurrent indicators */
 106 static int ignore_oc = 0;
 107 module_param (ignore_oc, bool, S_IRUGO);
 108 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 109
 110 /* for link power management(LPM) feature */
 111 static unsigned int hird;
 112 module_param(hird, int, S_IRUGO);
 113 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us\n");
 114
 115 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 116
 117 /* for ASPM quirk of ISOC on AMD SB800 */
 118 static struct pci_dev *amd_nb_dev;
 119
 120 /*-------------------------------------------------------------------------*/
 121
 122 #include "ehci.h"
 123 #include "ehci-dbg.c"
 124
 125 /*-------------------------------------------------------------------------*/
 126
 127 static void
 128 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 129 {
 130         /* Don't override timeouts which shrink or (later) disable
 131          * the async ring; just the I/O watchdog.  Note that if a
 132          * SHRINK were pending, OFF would never be requested.
 133          */
 134         if (timer_pending(&ehci->watchdog)
 135                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
 136                                 & ehci->actions))
 137                 return;
 138
 139         if (!test_and_set_bit(action, &ehci->actions)) {
 140                 unsigned long t;
 141
 142                 switch (action) {
 143                 case TIMER_IO_WATCHDOG:
 144                         if (!ehci->need_io_watchdog)
 145                                 return;
 146                         t = EHCI_IO_JIFFIES;
 147                         break;
 148                 case TIMER_ASYNC_OFF:
 149                         t = EHCI_ASYNC_JIFFIES;
 150                         break;
 151                 /* case TIMER_ASYNC_SHRINK: */
 152                 default:
 153                         /* add a jiffie since we synch against the
 154                          * 8 KHz uframe counter.
 155                          */
 156                         t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1;
 157                         break;
 158                 }
 159                 mod_timer(&ehci->watchdog, t + jiffies);
 160         }
 161 }
 162
 163 /*-------------------------------------------------------------------------*/
 164
 165 /*
 166  * handshake - spin reading hc until handshake completes or fails
 167  * @ptr: address of hc register to be read
 168  * @mask: bits to look at in result of read
 169  * @done: value of those bits when handshake succeeds
 170  * @usec: timeout in microseconds
 171  *
 172  * Returns negative errno, or zero on success
 173  *
 174  * Success happens when the "mask" bits have the specified value (hardware
 175  * handshake done).  There are two failure modes:  "usec" have passed (major
 176  * hardware flakeout), or the register reads as all-ones (hardware removed).
 177  *
 178  * That last failure should_only happen in cases like physical cardbus eject
 179  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 180  * bridge shutdown:  shutting down the bridge before the devices using it.
 181  */
 182 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 183                       u32 mask, u32 done, int usec)
 184 {
 185         u32     result;
 186
 187         do {
 188                 result = ehci_readl(ehci, ptr);
 189                 if (result == ~(u32)0)          /* card removed */
 190                         return -ENODEV;
 191                 result &= mask;
 192                 if (result == done)
 193                         return 0;
 194                 udelay (1);
 195                 usec--;
 196         } while (usec > 0);
 197         return -ETIMEDOUT;
 198 }
 199
 200 /* check TDI/ARC silicon is in host mode */
 201 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 202 {
 203         u32 __iomem     *reg_ptr;
 204         u32             tmp;
 205
 206         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 207         tmp = ehci_readl(ehci, reg_ptr);
 208         return (tmp & 3) == USBMODE_CM_HC;
 209 }
 210
 211 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 212 static int ehci_halt (struct ehci_hcd *ehci)
 213 {
 214         u32     temp = ehci_readl(ehci, &ehci->regs->status);
 215
 216         /* disable any irqs left enabled by previous code */
 217         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 218
 219         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
 220                 return 0;
 221         }
 222
 223         if ((temp & STS_HALT) != 0)
 224                 return 0;
 225
 226         temp = ehci_readl(ehci, &ehci->regs->command);
 227         temp &= ~CMD_RUN;
 228         ehci_writel(ehci, temp, &ehci->regs->command);
 229         return handshake (ehci, &ehci->regs->status,
 230                           STS_HALT, STS_HALT, 16 * 125);
 231 }
 232
 233 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 234                                        u32 mask, u32 done, int usec)
 235 {
 236         int error;
 237
 238         error = handshake(ehci, ptr, mask, done, usec);
 239         if (error) {
 240                 ehci_halt(ehci);
 241                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 242                 ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
 243                         ptr, mask, done, error);
 244         }
 245
 246         return error;
 247 }
 248
 249 /* put TDI/ARC silicon into EHCI mode */
 250 static void tdi_reset (struct ehci_hcd *ehci)
 251 {
 252         u32 __iomem     *reg_ptr;
 253         u32             tmp;
 254
 255         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 256         tmp = ehci_readl(ehci, reg_ptr);
 257         tmp |= USBMODE_CM_HC;
 258         /* The default byte access to MMR space is LE after
 259          * controller reset. Set the required endian mode
 260          * for transfer buffers to match the host microprocessor
 261          */
 262         if (ehci_big_endian_mmio(ehci))
 263                 tmp |= USBMODE_BE;
 264         ehci_writel(ehci, tmp, reg_ptr);
 265 }
 266
 267 /* reset a non-running (STS_HALT == 1) controller */
 268 static int ehci_reset (struct ehci_hcd *ehci)
 269 {
 270         int     retval;
 271         u32     command = ehci_readl(ehci, &ehci->regs->command);
 272
 273         /* If the EHCI debug controller is active, special care must be
 274          * taken before and after a host controller reset */
 275         if (ehci->debug && !dbgp_reset_prep())
 276                 ehci->debug = NULL;
 277
 278         command |= CMD_RESET;
 279         dbg_cmd (ehci, "reset", command);
 280         ehci_writel(ehci, command, &ehci->regs->command);
 281         ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 282         ehci->next_statechange = jiffies;
 283         retval = handshake (ehci, &ehci->regs->command,
 284                             CMD_RESET, 0, 250 * 1000);
 285
 286         if (ehci->has_hostpc) {
 287                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 288                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
 289                 ehci_writel(ehci, TXFIFO_DEFAULT,
 290                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
 291         }
 292         if (retval)
 293                 return retval;
 294
 295         if (ehci_is_TDI(ehci))
 296                 tdi_reset (ehci);
 297
 298         if (ehci->debug)
 299                 dbgp_external_startup();
 300
 301         return retval;
 302 }
 303
 304 /* idle the controller (from running) */
 305 static void ehci_quiesce (struct ehci_hcd *ehci)
 306 {
 307         u32     temp;
 308
 309 #ifdef DEBUG
 310         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 311                 BUG ();
 312 #endif
 313
 314         /* wait for any schedule enables/disables to take effect */
 315         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
 316         temp &= STS_ASS | STS_PSS;
 317         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
 318                                         STS_ASS | STS_PSS, temp, 16 * 125))
 319                 return;
 320
 321         /* then disable anything that's still active */
 322         temp = ehci_readl(ehci, &ehci->regs->command);
 323         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 324         ehci_writel(ehci, temp, &ehci->regs->command);
 325
 326         /* hardware can take 16 microframes to turn off ... */
 327         handshake_on_error_set_halt(ehci, &ehci->regs->status,
 328                                     STS_ASS | STS_PSS, 0, 16 * 125);
 329 }
 330
 331 /*-------------------------------------------------------------------------*/
 332
 333 static void end_unlink_async(struct ehci_hcd *ehci);
 334 static void ehci_work(struct ehci_hcd *ehci);
 335
 336 #include "ehci-hub.c"
 337 #include "ehci-lpm.c"
 338 #include "ehci-mem.c"
 339 #include "ehci-q.c"
 340 #include "ehci-sched.c"
 341
 342 /*-------------------------------------------------------------------------*/
 343
 344 static void ehci_iaa_watchdog(unsigned long param)
 345 {
 346         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 347         unsigned long           flags;
 348
 349         spin_lock_irqsave (&ehci->lock, flags);
 350
 351         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 352          * So we need this watchdog, but must protect it against both
 353          * (a) SMP races against real IAA firing and retriggering, and
 354          * (b) clean HC shutdown, when IAA watchdog was pending.
 355          */
 356         if (ehci->reclaim
 357                         && !timer_pending(&ehci->iaa_watchdog)
 358                         && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
 359                 u32 cmd, status;
 360
 361                 /* If we get here, IAA is *REALLY* late.  It's barely
 362                  * conceivable that the system is so busy that CMD_IAAD
 363                  * is still legitimately set, so let's be sure it's
 364                  * clear before we read STS_IAA.  (The HC should clear
 365                  * CMD_IAAD when it sets STS_IAA.)
 366                  */
 367                 cmd = ehci_readl(ehci, &ehci->regs->command);
 368                 if (cmd & CMD_IAAD)
 369                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 370                                         &ehci->regs->command);
 371
 372                 /* If IAA is set here it either legitimately triggered
 373                  * before we cleared IAAD above (but _way_ late, so we'll
 374                  * still count it as lost) ... or a silicon erratum:
 375                  * - VIA seems to set IAA without triggering the IRQ;
 376                  * - IAAD potentially cleared without setting IAA.
 377                  */
 378                 status = ehci_readl(ehci, &ehci->regs->status);
 379                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 380                         COUNT (ehci->stats.lost_iaa);
 381                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 382                 }
 383
 384                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 385                                 status, cmd);
 386                 end_unlink_async(ehci);
 387         }
 388
 389         spin_unlock_irqrestore(&ehci->lock, flags);
 390 }
 391
 392 static void ehci_watchdog(unsigned long param)
 393 {
 394         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 395         unsigned long           flags;
 396
 397         spin_lock_irqsave(&ehci->lock, flags);
 398
 399         /* stop async processing after it's idled a bit */
 400         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
 401                 start_unlink_async (ehci, ehci->async);
 402
 403         /* ehci could run by timer, without IRQs ... */
 404         ehci_work (ehci);
 405
 406         spin_unlock_irqrestore (&ehci->lock, flags);
 407 }
 408
 409 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 410  * The firmware seems to think that powering off is a wakeup event!
 411  * This routine turns off remote wakeup and everything else, on all ports.
 412  */
 413 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 414 {
 415         int     port = HCS_N_PORTS(ehci->hcs_params);
 416
 417         while (port--)
 418                 ehci_writel(ehci, PORT_RWC_BITS,
 419                                 &ehci->regs->port_status[port]);
 420 }
 421
 422 /*
 423  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 424  * Should be called with ehci->lock held.
 425  */
 426 static void ehci_silence_controller(struct ehci_hcd *ehci)
 427 {
 428         ehci_halt(ehci);
 429         ehci_turn_off_all_ports(ehci);
 430
 431         /* make BIOS/etc use companion controller during reboot */
 432         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 433
 434         /* unblock posted writes */
 435         ehci_readl(ehci, &ehci->regs->configured_flag);
 436 }
 437
 438 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 439  * This forcibly disables dma and IRQs, helping kexec and other cases
 440  * where the next system software may expect clean state.
 441  */
 442 static void ehci_shutdown(struct usb_hcd *hcd)
 443 {
 444         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 445
 446         del_timer_sync(&ehci->watchdog);
 447         del_timer_sync(&ehci->iaa_watchdog);
 448
 449         spin_lock_irq(&ehci->lock);
 450         ehci_silence_controller(ehci);
 451         spin_unlock_irq(&ehci->lock);
 452 }
 453
 454 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 455 {
 456         unsigned port;
 457
 458         if (!HCS_PPC (ehci->hcs_params))
 459                 return;
 460
 461         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 462         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 463                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 464                                 is_on ? SetPortFeature : ClearPortFeature,
 465                                 USB_PORT_FEAT_POWER,
 466                                 port--, NULL, 0);
 467         /* Flush those writes */
 468         ehci_readl(ehci, &ehci->regs->command);
 469         msleep(20);
 470 }
 471
 472 /*-------------------------------------------------------------------------*/
 473
 474 /*
 475  * ehci_work is called from some interrupts, timers, and so on.
 476  * it calls driver completion functions, after dropping ehci->lock.
 477  */
 478 static void ehci_work (struct ehci_hcd *ehci)
 479 {
 480         timer_action_done (ehci, TIMER_IO_WATCHDOG);
 481
 482         /* another CPU may drop ehci->lock during a schedule scan while
 483          * it reports urb completions.  this flag guards against bogus
 484          * attempts at re-entrant schedule scanning.
 485          */
 486         if (ehci->scanning)
 487                 return;
 488         ehci->scanning = 1;
 489         scan_async (ehci);
 490         if (ehci->next_uframe != -1)
 491                 scan_periodic (ehci);
 492         ehci->scanning = 0;
 493
 494         /* the IO watchdog guards against hardware or driver bugs that
 495          * misplace IRQs, and should let us run completely without IRQs.
 496          * such lossage has been observed on both VT6202 and VT8235.
 497          */
 498         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
 499                         (ehci->async->qh_next.ptr != NULL ||
 500                          ehci->periodic_sched != 0))
 501                 timer_action (ehci, TIMER_IO_WATCHDOG);
 502 }
 503
 504 /*
 505  * Called when the ehci_hcd module is removed.
 506  */
 507 static void ehci_stop (struct usb_hcd *hcd)
 508 {
 509         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 510
 511         ehci_dbg (ehci, "stop\n");
 512
 513         /* no more interrupts ... */
 514         del_timer_sync (&ehci->watchdog);
 515         del_timer_sync(&ehci->iaa_watchdog);
 516
 517         spin_lock_irq(&ehci->lock);
 518         if (HC_IS_RUNNING (hcd->state))
 519                 ehci_quiesce (ehci);
 520
 521         ehci_silence_controller(ehci);
 522         ehci_reset (ehci);
 523         spin_unlock_irq(&ehci->lock);
 524
 525         remove_companion_file(ehci);
 526         remove_debug_files (ehci);
 527
 528         /* root hub is shut down separately (first, when possible) */
 529         spin_lock_irq (&ehci->lock);
 530         if (ehci->async)
 531                 ehci_work (ehci);
 532         spin_unlock_irq (&ehci->lock);
 533         ehci_mem_cleanup (ehci);
 534
 535         if (amd_nb_dev) {
 536                 pci_dev_put(amd_nb_dev);
 537                 amd_nb_dev = NULL;
 538         }
 539
 540 #ifdef  EHCI_STATS
 541         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 542                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
 543                 ehci->stats.lost_iaa);
 544         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 545                 ehci->stats.complete, ehci->stats.unlink);
 546 #endif
 547
 548         dbg_status (ehci, "ehci_stop completed",
 549                     ehci_readl(ehci, &ehci->regs->status));
 550 }
 551
 552 /* one-time init, only for memory state */
 553 static int ehci_init(struct usb_hcd *hcd)
 554 {
 555         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 556         u32                     temp;
 557         int                     retval;
 558         u32                     hcc_params;
 559         struct ehci_qh_hw       *hw;
 560
 561         spin_lock_init(&ehci->lock);
 562
 563         /*
 564          * keep io watchdog by default, those good HCDs could turn off it later
 565          */
 566         ehci->need_io_watchdog = 1;
 567         init_timer(&ehci->watchdog);
 568         ehci->watchdog.function = ehci_watchdog;
 569         ehci->watchdog.data = (unsigned long) ehci;
 570
 571         init_timer(&ehci->iaa_watchdog);
 572         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 573         ehci->iaa_watchdog.data = (unsigned long) ehci;
 574
 575         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 576
 577         /*
 578          * hw default: 1K periodic list heads, one per frame.
 579          * periodic_size can shrink by USBCMD update if hcc_params allows.
 580          */
 581         ehci->periodic_size = DEFAULT_I_TDPS;
 582         INIT_LIST_HEAD(&ehci->cached_itd_list);
 583         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 584
 585         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 586                 /* periodic schedule size can be smaller than default */
 587                 switch (EHCI_TUNE_FLS) {
 588                 case 0: ehci->periodic_size = 1024; break;
 589                 case 1: ehci->periodic_size = 512; break;
 590                 case 2: ehci->periodic_size = 256; break;
 591                 default:        BUG();
 592                 }
 593         }
 594         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 595                 return retval;
 596
 597         /* controllers may cache some of the periodic schedule ... */
 598         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 599                 ehci->i_thresh = 2 + 8;
 600         else                                    // N microframes cached
 601                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 602
 603         ehci->reclaim = NULL;
 604         ehci->next_uframe = -1;
 605         ehci->clock_frame = -1;
 606
 607         /*
 608          * dedicate a qh for the async ring head, since we couldn't unlink
 609          * a 'real' qh without stopping the async schedule [4.8].  use it
 610          * as the 'reclamation list head' too.
 611          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 612          * from automatically advancing to the next td after short reads.
 613          */
 614         ehci->async->qh_next.qh = NULL;
 615         hw = ehci->async->hw;
 616         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 617         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 618         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 619         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 620         ehci->async->qh_state = QH_STATE_LINKED;
 621         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 622
 623         /* clear interrupt enables, set irq latency */
 624         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 625                 log2_irq_thresh = 0;
 626         temp = 1 << (16 + log2_irq_thresh);
 627         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 628                 ehci->has_ppcd = 1;
 629                 ehci_dbg(ehci, "enable per-port change event\n");
 630                 temp |= CMD_PPCEE;
 631         }
 632         if (HCC_CANPARK(hcc_params)) {
 633                 /* HW default park == 3, on hardware that supports it (like
 634                  * NVidia and ALI silicon), maximizes throughput on the async
 635                  * schedule by avoiding QH fetches between transfers.
 636                  *
 637                  * With fast usb storage devices and NForce2, "park" seems to
 638                  * make problems:  throughput reduction (!), data errors...
 639                  */
 640                 if (park) {
 641                         park = min(park, (unsigned) 3);
 642                         temp |= CMD_PARK;
 643                         temp |= park << 8;
 644                 }
 645                 ehci_dbg(ehci, "park %d\n", park);
 646         }
 647         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 648                 /* periodic schedule size can be smaller than default */
 649                 temp &= ~(3 << 2);
 650                 temp |= (EHCI_TUNE_FLS << 2);
 651         }
 652         if (HCC_LPM(hcc_params)) {
 653                 /* support link power management EHCI 1.1 addendum */
 654                 ehci_dbg(ehci, "support lpm\n");
 655                 ehci->has_lpm = 1;
 656                 if (hird > 0xf) {
 657                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 658                         hird);
 659                         hird = 0;
 660                 }
 661                 temp |= hird << 24;
 662         }
 663         ehci->command = temp;
 664
 665         /* Accept arbitrarily long scatter-gather lists */
 666         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 667                 hcd->self.sg_tablesize = ~0;
 668         return 0;
 669 }
 670
 671 /* start HC running; it's halted, ehci_init() has been run (once) */
 672 static int ehci_run (struct usb_hcd *hcd)
 673 {
 674         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 675         int                     retval;
 676         u32                     temp;
 677         u32                     hcc_params;
 678
 679         hcd->uses_new_polling = 1;
 680
 681         /* EHCI spec section 4.1 */
 682         if ((retval = ehci_reset(ehci)) != 0) {
 683                 ehci_mem_cleanup(ehci);
 684                 return retval;
 685         }
 686         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 687         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 688
 689         /*
 690          * hcc_params controls whether ehci->regs->segment must (!!!)
 691          * be used; it constrains QH/ITD/SITD and QTD locations.
 692          * pci_pool consistent memory always uses segment zero.
 693          * streaming mappings for I/O buffers, like pci_map_single(),
 694          * can return segments above 4GB, if the device allows.
 695          *
 696          * NOTE:  the dma mask is visible through dma_supported(), so
 697          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 698          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 699          * host side drivers though.
 700          */
 701         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 702         if (HCC_64BIT_ADDR(hcc_params)) {
 703                 ehci_writel(ehci, 0, &ehci->regs->segment);
 704 #if 0
 705 // this is deeply broken on almost all architectures
 706                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 707                         ehci_info(ehci, "enabled 64bit DMA\n");
 708 #endif
 709         }
 710
 711
 712         // Philips, Intel, and maybe others need CMD_RUN before the
 713         // root hub will detect new devices (why?); NEC doesn't
 714         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 715         ehci->command |= CMD_RUN;
 716         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 717         dbg_cmd (ehci, "init", ehci->command);
 718
 719         /*
 720          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 721          * are explicitly handed to companion controller(s), so no TT is
 722          * involved with the root hub.  (Except where one is integrated,
 723          * and there's no companion controller unless maybe for USB OTG.)
 724          *
 725          * Turning on the CF flag will transfer ownership of all ports
 726          * from the companions to the EHCI controller.  If any of the
 727          * companions are in the middle of a port reset at the time, it
 728          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 729          * guarantees that no resets are in progress.  After we set CF,
 730          * a short delay lets the hardware catch up; new resets shouldn't
 731          * be started before the port switching actions could complete.
 732          */
 733         down_write(&ehci_cf_port_reset_rwsem);
 734         hcd->state = HC_STATE_RUNNING;
 735         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 736         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 737         msleep(5);
 738         up_write(&ehci_cf_port_reset_rwsem);
 739         ehci->last_periodic_enable = ktime_get_real();
 740
 741         temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
 742         ehci_info (ehci,
 743                 "USB %x.%x started, EHCI %x.%02x%s\n",
 744                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 745                 temp >> 8, temp & 0xff,
 746                 ignore_oc ? ", overcurrent ignored" : "");
 747
 748         ehci_writel(ehci, INTR_MASK,
 749                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 750
 751         /* GRR this is run-once init(), being done every time the HC starts.
 752          * So long as they're part of class devices, we can't do it init()
 753          * since the class device isn't created that early.
 754          */
 755         create_debug_files(ehci);
 756         create_companion_file(ehci);
 757
 758         return 0;
 759 }
 760
 761 /*-------------------------------------------------------------------------*/
 762
 763 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 764 {
 765         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 766         u32                     status, masked_status, pcd_status = 0, cmd;
 767         int                     bh;
 768
 769         spin_lock (&ehci->lock);
 770
 771         status = ehci_readl(ehci, &ehci->regs->status);
 772
 773         /* e.g. cardbus physical eject */
 774         if (status == ~(u32) 0) {
 775                 ehci_dbg (ehci, "device removed\n");
 776                 goto dead;
 777         }
 778
 779         masked_status = status & INTR_MASK;
 780         if (!masked_status) {           /* irq sharing? */
 781                 spin_unlock(&ehci->lock);
 782                 return IRQ_NONE;
 783         }
 784
 785         /* clear (just) interrupts */
 786         ehci_writel(ehci, masked_status, &ehci->regs->status);
 787         cmd = ehci_readl(ehci, &ehci->regs->command);
 788         bh = 0;
 789
 790 #ifdef  VERBOSE_DEBUG
 791         /* unrequested/ignored: Frame List Rollover */
 792         dbg_status (ehci, "irq", status);
 793 #endif
 794
 795         /* INT, ERR, and IAA interrupt rates can be throttled */
 796
 797         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 798         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 799                 if (likely ((status & STS_ERR) == 0))
 800                         COUNT (ehci->stats.normal);
 801                 else
 802                         COUNT (ehci->stats.error);
 803                 bh = 1;
 804         }
 805
 806         /* complete the unlinking of some qh [4.15.2.3] */
 807         if (status & STS_IAA) {
 808                 /* guard against (alleged) silicon errata */
 809                 if (cmd & CMD_IAAD) {
 810                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 811                                         &ehci->regs->command);
 812                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 813                 }
 814                 if (ehci->reclaim) {
 815                         COUNT(ehci->stats.reclaim);
 816                         end_unlink_async(ehci);
 817                 } else
 818                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
 819         }
 820
 821         /* remote wakeup [4.3.1] */
 822         if (status & STS_PCD) {
 823                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 824                 u32             ppcd = 0;
 825
 826                 /* kick root hub later */
 827                 pcd_status = status;
 828
 829                 /* resume root hub? */
 830                 if (!(cmd & CMD_RUN))
 831                         usb_hcd_resume_root_hub(hcd);
 832
 833                 /* get per-port change detect bits */
 834                 if (ehci->has_ppcd)
 835                         ppcd = status >> 16;
 836
 837                 while (i--) {
 838                         int pstatus;
 839
 840                         /* leverage per-port change bits feature */
 841                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 842                                 continue;
 843                         pstatus = ehci_readl(ehci,
 844                                          &ehci->regs->port_status[i]);
 845
 846                         if (pstatus & PORT_OWNER)
 847                                 continue;
 848                         if (!(test_bit(i, &ehci->suspended_ports) &&
 849                                         ((pstatus & PORT_RESUME) ||
 850                                                 !(pstatus & PORT_SUSPEND)) &&
 851                                         (pstatus & PORT_PE) &&
 852                                         ehci->reset_done[i] == 0))
 853                                 continue;
 854
 855                         /* start 20 msec resume signaling from this port,
 856                          * and make khubd collect PORT_STAT_C_SUSPEND to
 857                          * stop that signaling.  Use 5 ms extra for safety,
 858                          * like usb_port_resume() does.
 859                          */
 860                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 861                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 862                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 863                 }
 864         }
 865
 866         /* PCI errors [4.15.2.4] */
 867         if (unlikely ((status & STS_FATAL) != 0)) {
 868                 ehci_err(ehci, "fatal error\n");
 869                 dbg_cmd(ehci, "fatal", cmd);
 870                 dbg_status(ehci, "fatal", status);
 871                 ehci_halt(ehci);
 872 dead:
 873                 ehci_reset(ehci);
 874                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 875                 /* generic layer kills/unlinks all urbs, then
 876                  * uses ehci_stop to clean up the rest
 877                  */
 878                 bh = 1;
 879         }
 880
 881         if (bh)
 882                 ehci_work (ehci);
 883         spin_unlock (&ehci->lock);
 884         if (pcd_status)
 885                 usb_hcd_poll_rh_status(hcd);
 886         return IRQ_HANDLED;
 887 }
 888
 889 /*-------------------------------------------------------------------------*/
 890
 891 /*
 892  * non-error returns are a promise to giveback() the urb later
 893  * we drop ownership so next owner (or urb unlink) can get it
 894  *
 895  * urb + dev is in hcd.self.controller.urb_list
 896  * we're queueing TDs onto software and hardware lists
 897  *
 898  * hcd-specific init for hcpriv hasn't been done yet
 899  *
 900  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 901  * to a (possibly active) QH, and the same QH scanning code.
 902  */
 903 static int ehci_urb_enqueue (
 904         struct usb_hcd  *hcd,
 905         struct urb      *urb,
 906         gfp_t           mem_flags
 907 ) {
 908         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 909         struct list_head        qtd_list;
 910
 911         INIT_LIST_HEAD (&qtd_list);
 912
 913         switch (usb_pipetype (urb->pipe)) {
 914         case PIPE_CONTROL:
 915                 /* qh_completions() code doesn't handle all the fault cases
 916                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 917                  */
 918                 if (urb->transfer_buffer_length > (16 * 1024))
 919                         return -EMSGSIZE;
 920                 /* FALLTHROUGH */
 921         /* case PIPE_BULK: */
 922         default:
 923                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 924                         return -ENOMEM;
 925                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 926
 927         case PIPE_INTERRUPT:
 928                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 929                         return -ENOMEM;
 930                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 931
 932         case PIPE_ISOCHRONOUS:
 933                 if (urb->dev->speed == USB_SPEED_HIGH)
 934                         return itd_submit (ehci, urb, mem_flags);
 935                 else
 936                         return sitd_submit (ehci, urb, mem_flags);
 937         }
 938 }
 939
 940 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 941 {
 942         /* failfast */
 943         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
 944                 end_unlink_async(ehci);
 945
 946         /* If the QH isn't linked then there's nothing we can do
 947          * unless we were called during a giveback, in which case
 948          * qh_completions() has to deal with it.
 949          */
 950         if (qh->qh_state != QH_STATE_LINKED) {
 951                 if (qh->qh_state == QH_STATE_COMPLETING)
 952                         qh->needs_rescan = 1;
 953                 return;
 954         }
 955
 956         /* defer till later if busy */
 957         if (ehci->reclaim) {
 958                 struct ehci_qh          *last;
 959
 960                 for (last = ehci->reclaim;
 961                                 last->reclaim;
 962                                 last = last->reclaim)
 963                         continue;
 964                 qh->qh_state = QH_STATE_UNLINK_WAIT;
 965                 last->reclaim = qh;
 966
 967         /* start IAA cycle */
 968         } else
 969                 start_unlink_async (ehci, qh);
 970 }
 971
 972 /* remove from hardware lists
 973  * completions normally happen asynchronously
 974  */
 975
 976 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 977 {
 978         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 979         struct ehci_qh          *qh;
 980         unsigned long           flags;
 981         int                     rc;
 982
 983         spin_lock_irqsave (&ehci->lock, flags);
 984         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 985         if (rc)
 986                 goto done;
 987
 988         switch (usb_pipetype (urb->pipe)) {
 989         // case PIPE_CONTROL:
 990         // case PIPE_BULK:
 991         default:
 992                 qh = (struct ehci_qh *) urb->hcpriv;
 993                 if (!qh)
 994                         break;
 995                 switch (qh->qh_state) {
 996                 case QH_STATE_LINKED:
 997                 case QH_STATE_COMPLETING:
 998                         unlink_async(ehci, qh);
 999                         break;
1000                 case QH_STATE_UNLINK:
1001                 case QH_STATE_UNLINK_WAIT:
1002                         /* already started */
1003                         break;
1004                 case QH_STATE_IDLE:
1005                         /* QH might be waiting for a Clear-TT-Buffer */
1006                         qh_completions(ehci, qh);
1007                         break;
1008                 }
1009                 break;
1010
1011         case PIPE_INTERRUPT:
1012                 qh = (struct ehci_qh *) urb->hcpriv;
1013                 if (!qh)
1014                         break;
1015                 switch (qh->qh_state) {
1016                 case QH_STATE_LINKED:
1017                 case QH_STATE_COMPLETING:
1018                         intr_deschedule (ehci, qh);
1019                         break;
1020                 case QH_STATE_IDLE:
1021                         qh_completions (ehci, qh);
1022                         break;
1023                 default:
1024                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1025                                         qh, qh->qh_state);
1026                         goto done;
1027                 }
1028                 break;
1029
1030         case PIPE_ISOCHRONOUS:
1031                 // itd or sitd ...
1032
1033                 // wait till next completion, do it then.
1034                 // completion irqs can wait up to 1024 msec,
1035                 break;
1036         }
1037 done:
1038         spin_unlock_irqrestore (&ehci->lock, flags);
1039         return rc;
1040 }
1041
1042 /*-------------------------------------------------------------------------*/
1043
1044 // bulk qh holds the data toggle
1045
1046 static void
1047 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1048 {
1049         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1050         unsigned long           flags;
1051         struct ehci_qh          *qh, *tmp;
1052
1053         /* ASSERT:  any requests/urbs are being unlinked */
1054         /* ASSERT:  nobody can be submitting urbs for this any more */
1055
1056 rescan:
1057         spin_lock_irqsave (&ehci->lock, flags);
1058         qh = ep->hcpriv;
1059         if (!qh)
1060                 goto done;
1061
1062         /* endpoints can be iso streams.  for now, we don't
1063          * accelerate iso completions ... so spin a while.
1064          */
1065         if (qh->hw == NULL) {
1066                 ehci_vdbg (ehci, "iso delay\n");
1067                 goto idle_timeout;
1068         }
1069
1070         if (!HC_IS_RUNNING (hcd->state))
1071                 qh->qh_state = QH_STATE_IDLE;
1072         switch (qh->qh_state) {
1073         case QH_STATE_LINKED:
1074         case QH_STATE_COMPLETING:
1075                 for (tmp = ehci->async->qh_next.qh;
1076                                 tmp && tmp != qh;
1077                                 tmp = tmp->qh_next.qh)
1078                         continue;
1079                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1080                  * may already be unlinked.
1081                  */
1082                 if (tmp)
1083                         unlink_async(ehci, qh);
1084                 /* FALL THROUGH */
1085         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1086         case QH_STATE_UNLINK_WAIT:
1087 idle_timeout:
1088                 spin_unlock_irqrestore (&ehci->lock, flags);
1089                 schedule_timeout_uninterruptible(1);
1090                 goto rescan;
1091         case QH_STATE_IDLE:             /* fully unlinked */
1092                 if (qh->clearing_tt)
1093                         goto idle_timeout;
1094                 if (list_empty (&qh->qtd_list)) {
1095                         qh_put (qh);
1096                         break;
1097                 }
1098                 /* else FALL THROUGH */
1099         default:
1100                 /* caller was supposed to have unlinked any requests;
1101                  * that's not our job.  just leak this memory.
1102                  */
1103                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1104                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1105                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1106                 break;
1107         }
1108         ep->hcpriv = NULL;
1109 done:
1110         spin_unlock_irqrestore (&ehci->lock, flags);
1111 }
1112
1113 static void
1114 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1115 {
1116         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1117         struct ehci_qh          *qh;
1118         int                     eptype = usb_endpoint_type(&ep->desc);
1119         int                     epnum = usb_endpoint_num(&ep->desc);
1120         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1121         unsigned long           flags;
1122
1123         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1124                 return;
1125
1126         spin_lock_irqsave(&ehci->lock, flags);
1127         qh = ep->hcpriv;
1128
1129         /* For Bulk and Interrupt endpoints we maintain the toggle state
1130          * in the hardware; the toggle bits in udev aren't used at all.
1131          * When an endpoint is reset by usb_clear_halt() we must reset
1132          * the toggle bit in the QH.
1133          */
1134         if (qh) {
1135                 usb_settoggle(qh->dev, epnum, is_out, 0);
1136                 if (!list_empty(&qh->qtd_list)) {
1137                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1138                 } else if (qh->qh_state == QH_STATE_LINKED ||
1139                                 qh->qh_state == QH_STATE_COMPLETING) {
1140
1141                         /* The toggle value in the QH can't be updated
1142                          * while the QH is active.  Unlink it now;
1143                          * re-linking will call qh_refresh().
1144                          */
1145                         if (eptype == USB_ENDPOINT_XFER_BULK)
1146                                 unlink_async(ehci, qh);
1147                         else
1148                                 intr_deschedule(ehci, qh);
1149                 }
1150         }
1151         spin_unlock_irqrestore(&ehci->lock, flags);
1152 }
1153
1154 static int ehci_get_frame (struct usb_hcd *hcd)
1155 {
1156         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1157         return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1158                 ehci->periodic_size;
1159 }
1160
1161 /*-------------------------------------------------------------------------*/
1162
1163 MODULE_DESCRIPTION(DRIVER_DESC);
1164 MODULE_AUTHOR (DRIVER_AUTHOR);
1165 MODULE_LICENSE ("GPL");
1166
1167 #ifdef CONFIG_PCI
1168 #include "ehci-pci.c"
1169 #define PCI_DRIVER              ehci_pci_driver
1170 #endif
1171
1172 #ifdef CONFIG_USB_EHCI_FSL
1173 #include "ehci-fsl.c"
1174 #define PLATFORM_DRIVER         ehci_fsl_driver
1175 #endif
1176
1177 #ifdef CONFIG_USB_EHCI_MXC
1178 #include "ehci-mxc.c"
1179 #define PLATFORM_DRIVER         ehci_mxc_driver
1180 #endif
1181
1182 #ifdef CONFIG_CPU_SUBTYPE_SH7786
1183 #include "ehci-sh.c"
1184 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1185 #endif
1186
1187 #ifdef CONFIG_SOC_AU1200
1188 #include "ehci-au1xxx.c"
1189 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1190 #endif
1191
1192 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1193 #include "ehci-omap.c"
1194 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1195 #endif
1196
1197 #ifdef CONFIG_PPC_PS3
1198 #include "ehci-ps3.c"
1199 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1200 #endif
1201
1202 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1203 #include "ehci-ppc-of.c"
1204 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1205 #endif
1206
1207 #ifdef CONFIG_XPS_USB_HCD_XILINX
1208 #include "ehci-xilinx-of.c"
1209 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1210 #endif
1211
1212 #ifdef CONFIG_PLAT_ORION
1213 #include "ehci-orion.c"
1214 #define PLATFORM_DRIVER         ehci_orion_driver
1215 #endif
1216
1217 #ifdef CONFIG_ARCH_IXP4XX
1218 #include "ehci-ixp4xx.c"
1219 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1220 #endif
1221
1222 #ifdef CONFIG_USB_W90X900_EHCI
1223 #include "ehci-w90x900.c"
1224 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1225 #endif
1226
1227 #ifdef CONFIG_ARCH_AT91
1228 #include "ehci-atmel.c"
1229 #define PLATFORM_DRIVER         ehci_atmel_driver
1230 #endif
1231
1232 #ifdef CONFIG_USB_OCTEON_EHCI
1233 #include "ehci-octeon.c"
1234 #define PLATFORM_DRIVER         ehci_octeon_driver
1235 #endif
1236
1237 #ifdef CONFIG_USB_CNS3XXX_EHCI
1238 #include "ehci-cns3xxx.c"
1239 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1240 #endif
1241
1242 #ifdef CONFIG_ARCH_VT8500
1243 #include "ehci-vt8500.c"
1244 #define PLATFORM_DRIVER         vt8500_ehci_driver
1245 #endif
1246
1247 #ifdef CONFIG_PLAT_SPEAR
1248 #include "ehci-spear.c"
1249 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1250 #endif
1251
1252 #ifdef CONFIG_USB_EHCI_MSM
1253 #include "ehci-msm.c"
1254 #define PLATFORM_DRIVER         ehci_msm_driver
1255 #endif
1256
1257 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1258     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1259     !defined(XILINX_OF_PLATFORM_DRIVER)
1260 #error "missing bus glue for ehci-hcd"
1261 #endif
1262
1263 static int __init ehci_hcd_init(void)
1264 {
1265         int retval = 0;
1266
1267         if (usb_disabled())
1268                 return -ENODEV;
1269
1270         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1271         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1272         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1273                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1274                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1275                                 " before uhci_hcd and ohci_hcd, not after\n");
1276
1277         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1278                  hcd_name,
1279                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1280                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1281
1282 #ifdef DEBUG
1283         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1284         if (!ehci_debug_root) {
1285                 retval = -ENOENT;
1286                 goto err_debug;
1287         }
1288 #endif
1289
1290 #ifdef PLATFORM_DRIVER
1291         retval = platform_driver_register(&PLATFORM_DRIVER);
1292         if (retval < 0)
1293                 goto clean0;
1294 #endif
1295
1296 #ifdef PCI_DRIVER
1297         retval = pci_register_driver(&PCI_DRIVER);
1298         if (retval < 0)
1299                 goto clean1;
1300 #endif
1301
1302 #ifdef PS3_SYSTEM_BUS_DRIVER
1303         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1304         if (retval < 0)
1305                 goto clean2;
1306 #endif
1307
1308 #ifdef OF_PLATFORM_DRIVER
1309         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1310         if (retval < 0)
1311                 goto clean3;
1312 #endif
1313
1314 #ifdef XILINX_OF_PLATFORM_DRIVER
1315         retval = of_register_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
1316         if (retval < 0)
1317                 goto clean4;
1318 #endif
1319         return retval;
1320
1321 #ifdef XILINX_OF_PLATFORM_DRIVER
1322         /* of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER); */
1323 clean4:
1324 #endif
1325 #ifdef OF_PLATFORM_DRIVER
1326         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1327 clean3:
1328 #endif
1329 #ifdef PS3_SYSTEM_BUS_DRIVER
1330         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1331 clean2:
1332 #endif
1333 #ifdef PCI_DRIVER
1334         pci_unregister_driver(&PCI_DRIVER);
1335 clean1:
1336 #endif
1337 #ifdef PLATFORM_DRIVER
1338         platform_driver_unregister(&PLATFORM_DRIVER);
1339 clean0:
1340 #endif
1341 #ifdef DEBUG
1342         debugfs_remove(ehci_debug_root);
1343         ehci_debug_root = NULL;
1344 err_debug:
1345 #endif
1346         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1347         return retval;
1348 }
1349 module_init(ehci_hcd_init);
1350
1351 static void __exit ehci_hcd_cleanup(void)
1352 {
1353 #ifdef XILINX_OF_PLATFORM_DRIVER
1354         of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
1355 #endif
1356 #ifdef OF_PLATFORM_DRIVER
1357         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1358 #endif
1359 #ifdef PLATFORM_DRIVER
1360         platform_driver_unregister(&PLATFORM_DRIVER);
1361 #endif
1362 #ifdef PCI_DRIVER
1363         pci_unregister_driver(&PCI_DRIVER);
1364 #endif
1365 #ifdef PS3_SYSTEM_BUS_DRIVER
1366         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1367 #endif
1368 #ifdef DEBUG
1369         debugfs_remove(ehci_debug_root);
1370 #endif
1371         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1372 }
1373 module_exit(ehci_hcd_cleanup);
1374