drivers/usb/gadget/s3c2410_udc.c

   1 /*
   2  * linux/drivers/usb/gadget/s3c2410_udc.c
   3  *
   4  * Samsung S3C24xx series on-chip full speed USB device controllers
   5  *
   6  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   7  *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  *
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39
  40 #include <linux/debugfs.h>
  41 #include <linux/seq_file.h>
  42
  43 #include <linux/usb.h>
  44 #include <linux/usb/gadget.h>
  45
  46 #include <asm/byteorder.h>
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/system.h>
  50 #include <asm/unaligned.h>
  51 #include <mach/irqs.h>
  52
  53 #include <mach/hardware.h>
  54
  55 #include <plat/regs-udc.h>
  56 #include <plat/udc.h>
  57
  58
  59 #include "s3c2410_udc.h"
  60
  61 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  62 #define DRIVER_VERSION  "29 Apr 2007"
  63 #define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  64                         "Arnaud Patard <arnaud.patard@rtp-net.org>"
  65
  66 static const char               gadget_name[] = "s3c2410_udc";
  67 static const char               driver_desc[] = DRIVER_DESC;
  68
  69 static struct s3c2410_udc       *the_controller;
  70 static struct clk               *udc_clock;
  71 static struct clk               *usb_bus_clock;
  72 static void __iomem             *base_addr;
  73 static u64                      rsrc_start;
  74 static u64                      rsrc_len;
  75 static struct dentry            *s3c2410_udc_debugfs_root;
  76
  77 static inline u32 udc_read(u32 reg)
  78 {
  79         return readb(base_addr + reg);
  80 }
  81
  82 static inline void udc_write(u32 value, u32 reg)
  83 {
  84         writeb(value, base_addr + reg);
  85 }
  86
  87 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  88 {
  89         writeb(value, base + reg);
  90 }
  91
  92 static struct s3c2410_udc_mach_info *udc_info;
  93
  94 /*************************** DEBUG FUNCTION ***************************/
  95 #define DEBUG_NORMAL    1
  96 #define DEBUG_VERBOSE   2
  97
  98 #ifdef CONFIG_USB_S3C2410_DEBUG
  99 #define USB_S3C2410_DEBUG_LEVEL 0
 100
 101 static uint32_t s3c2410_ticks = 0;
 102
 103 static int dprintk(int level, const char *fmt, ...)
 104 {
 105         static char printk_buf[1024];
 106         static long prevticks;
 107         static int invocation;
 108         va_list args;
 109         int len;
 110
 111         if (level > USB_S3C2410_DEBUG_LEVEL)
 112                 return 0;
 113
 114         if (s3c2410_ticks != prevticks) {
 115                 prevticks = s3c2410_ticks;
 116                 invocation = 0;
 117         }
 118
 119         len = scnprintf(printk_buf,
 120                         sizeof(printk_buf), "%1lu.%02d USB: ",
 121                         prevticks, invocation++);
 122
 123         va_start(args, fmt);
 124         len = vscnprintf(printk_buf+len,
 125                         sizeof(printk_buf)-len, fmt, args);
 126         va_end(args);
 127
 128         return printk(KERN_DEBUG "%s", printk_buf);
 129 }
 130 #else
 131 static int dprintk(int level, const char *fmt, ...)
 132 {
 133         return 0;
 134 }
 135 #endif
 136 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 137 {
 138         u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
 139         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 140         u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
 141         u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
 142
 143         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 144         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 145         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 146         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 147         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 148         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 149         udc_write(0, S3C2410_UDC_INDEX_REG);
 150         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 151         udc_write(1, S3C2410_UDC_INDEX_REG);
 152         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 153         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 154         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 155         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 156         udc_write(2, S3C2410_UDC_INDEX_REG);
 157         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 158         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 159         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 160         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 161
 162         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 163                  "PWR_REG        : 0x%04X\n"
 164                  "EP_INT_REG     : 0x%04X\n"
 165                  "USB_INT_REG    : 0x%04X\n"
 166                  "EP_INT_EN_REG  : 0x%04X\n"
 167                  "USB_INT_EN_REG : 0x%04X\n"
 168                  "EP0_CSR        : 0x%04X\n"
 169                  "EP1_I_CSR1     : 0x%04X\n"
 170                  "EP1_I_CSR2     : 0x%04X\n"
 171                  "EP1_O_CSR1     : 0x%04X\n"
 172                  "EP1_O_CSR2     : 0x%04X\n"
 173                  "EP2_I_CSR1     : 0x%04X\n"
 174                  "EP2_I_CSR2     : 0x%04X\n"
 175                  "EP2_O_CSR1     : 0x%04X\n"
 176                  "EP2_O_CSR2     : 0x%04X\n",
 177                         addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
 178                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 179                         ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
 180                         ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
 181                 );
 182
 183         return 0;
 184 }
 185
 186 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 187                                          struct file *file)
 188 {
 189         return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 190 }
 191
 192 static const struct file_operations s3c2410_udc_debugfs_fops = {
 193         .open           = s3c2410_udc_debugfs_fops_open,
 194         .read           = seq_read,
 195         .llseek         = seq_lseek,
 196         .release        = single_release,
 197         .owner          = THIS_MODULE,
 198 };
 199
 200 /* io macros */
 201
 202 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 203 {
 204         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 205         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 206                         S3C2410_UDC_EP0_CSR_REG);
 207 }
 208
 209 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 210 {
 211         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 212         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 213 }
 214
 215 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 216 {
 217         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 218         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 219 }
 220
 221 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 222 {
 223         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 224         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 225 }
 226
 227 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 228 {
 229         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 230         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 231 }
 232
 233 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 234 {
 235         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 236         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 237 }
 238
 239 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 240 {
 241         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 242
 243         udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
 244                                 | S3C2410_UDC_EP0_CSR_DE),
 245                         S3C2410_UDC_EP0_CSR_REG);
 246 }
 247
 248 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
 249 {
 250         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 251         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 252                                 | S3C2410_UDC_EP0_CSR_SSE),
 253                         S3C2410_UDC_EP0_CSR_REG);
 254 }
 255
 256 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 257 {
 258         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 259         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 260                         | S3C2410_UDC_EP0_CSR_DE),
 261                 S3C2410_UDC_EP0_CSR_REG);
 262 }
 263
 264 /*------------------------- I/O ----------------------------------*/
 265
 266 /*
 267  *      s3c2410_udc_done
 268  */
 269 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 270                 struct s3c2410_request *req, int status)
 271 {
 272         unsigned halted = ep->halted;
 273
 274         list_del_init(&req->queue);
 275
 276         if (likely (req->req.status == -EINPROGRESS))
 277                 req->req.status = status;
 278         else
 279                 status = req->req.status;
 280
 281         ep->halted = 1;
 282         req->req.complete(&ep->ep, &req->req);
 283         ep->halted = halted;
 284 }
 285
 286 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 287                 struct s3c2410_ep *ep, int status)
 288 {
 289         /* Sanity check */
 290         if (&ep->queue == NULL)
 291                 return;
 292
 293         while (!list_empty (&ep->queue)) {
 294                 struct s3c2410_request *req;
 295                 req = list_entry (ep->queue.next, struct s3c2410_request,
 296                                 queue);
 297                 s3c2410_udc_done(ep, req, status);
 298         }
 299 }
 300
 301 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
 302 {
 303         unsigned i;
 304
 305         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
 306          * fifos, and pending transactions mustn't be continued in any case.
 307          */
 308
 309         for (i = 1; i < S3C2410_ENDPOINTS; i++)
 310                 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
 311 }
 312
 313 static inline int s3c2410_udc_fifo_count_out(void)
 314 {
 315         int tmp;
 316
 317         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 318         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 319         return tmp;
 320 }
 321
 322 /*
 323  *      s3c2410_udc_write_packet
 324  */
 325 static inline int s3c2410_udc_write_packet(int fifo,
 326                 struct s3c2410_request *req,
 327                 unsigned max)
 328 {
 329         unsigned len = min(req->req.length - req->req.actual, max);
 330         u8 *buf = req->req.buf + req->req.actual;
 331
 332         prefetch(buf);
 333
 334         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 335                 req->req.actual, req->req.length, len, req->req.actual + len);
 336
 337         req->req.actual += len;
 338
 339         udelay(5);
 340         writesb(base_addr + fifo, buf, len);
 341         return len;
 342 }
 343
 344 /*
 345  *      s3c2410_udc_write_fifo
 346  *
 347  * return:  0 = still running, 1 = completed, negative = errno
 348  */
 349 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 350                 struct s3c2410_request *req)
 351 {
 352         unsigned        count;
 353         int             is_last;
 354         u32             idx;
 355         int             fifo_reg;
 356         u32             ep_csr;
 357
 358         idx = ep->bEndpointAddress & 0x7F;
 359         switch (idx) {
 360         default:
 361                 idx = 0;
 362         case 0:
 363                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 364                 break;
 365         case 1:
 366                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 367                 break;
 368         case 2:
 369                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 370                 break;
 371         case 3:
 372                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 373                 break;
 374         case 4:
 375                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 376                 break;
 377         }
 378
 379         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 380
 381         /* last packet is often short (sometimes a zlp) */
 382         if (count != ep->ep.maxpacket)
 383                 is_last = 1;
 384         else if (req->req.length != req->req.actual || req->req.zero)
 385                 is_last = 0;
 386         else
 387                 is_last = 2;
 388
 389         /* Only ep0 debug messages are interesting */
 390         if (idx == 0)
 391                 dprintk(DEBUG_NORMAL,
 392                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 393                         idx, count, req->req.actual, req->req.length,
 394                         is_last, req->req.zero);
 395
 396         if (is_last) {
 397                 /* The order is important. It prevents sending 2 packets
 398                  * at the same time */
 399
 400                 if (idx == 0) {
 401                         /* Reset signal => no need to say 'data sent' */
 402                         if (! (udc_read(S3C2410_UDC_USB_INT_REG)
 403                                         & S3C2410_UDC_USBINT_RESET))
 404                                 s3c2410_udc_set_ep0_de_in(base_addr);
 405                         ep->dev->ep0state=EP0_IDLE;
 406                 } else {
 407                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 408                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 409                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 410                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 411                                         S3C2410_UDC_IN_CSR1_REG);
 412                 }
 413
 414                 s3c2410_udc_done(ep, req, 0);
 415                 is_last = 1;
 416         } else {
 417                 if (idx == 0) {
 418                         /* Reset signal => no need to say 'data sent' */
 419                         if (! (udc_read(S3C2410_UDC_USB_INT_REG)
 420                                         & S3C2410_UDC_USBINT_RESET))
 421                                 s3c2410_udc_set_ep0_ipr(base_addr);
 422                 } else {
 423                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 424                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 425                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 426                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 427                                         S3C2410_UDC_IN_CSR1_REG);
 428                 }
 429         }
 430
 431         return is_last;
 432 }
 433
 434 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 435                 struct s3c2410_request *req, unsigned avail)
 436 {
 437         unsigned len;
 438
 439         len = min(req->req.length - req->req.actual, avail);
 440         req->req.actual += len;
 441
 442         readsb(fifo + base_addr, buf, len);
 443         return len;
 444 }
 445
 446 /*
 447  * return:  0 = still running, 1 = queue empty, negative = errno
 448  */
 449 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 450                                  struct s3c2410_request *req)
 451 {
 452         u8              *buf;
 453         u32             ep_csr;
 454         unsigned        bufferspace;
 455         int             is_last=1;
 456         unsigned        avail;
 457         int             fifo_count = 0;
 458         u32             idx;
 459         int             fifo_reg;
 460
 461         idx = ep->bEndpointAddress & 0x7F;
 462
 463         switch (idx) {
 464         default:
 465                 idx = 0;
 466         case 0:
 467                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 468                 break;
 469         case 1:
 470                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 471                 break;
 472         case 2:
 473                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 474                 break;
 475         case 3:
 476                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 477                 break;
 478         case 4:
 479                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 480                 break;
 481         }
 482
 483         if (!req->req.length)
 484                 return 1;
 485
 486         buf = req->req.buf + req->req.actual;
 487         bufferspace = req->req.length - req->req.actual;
 488         if (!bufferspace) {
 489                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 490                 return -1;
 491         }
 492
 493         udc_write(idx, S3C2410_UDC_INDEX_REG);
 494
 495         fifo_count = s3c2410_udc_fifo_count_out();
 496         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 497
 498         if (fifo_count > ep->ep.maxpacket)
 499                 avail = ep->ep.maxpacket;
 500         else
 501                 avail = fifo_count;
 502
 503         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 504
 505         /* checking this with ep0 is not accurate as we already
 506          * read a control request
 507          **/
 508         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 509                 is_last = 1;
 510                 /* overflowed this request?  flush extra data */
 511                 if (fifo_count != avail)
 512                         req->req.status = -EOVERFLOW;
 513         } else {
 514                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 515         }
 516
 517         udc_write(idx, S3C2410_UDC_INDEX_REG);
 518         fifo_count = s3c2410_udc_fifo_count_out();
 519
 520         /* Only ep0 debug messages are interesting */
 521         if (idx == 0)
 522                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 523                         __func__, fifo_count,is_last);
 524
 525         if (is_last) {
 526                 if (idx == 0) {
 527                         s3c2410_udc_set_ep0_de_out(base_addr);
 528                         ep->dev->ep0state = EP0_IDLE;
 529                 } else {
 530                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 531                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 532                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 533                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 534                                         S3C2410_UDC_OUT_CSR1_REG);
 535                 }
 536
 537                 s3c2410_udc_done(ep, req, 0);
 538         } else {
 539                 if (idx == 0) {
 540                         s3c2410_udc_clear_ep0_opr(base_addr);
 541                 } else {
 542                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 543                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 544                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 545                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 546                                         S3C2410_UDC_OUT_CSR1_REG);
 547                 }
 548         }
 549
 550         return is_last;
 551 }
 552
 553 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 554 {
 555         unsigned char *outbuf = (unsigned char*)crq;
 556         int bytes_read = 0;
 557
 558         udc_write(0, S3C2410_UDC_INDEX_REG);
 559
 560         bytes_read = s3c2410_udc_fifo_count_out();
 561
 562         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 563
 564         if (bytes_read > sizeof(struct usb_ctrlrequest))
 565                 bytes_read = sizeof(struct usb_ctrlrequest);
 566
 567         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 568
 569         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 570                 bytes_read, crq->bRequest, crq->bRequestType,
 571                 crq->wValue, crq->wIndex, crq->wLength);
 572
 573         return bytes_read;
 574 }
 575
 576 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 577                 struct usb_ctrlrequest *crq)
 578 {
 579         u16 status = 0;
 580         u8 ep_num = crq->wIndex & 0x7F;
 581         u8 is_in = crq->wIndex & USB_DIR_IN;
 582
 583         switch (crq->bRequestType & USB_RECIP_MASK) {
 584         case USB_RECIP_INTERFACE:
 585                 break;
 586
 587         case USB_RECIP_DEVICE:
 588                 status = dev->devstatus;
 589                 break;
 590
 591         case USB_RECIP_ENDPOINT:
 592                 if (ep_num > 4 || crq->wLength > 2)
 593                         return 1;
 594
 595                 if (ep_num == 0) {
 596                         udc_write(0, S3C2410_UDC_INDEX_REG);
 597                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 598                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 599                 } else {
 600                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 601                         if (is_in) {
 602                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 603                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 604                         } else {
 605                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 606                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 607                         }
 608                 }
 609
 610                 status = status ? 1 : 0;
 611                 break;
 612
 613         default:
 614                 return 1;
 615         }
 616
 617         /* Seems to be needed to get it working. ouch :( */
 618         udelay(5);
 619         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 620         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 621         s3c2410_udc_set_ep0_de_in(base_addr);
 622
 623         return 0;
 624 }
 625 /*------------------------- usb state machine -------------------------------*/
 626 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 627
 628 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 629                                         struct s3c2410_ep *ep,
 630                                         struct usb_ctrlrequest *crq,
 631                                         u32 ep0csr)
 632 {
 633         int len, ret, tmp;
 634
 635         /* start control request? */
 636         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 637                 return;
 638
 639         s3c2410_udc_nuke(dev, ep, -EPROTO);
 640
 641         len = s3c2410_udc_read_fifo_crq(crq);
 642         if (len != sizeof(*crq)) {
 643                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 644                         " wanted %d bytes got %d. Stalling out...\n",
 645                         sizeof(*crq), len);
 646                 s3c2410_udc_set_ep0_ss(base_addr);
 647                 return;
 648         }
 649
 650         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 651                 crq->bRequest, crq->bRequestType, crq->wLength);
 652
 653         /* cope with automagic for some standard requests. */
 654         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 655                 == USB_TYPE_STANDARD;
 656         dev->req_config = 0;
 657         dev->req_pending = 1;
 658
 659         switch (crq->bRequest) {
 660         case USB_REQ_SET_CONFIGURATION:
 661                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
 662
 663                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 664                         dev->req_config = 1;
 665                         s3c2410_udc_set_ep0_de_out(base_addr);
 666                 }
 667                 break;
 668
 669         case USB_REQ_SET_INTERFACE:
 670                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
 671
 672                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 673                         dev->req_config = 1;
 674                         s3c2410_udc_set_ep0_de_out(base_addr);
 675                 }
 676                 break;
 677
 678         case USB_REQ_SET_ADDRESS:
 679                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
 680
 681                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 682                         tmp = crq->wValue & 0x7F;
 683                         dev->address = tmp;
 684                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 685                                         S3C2410_UDC_FUNC_ADDR_REG);
 686                         s3c2410_udc_set_ep0_de_out(base_addr);
 687                         return;
 688                 }
 689                 break;
 690
 691         case USB_REQ_GET_STATUS:
 692                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
 693                 s3c2410_udc_clear_ep0_opr(base_addr);
 694
 695                 if (dev->req_std) {
 696                         if (!s3c2410_udc_get_status(dev, crq)) {
 697                                 return;
 698                         }
 699                 }
 700                 break;
 701
 702         case USB_REQ_CLEAR_FEATURE:
 703                 s3c2410_udc_clear_ep0_opr(base_addr);
 704
 705                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 706                         break;
 707
 708                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 709                         break;
 710
 711                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 712                 s3c2410_udc_set_ep0_de_out(base_addr);
 713                 return;
 714
 715         case USB_REQ_SET_FEATURE:
 716                 s3c2410_udc_clear_ep0_opr(base_addr);
 717
 718                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 719                         break;
 720
 721                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 722                         break;
 723
 724                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 725                 s3c2410_udc_set_ep0_de_out(base_addr);
 726                 return;
 727
 728         default:
 729                 s3c2410_udc_clear_ep0_opr(base_addr);
 730                 break;
 731         }
 732
 733         if (crq->bRequestType & USB_DIR_IN)
 734                 dev->ep0state = EP0_IN_DATA_PHASE;
 735         else
 736                 dev->ep0state = EP0_OUT_DATA_PHASE;
 737
 738         ret = dev->driver->setup(&dev->gadget, crq);
 739         if (ret < 0) {
 740                 if (dev->req_config) {
 741                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 742                                 crq->bRequest, ret);
 743                         return;
 744                 }
 745
 746                 if (ret == -EOPNOTSUPP)
 747                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 748                 else
 749                         dprintk(DEBUG_NORMAL,
 750                                 "dev->driver->setup failed. (%d)\n", ret);
 751
 752                 udelay(5);
 753                 s3c2410_udc_set_ep0_ss(base_addr);
 754                 s3c2410_udc_set_ep0_de_out(base_addr);
 755                 dev->ep0state = EP0_IDLE;
 756                 /* deferred i/o == no response yet */
 757         } else if (dev->req_pending) {
 758                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 759                 dev->req_pending=0;
 760         }
 761
 762         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 763 }
 764
 765 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 766 {
 767         u32                     ep0csr;
 768         struct s3c2410_ep       *ep = &dev->ep[0];
 769         struct s3c2410_request  *req;
 770         struct usb_ctrlrequest  crq;
 771
 772         if (list_empty(&ep->queue))
 773                 req = NULL;
 774         else
 775                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 776
 777         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 778          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 779
 780         udc_write(0, S3C2410_UDC_INDEX_REG);
 781         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 782
 783         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 784                 ep0csr, ep0states[dev->ep0state]);
 785
 786         /* clear stall status */
 787         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 788                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 789                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 790                 s3c2410_udc_clear_ep0_sst(base_addr);
 791                 dev->ep0state = EP0_IDLE;
 792                 return;
 793         }
 794
 795         /* clear setup end */
 796         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 797                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 798                 s3c2410_udc_nuke(dev, ep, 0);
 799                 s3c2410_udc_clear_ep0_se(base_addr);
 800                 dev->ep0state = EP0_IDLE;
 801         }
 802
 803         switch (dev->ep0state) {
 804         case EP0_IDLE:
 805                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 806                 break;
 807
 808         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 809                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 810                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
 811                         s3c2410_udc_write_fifo(ep, req);
 812                 }
 813                 break;
 814
 815         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 816                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 817                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
 818                         s3c2410_udc_read_fifo(ep,req);
 819                 }
 820                 break;
 821
 822         case EP0_END_XFER:
 823                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 824                 dev->ep0state = EP0_IDLE;
 825                 break;
 826
 827         case EP0_STALL:
 828                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 829                 dev->ep0state = EP0_IDLE;
 830                 break;
 831         }
 832 }
 833
 834 /*
 835  *      handle_ep - Manage I/O endpoints
 836  */
 837
 838 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 839 {
 840         struct s3c2410_request  *req;
 841         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 842         u32                     ep_csr1;
 843         u32                     idx;
 844
 845         if (likely (!list_empty(&ep->queue)))
 846                 req = list_entry(ep->queue.next,
 847                                 struct s3c2410_request, queue);
 848         else
 849                 req = NULL;
 850
 851         idx = ep->bEndpointAddress & 0x7F;
 852
 853         if (is_in) {
 854                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 855                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 856                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 857                         idx, ep_csr1, req ? 1 : 0);
 858
 859                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 860                         dprintk(DEBUG_VERBOSE, "st\n");
 861                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 862                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 863                                         S3C2410_UDC_IN_CSR1_REG);
 864                         return;
 865                 }
 866
 867                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
 868                         s3c2410_udc_write_fifo(ep,req);
 869                 }
 870         } else {
 871                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 872                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 873                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 874
 875                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 876                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 877                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 878                                         S3C2410_UDC_OUT_CSR1_REG);
 879                         return;
 880                 }
 881
 882                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
 883                         s3c2410_udc_read_fifo(ep,req);
 884                 }
 885         }
 886 }
 887
 888 #include <mach/regs-irq.h>
 889
 890 /*
 891  *      s3c2410_udc_irq - interrupt handler
 892  */
 893 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 894 {
 895         struct s3c2410_udc *dev = _dev;
 896         int usb_status;
 897         int usbd_status;
 898         int pwr_reg;
 899         int ep0csr;
 900         int i;
 901         u32 idx;
 902         unsigned long flags;
 903
 904         spin_lock_irqsave(&dev->lock, flags);
 905
 906         /* Driver connected ? */
 907         if (!dev->driver) {
 908                 /* Clear interrupts */
 909                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 910                                 S3C2410_UDC_USB_INT_REG);
 911                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 912                                 S3C2410_UDC_EP_INT_REG);
 913         }
 914
 915         /* Save index */
 916         idx = udc_read(S3C2410_UDC_INDEX_REG);
 917
 918         /* Read status registers */
 919         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 920         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 921         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 922
 923         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 924         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 925
 926         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 927                 usb_status, usbd_status, pwr_reg, ep0csr);
 928
 929         /*
 930          * Now, handle interrupts. There's two types :
 931          * - Reset, Resume, Suspend coming -> usb_int_reg
 932          * - EP -> ep_int_reg
 933          */
 934
 935         /* RESET */
 936         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 937                 /* two kind of reset :
 938                  * - reset start -> pwr reg = 8
 939                  * - reset end   -> pwr reg = 0
 940                  **/
 941                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 942                         ep0csr, pwr_reg);
 943
 944                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 945                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 946                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 947                                 S3C2410_UDC_MAXP_REG);
 948                 dev->address = 0;
 949
 950                 dev->ep0state = EP0_IDLE;
 951                 dev->gadget.speed = USB_SPEED_FULL;
 952
 953                 /* clear interrupt */
 954                 udc_write(S3C2410_UDC_USBINT_RESET,
 955                                 S3C2410_UDC_USB_INT_REG);
 956
 957                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 958                 spin_unlock_irqrestore(&dev->lock, flags);
 959                 return IRQ_HANDLED;
 960         }
 961
 962         /* RESUME */
 963         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 964                 dprintk(DEBUG_NORMAL, "USB resume\n");
 965
 966                 /* clear interrupt */
 967                 udc_write(S3C2410_UDC_USBINT_RESUME,
 968                                 S3C2410_UDC_USB_INT_REG);
 969
 970                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 971                                 && dev->driver
 972                                 && dev->driver->resume)
 973                         dev->driver->resume(&dev->gadget);
 974         }
 975
 976         /* SUSPEND */
 977         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 978                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 979
 980                 /* clear interrupt */
 981                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 982                                 S3C2410_UDC_USB_INT_REG);
 983
 984                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 985                                 && dev->driver
 986                                 && dev->driver->suspend)
 987                         dev->driver->suspend(&dev->gadget);
 988
 989                 dev->ep0state = EP0_IDLE;
 990         }
 991
 992         /* EP */
 993         /* control traffic */
 994         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 995          * generate an interrupt
 996          */
 997         if (usbd_status & S3C2410_UDC_INT_EP0) {
 998                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 999                 /* Clear the interrupt bit by setting it to 1 */
1000                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1001                 s3c2410_udc_handle_ep0(dev);
1002         }
1003
1004         /* endpoint data transfers */
1005         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1006                 u32 tmp = 1 << i;
1007                 if (usbd_status & tmp) {
1008                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1009
1010                         /* Clear the interrupt bit by setting it to 1 */
1011                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1012                         s3c2410_udc_handle_ep(&dev->ep[i]);
1013                 }
1014         }
1015
1016         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1017
1018         /* Restore old index */
1019         udc_write(idx, S3C2410_UDC_INDEX_REG);
1020
1021         spin_unlock_irqrestore(&dev->lock, flags);
1022
1023         return IRQ_HANDLED;
1024 }
1025 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1026
1027 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1028 {
1029         return container_of(ep, struct s3c2410_ep, ep);
1030 }
1031
1032 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1033 {
1034         return container_of(gadget, struct s3c2410_udc, gadget);
1035 }
1036
1037 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1038 {
1039         return container_of(req, struct s3c2410_request, req);
1040 }
1041
1042 /*
1043  *      s3c2410_udc_ep_enable
1044  */
1045 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1046                                  const struct usb_endpoint_descriptor *desc)
1047 {
1048         struct s3c2410_udc      *dev;
1049         struct s3c2410_ep       *ep;
1050         u32                     max, tmp;
1051         unsigned long           flags;
1052         u32                     csr1,csr2;
1053         u32                     int_en_reg;
1054
1055         ep = to_s3c2410_ep(_ep);
1056
1057         if (!_ep || !desc || ep->desc
1058                         || _ep->name == ep0name
1059                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1060                 return -EINVAL;
1061
1062         dev = ep->dev;
1063         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1064                 return -ESHUTDOWN;
1065
1066         max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1067
1068         local_irq_save (flags);
1069         _ep->maxpacket = max & 0x7ff;
1070         ep->desc = desc;
1071         ep->halted = 0;
1072         ep->bEndpointAddress = desc->bEndpointAddress;
1073
1074         /* set max packet */
1075         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1076         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1077
1078         /* set type, direction, address; reset fifo counters */
1079         if (desc->bEndpointAddress & USB_DIR_IN) {
1080                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1081                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1082
1083                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1084                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1085                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1086                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1087         } else {
1088                 /* don't flush in fifo or it will cause endpoint interrupt */
1089                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1090                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1091
1092                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1093                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1094                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1095                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1096
1097                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1098                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1099
1100                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1101                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1102                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1103                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1104         }
1105
1106         /* enable irqs */
1107         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1108         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1109
1110         /* print some debug message */
1111         tmp = desc->bEndpointAddress;
1112         dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1113                  _ep->name,ep->num, tmp,
1114                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1115
1116         local_irq_restore (flags);
1117         s3c2410_udc_set_halt(_ep, 0);
1118
1119         return 0;
1120 }
1121
1122 /*
1123  * s3c2410_udc_ep_disable
1124  */
1125 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1126 {
1127         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1128         unsigned long flags;
1129         u32 int_en_reg;
1130
1131         if (!_ep || !ep->desc) {
1132                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1133                         _ep ? ep->ep.name : NULL);
1134                 return -EINVAL;
1135         }
1136
1137         local_irq_save(flags);
1138
1139         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1140
1141         ep->desc = NULL;
1142         ep->halted = 1;
1143
1144         s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1145
1146         /* disable irqs */
1147         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1148         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1149
1150         local_irq_restore(flags);
1151
1152         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1153
1154         return 0;
1155 }
1156
1157 /*
1158  * s3c2410_udc_alloc_request
1159  */
1160 static struct usb_request *
1161 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1162 {
1163         struct s3c2410_request *req;
1164
1165         dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1166
1167         if (!_ep)
1168                 return NULL;
1169
1170         req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1171         if (!req)
1172                 return NULL;
1173
1174         INIT_LIST_HEAD (&req->queue);
1175         return &req->req;
1176 }
1177
1178 /*
1179  * s3c2410_udc_free_request
1180  */
1181 static void
1182 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1183 {
1184         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1185         struct s3c2410_request  *req = to_s3c2410_req(_req);
1186
1187         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1188
1189         if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1190                 return;
1191
1192         WARN_ON (!list_empty (&req->queue));
1193         kfree(req);
1194 }
1195
1196 /*
1197  *      s3c2410_udc_queue
1198  */
1199 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1200                 gfp_t gfp_flags)
1201 {
1202         struct s3c2410_request  *req = to_s3c2410_req(_req);
1203         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1204         struct s3c2410_udc      *dev;
1205         u32                     ep_csr = 0;
1206         int                     fifo_count = 0;
1207         unsigned long           flags;
1208
1209         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1210                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1211                 return -EINVAL;
1212         }
1213
1214         dev = ep->dev;
1215         if (unlikely (!dev->driver
1216                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1217                 return -ESHUTDOWN;
1218         }
1219
1220         local_irq_save (flags);
1221
1222         if (unlikely(!_req || !_req->complete
1223                         || !_req->buf || !list_empty(&req->queue))) {
1224                 if (!_req)
1225                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1226                 else {
1227                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1228                                 __func__, !_req->complete,!_req->buf,
1229                                 !list_empty(&req->queue));
1230                 }
1231
1232                 local_irq_restore(flags);
1233                 return -EINVAL;
1234         }
1235
1236         _req->status = -EINPROGRESS;
1237         _req->actual = 0;
1238
1239         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1240                  __func__, ep->bEndpointAddress, _req->length);
1241
1242         if (ep->bEndpointAddress) {
1243                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1244
1245                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1246                                 ? S3C2410_UDC_IN_CSR1_REG
1247                                 : S3C2410_UDC_OUT_CSR1_REG);
1248                 fifo_count = s3c2410_udc_fifo_count_out();
1249         } else {
1250                 udc_write(0, S3C2410_UDC_INDEX_REG);
1251                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1252                 fifo_count = s3c2410_udc_fifo_count_out();
1253         }
1254
1255         /* kickstart this i/o queue? */
1256         if (list_empty(&ep->queue) && !ep->halted) {
1257                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1258                         switch (dev->ep0state) {
1259                         case EP0_IN_DATA_PHASE:
1260                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1261                                                 && s3c2410_udc_write_fifo(ep,
1262                                                         req)) {
1263                                         dev->ep0state = EP0_IDLE;
1264                                         req = NULL;
1265                                 }
1266                                 break;
1267
1268                         case EP0_OUT_DATA_PHASE:
1269                                 if ((!_req->length)
1270                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1271                                                 && s3c2410_udc_read_fifo(ep,
1272                                                         req))) {
1273                                         dev->ep0state = EP0_IDLE;
1274                                         req = NULL;
1275                                 }
1276                                 break;
1277
1278                         default:
1279                                 local_irq_restore(flags);
1280                                 return -EL2HLT;
1281                         }
1282                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1283                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1284                                 && s3c2410_udc_write_fifo(ep, req)) {
1285                         req = NULL;
1286                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1287                                 && fifo_count
1288                                 && s3c2410_udc_read_fifo(ep, req)) {
1289                         req = NULL;
1290                 }
1291         }
1292
1293         /* pio or dma irq handler advances the queue. */
1294         if (likely (req != 0))
1295                 list_add_tail(&req->queue, &ep->queue);
1296
1297         local_irq_restore(flags);
1298
1299         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1300         return 0;
1301 }
1302
1303 /*
1304  *      s3c2410_udc_dequeue
1305  */
1306 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1307 {
1308         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1309         struct s3c2410_udc      *udc;
1310         int                     retval = -EINVAL;
1311         unsigned long           flags;
1312         struct s3c2410_request  *req = NULL;
1313
1314         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1315
1316         if (!the_controller->driver)
1317                 return -ESHUTDOWN;
1318
1319         if (!_ep || !_req)
1320                 return retval;
1321
1322         udc = to_s3c2410_udc(ep->gadget);
1323
1324         local_irq_save (flags);
1325
1326         list_for_each_entry (req, &ep->queue, queue) {
1327                 if (&req->req == _req) {
1328                         list_del_init (&req->queue);
1329                         _req->status = -ECONNRESET;
1330                         retval = 0;
1331                         break;
1332                 }
1333         }
1334
1335         if (retval == 0) {
1336                 dprintk(DEBUG_VERBOSE,
1337                         "dequeued req %p from %s, len %d buf %p\n",
1338                         req, _ep->name, _req->length, _req->buf);
1339
1340                 s3c2410_udc_done(ep, req, -ECONNRESET);
1341         }
1342
1343         local_irq_restore (flags);
1344         return retval;
1345 }
1346
1347 /*
1348  * s3c2410_udc_set_halt
1349  */
1350 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1351 {
1352         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1353         u32                     ep_csr = 0;
1354         unsigned long           flags;
1355         u32                     idx;
1356
1357         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1358                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1359                 return -EINVAL;
1360         }
1361
1362         local_irq_save (flags);
1363
1364         idx = ep->bEndpointAddress & 0x7F;
1365
1366         if (idx == 0) {
1367                 s3c2410_udc_set_ep0_ss(base_addr);
1368                 s3c2410_udc_set_ep0_de_out(base_addr);
1369         } else {
1370                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1371                 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1372                                 ? S3C2410_UDC_IN_CSR1_REG
1373                                 : S3C2410_UDC_OUT_CSR1_REG);
1374
1375                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1376                         if (value)
1377                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1378                                         S3C2410_UDC_IN_CSR1_REG);
1379                         else {
1380                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1381                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1382                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1383                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1384                         }
1385                 } else {
1386                         if (value)
1387                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1388                                         S3C2410_UDC_OUT_CSR1_REG);
1389                         else {
1390                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1391                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1392                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1393                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1394                         }
1395                 }
1396         }
1397
1398         ep->halted = value ? 1 : 0;
1399         local_irq_restore (flags);
1400
1401         return 0;
1402 }
1403
1404 static const struct usb_ep_ops s3c2410_ep_ops = {
1405         .enable         = s3c2410_udc_ep_enable,
1406         .disable        = s3c2410_udc_ep_disable,
1407
1408         .alloc_request  = s3c2410_udc_alloc_request,
1409         .free_request   = s3c2410_udc_free_request,
1410
1411         .queue          = s3c2410_udc_queue,
1412         .dequeue        = s3c2410_udc_dequeue,
1413
1414         .set_halt       = s3c2410_udc_set_halt,
1415 };
1416
1417 /*------------------------- usb_gadget_ops ----------------------------------*/
1418
1419 /*
1420  *      s3c2410_udc_get_frame
1421  */
1422 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1423 {
1424         int tmp;
1425
1426         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1427
1428         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1429         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1430         return tmp;
1431 }
1432
1433 /*
1434  *      s3c2410_udc_wakeup
1435  */
1436 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1437 {
1438         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1439         return 0;
1440 }
1441
1442 /*
1443  *      s3c2410_udc_set_selfpowered
1444  */
1445 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1446 {
1447         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1448
1449         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1450
1451         if (value)
1452                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1453         else
1454                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1455
1456         return 0;
1457 }
1458
1459 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1460 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1461
1462 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1463 {
1464         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1465
1466         if (udc_info && udc_info->udc_command) {
1467                 if (is_on)
1468                         s3c2410_udc_enable(udc);
1469                 else {
1470                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1471                                 if (udc->driver && udc->driver->disconnect)
1472                                         udc->driver->disconnect(&udc->gadget);
1473
1474                         }
1475                         s3c2410_udc_disable(udc);
1476                 }
1477         }
1478         else
1479                 return -EOPNOTSUPP;
1480
1481         return 0;
1482 }
1483
1484 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1485 {
1486         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1487
1488         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1489
1490         udc->vbus = (is_active != 0);
1491         s3c2410_udc_set_pullup(udc, is_active);
1492         return 0;
1493 }
1494
1495 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1496 {
1497         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1498
1499         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1500
1501         s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1502         return 0;
1503 }
1504
1505 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1506 {
1507         struct s3c2410_udc      *dev = _dev;
1508         unsigned int            value;
1509
1510         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1511
1512         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1513         if (udc_info->vbus_pin_inverted)
1514                 value = !value;
1515
1516         if (value != dev->vbus)
1517                 s3c2410_udc_vbus_session(&dev->gadget, value);
1518
1519         return IRQ_HANDLED;
1520 }
1521
1522 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1523 {
1524         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1525
1526         if (udc_info && udc_info->vbus_draw) {
1527                 udc_info->vbus_draw(ma);
1528                 return 0;
1529         }
1530
1531         return -ENOTSUPP;
1532 }
1533
1534 static const struct usb_gadget_ops s3c2410_ops = {
1535         .get_frame              = s3c2410_udc_get_frame,
1536         .wakeup                 = s3c2410_udc_wakeup,
1537         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1538         .pullup                 = s3c2410_udc_pullup,
1539         .vbus_session           = s3c2410_udc_vbus_session,
1540         .vbus_draw              = s3c2410_vbus_draw,
1541 };
1542
1543 /*------------------------- gadget driver handling---------------------------*/
1544 /*
1545  * s3c2410_udc_disable
1546  */
1547 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1548 {
1549         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1550
1551         /* Disable all interrupts */
1552         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1553         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1554
1555         /* Clear the interrupt registers */
1556         udc_write(S3C2410_UDC_USBINT_RESET
1557                                 | S3C2410_UDC_USBINT_RESUME
1558                                 | S3C2410_UDC_USBINT_SUSPEND,
1559                         S3C2410_UDC_USB_INT_REG);
1560
1561         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1562
1563         /* Good bye, cruel world */
1564         if (udc_info && udc_info->udc_command)
1565                 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1566
1567         /* Set speed to unknown */
1568         dev->gadget.speed = USB_SPEED_UNKNOWN;
1569 }
1570
1571 /*
1572  * s3c2410_udc_reinit
1573  */
1574 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1575 {
1576         u32 i;
1577
1578         /* device/ep0 records init */
1579         INIT_LIST_HEAD (&dev->gadget.ep_list);
1580         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1581         dev->ep0state = EP0_IDLE;
1582
1583         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1584                 struct s3c2410_ep *ep = &dev->ep[i];
1585
1586                 if (i != 0)
1587                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1588
1589                 ep->dev = dev;
1590                 ep->desc = NULL;
1591                 ep->halted = 0;
1592                 INIT_LIST_HEAD (&ep->queue);
1593         }
1594 }
1595
1596 /*
1597  * s3c2410_udc_enable
1598  */
1599 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1600 {
1601         int i;
1602
1603         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1604
1605         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1606         dev->gadget.speed = USB_SPEED_FULL;
1607
1608         /* Set MAXP for all endpoints */
1609         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1610                 udc_write(i, S3C2410_UDC_INDEX_REG);
1611                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1612                                 S3C2410_UDC_MAXP_REG);
1613         }
1614
1615         /* Set default power state */
1616         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1617
1618         /* Enable reset and suspend interrupt interrupts */
1619         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1620                         S3C2410_UDC_USB_INT_EN_REG);
1621
1622         /* Enable ep0 interrupt */
1623         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1624
1625         /* time to say "hello, world" */
1626         if (udc_info && udc_info->udc_command)
1627                 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1628 }
1629
1630 /*
1631  *      usb_gadget_register_driver
1632  */
1633 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1634 {
1635         struct s3c2410_udc *udc = the_controller;
1636         int             retval;
1637
1638         dprintk(DEBUG_NORMAL, "usb_gadget_register_driver() '%s'\n",
1639                 driver->driver.name);
1640
1641         /* Sanity checks */
1642         if (!udc)
1643                 return -ENODEV;
1644
1645         if (udc->driver)
1646                 return -EBUSY;
1647
1648         if (!driver->bind || !driver->setup
1649                         || driver->speed < USB_SPEED_FULL) {
1650                 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1651                         driver->bind, driver->setup, driver->speed);
1652                 return -EINVAL;
1653         }
1654 #if defined(MODULE)
1655         if (!driver->unbind) {
1656                 printk(KERN_ERR "Invalid driver: no unbind method\n");
1657                 return -EINVAL;
1658         }
1659 #endif
1660
1661         /* Hook the driver */
1662         udc->driver = driver;
1663         udc->gadget.dev.driver = &driver->driver;
1664
1665         /* Bind the driver */
1666         if ((retval = device_add(&udc->gadget.dev)) != 0) {
1667                 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1668                 goto register_error;
1669         }
1670
1671         dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1672                 driver->driver.name);
1673
1674         if ((retval = driver->bind (&udc->gadget)) != 0) {
1675                 device_del(&udc->gadget.dev);
1676                 goto register_error;
1677         }
1678
1679         /* Enable udc */
1680         s3c2410_udc_enable(udc);
1681
1682         return 0;
1683
1684 register_error:
1685         udc->driver = NULL;
1686         udc->gadget.dev.driver = NULL;
1687         return retval;
1688 }
1689
1690 /*
1691  *      usb_gadget_unregister_driver
1692  */
1693 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1694 {
1695         struct s3c2410_udc *udc = the_controller;
1696
1697         if (!udc)
1698                 return -ENODEV;
1699
1700         if (!driver || driver != udc->driver || !driver->unbind)
1701                 return -EINVAL;
1702
1703         dprintk(DEBUG_NORMAL,"usb_gadget_register_driver() '%s'\n",
1704                 driver->driver.name);
1705
1706         if (driver->disconnect)
1707                 driver->disconnect(&udc->gadget);
1708
1709         device_del(&udc->gadget.dev);
1710         udc->driver = NULL;
1711
1712         /* Disable udc */
1713         s3c2410_udc_disable(udc);
1714
1715         return 0;
1716 }
1717
1718 /*---------------------------------------------------------------------------*/
1719 static struct s3c2410_udc memory = {
1720         .gadget = {
1721                 .ops            = &s3c2410_ops,
1722                 .ep0            = &memory.ep[0].ep,
1723                 .name           = gadget_name,
1724                 .dev = {
1725                         .init_name      = "gadget",
1726                 },
1727         },
1728
1729         /* control endpoint */
1730         .ep[0] = {
1731                 .num            = 0,
1732                 .ep = {
1733                         .name           = ep0name,
1734                         .ops            = &s3c2410_ep_ops,
1735                         .maxpacket      = EP0_FIFO_SIZE,
1736                 },
1737                 .dev            = &memory,
1738         },
1739
1740         /* first group of endpoints */
1741         .ep[1] = {
1742                 .num            = 1,
1743                 .ep = {
1744                         .name           = "ep1-bulk",
1745                         .ops            = &s3c2410_ep_ops,
1746                         .maxpacket      = EP_FIFO_SIZE,
1747                 },
1748                 .dev            = &memory,
1749                 .fifo_size      = EP_FIFO_SIZE,
1750                 .bEndpointAddress = 1,
1751                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1752         },
1753         .ep[2] = {
1754                 .num            = 2,
1755                 .ep = {
1756                         .name           = "ep2-bulk",
1757                         .ops            = &s3c2410_ep_ops,
1758                         .maxpacket      = EP_FIFO_SIZE,
1759                 },
1760                 .dev            = &memory,
1761                 .fifo_size      = EP_FIFO_SIZE,
1762                 .bEndpointAddress = 2,
1763                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1764         },
1765         .ep[3] = {
1766                 .num            = 3,
1767                 .ep = {
1768                         .name           = "ep3-bulk",
1769                         .ops            = &s3c2410_ep_ops,
1770                         .maxpacket      = EP_FIFO_SIZE,
1771                 },
1772                 .dev            = &memory,
1773                 .fifo_size      = EP_FIFO_SIZE,
1774                 .bEndpointAddress = 3,
1775                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1776         },
1777         .ep[4] = {
1778                 .num            = 4,
1779                 .ep = {
1780                         .name           = "ep4-bulk",
1781                         .ops            = &s3c2410_ep_ops,
1782                         .maxpacket      = EP_FIFO_SIZE,
1783                 },
1784                 .dev            = &memory,
1785                 .fifo_size      = EP_FIFO_SIZE,
1786                 .bEndpointAddress = 4,
1787                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1788         }
1789
1790 };
1791
1792 /*
1793  *      probe - binds to the platform device
1794  */
1795 static int s3c2410_udc_probe(struct platform_device *pdev)
1796 {
1797         struct s3c2410_udc *udc = &memory;
1798         struct device *dev = &pdev->dev;
1799         int retval;
1800         int irq;
1801
1802         dev_dbg(dev, "%s()\n", __func__);
1803
1804         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1805         if (IS_ERR(usb_bus_clock)) {
1806                 dev_err(dev, "failed to get usb bus clock source\n");
1807                 return PTR_ERR(usb_bus_clock);
1808         }
1809
1810         clk_enable(usb_bus_clock);
1811
1812         udc_clock = clk_get(NULL, "usb-device");
1813         if (IS_ERR(udc_clock)) {
1814                 dev_err(dev, "failed to get udc clock source\n");
1815                 return PTR_ERR(udc_clock);
1816         }
1817
1818         clk_enable(udc_clock);
1819
1820         mdelay(10);
1821
1822         dev_dbg(dev, "got and enabled clocks\n");
1823
1824         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1825                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1826                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1827                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1828                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1829                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1830         }
1831
1832         spin_lock_init (&udc->lock);
1833         udc_info = pdev->dev.platform_data;
1834
1835         rsrc_start = S3C2410_PA_USBDEV;
1836         rsrc_len   = S3C24XX_SZ_USBDEV;
1837
1838         if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1839                 return -EBUSY;
1840
1841         base_addr = ioremap(rsrc_start, rsrc_len);
1842         if (!base_addr) {
1843                 retval = -ENOMEM;
1844                 goto err_mem;
1845         }
1846
1847         device_initialize(&udc->gadget.dev);
1848         udc->gadget.dev.parent = &pdev->dev;
1849         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1850
1851         the_controller = udc;
1852         platform_set_drvdata(pdev, udc);
1853
1854         s3c2410_udc_disable(udc);
1855         s3c2410_udc_reinit(udc);
1856
1857         /* irq setup after old hardware state is cleaned up */
1858         retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1859                              IRQF_DISABLED, gadget_name, udc);
1860
1861         if (retval != 0) {
1862                 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1863                 retval = -EBUSY;
1864                 goto err_map;
1865         }
1866
1867         dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1868
1869         if (udc_info && udc_info->vbus_pin > 0) {
1870                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1871                 if (retval < 0) {
1872                         dev_err(dev, "cannot claim vbus pin\n");
1873                         goto err_int;
1874                 }
1875
1876                 irq = gpio_to_irq(udc_info->vbus_pin);
1877                 if (irq < 0) {
1878                         dev_err(dev, "no irq for gpio vbus pin\n");
1879                         goto err_gpio_claim;
1880                 }
1881
1882                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1883                                      IRQF_DISABLED | IRQF_TRIGGER_RISING
1884                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1885                                      gadget_name, udc);
1886
1887                 if (retval != 0) {
1888                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1889                                 irq, retval);
1890                         retval = -EBUSY;
1891                         goto err_gpio_claim;
1892                 }
1893
1894                 dev_dbg(dev, "got irq %i\n", irq);
1895         } else {
1896                 udc->vbus = 1;
1897         }
1898
1899         if (s3c2410_udc_debugfs_root) {
1900                 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1901                                 s3c2410_udc_debugfs_root,
1902                                 udc, &s3c2410_udc_debugfs_fops);
1903                 if (!udc->regs_info)
1904                         dev_warn(dev, "debugfs file creation failed\n");
1905         }
1906
1907         dev_dbg(dev, "probe ok\n");
1908
1909         return 0;
1910
1911 err_gpio_claim:
1912         if (udc_info && udc_info->vbus_pin > 0)
1913                 gpio_free(udc_info->vbus_pin);
1914 err_int:
1915         free_irq(IRQ_USBD, udc);
1916 err_map:
1917         iounmap(base_addr);
1918 err_mem:
1919         release_mem_region(rsrc_start, rsrc_len);
1920
1921         return retval;
1922 }
1923
1924 /*
1925  *      s3c2410_udc_remove
1926  */
1927 static int s3c2410_udc_remove(struct platform_device *pdev)
1928 {
1929         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1930         unsigned int irq;
1931
1932         dev_dbg(&pdev->dev, "%s()\n", __func__);
1933         if (udc->driver)
1934                 return -EBUSY;
1935
1936         debugfs_remove(udc->regs_info);
1937
1938         if (udc_info && udc_info->vbus_pin > 0) {
1939                 irq = gpio_to_irq(udc_info->vbus_pin);
1940                 free_irq(irq, udc);
1941         }
1942
1943         free_irq(IRQ_USBD, udc);
1944
1945         iounmap(base_addr);
1946         release_mem_region(rsrc_start, rsrc_len);
1947
1948         platform_set_drvdata(pdev, NULL);
1949
1950         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1951                 clk_disable(udc_clock);
1952                 clk_put(udc_clock);
1953                 udc_clock = NULL;
1954         }
1955
1956         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1957                 clk_disable(usb_bus_clock);
1958                 clk_put(usb_bus_clock);
1959                 usb_bus_clock = NULL;
1960         }
1961
1962         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1963         return 0;
1964 }
1965
1966 #ifdef CONFIG_PM
1967 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1968 {
1969         if (udc_info && udc_info->udc_command)
1970                 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1971
1972         return 0;
1973 }
1974
1975 static int s3c2410_udc_resume(struct platform_device *pdev)
1976 {
1977         if (udc_info && udc_info->udc_command)
1978                 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1979
1980         return 0;
1981 }
1982 #else
1983 #define s3c2410_udc_suspend     NULL
1984 #define s3c2410_udc_resume      NULL
1985 #endif
1986
1987 static struct platform_driver udc_driver_2410 = {
1988         .driver         = {
1989                 .name   = "s3c2410-usbgadget",
1990                 .owner  = THIS_MODULE,
1991         },
1992         .probe          = s3c2410_udc_probe,
1993         .remove         = s3c2410_udc_remove,
1994         .suspend        = s3c2410_udc_suspend,
1995         .resume         = s3c2410_udc_resume,
1996 };
1997
1998 static struct platform_driver udc_driver_2440 = {
1999         .driver         = {
2000                 .name   = "s3c2440-usbgadget",
2001                 .owner  = THIS_MODULE,
2002         },
2003         .probe          = s3c2410_udc_probe,
2004         .remove         = s3c2410_udc_remove,
2005         .suspend        = s3c2410_udc_suspend,
2006         .resume         = s3c2410_udc_resume,
2007 };
2008
2009 static int __init udc_init(void)
2010 {
2011         int retval;
2012
2013         dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2014
2015         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2016         if (IS_ERR(s3c2410_udc_debugfs_root)) {
2017                 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2018                         gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2019                 s3c2410_udc_debugfs_root = NULL;
2020         }
2021
2022         retval = platform_driver_register(&udc_driver_2410);
2023         if (retval)
2024                 goto err;
2025
2026         retval = platform_driver_register(&udc_driver_2440);
2027         if (retval)
2028                 goto err;
2029
2030         return 0;
2031
2032 err:
2033         debugfs_remove(s3c2410_udc_debugfs_root);
2034         return retval;
2035 }
2036
2037 static void __exit udc_exit(void)
2038 {
2039         platform_driver_unregister(&udc_driver_2410);
2040         platform_driver_unregister(&udc_driver_2440);
2041         debugfs_remove(s3c2410_udc_debugfs_root);
2042 }
2043
2044 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2045 EXPORT_SYMBOL(usb_gadget_register_driver);
2046
2047 module_init(udc_init);
2048 module_exit(udc_exit);
2049
2050 MODULE_AUTHOR(DRIVER_AUTHOR);
2051 MODULE_DESCRIPTION(DRIVER_DESC);
2052 MODULE_VERSION(DRIVER_VERSION);
2053 MODULE_LICENSE("GPL");
2054 MODULE_ALIAS("platform:s3c2410-usbgadget");
2055 MODULE_ALIAS("platform:s3c2440-usbgadget");