drivers/usb/gadget/pxa25x_udc.c

   1 /*
   2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
   3  *
   4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
   5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
   6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
   7  * Copyright (C) 2003 David Brownell
   8  * Copyright (C) 2003 Joshua Wise
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  23  *
  24  */
  25
  26 /* #define VERBOSE_DEBUG */
  27
  28 #include <linux/device.h>
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/ioport.h>
  32 #include <linux/types.h>
  33 #include <linux/errno.h>
  34 #include <linux/delay.h>
  35 #include <linux/slab.h>
  36 #include <linux/init.h>
  37 #include <linux/timer.h>
  38 #include <linux/list.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/mm.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/dma-mapping.h>
  43 #include <linux/irq.h>
  44 #include <linux/clk.h>
  45 #include <linux/err.h>
  46 #include <linux/seq_file.h>
  47 #include <linux/debugfs.h>
  48 #include <linux/io.h>
  49 #include <linux/prefetch.h>
  50
  51 #include <asm/byteorder.h>
  52 #include <asm/dma.h>
  53 #include <asm/gpio.h>
  54 #include <asm/system.h>
  55 #include <asm/mach-types.h>
  56 #include <asm/unaligned.h>
  57
  58 #include <linux/usb/ch9.h>
  59 #include <linux/usb/gadget.h>
  60 #include <linux/usb/otg.h>
  61
  62 /*
  63  * This driver is PXA25x only.  Grab the right register definitions.
  64  */
  65 #ifdef CONFIG_ARCH_PXA
  66 #include <mach/pxa25x-udc.h>
  67 #endif
  68
  69 #ifdef CONFIG_ARCH_LUBBOCK
  70 #include <mach/lubbock.h>
  71 #endif
  72
  73 #include <asm/mach/udc_pxa2xx.h>
  74
  75
  76 /*
  77  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  78  * series processors.  The UDC for the IXP 4xx series is very similar.
  79  * There are fifteen endpoints, in addition to ep0.
  80  *
  81  * Such controller drivers work with a gadget driver.  The gadget driver
  82  * returns descriptors, implements configuration and data protocols used
  83  * by the host to interact with this device, and allocates endpoints to
  84  * the different protocol interfaces.  The controller driver virtualizes
  85  * usb hardware so that the gadget drivers will be more portable.
  86  *
  87  * This UDC hardware wants to implement a bit too much USB protocol, so
  88  * it constrains the sorts of USB configuration change events that work.
  89  * The errata for these chips are misleading; some "fixed" bugs from
  90  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  91  *
  92  * Note that the UDC hardware supports DMA (except on IXP) but that's
  93  * not used here.  IN-DMA (to host) is simple enough, when the data is
  94  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  95  * other software can.  OUT-DMA is buggy in most chip versions, as well
  96  * as poorly designed (data toggle not automatic).  So this driver won't
  97  * bother using DMA.  (Mostly-working IN-DMA support was available in
  98  * kernels before 2.6.23, but was never enabled or well tested.)
  99  */
 100
 101 #define DRIVER_VERSION  "30-June-2007"
 102 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
 103
 104
 105 static const char driver_name [] = "pxa25x_udc";
 106
 107 static const char ep0name [] = "ep0";
 108
 109
 110 #ifdef CONFIG_ARCH_IXP4XX
 111
 112 /* cpu-specific register addresses are compiled in to this code */
 113 #ifdef CONFIG_ARCH_PXA
 114 #error "Can't configure both IXP and PXA"
 115 #endif
 116
 117 /* IXP doesn't yet support <linux/clk.h> */
 118 #define clk_get(dev,name)       NULL
 119 #define clk_enable(clk)         do { } while (0)
 120 #define clk_disable(clk)        do { } while (0)
 121 #define clk_put(clk)            do { } while (0)
 122
 123 #endif
 124
 125 #include "pxa25x_udc.h"
 126
 127
 128 #ifdef  CONFIG_USB_PXA25X_SMALL
 129 #define SIZE_STR        " (small)"
 130 #else
 131 #define SIZE_STR        ""
 132 #endif
 133
 134 /* ---------------------------------------------------------------------------
 135  *      endpoint related parts of the api to the usb controller hardware,
 136  *      used by gadget driver; and the inner talker-to-hardware core.
 137  * ---------------------------------------------------------------------------
 138  */
 139
 140 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
 141 static void nuke (struct pxa25x_ep *, int status);
 142
 143 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 144 static void pullup_off(void)
 145 {
 146         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 147         int off_level = mach->gpio_pullup_inverted;
 148
 149         if (gpio_is_valid(mach->gpio_pullup))
 150                 gpio_set_value(mach->gpio_pullup, off_level);
 151         else if (mach->udc_command)
 152                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 153 }
 154
 155 static void pullup_on(void)
 156 {
 157         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 158         int on_level = !mach->gpio_pullup_inverted;
 159
 160         if (gpio_is_valid(mach->gpio_pullup))
 161                 gpio_set_value(mach->gpio_pullup, on_level);
 162         else if (mach->udc_command)
 163                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 164 }
 165
 166 static void pio_irq_enable(int bEndpointAddress)
 167 {
 168         bEndpointAddress &= 0xf;
 169         if (bEndpointAddress < 8)
 170                 UICR0 &= ~(1 << bEndpointAddress);
 171         else {
 172                 bEndpointAddress -= 8;
 173                 UICR1 &= ~(1 << bEndpointAddress);
 174         }
 175 }
 176
 177 static void pio_irq_disable(int bEndpointAddress)
 178 {
 179         bEndpointAddress &= 0xf;
 180         if (bEndpointAddress < 8)
 181                 UICR0 |= 1 << bEndpointAddress;
 182         else {
 183                 bEndpointAddress -= 8;
 184                 UICR1 |= 1 << bEndpointAddress;
 185         }
 186 }
 187
 188 /* The UDCCR reg contains mask and interrupt status bits,
 189  * so using '|=' isn't safe as it may ack an interrupt.
 190  */
 191 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 192
 193 static inline void udc_set_mask_UDCCR(int mask)
 194 {
 195         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 196 }
 197
 198 static inline void udc_clear_mask_UDCCR(int mask)
 199 {
 200         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 201 }
 202
 203 static inline void udc_ack_int_UDCCR(int mask)
 204 {
 205         /* udccr contains the bits we dont want to change */
 206         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
 207
 208         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 209 }
 210
 211 /*
 212  * endpoint enable/disable
 213  *
 214  * we need to verify the descriptors used to enable endpoints.  since pxa25x
 215  * endpoint configurations are fixed, and are pretty much always enabled,
 216  * there's not a lot to manage here.
 217  *
 218  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
 219  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
 220  * for a single interface (with only the default altsetting) and for gadget
 221  * drivers that don't halt endpoints (not reset by set_interface).  that also
 222  * means that if you use ISO, you must violate the USB spec rule that all
 223  * iso endpoints must be in non-default altsettings.
 224  */
 225 static int pxa25x_ep_enable (struct usb_ep *_ep,
 226                 const struct usb_endpoint_descriptor *desc)
 227 {
 228         struct pxa25x_ep        *ep;
 229         struct pxa25x_udc       *dev;
 230
 231         ep = container_of (_ep, struct pxa25x_ep, ep);
 232         if (!_ep || !desc || ep->desc || _ep->name == ep0name
 233                         || desc->bDescriptorType != USB_DT_ENDPOINT
 234                         || ep->bEndpointAddress != desc->bEndpointAddress
 235                         || ep->fifo_size < le16_to_cpu
 236                                                 (desc->wMaxPacketSize)) {
 237                 DMSG("%s, bad ep or descriptor\n", __func__);
 238                 return -EINVAL;
 239         }
 240
 241         /* xfer types must match, except that interrupt ~= bulk */
 242         if (ep->bmAttributes != desc->bmAttributes
 243                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 244                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 245                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
 246                 return -EINVAL;
 247         }
 248
 249         /* hardware _could_ do smaller, but driver doesn't */
 250         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 251                                 && le16_to_cpu (desc->wMaxPacketSize)
 252                                                 != BULK_FIFO_SIZE)
 253                         || !desc->wMaxPacketSize) {
 254                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
 255                 return -ERANGE;
 256         }
 257
 258         dev = ep->dev;
 259         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 260                 DMSG("%s, bogus device state\n", __func__);
 261                 return -ESHUTDOWN;
 262         }
 263
 264         ep->desc = desc;
 265         ep->stopped = 0;
 266         ep->pio_irqs = 0;
 267         ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
 268
 269         /* flush fifo (mostly for OUT buffers) */
 270         pxa25x_ep_fifo_flush (_ep);
 271
 272         /* ... reset halt state too, if we could ... */
 273
 274         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 275         return 0;
 276 }
 277
 278 static int pxa25x_ep_disable (struct usb_ep *_ep)
 279 {
 280         struct pxa25x_ep        *ep;
 281         unsigned long           flags;
 282
 283         ep = container_of (_ep, struct pxa25x_ep, ep);
 284         if (!_ep || !ep->desc) {
 285                 DMSG("%s, %s not enabled\n", __func__,
 286                         _ep ? ep->ep.name : NULL);
 287                 return -EINVAL;
 288         }
 289         local_irq_save(flags);
 290
 291         nuke (ep, -ESHUTDOWN);
 292
 293         /* flush fifo (mostly for IN buffers) */
 294         pxa25x_ep_fifo_flush (_ep);
 295
 296         ep->desc = NULL;
 297         ep->stopped = 1;
 298
 299         local_irq_restore(flags);
 300         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 301         return 0;
 302 }
 303
 304 /*-------------------------------------------------------------------------*/
 305
 306 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
 307  * must still pass correctly initialized endpoints, since other controller
 308  * drivers may care about how it's currently set up (dma issues etc).
 309  */
 310
 311 /*
 312  *      pxa25x_ep_alloc_request - allocate a request data structure
 313  */
 314 static struct usb_request *
 315 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 316 {
 317         struct pxa25x_request *req;
 318
 319         req = kzalloc(sizeof(*req), gfp_flags);
 320         if (!req)
 321                 return NULL;
 322
 323         INIT_LIST_HEAD (&req->queue);
 324         return &req->req;
 325 }
 326
 327
 328 /*
 329  *      pxa25x_ep_free_request - deallocate a request data structure
 330  */
 331 static void
 332 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 333 {
 334         struct pxa25x_request   *req;
 335
 336         req = container_of (_req, struct pxa25x_request, req);
 337         WARN_ON(!list_empty (&req->queue));
 338         kfree(req);
 339 }
 340
 341 /*-------------------------------------------------------------------------*/
 342
 343 /*
 344  *      done - retire a request; caller blocked irqs
 345  */
 346 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 347 {
 348         unsigned                stopped = ep->stopped;
 349
 350         list_del_init(&req->queue);
 351
 352         if (likely (req->req.status == -EINPROGRESS))
 353                 req->req.status = status;
 354         else
 355                 status = req->req.status;
 356
 357         if (status && status != -ESHUTDOWN)
 358                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 359                         ep->ep.name, &req->req, status,
 360                         req->req.actual, req->req.length);
 361
 362         /* don't modify queue heads during completion callback */
 363         ep->stopped = 1;
 364         req->req.complete(&ep->ep, &req->req);
 365         ep->stopped = stopped;
 366 }
 367
 368
 369 static inline void ep0_idle (struct pxa25x_udc *dev)
 370 {
 371         dev->ep0state = EP0_IDLE;
 372 }
 373
 374 static int
 375 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 376 {
 377         u8              *buf;
 378         unsigned        length, count;
 379
 380         buf = req->req.buf + req->req.actual;
 381         prefetch(buf);
 382
 383         /* how big will this packet be? */
 384         length = min(req->req.length - req->req.actual, max);
 385         req->req.actual += length;
 386
 387         count = length;
 388         while (likely(count--))
 389                 *uddr = *buf++;
 390
 391         return length;
 392 }
 393
 394 /*
 395  * write to an IN endpoint fifo, as many packets as possible.
 396  * irqs will use this to write the rest later.
 397  * caller guarantees at least one packet buffer is ready (or a zlp).
 398  */
 399 static int
 400 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 401 {
 402         unsigned                max;
 403
 404         max = le16_to_cpu(ep->desc->wMaxPacketSize);
 405         do {
 406                 unsigned        count;
 407                 int             is_last, is_short;
 408
 409                 count = write_packet(ep->reg_uddr, req, max);
 410
 411                 /* last packet is usually short (or a zlp) */
 412                 if (unlikely (count != max))
 413                         is_last = is_short = 1;
 414                 else {
 415                         if (likely(req->req.length != req->req.actual)
 416                                         || req->req.zero)
 417                                 is_last = 0;
 418                         else
 419                                 is_last = 1;
 420                         /* interrupt/iso maxpacket may not fill the fifo */
 421                         is_short = unlikely (max < ep->fifo_size);
 422                 }
 423
 424                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 425                         ep->ep.name, count,
 426                         is_last ? "/L" : "", is_short ? "/S" : "",
 427                         req->req.length - req->req.actual, req);
 428
 429                 /* let loose that packet. maybe try writing another one,
 430                  * double buffering might work.  TSP, TPC, and TFS
 431                  * bit values are the same for all normal IN endpoints.
 432                  */
 433                 *ep->reg_udccs = UDCCS_BI_TPC;
 434                 if (is_short)
 435                         *ep->reg_udccs = UDCCS_BI_TSP;
 436
 437                 /* requests complete when all IN data is in the FIFO */
 438                 if (is_last) {
 439                         done (ep, req, 0);
 440                         if (list_empty(&ep->queue))
 441                                 pio_irq_disable (ep->bEndpointAddress);
 442                         return 1;
 443                 }
 444
 445                 // TODO experiment: how robust can fifo mode tweaking be?
 446                 // double buffering is off in the default fifo mode, which
 447                 // prevents TFS from being set here.
 448
 449         } while (*ep->reg_udccs & UDCCS_BI_TFS);
 450         return 0;
 451 }
 452
 453 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
 454  * ep0 data stage.  these chips want very simple state transitions.
 455  */
 456 static inline
 457 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 458 {
 459         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 460         USIR0 = USIR0_IR0;
 461         dev->req_pending = 0;
 462         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 463                 __func__, tag, UDCCS0, flags);
 464 }
 465
 466 static int
 467 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 468 {
 469         unsigned        count;
 470         int             is_short;
 471
 472         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 473         ep->dev->stats.write.bytes += count;
 474
 475         /* last packet "must be" short (or a zlp) */
 476         is_short = (count != EP0_FIFO_SIZE);
 477
 478         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 479                 req->req.length - req->req.actual, req);
 480
 481         if (unlikely (is_short)) {
 482                 if (ep->dev->req_pending)
 483                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
 484                 else
 485                         UDCCS0 = UDCCS0_IPR;
 486
 487                 count = req->req.length;
 488                 done (ep, req, 0);
 489                 ep0_idle(ep->dev);
 490 #ifndef CONFIG_ARCH_IXP4XX
 491 #if 1
 492                 /* This seems to get rid of lost status irqs in some cases:
 493                  * host responds quickly, or next request involves config
 494                  * change automagic, or should have been hidden, or ...
 495                  *
 496                  * FIXME get rid of all udelays possible...
 497                  */
 498                 if (count >= EP0_FIFO_SIZE) {
 499                         count = 100;
 500                         do {
 501                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
 502                                         /* clear OPR, generate ack */
 503                                         UDCCS0 = UDCCS0_OPR;
 504                                         break;
 505                                 }
 506                                 count--;
 507                                 udelay(1);
 508                         } while (count);
 509                 }
 510 #endif
 511 #endif
 512         } else if (ep->dev->req_pending)
 513                 ep0start(ep->dev, 0, "IN");
 514         return is_short;
 515 }
 516
 517
 518 /*
 519  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
 520  * transfers and put them into the request.  caller should have made
 521  * sure there's at least one packet ready.
 522  *
 523  * returns true if the request completed because of short packet or the
 524  * request buffer having filled (and maybe overran till end-of-packet).
 525  */
 526 static int
 527 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 528 {
 529         for (;;) {
 530                 u32             udccs;
 531                 u8              *buf;
 532                 unsigned        bufferspace, count, is_short;
 533
 534                 /* make sure there's a packet in the FIFO.
 535                  * UDCCS_{BO,IO}_RPC are all the same bit value.
 536                  * UDCCS_{BO,IO}_RNE are all the same bit value.
 537                  */
 538                 udccs = *ep->reg_udccs;
 539                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 540                         break;
 541                 buf = req->req.buf + req->req.actual;
 542                 prefetchw(buf);
 543                 bufferspace = req->req.length - req->req.actual;
 544
 545                 /* read all bytes from this packet */
 546                 if (likely (udccs & UDCCS_BO_RNE)) {
 547                         count = 1 + (0x0ff & *ep->reg_ubcr);
 548                         req->req.actual += min (count, bufferspace);
 549                 } else /* zlp */
 550                         count = 0;
 551                 is_short = (count < ep->ep.maxpacket);
 552                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 553                         ep->ep.name, udccs, count,
 554                         is_short ? "/S" : "",
 555                         req, req->req.actual, req->req.length);
 556                 while (likely (count-- != 0)) {
 557                         u8      byte = (u8) *ep->reg_uddr;
 558
 559                         if (unlikely (bufferspace == 0)) {
 560                                 /* this happens when the driver's buffer
 561                                  * is smaller than what the host sent.
 562                                  * discard the extra data.
 563                                  */
 564                                 if (req->req.status != -EOVERFLOW)
 565                                         DMSG("%s overflow %d\n",
 566                                                 ep->ep.name, count);
 567                                 req->req.status = -EOVERFLOW;
 568                         } else {
 569                                 *buf++ = byte;
 570                                 bufferspace--;
 571                         }
 572                 }
 573                 *ep->reg_udccs =  UDCCS_BO_RPC;
 574                 /* RPC/RSP/RNE could now reflect the other packet buffer */
 575
 576                 /* iso is one request per packet */
 577                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 578                         if (udccs & UDCCS_IO_ROF)
 579                                 req->req.status = -EHOSTUNREACH;
 580                         /* more like "is_done" */
 581                         is_short = 1;
 582                 }
 583
 584                 /* completion */
 585                 if (is_short || req->req.actual == req->req.length) {
 586                         done (ep, req, 0);
 587                         if (list_empty(&ep->queue))
 588                                 pio_irq_disable (ep->bEndpointAddress);
 589                         return 1;
 590                 }
 591
 592                 /* finished that packet.  the next one may be waiting... */
 593         }
 594         return 0;
 595 }
 596
 597 /*
 598  * special ep0 version of the above.  no UBCR0 or double buffering; status
 599  * handshaking is magic.  most device protocols don't need control-OUT.
 600  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
 601  * protocols do use them.
 602  */
 603 static int
 604 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 605 {
 606         u8              *buf, byte;
 607         unsigned        bufferspace;
 608
 609         buf = req->req.buf + req->req.actual;
 610         bufferspace = req->req.length - req->req.actual;
 611
 612         while (UDCCS0 & UDCCS0_RNE) {
 613                 byte = (u8) UDDR0;
 614
 615                 if (unlikely (bufferspace == 0)) {
 616                         /* this happens when the driver's buffer
 617                          * is smaller than what the host sent.
 618                          * discard the extra data.
 619                          */
 620                         if (req->req.status != -EOVERFLOW)
 621                                 DMSG("%s overflow\n", ep->ep.name);
 622                         req->req.status = -EOVERFLOW;
 623                 } else {
 624                         *buf++ = byte;
 625                         req->req.actual++;
 626                         bufferspace--;
 627                 }
 628         }
 629
 630         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 631
 632         /* completion */
 633         if (req->req.actual >= req->req.length)
 634                 return 1;
 635
 636         /* finished that packet.  the next one may be waiting... */
 637         return 0;
 638 }
 639
 640 /*-------------------------------------------------------------------------*/
 641
 642 static int
 643 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 644 {
 645         struct pxa25x_request   *req;
 646         struct pxa25x_ep        *ep;
 647         struct pxa25x_udc       *dev;
 648         unsigned long           flags;
 649
 650         req = container_of(_req, struct pxa25x_request, req);
 651         if (unlikely (!_req || !_req->complete || !_req->buf
 652                         || !list_empty(&req->queue))) {
 653                 DMSG("%s, bad params\n", __func__);
 654                 return -EINVAL;
 655         }
 656
 657         ep = container_of(_ep, struct pxa25x_ep, ep);
 658         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
 659                 DMSG("%s, bad ep\n", __func__);
 660                 return -EINVAL;
 661         }
 662
 663         dev = ep->dev;
 664         if (unlikely (!dev->driver
 665                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 666                 DMSG("%s, bogus device state\n", __func__);
 667                 return -ESHUTDOWN;
 668         }
 669
 670         /* iso is always one packet per request, that's the only way
 671          * we can report per-packet status.  that also helps with dma.
 672          */
 673         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 674                         && req->req.length > le16_to_cpu
 675                                                 (ep->desc->wMaxPacketSize)))
 676                 return -EMSGSIZE;
 677
 678         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 679                 _ep->name, _req, _req->length, _req->buf);
 680
 681         local_irq_save(flags);
 682
 683         _req->status = -EINPROGRESS;
 684         _req->actual = 0;
 685
 686         /* kickstart this i/o queue? */
 687         if (list_empty(&ep->queue) && !ep->stopped) {
 688                 if (ep->desc == NULL/* ep0 */) {
 689                         unsigned        length = _req->length;
 690
 691                         switch (dev->ep0state) {
 692                         case EP0_IN_DATA_PHASE:
 693                                 dev->stats.write.ops++;
 694                                 if (write_ep0_fifo(ep, req))
 695                                         req = NULL;
 696                                 break;
 697
 698                         case EP0_OUT_DATA_PHASE:
 699                                 dev->stats.read.ops++;
 700                                 /* messy ... */
 701                                 if (dev->req_config) {
 702                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 703                                                 dev->has_cfr ?  "" : " raced");
 704                                         if (dev->has_cfr)
 705                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 706                                                         |UDCCFR_MB1;
 707                                         done(ep, req, 0);
 708                                         dev->ep0state = EP0_END_XFER;
 709                                         local_irq_restore (flags);
 710                                         return 0;
 711                                 }
 712                                 if (dev->req_pending)
 713                                         ep0start(dev, UDCCS0_IPR, "OUT");
 714                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 715                                                 && read_ep0_fifo(ep, req))) {
 716                                         ep0_idle(dev);
 717                                         done(ep, req, 0);
 718                                         req = NULL;
 719                                 }
 720                                 break;
 721
 722                         default:
 723                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 724                                 local_irq_restore (flags);
 725                                 return -EL2HLT;
 726                         }
 727                 /* can the FIFO can satisfy the request immediately? */
 728                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 729                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 730                                         && write_fifo(ep, req))
 731                                 req = NULL;
 732                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 733                                 && read_fifo(ep, req)) {
 734                         req = NULL;
 735                 }
 736
 737                 if (likely (req && ep->desc))
 738                         pio_irq_enable(ep->bEndpointAddress);
 739         }
 740
 741         /* pio or dma irq handler advances the queue. */
 742         if (likely(req != NULL))
 743                 list_add_tail(&req->queue, &ep->queue);
 744         local_irq_restore(flags);
 745
 746         return 0;
 747 }
 748
 749
 750 /*
 751  *      nuke - dequeue ALL requests
 752  */
 753 static void nuke(struct pxa25x_ep *ep, int status)
 754 {
 755         struct pxa25x_request *req;
 756
 757         /* called with irqs blocked */
 758         while (!list_empty(&ep->queue)) {
 759                 req = list_entry(ep->queue.next,
 760                                 struct pxa25x_request,
 761                                 queue);
 762                 done(ep, req, status);
 763         }
 764         if (ep->desc)
 765                 pio_irq_disable (ep->bEndpointAddress);
 766 }
 767
 768
 769 /* dequeue JUST ONE request */
 770 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 771 {
 772         struct pxa25x_ep        *ep;
 773         struct pxa25x_request   *req;
 774         unsigned long           flags;
 775
 776         ep = container_of(_ep, struct pxa25x_ep, ep);
 777         if (!_ep || ep->ep.name == ep0name)
 778                 return -EINVAL;
 779
 780         local_irq_save(flags);
 781
 782         /* make sure it's actually queued on this endpoint */
 783         list_for_each_entry (req, &ep->queue, queue) {
 784                 if (&req->req == _req)
 785                         break;
 786         }
 787         if (&req->req != _req) {
 788                 local_irq_restore(flags);
 789                 return -EINVAL;
 790         }
 791
 792         done(ep, req, -ECONNRESET);
 793
 794         local_irq_restore(flags);
 795         return 0;
 796 }
 797
 798 /*-------------------------------------------------------------------------*/
 799
 800 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 801 {
 802         struct pxa25x_ep        *ep;
 803         unsigned long           flags;
 804
 805         ep = container_of(_ep, struct pxa25x_ep, ep);
 806         if (unlikely (!_ep
 807                         || (!ep->desc && ep->ep.name != ep0name))
 808                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 809                 DMSG("%s, bad ep\n", __func__);
 810                 return -EINVAL;
 811         }
 812         if (value == 0) {
 813                 /* this path (reset toggle+halt) is needed to implement
 814                  * SET_INTERFACE on normal hardware.  but it can't be
 815                  * done from software on the PXA UDC, and the hardware
 816                  * forgets to do it as part of SET_INTERFACE automagic.
 817                  */
 818                 DMSG("only host can clear %s halt\n", _ep->name);
 819                 return -EROFS;
 820         }
 821
 822         local_irq_save(flags);
 823
 824         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 825                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 826                            || !list_empty(&ep->queue))) {
 827                 local_irq_restore(flags);
 828                 return -EAGAIN;
 829         }
 830
 831         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
 832         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 833
 834         /* ep0 needs special care */
 835         if (!ep->desc) {
 836                 start_watchdog(ep->dev);
 837                 ep->dev->req_pending = 0;
 838                 ep->dev->ep0state = EP0_STALL;
 839
 840         /* and bulk/intr endpoints like dropping stalls too */
 841         } else {
 842                 unsigned i;
 843                 for (i = 0; i < 1000; i += 20) {
 844                         if (*ep->reg_udccs & UDCCS_BI_SST)
 845                                 break;
 846                         udelay(20);
 847                 }
 848         }
 849         local_irq_restore(flags);
 850
 851         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 852         return 0;
 853 }
 854
 855 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 856 {
 857         struct pxa25x_ep        *ep;
 858
 859         ep = container_of(_ep, struct pxa25x_ep, ep);
 860         if (!_ep) {
 861                 DMSG("%s, bad ep\n", __func__);
 862                 return -ENODEV;
 863         }
 864         /* pxa can't report unclaimed bytes from IN fifos */
 865         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 866                 return -EOPNOTSUPP;
 867         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 868                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 869                 return 0;
 870         else
 871                 return (*ep->reg_ubcr & 0xfff) + 1;
 872 }
 873
 874 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 875 {
 876         struct pxa25x_ep        *ep;
 877
 878         ep = container_of(_ep, struct pxa25x_ep, ep);
 879         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 880                 DMSG("%s, bad ep\n", __func__);
 881                 return;
 882         }
 883
 884         /* toggle and halt bits stay unchanged */
 885
 886         /* for OUT, just read and discard the FIFO contents. */
 887         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 888                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 889                         (void) *ep->reg_uddr;
 890                 return;
 891         }
 892
 893         /* most IN status is the same, but ISO can't stall */
 894         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 895                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 896                         ? 0 : UDCCS_BI_SST);
 897 }
 898
 899
 900 static struct usb_ep_ops pxa25x_ep_ops = {
 901         .enable         = pxa25x_ep_enable,
 902         .disable        = pxa25x_ep_disable,
 903
 904         .alloc_request  = pxa25x_ep_alloc_request,
 905         .free_request   = pxa25x_ep_free_request,
 906
 907         .queue          = pxa25x_ep_queue,
 908         .dequeue        = pxa25x_ep_dequeue,
 909
 910         .set_halt       = pxa25x_ep_set_halt,
 911         .fifo_status    = pxa25x_ep_fifo_status,
 912         .fifo_flush     = pxa25x_ep_fifo_flush,
 913 };
 914
 915
 916 /* ---------------------------------------------------------------------------
 917  *      device-scoped parts of the api to the usb controller hardware
 918  * ---------------------------------------------------------------------------
 919  */
 920
 921 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 922 {
 923         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 924 }
 925
 926 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 927 {
 928         /* host may not have enabled remote wakeup */
 929         if ((UDCCS0 & UDCCS0_DRWF) == 0)
 930                 return -EHOSTUNREACH;
 931         udc_set_mask_UDCCR(UDCCR_RSM);
 932         return 0;
 933 }
 934
 935 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
 936 static void udc_enable (struct pxa25x_udc *);
 937 static void udc_disable(struct pxa25x_udc *);
 938
 939 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
 940  * in active use.
 941  */
 942 static int pullup(struct pxa25x_udc *udc)
 943 {
 944         int is_active = udc->vbus && udc->pullup && !udc->suspended;
 945         DMSG("%s\n", is_active ? "active" : "inactive");
 946         if (is_active) {
 947                 if (!udc->active) {
 948                         udc->active = 1;
 949                         /* Enable clock for USB device */
 950                         clk_enable(udc->clk);
 951                         udc_enable(udc);
 952                 }
 953         } else {
 954                 if (udc->active) {
 955                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 956                                 DMSG("disconnect %s\n", udc->driver
 957                                         ? udc->driver->driver.name
 958                                         : "(no driver)");
 959                                 stop_activity(udc, udc->driver);
 960                         }
 961                         udc_disable(udc);
 962                         /* Disable clock for USB device */
 963                         clk_disable(udc->clk);
 964                         udc->active = 0;
 965                 }
 966
 967         }
 968         return 0;
 969 }
 970
 971 /* VBUS reporting logically comes from a transceiver */
 972 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 973 {
 974         struct pxa25x_udc       *udc;
 975
 976         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 977         udc->vbus = is_active;
 978         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 979         pullup(udc);
 980         return 0;
 981 }
 982
 983 /* drivers may have software control over D+ pullup */
 984 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 985 {
 986         struct pxa25x_udc       *udc;
 987
 988         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 989
 990         /* not all boards support pullup control */
 991         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
 992                 return -EOPNOTSUPP;
 993
 994         udc->pullup = (is_active != 0);
 995         pullup(udc);
 996         return 0;
 997 }
 998
 999 /* boards may consume current from VBUS, up to 100-500mA based on config.
1000  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
1001  * violate USB specs.
1002  */
1003 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1004 {
1005         struct pxa25x_udc       *udc;
1006
1007         udc = container_of(_gadget, struct pxa25x_udc, gadget);
1008
1009         if (udc->transceiver)
1010                 return otg_set_power(udc->transceiver, mA);
1011         return -EOPNOTSUPP;
1012 }
1013
1014 static const struct usb_gadget_ops pxa25x_udc_ops = {
1015         .get_frame      = pxa25x_udc_get_frame,
1016         .wakeup         = pxa25x_udc_wakeup,
1017         .vbus_session   = pxa25x_udc_vbus_session,
1018         .pullup         = pxa25x_udc_pullup,
1019         .vbus_draw      = pxa25x_udc_vbus_draw,
1020 };
1021
1022 /*-------------------------------------------------------------------------*/
1023
1024 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1025
1026 static int
1027 udc_seq_show(struct seq_file *m, void *_d)
1028 {
1029         struct pxa25x_udc       *dev = m->private;
1030         unsigned long           flags;
1031         int                     i;
1032         u32                     tmp;
1033
1034         local_irq_save(flags);
1035
1036         /* basic device status */
1037         seq_printf(m, DRIVER_DESC "\n"
1038                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1039                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1040                 dev->driver ? dev->driver->driver.name : "(none)",
1041                 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1042
1043         /* registers for device and ep0 */
1044         seq_printf(m,
1045                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1046                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1047
1048         tmp = UDCCR;
1049         seq_printf(m,
1050                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1051                 (tmp & UDCCR_REM) ? " rem" : "",
1052                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1053                 (tmp & UDCCR_SRM) ? " srm" : "",
1054                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1055                 (tmp & UDCCR_RESIR) ? " resir" : "",
1056                 (tmp & UDCCR_RSM) ? " rsm" : "",
1057                 (tmp & UDCCR_UDA) ? " uda" : "",
1058                 (tmp & UDCCR_UDE) ? " ude" : "");
1059
1060         tmp = UDCCS0;
1061         seq_printf(m,
1062                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1063                 (tmp & UDCCS0_SA) ? " sa" : "",
1064                 (tmp & UDCCS0_RNE) ? " rne" : "",
1065                 (tmp & UDCCS0_FST) ? " fst" : "",
1066                 (tmp & UDCCS0_SST) ? " sst" : "",
1067                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1068                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1069                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1070                 (tmp & UDCCS0_OPR) ? " opr" : "");
1071
1072         if (dev->has_cfr) {
1073                 tmp = UDCCFR;
1074                 seq_printf(m,
1075                         "udccfr %02X =%s%s\n", tmp,
1076                         (tmp & UDCCFR_AREN) ? " aren" : "",
1077                         (tmp & UDCCFR_ACM) ? " acm" : "");
1078         }
1079
1080         if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1081                 goto done;
1082
1083         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1084                 dev->stats.write.bytes, dev->stats.write.ops,
1085                 dev->stats.read.bytes, dev->stats.read.ops,
1086                 dev->stats.irqs);
1087
1088         /* dump endpoint queues */
1089         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1090                 struct pxa25x_ep        *ep = &dev->ep [i];
1091                 struct pxa25x_request   *req;
1092
1093                 if (i != 0) {
1094                         const struct usb_endpoint_descriptor    *desc;
1095
1096                         desc = ep->desc;
1097                         if (!desc)
1098                                 continue;
1099                         tmp = *dev->ep [i].reg_udccs;
1100                         seq_printf(m,
1101                                 "%s max %d %s udccs %02x irqs %lu\n",
1102                                 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1103                                 "pio", tmp, ep->pio_irqs);
1104                         /* TODO translate all five groups of udccs bits! */
1105
1106                 } else /* ep0 should only have one transfer queued */
1107                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1108                                 ep->pio_irqs);
1109
1110                 if (list_empty(&ep->queue)) {
1111                         seq_printf(m, "\t(nothing queued)\n");
1112                         continue;
1113                 }
1114                 list_for_each_entry(req, &ep->queue, queue) {
1115                         seq_printf(m,
1116                                         "\treq %p len %d/%d buf %p\n",
1117                                         &req->req, req->req.actual,
1118                                         req->req.length, req->req.buf);
1119                 }
1120         }
1121
1122 done:
1123         local_irq_restore(flags);
1124         return 0;
1125 }
1126
1127 static int
1128 udc_debugfs_open(struct inode *inode, struct file *file)
1129 {
1130         return single_open(file, udc_seq_show, inode->i_private);
1131 }
1132
1133 static const struct file_operations debug_fops = {
1134         .open           = udc_debugfs_open,
1135         .read           = seq_read,
1136         .llseek         = seq_lseek,
1137         .release        = single_release,
1138         .owner          = THIS_MODULE,
1139 };
1140
1141 #define create_debug_files(dev) \
1142         do { \
1143                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1144                         S_IRUGO, NULL, dev, &debug_fops); \
1145         } while (0)
1146 #define remove_debug_files(dev) \
1147         do { \
1148                 if (dev->debugfs_udc) \
1149                         debugfs_remove(dev->debugfs_udc); \
1150         } while (0)
1151
1152 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1153
1154 #define create_debug_files(dev) do {} while (0)
1155 #define remove_debug_files(dev) do {} while (0)
1156
1157 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1158
1159 /*-------------------------------------------------------------------------*/
1160
1161 /*
1162  *      udc_disable - disable USB device controller
1163  */
1164 static void udc_disable(struct pxa25x_udc *dev)
1165 {
1166         /* block all irqs */
1167         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1168         UICR0 = UICR1 = 0xff;
1169         UFNRH = UFNRH_SIM;
1170
1171         /* if hardware supports it, disconnect from usb */
1172         pullup_off();
1173
1174         udc_clear_mask_UDCCR(UDCCR_UDE);
1175
1176         ep0_idle (dev);
1177         dev->gadget.speed = USB_SPEED_UNKNOWN;
1178 }
1179
1180
1181 /*
1182  *      udc_reinit - initialize software state
1183  */
1184 static void udc_reinit(struct pxa25x_udc *dev)
1185 {
1186         u32     i;
1187
1188         /* device/ep0 records init */
1189         INIT_LIST_HEAD (&dev->gadget.ep_list);
1190         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1191         dev->ep0state = EP0_IDLE;
1192
1193         /* basic endpoint records init */
1194         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1195                 struct pxa25x_ep *ep = &dev->ep[i];
1196
1197                 if (i != 0)
1198                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1199
1200                 ep->desc = NULL;
1201                 ep->stopped = 0;
1202                 INIT_LIST_HEAD (&ep->queue);
1203                 ep->pio_irqs = 0;
1204         }
1205
1206         /* the rest was statically initialized, and is read-only */
1207 }
1208
1209 /* until it's enabled, this UDC should be completely invisible
1210  * to any USB host.
1211  */
1212 static void udc_enable (struct pxa25x_udc *dev)
1213 {
1214         udc_clear_mask_UDCCR(UDCCR_UDE);
1215
1216         /* try to clear these bits before we enable the udc */
1217         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1218
1219         ep0_idle(dev);
1220         dev->gadget.speed = USB_SPEED_UNKNOWN;
1221         dev->stats.irqs = 0;
1222
1223         /*
1224          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1225          * - enable UDC
1226          * - if RESET is already in progress, ack interrupt
1227          * - unmask reset interrupt
1228          */
1229         udc_set_mask_UDCCR(UDCCR_UDE);
1230         if (!(UDCCR & UDCCR_UDA))
1231                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1232
1233         if (dev->has_cfr /* UDC_RES2 is defined */) {
1234                 /* pxa255 (a0+) can avoid a set_config race that could
1235                  * prevent gadget drivers from configuring correctly
1236                  */
1237                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1238         } else {
1239                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1240                  * which could result in missing packets and interrupts.
1241                  * supposedly one bit per endpoint, controlling whether it
1242                  * double buffers or not; ACM/AREN bits fit into the holes.
1243                  * zero bits (like USIR0_IRx) disable double buffering.
1244                  */
1245                 UDC_RES1 = 0x00;
1246                 UDC_RES2 = 0x00;
1247         }
1248
1249         /* enable suspend/resume and reset irqs */
1250         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1251
1252         /* enable ep0 irqs */
1253         UICR0 &= ~UICR0_IM0;
1254
1255         /* if hardware supports it, pullup D+ and wait for reset */
1256         pullup_on();
1257 }
1258
1259
1260 /* when a driver is successfully registered, it will receive
1261  * control requests including set_configuration(), which enables
1262  * non-control requests.  then usb traffic follows until a
1263  * disconnect is reported.  then a host may connect again, or
1264  * the driver might get unbound.
1265  */
1266 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1267                 int (*bind)(struct usb_gadget *))
1268 {
1269         struct pxa25x_udc       *dev = the_controller;
1270         int                     retval;
1271
1272         if (!driver
1273                         || driver->speed < USB_SPEED_FULL
1274                         || !bind
1275                         || !driver->disconnect
1276                         || !driver->setup)
1277                 return -EINVAL;
1278         if (!dev)
1279                 return -ENODEV;
1280         if (dev->driver)
1281                 return -EBUSY;
1282
1283         /* first hook up the driver ... */
1284         dev->driver = driver;
1285         dev->gadget.dev.driver = &driver->driver;
1286         dev->pullup = 1;
1287
1288         retval = device_add (&dev->gadget.dev);
1289         if (retval) {
1290 fail:
1291                 dev->driver = NULL;
1292                 dev->gadget.dev.driver = NULL;
1293                 return retval;
1294         }
1295         retval = bind(&dev->gadget);
1296         if (retval) {
1297                 DMSG("bind to driver %s --> error %d\n",
1298                                 driver->driver.name, retval);
1299                 device_del (&dev->gadget.dev);
1300                 goto fail;
1301         }
1302
1303         /* ... then enable host detection and ep0; and we're ready
1304          * for set_configuration as well as eventual disconnect.
1305          */
1306         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1307
1308         /* connect to bus through transceiver */
1309         if (dev->transceiver) {
1310                 retval = otg_set_peripheral(dev->transceiver, &dev->gadget);
1311                 if (retval) {
1312                         DMSG("can't bind to transceiver\n");
1313                         if (driver->unbind)
1314                                 driver->unbind(&dev->gadget);
1315                         goto bind_fail;
1316                 }
1317         }
1318
1319         pullup(dev);
1320         dump_state(dev);
1321         return 0;
1322 bind_fail:
1323         return retval;
1324 }
1325 EXPORT_SYMBOL(usb_gadget_probe_driver);
1326
1327 static void
1328 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1329 {
1330         int i;
1331
1332         /* don't disconnect drivers more than once */
1333         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1334                 driver = NULL;
1335         dev->gadget.speed = USB_SPEED_UNKNOWN;
1336
1337         /* prevent new request submissions, kill any outstanding requests  */
1338         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1339                 struct pxa25x_ep *ep = &dev->ep[i];
1340
1341                 ep->stopped = 1;
1342                 nuke(ep, -ESHUTDOWN);
1343         }
1344         del_timer_sync(&dev->timer);
1345
1346         /* report disconnect; the driver is already quiesced */
1347         if (driver)
1348                 driver->disconnect(&dev->gadget);
1349
1350         /* re-init driver-visible data structures */
1351         udc_reinit(dev);
1352 }
1353
1354 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1355 {
1356         struct pxa25x_udc       *dev = the_controller;
1357
1358         if (!dev)
1359                 return -ENODEV;
1360         if (!driver || driver != dev->driver || !driver->unbind)
1361                 return -EINVAL;
1362
1363         local_irq_disable();
1364         dev->pullup = 0;
1365         pullup(dev);
1366         stop_activity(dev, driver);
1367         local_irq_enable();
1368
1369         if (dev->transceiver)
1370                 (void) otg_set_peripheral(dev->transceiver, NULL);
1371
1372         driver->unbind(&dev->gadget);
1373         dev->gadget.dev.driver = NULL;
1374         dev->driver = NULL;
1375
1376         device_del (&dev->gadget.dev);
1377
1378         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1379         dump_state(dev);
1380         return 0;
1381 }
1382 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1383
1384
1385 /*-------------------------------------------------------------------------*/
1386
1387 #ifdef CONFIG_ARCH_LUBBOCK
1388
1389 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1390  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1391  */
1392
1393 static irqreturn_t
1394 lubbock_vbus_irq(int irq, void *_dev)
1395 {
1396         struct pxa25x_udc       *dev = _dev;
1397         int                     vbus;
1398
1399         dev->stats.irqs++;
1400         switch (irq) {
1401         case LUBBOCK_USB_IRQ:
1402                 vbus = 1;
1403                 disable_irq(LUBBOCK_USB_IRQ);
1404                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1405                 break;
1406         case LUBBOCK_USB_DISC_IRQ:
1407                 vbus = 0;
1408                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1409                 enable_irq(LUBBOCK_USB_IRQ);
1410                 break;
1411         default:
1412                 return IRQ_NONE;
1413         }
1414
1415         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1416         return IRQ_HANDLED;
1417 }
1418
1419 #endif
1420
1421
1422 /*-------------------------------------------------------------------------*/
1423
1424 static inline void clear_ep_state (struct pxa25x_udc *dev)
1425 {
1426         unsigned i;
1427
1428         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1429          * fifos, and pending transactions mustn't be continued in any case.
1430          */
1431         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1432                 nuke(&dev->ep[i], -ECONNABORTED);
1433 }
1434
1435 static void udc_watchdog(unsigned long _dev)
1436 {
1437         struct pxa25x_udc       *dev = (void *)_dev;
1438
1439         local_irq_disable();
1440         if (dev->ep0state == EP0_STALL
1441                         && (UDCCS0 & UDCCS0_FST) == 0
1442                         && (UDCCS0 & UDCCS0_SST) == 0) {
1443                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1444                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1445                 start_watchdog(dev);
1446         }
1447         local_irq_enable();
1448 }
1449
1450 static void handle_ep0 (struct pxa25x_udc *dev)
1451 {
1452         u32                     udccs0 = UDCCS0;
1453         struct pxa25x_ep        *ep = &dev->ep [0];
1454         struct pxa25x_request   *req;
1455         union {
1456                 struct usb_ctrlrequest  r;
1457                 u8                      raw [8];
1458                 u32                     word [2];
1459         } u;
1460
1461         if (list_empty(&ep->queue))
1462                 req = NULL;
1463         else
1464                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1465
1466         /* clear stall status */
1467         if (udccs0 & UDCCS0_SST) {
1468                 nuke(ep, -EPIPE);
1469                 UDCCS0 = UDCCS0_SST;
1470                 del_timer(&dev->timer);
1471                 ep0_idle(dev);
1472         }
1473
1474         /* previous request unfinished?  non-error iff back-to-back ... */
1475         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1476                 nuke(ep, 0);
1477                 del_timer(&dev->timer);
1478                 ep0_idle(dev);
1479         }
1480
1481         switch (dev->ep0state) {
1482         case EP0_IDLE:
1483                 /* late-breaking status? */
1484                 udccs0 = UDCCS0;
1485
1486                 /* start control request? */
1487                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1488                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1489                         int i;
1490
1491                         nuke (ep, -EPROTO);
1492
1493                         /* read SETUP packet */
1494                         for (i = 0; i < 8; i++) {
1495                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1496 bad_setup:
1497                                         DMSG("SETUP %d!\n", i);
1498                                         goto stall;
1499                                 }
1500                                 u.raw [i] = (u8) UDDR0;
1501                         }
1502                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1503                                 goto bad_setup;
1504
1505 got_setup:
1506                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1507                                 u.r.bRequestType, u.r.bRequest,
1508                                 le16_to_cpu(u.r.wValue),
1509                                 le16_to_cpu(u.r.wIndex),
1510                                 le16_to_cpu(u.r.wLength));
1511
1512                         /* cope with automagic for some standard requests. */
1513                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1514                                                 == USB_TYPE_STANDARD;
1515                         dev->req_config = 0;
1516                         dev->req_pending = 1;
1517                         switch (u.r.bRequest) {
1518                         /* hardware restricts gadget drivers here! */
1519                         case USB_REQ_SET_CONFIGURATION:
1520                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1521                                         /* reflect hardware's automagic
1522                                          * up to the gadget driver.
1523                                          */
1524 config_change:
1525                                         dev->req_config = 1;
1526                                         clear_ep_state(dev);
1527                                         /* if !has_cfr, there's no synch
1528                                          * else use AREN (later) not SA|OPR
1529                                          * USIR0_IR0 acts edge sensitive
1530                                          */
1531                                 }
1532                                 break;
1533                         /* ... and here, even more ... */
1534                         case USB_REQ_SET_INTERFACE:
1535                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1536                                         /* udc hardware is broken by design:
1537                                          *  - altsetting may only be zero;
1538                                          *  - hw resets all interfaces' eps;
1539                                          *  - ep reset doesn't include halt(?).
1540                                          */
1541                                         DMSG("broken set_interface (%d/%d)\n",
1542                                                 le16_to_cpu(u.r.wIndex),
1543                                                 le16_to_cpu(u.r.wValue));
1544                                         goto config_change;
1545                                 }
1546                                 break;
1547                         /* hardware was supposed to hide this */
1548                         case USB_REQ_SET_ADDRESS:
1549                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1550                                         ep0start(dev, 0, "address");
1551                                         return;
1552                                 }
1553                                 break;
1554                         }
1555
1556                         if (u.r.bRequestType & USB_DIR_IN)
1557                                 dev->ep0state = EP0_IN_DATA_PHASE;
1558                         else
1559                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1560
1561                         i = dev->driver->setup(&dev->gadget, &u.r);
1562                         if (i < 0) {
1563                                 /* hardware automagic preventing STALL... */
1564                                 if (dev->req_config) {
1565                                         /* hardware sometimes neglects to tell
1566                                          * tell us about config change events,
1567                                          * so later ones may fail...
1568                                          */
1569                                         WARNING("config change %02x fail %d?\n",
1570                                                 u.r.bRequest, i);
1571                                         return;
1572                                         /* TODO experiment:  if has_cfr,
1573                                          * hardware didn't ACK; maybe we
1574                                          * could actually STALL!
1575                                          */
1576                                 }
1577                                 DBG(DBG_VERBOSE, "protocol STALL, "
1578                                         "%02x err %d\n", UDCCS0, i);
1579 stall:
1580                                 /* the watchdog timer helps deal with cases
1581                                  * where udc seems to clear FST wrongly, and
1582                                  * then NAKs instead of STALLing.
1583                                  */
1584                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1585                                 start_watchdog(dev);
1586                                 dev->ep0state = EP0_STALL;
1587
1588                         /* deferred i/o == no response yet */
1589                         } else if (dev->req_pending) {
1590                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1591                                                 || dev->req_std || u.r.wLength))
1592                                         ep0start(dev, 0, "defer");
1593                                 else
1594                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1595                         }
1596
1597                         /* expect at least one data or status stage irq */
1598                         return;
1599
1600                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1601                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1602                         unsigned i;
1603
1604                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1605                          * still observed on a pxa255 a0.
1606                          */
1607                         DBG(DBG_VERBOSE, "e131\n");
1608                         nuke(ep, -EPROTO);
1609
1610                         /* read SETUP data, but don't trust it too much */
1611                         for (i = 0; i < 8; i++)
1612                                 u.raw [i] = (u8) UDDR0;
1613                         if ((u.r.bRequestType & USB_RECIP_MASK)
1614                                         > USB_RECIP_OTHER)
1615                                 goto stall;
1616                         if (u.word [0] == 0 && u.word [1] == 0)
1617                                 goto stall;
1618                         goto got_setup;
1619                 } else {
1620                         /* some random early IRQ:
1621                          * - we acked FST
1622                          * - IPR cleared
1623                          * - OPR got set, without SA (likely status stage)
1624                          */
1625                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1626                 }
1627                 break;
1628         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1629                 if (udccs0 & UDCCS0_OPR) {
1630                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1631                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1632                         if (req)
1633                                 done(ep, req, 0);
1634                         ep0_idle(dev);
1635                 } else /* irq was IPR clearing */ {
1636                         if (req) {
1637                                 /* this IN packet might finish the request */
1638                                 (void) write_ep0_fifo(ep, req);
1639                         } /* else IN token before response was written */
1640                 }
1641                 break;
1642         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1643                 if (udccs0 & UDCCS0_OPR) {
1644                         if (req) {
1645                                 /* this OUT packet might finish the request */
1646                                 if (read_ep0_fifo(ep, req))
1647                                         done(ep, req, 0);
1648                                 /* else more OUT packets expected */
1649                         } /* else OUT token before read was issued */
1650                 } else /* irq was IPR clearing */ {
1651                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1652                         if (req)
1653                                 done(ep, req, 0);
1654                         ep0_idle(dev);
1655                 }
1656                 break;
1657         case EP0_END_XFER:
1658                 if (req)
1659                         done(ep, req, 0);
1660                 /* ack control-IN status (maybe in-zlp was skipped)
1661                  * also appears after some config change events.
1662                  */
1663                 if (udccs0 & UDCCS0_OPR)
1664                         UDCCS0 = UDCCS0_OPR;
1665                 ep0_idle(dev);
1666                 break;
1667         case EP0_STALL:
1668                 UDCCS0 = UDCCS0_FST;
1669                 break;
1670         }
1671         USIR0 = USIR0_IR0;
1672 }
1673
1674 static void handle_ep(struct pxa25x_ep *ep)
1675 {
1676         struct pxa25x_request   *req;
1677         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1678         int                     completed;
1679         u32                     udccs, tmp;
1680
1681         do {
1682                 completed = 0;
1683                 if (likely (!list_empty(&ep->queue)))
1684                         req = list_entry(ep->queue.next,
1685                                         struct pxa25x_request, queue);
1686                 else
1687                         req = NULL;
1688
1689                 // TODO check FST handling
1690
1691                 udccs = *ep->reg_udccs;
1692                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1693                         tmp = UDCCS_BI_TUR;
1694                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1695                                 tmp |= UDCCS_BI_SST;
1696                         tmp &= udccs;
1697                         if (likely (tmp))
1698                                 *ep->reg_udccs = tmp;
1699                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1700                                 completed = write_fifo(ep, req);
1701
1702                 } else {        /* irq from RPC (or for ISO, ROF) */
1703                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1704                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1705                         else
1706                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1707                         tmp &= udccs;
1708                         if (likely(tmp))
1709                                 *ep->reg_udccs = tmp;
1710
1711                         /* fifos can hold packets, ready for reading... */
1712                         if (likely(req)) {
1713                                 completed = read_fifo(ep, req);
1714                         } else
1715                                 pio_irq_disable (ep->bEndpointAddress);
1716                 }
1717                 ep->pio_irqs++;
1718         } while (completed);
1719 }
1720
1721 /*
1722  *      pxa25x_udc_irq - interrupt handler
1723  *
1724  * avoid delays in ep0 processing. the control handshaking isn't always
1725  * under software control (pxa250c0 and the pxa255 are better), and delays
1726  * could cause usb protocol errors.
1727  */
1728 static irqreturn_t
1729 pxa25x_udc_irq(int irq, void *_dev)
1730 {
1731         struct pxa25x_udc       *dev = _dev;
1732         int                     handled;
1733
1734         dev->stats.irqs++;
1735         do {
1736                 u32             udccr = UDCCR;
1737
1738                 handled = 0;
1739
1740                 /* SUSpend Interrupt Request */
1741                 if (unlikely(udccr & UDCCR_SUSIR)) {
1742                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1743                         handled = 1;
1744                         DBG(DBG_VERBOSE, "USB suspend\n");
1745
1746                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1747                                         && dev->driver
1748                                         && dev->driver->suspend)
1749                                 dev->driver->suspend(&dev->gadget);
1750                         ep0_idle (dev);
1751                 }
1752
1753                 /* RESume Interrupt Request */
1754                 if (unlikely(udccr & UDCCR_RESIR)) {
1755                         udc_ack_int_UDCCR(UDCCR_RESIR);
1756                         handled = 1;
1757                         DBG(DBG_VERBOSE, "USB resume\n");
1758
1759                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1760                                         && dev->driver
1761                                         && dev->driver->resume)
1762                                 dev->driver->resume(&dev->gadget);
1763                 }
1764
1765                 /* ReSeT Interrupt Request - USB reset */
1766                 if (unlikely(udccr & UDCCR_RSTIR)) {
1767                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1768                         handled = 1;
1769
1770                         if ((UDCCR & UDCCR_UDA) == 0) {
1771                                 DBG(DBG_VERBOSE, "USB reset start\n");
1772
1773                                 /* reset driver and endpoints,
1774                                  * in case that's not yet done
1775                                  */
1776                                 stop_activity (dev, dev->driver);
1777
1778                         } else {
1779                                 DBG(DBG_VERBOSE, "USB reset end\n");
1780                                 dev->gadget.speed = USB_SPEED_FULL;
1781                                 memset(&dev->stats, 0, sizeof dev->stats);
1782                                 /* driver and endpoints are still reset */
1783                         }
1784
1785                 } else {
1786                         u32     usir0 = USIR0 & ~UICR0;
1787                         u32     usir1 = USIR1 & ~UICR1;
1788                         int     i;
1789
1790                         if (unlikely (!usir0 && !usir1))
1791                                 continue;
1792
1793                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1794
1795                         /* control traffic */
1796                         if (usir0 & USIR0_IR0) {
1797                                 dev->ep[0].pio_irqs++;
1798                                 handle_ep0(dev);
1799                                 handled = 1;
1800                         }
1801
1802                         /* endpoint data transfers */
1803                         for (i = 0; i < 8; i++) {
1804                                 u32     tmp = 1 << i;
1805
1806                                 if (i && (usir0 & tmp)) {
1807                                         handle_ep(&dev->ep[i]);
1808                                         USIR0 |= tmp;
1809                                         handled = 1;
1810                                 }
1811 #ifndef CONFIG_USB_PXA25X_SMALL
1812                                 if (usir1 & tmp) {
1813                                         handle_ep(&dev->ep[i+8]);
1814                                         USIR1 |= tmp;
1815                                         handled = 1;
1816                                 }
1817 #endif
1818                         }
1819                 }
1820
1821                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1822
1823         } while (handled);
1824         return IRQ_HANDLED;
1825 }
1826
1827 /*-------------------------------------------------------------------------*/
1828
1829 static void nop_release (struct device *dev)
1830 {
1831         DMSG("%s %s\n", __func__, dev_name(dev));
1832 }
1833
1834 /* this uses load-time allocation and initialization (instead of
1835  * doing it at run-time) to save code, eliminate fault paths, and
1836  * be more obviously correct.
1837  */
1838 static struct pxa25x_udc memory = {
1839         .gadget = {
1840                 .ops            = &pxa25x_udc_ops,
1841                 .ep0            = &memory.ep[0].ep,
1842                 .name           = driver_name,
1843                 .dev = {
1844                         .init_name      = "gadget",
1845                         .release        = nop_release,
1846                 },
1847         },
1848
1849         /* control endpoint */
1850         .ep[0] = {
1851                 .ep = {
1852                         .name           = ep0name,
1853                         .ops            = &pxa25x_ep_ops,
1854                         .maxpacket      = EP0_FIFO_SIZE,
1855                 },
1856                 .dev            = &memory,
1857                 .reg_udccs      = &UDCCS0,
1858                 .reg_uddr       = &UDDR0,
1859         },
1860
1861         /* first group of endpoints */
1862         .ep[1] = {
1863                 .ep = {
1864                         .name           = "ep1in-bulk",
1865                         .ops            = &pxa25x_ep_ops,
1866                         .maxpacket      = BULK_FIFO_SIZE,
1867                 },
1868                 .dev            = &memory,
1869                 .fifo_size      = BULK_FIFO_SIZE,
1870                 .bEndpointAddress = USB_DIR_IN | 1,
1871                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1872                 .reg_udccs      = &UDCCS1,
1873                 .reg_uddr       = &UDDR1,
1874         },
1875         .ep[2] = {
1876                 .ep = {
1877                         .name           = "ep2out-bulk",
1878                         .ops            = &pxa25x_ep_ops,
1879                         .maxpacket      = BULK_FIFO_SIZE,
1880                 },
1881                 .dev            = &memory,
1882                 .fifo_size      = BULK_FIFO_SIZE,
1883                 .bEndpointAddress = 2,
1884                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1885                 .reg_udccs      = &UDCCS2,
1886                 .reg_ubcr       = &UBCR2,
1887                 .reg_uddr       = &UDDR2,
1888         },
1889 #ifndef CONFIG_USB_PXA25X_SMALL
1890         .ep[3] = {
1891                 .ep = {
1892                         .name           = "ep3in-iso",
1893                         .ops            = &pxa25x_ep_ops,
1894                         .maxpacket      = ISO_FIFO_SIZE,
1895                 },
1896                 .dev            = &memory,
1897                 .fifo_size      = ISO_FIFO_SIZE,
1898                 .bEndpointAddress = USB_DIR_IN | 3,
1899                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1900                 .reg_udccs      = &UDCCS3,
1901                 .reg_uddr       = &UDDR3,
1902         },
1903         .ep[4] = {
1904                 .ep = {
1905                         .name           = "ep4out-iso",
1906                         .ops            = &pxa25x_ep_ops,
1907                         .maxpacket      = ISO_FIFO_SIZE,
1908                 },
1909                 .dev            = &memory,
1910                 .fifo_size      = ISO_FIFO_SIZE,
1911                 .bEndpointAddress = 4,
1912                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1913                 .reg_udccs      = &UDCCS4,
1914                 .reg_ubcr       = &UBCR4,
1915                 .reg_uddr       = &UDDR4,
1916         },
1917         .ep[5] = {
1918                 .ep = {
1919                         .name           = "ep5in-int",
1920                         .ops            = &pxa25x_ep_ops,
1921                         .maxpacket      = INT_FIFO_SIZE,
1922                 },
1923                 .dev            = &memory,
1924                 .fifo_size      = INT_FIFO_SIZE,
1925                 .bEndpointAddress = USB_DIR_IN | 5,
1926                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1927                 .reg_udccs      = &UDCCS5,
1928                 .reg_uddr       = &UDDR5,
1929         },
1930
1931         /* second group of endpoints */
1932         .ep[6] = {
1933                 .ep = {
1934                         .name           = "ep6in-bulk",
1935                         .ops            = &pxa25x_ep_ops,
1936                         .maxpacket      = BULK_FIFO_SIZE,
1937                 },
1938                 .dev            = &memory,
1939                 .fifo_size      = BULK_FIFO_SIZE,
1940                 .bEndpointAddress = USB_DIR_IN | 6,
1941                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1942                 .reg_udccs      = &UDCCS6,
1943                 .reg_uddr       = &UDDR6,
1944         },
1945         .ep[7] = {
1946                 .ep = {
1947                         .name           = "ep7out-bulk",
1948                         .ops            = &pxa25x_ep_ops,
1949                         .maxpacket      = BULK_FIFO_SIZE,
1950                 },
1951                 .dev            = &memory,
1952                 .fifo_size      = BULK_FIFO_SIZE,
1953                 .bEndpointAddress = 7,
1954                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1955                 .reg_udccs      = &UDCCS7,
1956                 .reg_ubcr       = &UBCR7,
1957                 .reg_uddr       = &UDDR7,
1958         },
1959         .ep[8] = {
1960                 .ep = {
1961                         .name           = "ep8in-iso",
1962                         .ops            = &pxa25x_ep_ops,
1963                         .maxpacket      = ISO_FIFO_SIZE,
1964                 },
1965                 .dev            = &memory,
1966                 .fifo_size      = ISO_FIFO_SIZE,
1967                 .bEndpointAddress = USB_DIR_IN | 8,
1968                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1969                 .reg_udccs      = &UDCCS8,
1970                 .reg_uddr       = &UDDR8,
1971         },
1972         .ep[9] = {
1973                 .ep = {
1974                         .name           = "ep9out-iso",
1975                         .ops            = &pxa25x_ep_ops,
1976                         .maxpacket      = ISO_FIFO_SIZE,
1977                 },
1978                 .dev            = &memory,
1979                 .fifo_size      = ISO_FIFO_SIZE,
1980                 .bEndpointAddress = 9,
1981                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1982                 .reg_udccs      = &UDCCS9,
1983                 .reg_ubcr       = &UBCR9,
1984                 .reg_uddr       = &UDDR9,
1985         },
1986         .ep[10] = {
1987                 .ep = {
1988                         .name           = "ep10in-int",
1989                         .ops            = &pxa25x_ep_ops,
1990                         .maxpacket      = INT_FIFO_SIZE,
1991                 },
1992                 .dev            = &memory,
1993                 .fifo_size      = INT_FIFO_SIZE,
1994                 .bEndpointAddress = USB_DIR_IN | 10,
1995                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1996                 .reg_udccs      = &UDCCS10,
1997                 .reg_uddr       = &UDDR10,
1998         },
1999
2000         /* third group of endpoints */
2001         .ep[11] = {
2002                 .ep = {
2003                         .name           = "ep11in-bulk",
2004                         .ops            = &pxa25x_ep_ops,
2005                         .maxpacket      = BULK_FIFO_SIZE,
2006                 },
2007                 .dev            = &memory,
2008                 .fifo_size      = BULK_FIFO_SIZE,
2009                 .bEndpointAddress = USB_DIR_IN | 11,
2010                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2011                 .reg_udccs      = &UDCCS11,
2012                 .reg_uddr       = &UDDR11,
2013         },
2014         .ep[12] = {
2015                 .ep = {
2016                         .name           = "ep12out-bulk",
2017                         .ops            = &pxa25x_ep_ops,
2018                         .maxpacket      = BULK_FIFO_SIZE,
2019                 },
2020                 .dev            = &memory,
2021                 .fifo_size      = BULK_FIFO_SIZE,
2022                 .bEndpointAddress = 12,
2023                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2024                 .reg_udccs      = &UDCCS12,
2025                 .reg_ubcr       = &UBCR12,
2026                 .reg_uddr       = &UDDR12,
2027         },
2028         .ep[13] = {
2029                 .ep = {
2030                         .name           = "ep13in-iso",
2031                         .ops            = &pxa25x_ep_ops,
2032                         .maxpacket      = ISO_FIFO_SIZE,
2033                 },
2034                 .dev            = &memory,
2035                 .fifo_size      = ISO_FIFO_SIZE,
2036                 .bEndpointAddress = USB_DIR_IN | 13,
2037                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2038                 .reg_udccs      = &UDCCS13,
2039                 .reg_uddr       = &UDDR13,
2040         },
2041         .ep[14] = {
2042                 .ep = {
2043                         .name           = "ep14out-iso",
2044                         .ops            = &pxa25x_ep_ops,
2045                         .maxpacket      = ISO_FIFO_SIZE,
2046                 },
2047                 .dev            = &memory,
2048                 .fifo_size      = ISO_FIFO_SIZE,
2049                 .bEndpointAddress = 14,
2050                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2051                 .reg_udccs      = &UDCCS14,
2052                 .reg_ubcr       = &UBCR14,
2053                 .reg_uddr       = &UDDR14,
2054         },
2055         .ep[15] = {
2056                 .ep = {
2057                         .name           = "ep15in-int",
2058                         .ops            = &pxa25x_ep_ops,
2059                         .maxpacket      = INT_FIFO_SIZE,
2060                 },
2061                 .dev            = &memory,
2062                 .fifo_size      = INT_FIFO_SIZE,
2063                 .bEndpointAddress = USB_DIR_IN | 15,
2064                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2065                 .reg_udccs      = &UDCCS15,
2066                 .reg_uddr       = &UDDR15,
2067         },
2068 #endif /* !CONFIG_USB_PXA25X_SMALL */
2069 };
2070
2071 #define CP15R0_VENDOR_MASK      0xffffe000
2072
2073 #if     defined(CONFIG_ARCH_PXA)
2074 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2075
2076 #elif   defined(CONFIG_ARCH_IXP4XX)
2077 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2078
2079 #endif
2080
2081 #define CP15R0_PROD_MASK        0x000003f0
2082 #define PXA25x                  0x00000100      /* and PXA26x */
2083 #define PXA210                  0x00000120
2084
2085 #define CP15R0_REV_MASK         0x0000000f
2086
2087 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2088
2089 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2090 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2091 #define PXA250_B2               0x00000104
2092 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2093 #define PXA250_B0               0x00000102
2094 #define PXA250_A1               0x00000101
2095 #define PXA250_A0               0x00000100
2096
2097 #define PXA210_C0               0x00000125
2098 #define PXA210_B2               0x00000124
2099 #define PXA210_B1               0x00000123
2100 #define PXA210_B0               0x00000122
2101 #define IXP425_A0               0x000001c1
2102 #define IXP425_B0               0x000001f1
2103 #define IXP465_AD               0x00000200
2104
2105 /*
2106  *      probe - binds to the platform device
2107  */
2108 static int __init pxa25x_udc_probe(struct platform_device *pdev)
2109 {
2110         struct pxa25x_udc *dev = &memory;
2111         int retval, irq;
2112         u32 chiprev;
2113
2114         /* insist on Intel/ARM/XScale */
2115         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2116         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2117                 pr_err("%s: not XScale!\n", driver_name);
2118                 return -ENODEV;
2119         }
2120
2121         /* trigger chiprev-specific logic */
2122         switch (chiprev & CP15R0_PRODREV_MASK) {
2123 #if     defined(CONFIG_ARCH_PXA)
2124         case PXA255_A0:
2125                 dev->has_cfr = 1;
2126                 break;
2127         case PXA250_A0:
2128         case PXA250_A1:
2129                 /* A0/A1 "not released"; ep 13, 15 unusable */
2130                 /* fall through */
2131         case PXA250_B2: case PXA210_B2:
2132         case PXA250_B1: case PXA210_B1:
2133         case PXA250_B0: case PXA210_B0:
2134                 /* OUT-DMA is broken ... */
2135                 /* fall through */
2136         case PXA250_C0: case PXA210_C0:
2137                 break;
2138 #elif   defined(CONFIG_ARCH_IXP4XX)
2139         case IXP425_A0:
2140         case IXP425_B0:
2141         case IXP465_AD:
2142                 dev->has_cfr = 1;
2143                 break;
2144 #endif
2145         default:
2146                 pr_err("%s: unrecognized processor: %08x\n",
2147                         driver_name, chiprev);
2148                 /* iop3xx, ixp4xx, ... */
2149                 return -ENODEV;
2150         }
2151
2152         irq = platform_get_irq(pdev, 0);
2153         if (irq < 0)
2154                 return -ENODEV;
2155
2156         dev->clk = clk_get(&pdev->dev, NULL);
2157         if (IS_ERR(dev->clk)) {
2158                 retval = PTR_ERR(dev->clk);
2159                 goto err_clk;
2160         }
2161
2162         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2163                 dev->has_cfr ? "" : " (!cfr)",
2164                 SIZE_STR "(pio)"
2165                 );
2166
2167         /* other non-static parts of init */
2168         dev->dev = &pdev->dev;
2169         dev->mach = pdev->dev.platform_data;
2170
2171         dev->transceiver = otg_get_transceiver();
2172
2173         if (gpio_is_valid(dev->mach->gpio_pullup)) {
2174                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2175                                 "pca25x_udc GPIO PULLUP"))) {
2176                         dev_dbg(&pdev->dev,
2177                                 "can't get pullup gpio %d, err: %d\n",
2178                                 dev->mach->gpio_pullup, retval);
2179                         goto err_gpio_pullup;
2180                 }
2181                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2182         }
2183
2184         init_timer(&dev->timer);
2185         dev->timer.function = udc_watchdog;
2186         dev->timer.data = (unsigned long) dev;
2187
2188         device_initialize(&dev->gadget.dev);
2189         dev->gadget.dev.parent = &pdev->dev;
2190         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2191
2192         the_controller = dev;
2193         platform_set_drvdata(pdev, dev);
2194
2195         udc_disable(dev);
2196         udc_reinit(dev);
2197
2198         dev->vbus = 0;
2199
2200         /* irq setup after old hardware state is cleaned up */
2201         retval = request_irq(irq, pxa25x_udc_irq,
2202                         IRQF_DISABLED, driver_name, dev);
2203         if (retval != 0) {
2204                 pr_err("%s: can't get irq %d, err %d\n",
2205                         driver_name, irq, retval);
2206                 goto err_irq1;
2207         }
2208         dev->got_irq = 1;
2209
2210 #ifdef CONFIG_ARCH_LUBBOCK
2211         if (machine_is_lubbock()) {
2212                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2213                                 lubbock_vbus_irq,
2214                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2215                                 driver_name, dev);
2216                 if (retval != 0) {
2217                         pr_err("%s: can't get irq %i, err %d\n",
2218                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2219                         goto err_irq_lub;
2220                 }
2221                 retval = request_irq(LUBBOCK_USB_IRQ,
2222                                 lubbock_vbus_irq,
2223                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2224                                 driver_name, dev);
2225                 if (retval != 0) {
2226                         pr_err("%s: can't get irq %i, err %d\n",
2227                                 driver_name, LUBBOCK_USB_IRQ, retval);
2228                         goto lubbock_fail0;
2229                 }
2230         } else
2231 #endif
2232         create_debug_files(dev);
2233
2234         return 0;
2235
2236 #ifdef  CONFIG_ARCH_LUBBOCK
2237 lubbock_fail0:
2238         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2239  err_irq_lub:
2240         free_irq(irq, dev);
2241 #endif
2242  err_irq1:
2243         if (gpio_is_valid(dev->mach->gpio_pullup))
2244                 gpio_free(dev->mach->gpio_pullup);
2245  err_gpio_pullup:
2246         if (dev->transceiver) {
2247                 otg_put_transceiver(dev->transceiver);
2248                 dev->transceiver = NULL;
2249         }
2250         clk_put(dev->clk);
2251  err_clk:
2252         return retval;
2253 }
2254
2255 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2256 {
2257         pullup_off();
2258 }
2259
2260 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
2261 {
2262         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2263
2264         if (dev->driver)
2265                 return -EBUSY;
2266
2267         dev->pullup = 0;
2268         pullup(dev);
2269
2270         remove_debug_files(dev);
2271
2272         if (dev->got_irq) {
2273                 free_irq(platform_get_irq(pdev, 0), dev);
2274                 dev->got_irq = 0;
2275         }
2276 #ifdef CONFIG_ARCH_LUBBOCK
2277         if (machine_is_lubbock()) {
2278                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2279                 free_irq(LUBBOCK_USB_IRQ, dev);
2280         }
2281 #endif
2282         if (gpio_is_valid(dev->mach->gpio_pullup))
2283                 gpio_free(dev->mach->gpio_pullup);
2284
2285         clk_put(dev->clk);
2286
2287         if (dev->transceiver) {
2288                 otg_put_transceiver(dev->transceiver);
2289                 dev->transceiver = NULL;
2290         }
2291
2292         platform_set_drvdata(pdev, NULL);
2293         the_controller = NULL;
2294         return 0;
2295 }
2296
2297 /*-------------------------------------------------------------------------*/
2298
2299 #ifdef  CONFIG_PM
2300
2301 /* USB suspend (controlled by the host) and system suspend (controlled
2302  * by the PXA) don't necessarily work well together.  If USB is active,
2303  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2304  * mode, or any deeper PM saving state.
2305  *
2306  * For now, we punt and forcibly disconnect from the USB host when PXA
2307  * enters any suspend state.  While we're disconnected, we always disable
2308  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2309  * Boards without software pullup control shouldn't use those states.
2310  * VBUS IRQs should probably be ignored so that the PXA device just acts
2311  * "dead" to USB hosts until system resume.
2312  */
2313 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2314 {
2315         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2316         unsigned long flags;
2317
2318         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2319                 WARNING("USB host won't detect disconnect!\n");
2320         udc->suspended = 1;
2321
2322         local_irq_save(flags);
2323         pullup(udc);
2324         local_irq_restore(flags);
2325
2326         return 0;
2327 }
2328
2329 static int pxa25x_udc_resume(struct platform_device *dev)
2330 {
2331         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2332         unsigned long flags;
2333
2334         udc->suspended = 0;
2335         local_irq_save(flags);
2336         pullup(udc);
2337         local_irq_restore(flags);
2338
2339         return 0;
2340 }
2341
2342 #else
2343 #define pxa25x_udc_suspend      NULL
2344 #define pxa25x_udc_resume       NULL
2345 #endif
2346
2347 /*-------------------------------------------------------------------------*/
2348
2349 static struct platform_driver udc_driver = {
2350         .shutdown       = pxa25x_udc_shutdown,
2351         .remove         = __exit_p(pxa25x_udc_remove),
2352         .suspend        = pxa25x_udc_suspend,
2353         .resume         = pxa25x_udc_resume,
2354         .driver         = {
2355                 .owner  = THIS_MODULE,
2356                 .name   = "pxa25x-udc",
2357         },
2358 };
2359
2360 static int __init udc_init(void)
2361 {
2362         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2363         return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
2364 }
2365 module_init(udc_init);
2366
2367 static void __exit udc_exit(void)
2368 {
2369         platform_driver_unregister(&udc_driver);
2370 }
2371 module_exit(udc_exit);
2372
2373 MODULE_DESCRIPTION(DRIVER_DESC);
2374 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2375 MODULE_LICENSE("GPL");
2376 MODULE_ALIAS("platform:pxa25x-udc");