drivers/usb/gadget/omap_udc.c

   1 /*
   2  * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  * Copyright (C) 2004-2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #undef  DEBUG
  23 #undef  VERBOSE
  24
  25 #include <linux/module.h>
  26 #include <linux/kernel.h>
  27 #include <linux/ioport.h>
  28 #include <linux/types.h>
  29 #include <linux/errno.h>
  30 #include <linux/delay.h>
  31 #include <linux/sched.h>
  32 #include <linux/slab.h>
  33 #include <linux/init.h>
  34 #include <linux/timer.h>
  35 #include <linux/list.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/proc_fs.h>
  38 #include <linux/mm.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/platform_device.h>
  41 #include <linux/usb_ch9.h>
  42 #include <linux/usb_gadget.h>
  43 #include <linux/usb/otg.h>
  44 #include <linux/dma-mapping.h>
  45
  46 #include <asm/byteorder.h>
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/system.h>
  50 #include <asm/unaligned.h>
  51 #include <asm/mach-types.h>
  52
  53 #include <asm/arch/dma.h>
  54 #include <asm/arch/usb.h>
  55
  56 #include "omap_udc.h"
  57
  58 #undef  USB_TRACE
  59
  60 /* bulk DMA seems to be behaving for both IN and OUT */
  61 #define USE_DMA
  62
  63 /* ISO too */
  64 #define USE_ISO
  65
  66 #define DRIVER_DESC     "OMAP UDC driver"
  67 #define DRIVER_VERSION  "4 October 2004"
  68
  69 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  70
  71
  72 /*
  73  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  74  * D+ pullup to allow enumeration.  That's too early for the gadget
  75  * framework to use from usb_endpoint_enable(), which happens after
  76  * enumeration as part of activating an interface.  (But if we add an
  77  * optional new "UDC not yet running" state to the gadget driver model,
  78  * even just during driver binding, the endpoint autoconfig logic is the
  79  * natural spot to manufacture new endpoints.)
  80  *
  81  * So instead of using endpoint enable calls to control the hardware setup,
  82  * this driver defines a "fifo mode" parameter.  It's used during driver
  83  * initialization to choose among a set of pre-defined endpoint configs.
  84  * See omap_udc_setup() for available modes, or to add others.  That code
  85  * lives in an init section, so use this driver as a module if you need
  86  * to change the fifo mode after the kernel boots.
  87  *
  88  * Gadget drivers normally ignore endpoints they don't care about, and
  89  * won't include them in configuration descriptors.  That means only
  90  * misbehaving hosts would even notice they exist.
  91  */
  92 #ifdef  USE_ISO
  93 static unsigned fifo_mode = 3;
  94 #else
  95 static unsigned fifo_mode = 0;
  96 #endif
  97
  98 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
  99  * boot parameter "omap_udc:fifo_mode=42"
 100  */
 101 module_param (fifo_mode, uint, 0);
 102 MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
 103
 104 #ifdef  USE_DMA
 105 static unsigned use_dma = 1;
 106
 107 /* "modprobe omap_udc use_dma=y", or else as a kernel
 108  * boot parameter "omap_udc:use_dma=y"
 109  */
 110 module_param (use_dma, bool, 0);
 111 MODULE_PARM_DESC (use_dma, "enable/disable DMA");
 112 #else   /* !USE_DMA */
 113
 114 /* save a bit of code */
 115 #define use_dma         0
 116 #endif  /* !USE_DMA */
 117
 118
 119 static const char driver_name [] = "omap_udc";
 120 static const char driver_desc [] = DRIVER_DESC;
 121
 122 /*-------------------------------------------------------------------------*/
 123
 124 /* there's a notion of "current endpoint" for modifying endpoint
 125  * state, and PIO access to its FIFO.
 126  */
 127
 128 static void use_ep(struct omap_ep *ep, u16 select)
 129 {
 130         u16     num = ep->bEndpointAddress & 0x0f;
 131
 132         if (ep->bEndpointAddress & USB_DIR_IN)
 133                 num |= UDC_EP_DIR;
 134         UDC_EP_NUM_REG = num | select;
 135         /* when select, MUST deselect later !! */
 136 }
 137
 138 static inline void deselect_ep(void)
 139 {
 140         UDC_EP_NUM_REG &= ~UDC_EP_SEL;
 141         /* 6 wait states before TX will happen */
 142 }
 143
 144 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
 145
 146 /*-------------------------------------------------------------------------*/
 147
 148 static int omap_ep_enable(struct usb_ep *_ep,
 149                 const struct usb_endpoint_descriptor *desc)
 150 {
 151         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 152         struct omap_udc *udc;
 153         unsigned long   flags;
 154         u16             maxp;
 155
 156         /* catch various bogus parameters */
 157         if (!_ep || !desc || ep->desc
 158                         || desc->bDescriptorType != USB_DT_ENDPOINT
 159                         || ep->bEndpointAddress != desc->bEndpointAddress
 160                         || ep->maxpacket < le16_to_cpu
 161                                                 (desc->wMaxPacketSize)) {
 162                 DBG("%s, bad ep or descriptor\n", __FUNCTION__);
 163                 return -EINVAL;
 164         }
 165         maxp = le16_to_cpu (desc->wMaxPacketSize);
 166         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 167                                 && maxp != ep->maxpacket)
 168                         || le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket
 169                         || !desc->wMaxPacketSize) {
 170                 DBG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
 171                 return -ERANGE;
 172         }
 173
 174 #ifdef  USE_ISO
 175         if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
 176                                 && desc->bInterval != 1)) {
 177                 /* hardware wants period = 1; USB allows 2^(Interval-1) */
 178                 DBG("%s, unsupported ISO period %dms\n", _ep->name,
 179                                 1 << (desc->bInterval - 1));
 180                 return -EDOM;
 181         }
 182 #else
 183         if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 184                 DBG("%s, ISO nyet\n", _ep->name);
 185                 return -EDOM;
 186         }
 187 #endif
 188
 189         /* xfer types must match, except that interrupt ~= bulk */
 190         if (ep->bmAttributes != desc->bmAttributes
 191                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 192                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 193                 DBG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
 194                 return -EINVAL;
 195         }
 196
 197         udc = ep->udc;
 198         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
 199                 DBG("%s, bogus device state\n", __FUNCTION__);
 200                 return -ESHUTDOWN;
 201         }
 202
 203         spin_lock_irqsave(&udc->lock, flags);
 204
 205         ep->desc = desc;
 206         ep->irqs = 0;
 207         ep->stopped = 0;
 208         ep->ep.maxpacket = maxp;
 209
 210         /* set endpoint to initial state */
 211         ep->dma_channel = 0;
 212         ep->has_dma = 0;
 213         ep->lch = -1;
 214         use_ep(ep, UDC_EP_SEL);
 215         UDC_CTRL_REG = udc->clr_halt;
 216         ep->ackwait = 0;
 217         deselect_ep();
 218
 219         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 220                 list_add(&ep->iso, &udc->iso);
 221
 222         /* maybe assign a DMA channel to this endpoint */
 223         if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK)
 224                 /* FIXME ISO can dma, but prefers first channel */
 225                 dma_channel_claim(ep, 0);
 226
 227         /* PIO OUT may RX packets */
 228         if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
 229                         && !ep->has_dma
 230                         && !(ep->bEndpointAddress & USB_DIR_IN)) {
 231                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 232                 ep->ackwait = 1 + ep->double_buf;
 233         }
 234
 235         spin_unlock_irqrestore(&udc->lock, flags);
 236         VDBG("%s enabled\n", _ep->name);
 237         return 0;
 238 }
 239
 240 static void nuke(struct omap_ep *, int status);
 241
 242 static int omap_ep_disable(struct usb_ep *_ep)
 243 {
 244         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 245         unsigned long   flags;
 246
 247         if (!_ep || !ep->desc) {
 248                 DBG("%s, %s not enabled\n", __FUNCTION__,
 249                         _ep ? ep->ep.name : NULL);
 250                 return -EINVAL;
 251         }
 252
 253         spin_lock_irqsave(&ep->udc->lock, flags);
 254         ep->desc = NULL;
 255         nuke (ep, -ESHUTDOWN);
 256         ep->ep.maxpacket = ep->maxpacket;
 257         ep->has_dma = 0;
 258         UDC_CTRL_REG = UDC_SET_HALT;
 259         list_del_init(&ep->iso);
 260         del_timer(&ep->timer);
 261
 262         spin_unlock_irqrestore(&ep->udc->lock, flags);
 263
 264         VDBG("%s disabled\n", _ep->name);
 265         return 0;
 266 }
 267
 268 /*-------------------------------------------------------------------------*/
 269
 270 static struct usb_request *
 271 omap_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
 272 {
 273         struct omap_req *req;
 274
 275         req = kzalloc(sizeof(*req), gfp_flags);
 276         if (req) {
 277                 req->req.dma = DMA_ADDR_INVALID;
 278                 INIT_LIST_HEAD (&req->queue);
 279         }
 280         return &req->req;
 281 }
 282
 283 static void
 284 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
 285 {
 286         struct omap_req *req = container_of(_req, struct omap_req, req);
 287
 288         if (_req)
 289                 kfree (req);
 290 }
 291
 292 /*-------------------------------------------------------------------------*/
 293
 294 static void *
 295 omap_alloc_buffer(
 296         struct usb_ep   *_ep,
 297         unsigned        bytes,
 298         dma_addr_t      *dma,
 299         gfp_t           gfp_flags
 300 )
 301 {
 302         void            *retval;
 303         struct omap_ep  *ep;
 304
 305         ep = container_of(_ep, struct omap_ep, ep);
 306         if (use_dma && ep->has_dma) {
 307                 static int      warned;
 308                 if (!warned && bytes < PAGE_SIZE) {
 309                         dev_warn(ep->udc->gadget.dev.parent,
 310                                 "using dma_alloc_coherent for "
 311                                 "small allocations wastes memory\n");
 312                         warned++;
 313                 }
 314                 return dma_alloc_coherent(ep->udc->gadget.dev.parent,
 315                                 bytes, dma, gfp_flags);
 316         }
 317
 318         retval = kmalloc(bytes, gfp_flags);
 319         if (retval)
 320                 *dma = virt_to_phys(retval);
 321         return retval;
 322 }
 323
 324 static void omap_free_buffer(
 325         struct usb_ep   *_ep,
 326         void            *buf,
 327         dma_addr_t      dma,
 328         unsigned        bytes
 329 )
 330 {
 331         struct omap_ep  *ep;
 332
 333         ep = container_of(_ep, struct omap_ep, ep);
 334         if (use_dma && _ep && ep->has_dma)
 335                 dma_free_coherent(ep->udc->gadget.dev.parent, bytes, buf, dma);
 336         else
 337                 kfree (buf);
 338 }
 339
 340 /*-------------------------------------------------------------------------*/
 341
 342 static void
 343 done(struct omap_ep *ep, struct omap_req *req, int status)
 344 {
 345         unsigned                stopped = ep->stopped;
 346
 347         list_del_init(&req->queue);
 348
 349         if (req->req.status == -EINPROGRESS)
 350                 req->req.status = status;
 351         else
 352                 status = req->req.status;
 353
 354         if (use_dma && ep->has_dma) {
 355                 if (req->mapped) {
 356                         dma_unmap_single(ep->udc->gadget.dev.parent,
 357                                 req->req.dma, req->req.length,
 358                                 (ep->bEndpointAddress & USB_DIR_IN)
 359                                         ? DMA_TO_DEVICE
 360                                         : DMA_FROM_DEVICE);
 361                         req->req.dma = DMA_ADDR_INVALID;
 362                         req->mapped = 0;
 363                 } else
 364                         dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 365                                 req->req.dma, req->req.length,
 366                                 (ep->bEndpointAddress & USB_DIR_IN)
 367                                         ? DMA_TO_DEVICE
 368                                         : DMA_FROM_DEVICE);
 369         }
 370
 371 #ifndef USB_TRACE
 372         if (status && status != -ESHUTDOWN)
 373 #endif
 374                 VDBG("complete %s req %p stat %d len %u/%u\n",
 375                         ep->ep.name, &req->req, status,
 376                         req->req.actual, req->req.length);
 377
 378         /* don't modify queue heads during completion callback */
 379         ep->stopped = 1;
 380         spin_unlock(&ep->udc->lock);
 381         req->req.complete(&ep->ep, &req->req);
 382         spin_lock(&ep->udc->lock);
 383         ep->stopped = stopped;
 384 }
 385
 386 /*-------------------------------------------------------------------------*/
 387
 388 #define UDC_FIFO_FULL           (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
 389 #define UDC_FIFO_UNWRITABLE     (UDC_EP_HALTED | UDC_FIFO_FULL)
 390
 391 #define FIFO_EMPTY      (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
 392 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
 393
 394 static inline int
 395 write_packet(u8 *buf, struct omap_req *req, unsigned max)
 396 {
 397         unsigned        len;
 398         u16             *wp;
 399
 400         len = min(req->req.length - req->req.actual, max);
 401         req->req.actual += len;
 402
 403         max = len;
 404         if (likely((((int)buf) & 1) == 0)) {
 405                 wp = (u16 *)buf;
 406                 while (max >= 2) {
 407                         UDC_DATA_REG = *wp++;
 408                         max -= 2;
 409                 }
 410                 buf = (u8 *)wp;
 411         }
 412         while (max--)
 413                 *(volatile u8 *)&UDC_DATA_REG = *buf++;
 414         return len;
 415 }
 416
 417 // FIXME change r/w fifo calling convention
 418
 419
 420 // return:  0 = still running, 1 = completed, negative = errno
 421 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
 422 {
 423         u8              *buf;
 424         unsigned        count;
 425         int             is_last;
 426         u16             ep_stat;
 427
 428         buf = req->req.buf + req->req.actual;
 429         prefetch(buf);
 430
 431         /* PIO-IN isn't double buffered except for iso */
 432         ep_stat = UDC_STAT_FLG_REG;
 433         if (ep_stat & UDC_FIFO_UNWRITABLE)
 434                 return 0;
 435
 436         count = ep->ep.maxpacket;
 437         count = write_packet(buf, req, count);
 438         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 439         ep->ackwait = 1;
 440
 441         /* last packet is often short (sometimes a zlp) */
 442         if (count != ep->ep.maxpacket)
 443                 is_last = 1;
 444         else if (req->req.length == req->req.actual
 445                         && !req->req.zero)
 446                 is_last = 1;
 447         else
 448                 is_last = 0;
 449
 450         /* NOTE:  requests complete when all IN data is in a
 451          * FIFO (or sometimes later, if a zlp was needed).
 452          * Use usb_ep_fifo_status() where needed.
 453          */
 454         if (is_last)
 455                 done(ep, req, 0);
 456         return is_last;
 457 }
 458
 459 static inline int
 460 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
 461 {
 462         unsigned        len;
 463         u16             *wp;
 464
 465         len = min(req->req.length - req->req.actual, avail);
 466         req->req.actual += len;
 467         avail = len;
 468
 469         if (likely((((int)buf) & 1) == 0)) {
 470                 wp = (u16 *)buf;
 471                 while (avail >= 2) {
 472                         *wp++ = UDC_DATA_REG;
 473                         avail -= 2;
 474                 }
 475                 buf = (u8 *)wp;
 476         }
 477         while (avail--)
 478                 *buf++ = *(volatile u8 *)&UDC_DATA_REG;
 479         return len;
 480 }
 481
 482 // return:  0 = still running, 1 = queue empty, negative = errno
 483 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
 484 {
 485         u8              *buf;
 486         unsigned        count, avail;
 487         int             is_last;
 488
 489         buf = req->req.buf + req->req.actual;
 490         prefetchw(buf);
 491
 492         for (;;) {
 493                 u16     ep_stat = UDC_STAT_FLG_REG;
 494
 495                 is_last = 0;
 496                 if (ep_stat & FIFO_EMPTY) {
 497                         if (!ep->double_buf)
 498                                 break;
 499                         ep->fnf = 1;
 500                 }
 501                 if (ep_stat & UDC_EP_HALTED)
 502                         break;
 503
 504                 if (ep_stat & UDC_FIFO_FULL)
 505                         avail = ep->ep.maxpacket;
 506                 else  {
 507                         avail = UDC_RXFSTAT_REG;
 508                         ep->fnf = ep->double_buf;
 509                 }
 510                 count = read_packet(buf, req, avail);
 511
 512                 /* partial packet reads may not be errors */
 513                 if (count < ep->ep.maxpacket) {
 514                         is_last = 1;
 515                         /* overflowed this request?  flush extra data */
 516                         if (count != avail) {
 517                                 req->req.status = -EOVERFLOW;
 518                                 avail -= count;
 519                                 while (avail--)
 520                                         (void) *(volatile u8 *)&UDC_DATA_REG;
 521                         }
 522                 } else if (req->req.length == req->req.actual)
 523                         is_last = 1;
 524                 else
 525                         is_last = 0;
 526
 527                 if (!ep->bEndpointAddress)
 528                         break;
 529                 if (is_last)
 530                         done(ep, req, 0);
 531                 break;
 532         }
 533         return is_last;
 534 }
 535
 536 /*-------------------------------------------------------------------------*/
 537
 538 static inline dma_addr_t dma_csac(unsigned lch)
 539 {
 540         dma_addr_t      csac;
 541
 542         /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 543          * read before the DMA controller finished disabling the channel.
 544          */
 545         csac = omap_readw(OMAP_DMA_CSAC(lch));
 546         if (csac == 0)
 547                 csac = omap_readw(OMAP_DMA_CSAC(lch));
 548         return csac;
 549 }
 550
 551 static inline dma_addr_t dma_cdac(unsigned lch)
 552 {
 553         dma_addr_t      cdac;
 554
 555         /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 556          * read before the DMA controller finished disabling the channel.
 557          */
 558         cdac = omap_readw(OMAP_DMA_CDAC(lch));
 559         if (cdac == 0)
 560                 cdac = omap_readw(OMAP_DMA_CDAC(lch));
 561         return cdac;
 562 }
 563
 564 static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
 565 {
 566         dma_addr_t      end;
 567
 568         /* IN-DMA needs this on fault/cancel paths, so 15xx misreports
 569          * the last transfer's bytecount by more than a FIFO's worth.
 570          */
 571         if (cpu_is_omap15xx())
 572                 return 0;
 573
 574         end = dma_csac(ep->lch);
 575         if (end == ep->dma_counter)
 576                 return 0;
 577
 578         end |= start & (0xffff << 16);
 579         if (end < start)
 580                 end += 0x10000;
 581         return end - start;
 582 }
 583
 584 #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
 585                 ? omap_readw(OMAP_DMA_CSAC(x)) /* really: CPC */ \
 586                 : dma_cdac(x))
 587
 588 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
 589 {
 590         dma_addr_t      end;
 591
 592         end = DMA_DEST_LAST(ep->lch);
 593         if (end == ep->dma_counter)
 594                 return 0;
 595
 596         end |= start & (0xffff << 16);
 597         if (cpu_is_omap15xx())
 598                 end++;
 599         if (end < start)
 600                 end += 0x10000;
 601         return end - start;
 602 }
 603
 604
 605 /* Each USB transfer request using DMA maps to one or more DMA transfers.
 606  * When DMA completion isn't request completion, the UDC continues with
 607  * the next DMA transfer for that USB transfer.
 608  */
 609
 610 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
 611 {
 612         u16             txdma_ctrl;
 613         unsigned        length = req->req.length - req->req.actual;
 614         const int       sync_mode = cpu_is_omap15xx()
 615                                 ? OMAP_DMA_SYNC_FRAME
 616                                 : OMAP_DMA_SYNC_ELEMENT;
 617
 618         /* measure length in either bytes or packets */
 619         if ((cpu_is_omap16xx() && length <= UDC_TXN_TSC)
 620                         || (cpu_is_omap15xx() && length < ep->maxpacket)) {
 621                 txdma_ctrl = UDC_TXN_EOT | length;
 622                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 623                                 length, 1, sync_mode);
 624         } else {
 625                 length = min(length / ep->maxpacket,
 626                                 (unsigned) UDC_TXN_TSC + 1);
 627                 txdma_ctrl = length;
 628                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
 629                                 ep->ep.maxpacket >> 1, length, sync_mode);
 630                 length *= ep->maxpacket;
 631         }
 632         omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 633                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 634
 635         omap_start_dma(ep->lch);
 636         ep->dma_counter = dma_csac(ep->lch);
 637         UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel);
 638         UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl;
 639         req->dma_bytes = length;
 640 }
 641
 642 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
 643 {
 644         if (status == 0) {
 645                 req->req.actual += req->dma_bytes;
 646
 647                 /* return if this request needs to send data or zlp */
 648                 if (req->req.actual < req->req.length)
 649                         return;
 650                 if (req->req.zero
 651                                 && req->dma_bytes != 0
 652                                 && (req->req.actual % ep->maxpacket) == 0)
 653                         return;
 654         } else
 655                 req->req.actual += dma_src_len(ep, req->req.dma
 656                                                         + req->req.actual);
 657
 658         /* tx completion */
 659         omap_stop_dma(ep->lch);
 660         UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel);
 661         done(ep, req, status);
 662 }
 663
 664 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
 665 {
 666         unsigned packets;
 667
 668         /* NOTE:  we filtered out "short reads" before, so we know
 669          * the buffer has only whole numbers of packets.
 670          */
 671
 672         /* set up this DMA transfer, enable the fifo, start */
 673         packets = (req->req.length - req->req.actual) / ep->ep.maxpacket;
 674         packets = min(packets, (unsigned)UDC_RXN_TC + 1);
 675         req->dma_bytes = packets * ep->ep.maxpacket;
 676         omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
 677                         ep->ep.maxpacket >> 1, packets,
 678                         OMAP_DMA_SYNC_ELEMENT);
 679         omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 680                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 681         ep->dma_counter = DMA_DEST_LAST(ep->lch);
 682
 683         UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
 684         UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel);
 685         UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf);
 686         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 687
 688         omap_start_dma(ep->lch);
 689 }
 690
 691 static void
 692 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
 693 {
 694         u16     count;
 695
 696         if (status == 0)
 697                 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
 698         count = dma_dest_len(ep, req->req.dma + req->req.actual);
 699         count += req->req.actual;
 700         if (one)
 701                 count--;
 702         if (count <= req->req.length)
 703                 req->req.actual = count;
 704
 705         if (count != req->dma_bytes || status)
 706                 omap_stop_dma(ep->lch);
 707
 708         /* if this wasn't short, request may need another transfer */
 709         else if (req->req.actual < req->req.length)
 710                 return;
 711
 712         /* rx completion */
 713         UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel);
 714         done(ep, req, status);
 715 }
 716
 717 static void dma_irq(struct omap_udc *udc, u16 irq_src)
 718 {
 719         u16             dman_stat = UDC_DMAN_STAT_REG;
 720         struct omap_ep  *ep;
 721         struct omap_req *req;
 722
 723         /* IN dma: tx to host */
 724         if (irq_src & UDC_TXN_DONE) {
 725                 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
 726                 ep->irqs++;
 727                 /* can see TXN_DONE after dma abort */
 728                 if (!list_empty(&ep->queue)) {
 729                         req = container_of(ep->queue.next,
 730                                                 struct omap_req, queue);
 731                         finish_in_dma(ep, req, 0);
 732                 }
 733                 UDC_IRQ_SRC_REG = UDC_TXN_DONE;
 734
 735                 if (!list_empty (&ep->queue)) {
 736                         req = container_of(ep->queue.next,
 737                                         struct omap_req, queue);
 738                         next_in_dma(ep, req);
 739                 }
 740         }
 741
 742         /* OUT dma: rx from host */
 743         if (irq_src & UDC_RXN_EOT) {
 744                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 745                 ep->irqs++;
 746                 /* can see RXN_EOT after dma abort */
 747                 if (!list_empty(&ep->queue)) {
 748                         req = container_of(ep->queue.next,
 749                                         struct omap_req, queue);
 750                         finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB);
 751                 }
 752                 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
 753
 754                 if (!list_empty (&ep->queue)) {
 755                         req = container_of(ep->queue.next,
 756                                         struct omap_req, queue);
 757                         next_out_dma(ep, req);
 758                 }
 759         }
 760
 761         if (irq_src & UDC_RXN_CNT) {
 762                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 763                 ep->irqs++;
 764                 /* omap15xx does this unasked... */
 765                 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
 766                 UDC_IRQ_SRC_REG = UDC_RXN_CNT;
 767         }
 768 }
 769
 770 static void dma_error(int lch, u16 ch_status, void *data)
 771 {
 772         struct omap_ep  *ep = data;
 773
 774         /* if ch_status & OMAP_DMA_DROP_IRQ ... */
 775         /* if ch_status & OMAP1_DMA_TOUT_IRQ ... */
 776         ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
 777
 778         /* complete current transfer ... */
 779 }
 780
 781 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 782 {
 783         u16     reg;
 784         int     status, restart, is_in;
 785
 786         is_in = ep->bEndpointAddress & USB_DIR_IN;
 787         if (is_in)
 788                 reg = UDC_TXDMA_CFG_REG;
 789         else
 790                 reg = UDC_RXDMA_CFG_REG;
 791         reg |= UDC_DMA_REQ;             /* "pulse" activated */
 792
 793         ep->dma_channel = 0;
 794         ep->lch = -1;
 795         if (channel == 0 || channel > 3) {
 796                 if ((reg & 0x0f00) == 0)
 797                         channel = 3;
 798                 else if ((reg & 0x00f0) == 0)
 799                         channel = 2;
 800                 else if ((reg & 0x000f) == 0)   /* preferred for ISO */
 801                         channel = 1;
 802                 else {
 803                         status = -EMLINK;
 804                         goto just_restart;
 805                 }
 806         }
 807         reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
 808         ep->dma_channel = channel;
 809
 810         if (is_in) {
 811                 status = omap_request_dma(OMAP_DMA_USB_W2FC_TX0 - 1 + channel,
 812                         ep->ep.name, dma_error, ep, &ep->lch);
 813                 if (status == 0) {
 814                         UDC_TXDMA_CFG_REG = reg;
 815                         /* EMIFF */
 816                         omap_set_dma_src_burst_mode(ep->lch,
 817                                                 OMAP_DMA_DATA_BURST_4);
 818                         omap_set_dma_src_data_pack(ep->lch, 1);
 819                         /* TIPB */
 820                         omap_set_dma_dest_params(ep->lch,
 821                                 OMAP_DMA_PORT_TIPB,
 822                                 OMAP_DMA_AMODE_CONSTANT,
 823                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 824                 }
 825         } else {
 826                 status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
 827                         ep->ep.name, dma_error, ep, &ep->lch);
 828                 if (status == 0) {
 829                         UDC_RXDMA_CFG_REG = reg;
 830                         /* TIPB */
 831                         omap_set_dma_src_params(ep->lch,
 832                                 OMAP_DMA_PORT_TIPB,
 833                                 OMAP_DMA_AMODE_CONSTANT,
 834                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 835                         /* EMIFF */
 836                         omap_set_dma_dest_burst_mode(ep->lch,
 837                                                 OMAP_DMA_DATA_BURST_4);
 838                         omap_set_dma_dest_data_pack(ep->lch, 1);
 839                 }
 840         }
 841         if (status)
 842                 ep->dma_channel = 0;
 843         else {
 844                 ep->has_dma = 1;
 845                 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
 846
 847                 /* channel type P: hw synch (fifo) */
 848                 if (!cpu_is_omap15xx())
 849                         omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
 850         }
 851
 852 just_restart:
 853         /* restart any queue, even if the claim failed  */
 854         restart = !ep->stopped && !list_empty(&ep->queue);
 855
 856         if (status)
 857                 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
 858                         restart ? " (restart)" : "");
 859         else
 860                 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
 861                         is_in ? 't' : 'r',
 862                         ep->dma_channel - 1, ep->lch,
 863                         restart ? " (restart)" : "");
 864
 865         if (restart) {
 866                 struct omap_req *req;
 867                 req = container_of(ep->queue.next, struct omap_req, queue);
 868                 if (ep->has_dma)
 869                         (is_in ? next_in_dma : next_out_dma)(ep, req);
 870                 else {
 871                         use_ep(ep, UDC_EP_SEL);
 872                         (is_in ? write_fifo : read_fifo)(ep, req);
 873                         deselect_ep();
 874                         if (!is_in) {
 875                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 876                                 ep->ackwait = 1 + ep->double_buf;
 877                         }
 878                         /* IN: 6 wait states before it'll tx */
 879                 }
 880         }
 881 }
 882
 883 static void dma_channel_release(struct omap_ep *ep)
 884 {
 885         int             shift = 4 * (ep->dma_channel - 1);
 886         u16             mask = 0x0f << shift;
 887         struct omap_req *req;
 888         int             active;
 889
 890         /* abort any active usb transfer request */
 891         if (!list_empty(&ep->queue))
 892                 req = container_of(ep->queue.next, struct omap_req, queue);
 893         else
 894                 req = NULL;
 895
 896         active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
 897
 898         DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
 899                         active ? "active" : "idle",
 900                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
 901                         ep->dma_channel - 1, req);
 902
 903         /* NOTE: re-setting RX_REQ/TX_REQ because of a chip bug (before
 904          * OMAP 1710 ES2.0) where reading the DMA_CFG can clear them.
 905          */
 906
 907         /* wait till current packet DMA finishes, and fifo empties */
 908         if (ep->bEndpointAddress & USB_DIR_IN) {
 909                 UDC_TXDMA_CFG_REG = (UDC_TXDMA_CFG_REG & ~mask) | UDC_DMA_REQ;
 910
 911                 if (req) {
 912                         finish_in_dma(ep, req, -ECONNRESET);
 913
 914                         /* clear FIFO; hosts probably won't empty it */
 915                         use_ep(ep, UDC_EP_SEL);
 916                         UDC_CTRL_REG = UDC_CLR_EP;
 917                         deselect_ep();
 918                 }
 919                 while (UDC_TXDMA_CFG_REG & mask)
 920                         udelay(10);
 921         } else {
 922                 UDC_RXDMA_CFG_REG = (UDC_RXDMA_CFG_REG & ~mask) | UDC_DMA_REQ;
 923
 924                 /* dma empties the fifo */
 925                 while (UDC_RXDMA_CFG_REG & mask)
 926                         udelay(10);
 927                 if (req)
 928                         finish_out_dma(ep, req, -ECONNRESET, 0);
 929         }
 930         omap_free_dma(ep->lch);
 931         ep->dma_channel = 0;
 932         ep->lch = -1;
 933         /* has_dma still set, till endpoint is fully quiesced */
 934 }
 935
 936
 937 /*-------------------------------------------------------------------------*/
 938
 939 static int
 940 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 941 {
 942         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 943         struct omap_req *req = container_of(_req, struct omap_req, req);
 944         struct omap_udc *udc;
 945         unsigned long   flags;
 946         int             is_iso = 0;
 947
 948         /* catch various bogus parameters */
 949         if (!_req || !req->req.complete || !req->req.buf
 950                         || !list_empty(&req->queue)) {
 951                 DBG("%s, bad params\n", __FUNCTION__);
 952                 return -EINVAL;
 953         }
 954         if (!_ep || (!ep->desc && ep->bEndpointAddress)) {
 955                 DBG("%s, bad ep\n", __FUNCTION__);
 956                 return -EINVAL;
 957         }
 958         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 959                 if (req->req.length > ep->ep.maxpacket)
 960                         return -EMSGSIZE;
 961                 is_iso = 1;
 962         }
 963
 964         /* this isn't bogus, but OMAP DMA isn't the only hardware to
 965          * have a hard time with partial packet reads...  reject it.
 966          */
 967         if (use_dma
 968                         && ep->has_dma
 969                         && ep->bEndpointAddress != 0
 970                         && (ep->bEndpointAddress & USB_DIR_IN) == 0
 971                         && (req->req.length % ep->ep.maxpacket) != 0) {
 972                 DBG("%s, no partial packet OUT reads\n", __FUNCTION__);
 973                 return -EMSGSIZE;
 974         }
 975
 976         udc = ep->udc;
 977         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 978                 return -ESHUTDOWN;
 979
 980         if (use_dma && ep->has_dma) {
 981                 if (req->req.dma == DMA_ADDR_INVALID) {
 982                         req->req.dma = dma_map_single(
 983                                 ep->udc->gadget.dev.parent,
 984                                 req->req.buf,
 985                                 req->req.length,
 986                                 (ep->bEndpointAddress & USB_DIR_IN)
 987                                         ? DMA_TO_DEVICE
 988                                         : DMA_FROM_DEVICE);
 989                         req->mapped = 1;
 990                 } else {
 991                         dma_sync_single_for_device(
 992                                 ep->udc->gadget.dev.parent,
 993                                 req->req.dma, req->req.length,
 994                                 (ep->bEndpointAddress & USB_DIR_IN)
 995                                         ? DMA_TO_DEVICE
 996                                         : DMA_FROM_DEVICE);
 997                         req->mapped = 0;
 998                 }
 999         }
1000
1001         VDBG("%s queue req %p, len %d buf %p\n",
1002                 ep->ep.name, _req, _req->length, _req->buf);
1003
1004         spin_lock_irqsave(&udc->lock, flags);
1005
1006         req->req.status = -EINPROGRESS;
1007         req->req.actual = 0;
1008
1009         /* maybe kickstart non-iso i/o queues */
1010         if (is_iso)
1011                 UDC_IRQ_EN_REG |= UDC_SOF_IE;
1012         else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
1013                 int     is_in;
1014
1015                 if (ep->bEndpointAddress == 0) {
1016                         if (!udc->ep0_pending || !list_empty (&ep->queue)) {
1017                                 spin_unlock_irqrestore(&udc->lock, flags);
1018                                 return -EL2HLT;
1019                         }
1020
1021                         /* empty DATA stage? */
1022                         is_in = udc->ep0_in;
1023                         if (!req->req.length) {
1024
1025                                 /* chip became CONFIGURED or ADDRESSED
1026                                  * earlier; drivers may already have queued
1027                                  * requests to non-control endpoints
1028                                  */
1029                                 if (udc->ep0_set_config) {
1030                                         u16     irq_en = UDC_IRQ_EN_REG;
1031
1032                                         irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
1033                                         if (!udc->ep0_reset_config)
1034                                                 irq_en |= UDC_EPN_RX_IE
1035                                                         | UDC_EPN_TX_IE;
1036                                         UDC_IRQ_EN_REG = irq_en;
1037                                 }
1038
1039                                 /* STATUS for zero length DATA stages is
1040                                  * always an IN ... even for IN transfers,
1041                                  * a wierd case which seem to stall OMAP.
1042                                  */
1043                                 UDC_EP_NUM_REG = (UDC_EP_SEL|UDC_EP_DIR);
1044                                 UDC_CTRL_REG = UDC_CLR_EP;
1045                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1046                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1047
1048                                 /* cleanup */
1049                                 udc->ep0_pending = 0;
1050                                 done(ep, req, 0);
1051                                 req = NULL;
1052
1053                         /* non-empty DATA stage */
1054                         } else if (is_in) {
1055                                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1056                         } else {
1057                                 if (udc->ep0_setup)
1058                                         goto irq_wait;
1059                                 UDC_EP_NUM_REG = UDC_EP_SEL;
1060                         }
1061                 } else {
1062                         is_in = ep->bEndpointAddress & USB_DIR_IN;
1063                         if (!ep->has_dma)
1064                                 use_ep(ep, UDC_EP_SEL);
1065                         /* if ISO: SOF IRQs must be enabled/disabled! */
1066                 }
1067
1068                 if (ep->has_dma)
1069                         (is_in ? next_in_dma : next_out_dma)(ep, req);
1070                 else if (req) {
1071                         if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
1072                                 req = NULL;
1073                         deselect_ep();
1074                         if (!is_in) {
1075                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1076                                 ep->ackwait = 1 + ep->double_buf;
1077                         }
1078                         /* IN: 6 wait states before it'll tx */
1079                 }
1080         }
1081
1082 irq_wait:
1083         /* irq handler advances the queue */
1084         if (req != NULL)
1085                 list_add_tail(&req->queue, &ep->queue);
1086         spin_unlock_irqrestore(&udc->lock, flags);
1087
1088         return 0;
1089 }
1090
1091 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1092 {
1093         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1094         struct omap_req *req;
1095         unsigned long   flags;
1096
1097         if (!_ep || !_req)
1098                 return -EINVAL;
1099
1100         spin_lock_irqsave(&ep->udc->lock, flags);
1101
1102         /* make sure it's actually queued on this endpoint */
1103         list_for_each_entry (req, &ep->queue, queue) {
1104                 if (&req->req == _req)
1105                         break;
1106         }
1107         if (&req->req != _req) {
1108                 spin_unlock_irqrestore(&ep->udc->lock, flags);
1109                 return -EINVAL;
1110         }
1111
1112         if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1113                 int channel = ep->dma_channel;
1114
1115                 /* releasing the channel cancels the request,
1116                  * reclaiming the channel restarts the queue
1117                  */
1118                 dma_channel_release(ep);
1119                 dma_channel_claim(ep, channel);
1120         } else
1121                 done(ep, req, -ECONNRESET);
1122         spin_unlock_irqrestore(&ep->udc->lock, flags);
1123         return 0;
1124 }
1125
1126 /*-------------------------------------------------------------------------*/
1127
1128 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1129 {
1130         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1131         unsigned long   flags;
1132         int             status = -EOPNOTSUPP;
1133
1134         spin_lock_irqsave(&ep->udc->lock, flags);
1135
1136         /* just use protocol stalls for ep0; real halts are annoying */
1137         if (ep->bEndpointAddress == 0) {
1138                 if (!ep->udc->ep0_pending)
1139                         status = -EINVAL;
1140                 else if (value) {
1141                         if (ep->udc->ep0_set_config) {
1142                                 WARN("error changing config?\n");
1143                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1144                         }
1145                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1146                         ep->udc->ep0_pending = 0;
1147                         status = 0;
1148                 } else /* NOP */
1149                         status = 0;
1150
1151         /* otherwise, all active non-ISO endpoints can halt */
1152         } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->desc) {
1153
1154                 /* IN endpoints must already be idle */
1155                 if ((ep->bEndpointAddress & USB_DIR_IN)
1156                                 && !list_empty(&ep->queue)) {
1157                         status = -EAGAIN;
1158                         goto done;
1159                 }
1160
1161                 if (value) {
1162                         int     channel;
1163
1164                         if (use_dma && ep->dma_channel
1165                                         && !list_empty(&ep->queue)) {
1166                                 channel = ep->dma_channel;
1167                                 dma_channel_release(ep);
1168                         } else
1169                                 channel = 0;
1170
1171                         use_ep(ep, UDC_EP_SEL);
1172                         if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) {
1173                                 UDC_CTRL_REG = UDC_SET_HALT;
1174                                 status = 0;
1175                         } else
1176                                 status = -EAGAIN;
1177                         deselect_ep();
1178
1179                         if (channel)
1180                                 dma_channel_claim(ep, channel);
1181                 } else {
1182                         use_ep(ep, 0);
1183                         UDC_CTRL_REG = ep->udc->clr_halt;
1184                         ep->ackwait = 0;
1185                         if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1186                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1187                                 ep->ackwait = 1 + ep->double_buf;
1188                         }
1189                 }
1190         }
1191 done:
1192         VDBG("%s %s halt stat %d\n", ep->ep.name,
1193                 value ? "set" : "clear", status);
1194
1195         spin_unlock_irqrestore(&ep->udc->lock, flags);
1196         return status;
1197 }
1198
1199 static struct usb_ep_ops omap_ep_ops = {
1200         .enable         = omap_ep_enable,
1201         .disable        = omap_ep_disable,
1202
1203         .alloc_request  = omap_alloc_request,
1204         .free_request   = omap_free_request,
1205
1206         .alloc_buffer   = omap_alloc_buffer,
1207         .free_buffer    = omap_free_buffer,
1208
1209         .queue          = omap_ep_queue,
1210         .dequeue        = omap_ep_dequeue,
1211
1212         .set_halt       = omap_ep_set_halt,
1213         // fifo_status ... report bytes in fifo
1214         // fifo_flush ... flush fifo
1215 };
1216
1217 /*-------------------------------------------------------------------------*/
1218
1219 static int omap_get_frame(struct usb_gadget *gadget)
1220 {
1221         u16     sof = UDC_SOF_REG;
1222         return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1223 }
1224
1225 static int omap_wakeup(struct usb_gadget *gadget)
1226 {
1227         struct omap_udc *udc;
1228         unsigned long   flags;
1229         int             retval = -EHOSTUNREACH;
1230
1231         udc = container_of(gadget, struct omap_udc, gadget);
1232
1233         spin_lock_irqsave(&udc->lock, flags);
1234         if (udc->devstat & UDC_SUS) {
1235                 /* NOTE:  OTG spec erratum says that OTG devices may
1236                  * issue wakeups without host enable.
1237                  */
1238                 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1239                         DBG("remote wakeup...\n");
1240                         UDC_SYSCON2_REG = UDC_RMT_WKP;
1241                         retval = 0;
1242                 }
1243
1244         /* NOTE:  non-OTG systems may use SRP TOO... */
1245         } else if (!(udc->devstat & UDC_ATT)) {
1246                 if (udc->transceiver)
1247                         retval = otg_start_srp(udc->transceiver);
1248         }
1249         spin_unlock_irqrestore(&udc->lock, flags);
1250
1251         return retval;
1252 }
1253
1254 static int
1255 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1256 {
1257         struct omap_udc *udc;
1258         unsigned long   flags;
1259         u16             syscon1;
1260
1261         udc = container_of(gadget, struct omap_udc, gadget);
1262         spin_lock_irqsave(&udc->lock, flags);
1263         syscon1 = UDC_SYSCON1_REG;
1264         if (is_selfpowered)
1265                 syscon1 |= UDC_SELF_PWR;
1266         else
1267                 syscon1 &= ~UDC_SELF_PWR;
1268         UDC_SYSCON1_REG = syscon1;
1269         spin_unlock_irqrestore(&udc->lock, flags);
1270
1271         return 0;
1272 }
1273
1274 static int can_pullup(struct omap_udc *udc)
1275 {
1276         return udc->driver && udc->softconnect && udc->vbus_active;
1277 }
1278
1279 static void pullup_enable(struct omap_udc *udc)
1280 {
1281         udc->gadget.dev.parent->power.power_state = PMSG_ON;
1282         udc->gadget.dev.power.power_state = PMSG_ON;
1283         UDC_SYSCON1_REG |= UDC_PULLUP_EN;
1284 #ifndef CONFIG_USB_OTG
1285         if (!cpu_is_omap15xx())
1286                 OTG_CTRL_REG |= OTG_BSESSVLD;
1287 #endif
1288         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1289 }
1290
1291 static void pullup_disable(struct omap_udc *udc)
1292 {
1293 #ifndef CONFIG_USB_OTG
1294         if (!cpu_is_omap15xx())
1295                 OTG_CTRL_REG &= ~OTG_BSESSVLD;
1296 #endif
1297         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1298         UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
1299 }
1300
1301 /*
1302  * Called by whatever detects VBUS sessions:  external transceiver
1303  * driver, or maybe GPIO0 VBUS IRQ.  May request 48 MHz clock.
1304  */
1305 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1306 {
1307         struct omap_udc *udc;
1308         unsigned long   flags;
1309
1310         udc = container_of(gadget, struct omap_udc, gadget);
1311         spin_lock_irqsave(&udc->lock, flags);
1312         VDBG("VBUS %s\n", is_active ? "on" : "off");
1313         udc->vbus_active = (is_active != 0);
1314         if (cpu_is_omap15xx()) {
1315                 /* "software" detect, ignored if !VBUS_MODE_1510 */
1316                 if (is_active)
1317                         FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510;
1318                 else
1319                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
1320         }
1321         if (can_pullup(udc))
1322                 pullup_enable(udc);
1323         else
1324                 pullup_disable(udc);
1325         spin_unlock_irqrestore(&udc->lock, flags);
1326         return 0;
1327 }
1328
1329 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1330 {
1331         struct omap_udc *udc;
1332
1333         udc = container_of(gadget, struct omap_udc, gadget);
1334         if (udc->transceiver)
1335                 return otg_set_power(udc->transceiver, mA);
1336         return -EOPNOTSUPP;
1337 }
1338
1339 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1340 {
1341         struct omap_udc *udc;
1342         unsigned long   flags;
1343
1344         udc = container_of(gadget, struct omap_udc, gadget);
1345         spin_lock_irqsave(&udc->lock, flags);
1346         udc->softconnect = (is_on != 0);
1347         if (can_pullup(udc))
1348                 pullup_enable(udc);
1349         else
1350                 pullup_disable(udc);
1351         spin_unlock_irqrestore(&udc->lock, flags);
1352         return 0;
1353 }
1354
1355 static struct usb_gadget_ops omap_gadget_ops = {
1356         .get_frame              = omap_get_frame,
1357         .wakeup                 = omap_wakeup,
1358         .set_selfpowered        = omap_set_selfpowered,
1359         .vbus_session           = omap_vbus_session,
1360         .vbus_draw              = omap_vbus_draw,
1361         .pullup                 = omap_pullup,
1362 };
1363
1364 /*-------------------------------------------------------------------------*/
1365
1366 /* dequeue ALL requests; caller holds udc->lock */
1367 static void nuke(struct omap_ep *ep, int status)
1368 {
1369         struct omap_req *req;
1370
1371         ep->stopped = 1;
1372
1373         if (use_dma && ep->dma_channel)
1374                 dma_channel_release(ep);
1375
1376         use_ep(ep, 0);
1377         UDC_CTRL_REG = UDC_CLR_EP;
1378         if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1379                 UDC_CTRL_REG = UDC_SET_HALT;
1380
1381         while (!list_empty(&ep->queue)) {
1382                 req = list_entry(ep->queue.next, struct omap_req, queue);
1383                 done(ep, req, status);
1384         }
1385 }
1386
1387 /* caller holds udc->lock */
1388 static void udc_quiesce(struct omap_udc *udc)
1389 {
1390         struct omap_ep  *ep;
1391
1392         udc->gadget.speed = USB_SPEED_UNKNOWN;
1393         nuke(&udc->ep[0], -ESHUTDOWN);
1394         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list)
1395                 nuke(ep, -ESHUTDOWN);
1396 }
1397
1398 /*-------------------------------------------------------------------------*/
1399
1400 static void update_otg(struct omap_udc *udc)
1401 {
1402         u16     devstat;
1403
1404         if (!udc->gadget.is_otg)
1405                 return;
1406
1407         if (OTG_CTRL_REG & OTG_ID)
1408                 devstat = UDC_DEVSTAT_REG;
1409         else
1410                 devstat = 0;
1411
1412         udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1413         udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1414         udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1415
1416         /* Enable HNP early, avoiding races on suspend irq path.
1417          * ASSUMES OTG state machine B_BUS_REQ input is true.
1418          */
1419         if (udc->gadget.b_hnp_enable)
1420                 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ)
1421                                 & ~OTG_PULLUP;
1422 }
1423
1424 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1425 {
1426         struct omap_ep  *ep0 = &udc->ep[0];
1427         struct omap_req *req = NULL;
1428
1429         ep0->irqs++;
1430
1431         /* Clear any pending requests and then scrub any rx/tx state
1432          * before starting to handle the SETUP request.
1433          */
1434         if (irq_src & UDC_SETUP) {
1435                 u16     ack = irq_src & (UDC_EP0_TX|UDC_EP0_RX);
1436
1437                 nuke(ep0, 0);
1438                 if (ack) {
1439                         UDC_IRQ_SRC_REG = ack;
1440                         irq_src = UDC_SETUP;
1441                 }
1442         }
1443
1444         /* IN/OUT packets mean we're in the DATA or STATUS stage.
1445          * This driver uses only uses protocol stalls (ep0 never halts),
1446          * and if we got this far the gadget driver already had a
1447          * chance to stall.  Tries to be forgiving of host oddities.
1448          *
1449          * NOTE:  the last chance gadget drivers have to stall control
1450          * requests is during their request completion callback.
1451          */
1452         if (!list_empty(&ep0->queue))
1453                 req = container_of(ep0->queue.next, struct omap_req, queue);
1454
1455         /* IN == TX to host */
1456         if (irq_src & UDC_EP0_TX) {
1457                 int     stat;
1458
1459                 UDC_IRQ_SRC_REG = UDC_EP0_TX;
1460                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1461                 stat = UDC_STAT_FLG_REG;
1462                 if (stat & UDC_ACK) {
1463                         if (udc->ep0_in) {
1464                                 /* write next IN packet from response,
1465                                  * or set up the status stage.
1466                                  */
1467                                 if (req)
1468                                         stat = write_fifo(ep0, req);
1469                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1470                                 if (!req && udc->ep0_pending) {
1471                                         UDC_EP_NUM_REG = UDC_EP_SEL;
1472                                         UDC_CTRL_REG = UDC_CLR_EP;
1473                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1474                                         UDC_EP_NUM_REG = 0;
1475                                         udc->ep0_pending = 0;
1476                                 } /* else:  6 wait states before it'll tx */
1477                         } else {
1478                                 /* ack status stage of OUT transfer */
1479                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1480                                 if (req)
1481                                         done(ep0, req, 0);
1482                         }
1483                         req = NULL;
1484                 } else if (stat & UDC_STALL) {
1485                         UDC_CTRL_REG = UDC_CLR_HALT;
1486                         UDC_EP_NUM_REG = UDC_EP_DIR;
1487                 } else {
1488                         UDC_EP_NUM_REG = UDC_EP_DIR;
1489                 }
1490         }
1491
1492         /* OUT == RX from host */
1493         if (irq_src & UDC_EP0_RX) {
1494                 int     stat;
1495
1496                 UDC_IRQ_SRC_REG = UDC_EP0_RX;
1497                 UDC_EP_NUM_REG = UDC_EP_SEL;
1498                 stat = UDC_STAT_FLG_REG;
1499                 if (stat & UDC_ACK) {
1500                         if (!udc->ep0_in) {
1501                                 stat = 0;
1502                                 /* read next OUT packet of request, maybe
1503                                  * reactiviting the fifo; stall on errors.
1504                                  */
1505                                 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1506                                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1507                                         udc->ep0_pending = 0;
1508                                         stat = 0;
1509                                 } else if (stat == 0)
1510                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1511                                 UDC_EP_NUM_REG = 0;
1512
1513                                 /* activate status stage */
1514                                 if (stat == 1) {
1515                                         done(ep0, req, 0);
1516                                         /* that may have STALLed ep0... */
1517                                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1518                                         UDC_CTRL_REG = UDC_CLR_EP;
1519                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1520                                         UDC_EP_NUM_REG = UDC_EP_DIR;
1521                                         udc->ep0_pending = 0;
1522                                 }
1523                         } else {
1524                                 /* ack status stage of IN transfer */
1525                                 UDC_EP_NUM_REG = 0;
1526                                 if (req)
1527                                         done(ep0, req, 0);
1528                         }
1529                 } else if (stat & UDC_STALL) {
1530                         UDC_CTRL_REG = UDC_CLR_HALT;
1531                         UDC_EP_NUM_REG = 0;
1532                 } else {
1533                         UDC_EP_NUM_REG = 0;
1534                 }
1535         }
1536
1537         /* SETUP starts all control transfers */
1538         if (irq_src & UDC_SETUP) {
1539                 union u {
1540                         u16                     word[4];
1541                         struct usb_ctrlrequest  r;
1542                 } u;
1543                 int                     status = -EINVAL;
1544                 struct omap_ep          *ep;
1545
1546                 /* read the (latest) SETUP message */
1547                 do {
1548                         UDC_EP_NUM_REG = UDC_SETUP_SEL;
1549                         /* two bytes at a time */
1550                         u.word[0] = UDC_DATA_REG;
1551                         u.word[1] = UDC_DATA_REG;
1552                         u.word[2] = UDC_DATA_REG;
1553                         u.word[3] = UDC_DATA_REG;
1554                         UDC_EP_NUM_REG = 0;
1555                 } while (UDC_IRQ_SRC_REG & UDC_SETUP);
1556
1557 #define w_value         le16_to_cpup (&u.r.wValue)
1558 #define w_index         le16_to_cpup (&u.r.wIndex)
1559 #define w_length        le16_to_cpup (&u.r.wLength)
1560
1561                 /* Delegate almost all control requests to the gadget driver,
1562                  * except for a handful of ch9 status/feature requests that
1563                  * hardware doesn't autodecode _and_ the gadget API hides.
1564                  */
1565                 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1566                 udc->ep0_set_config = 0;
1567                 udc->ep0_pending = 1;
1568                 ep0->stopped = 0;
1569                 ep0->ackwait = 0;
1570                 switch (u.r.bRequest) {
1571                 case USB_REQ_SET_CONFIGURATION:
1572                         /* udc needs to know when ep != 0 is valid */
1573                         if (u.r.bRequestType != USB_RECIP_DEVICE)
1574                                 goto delegate;
1575                         if (w_length != 0)
1576                                 goto do_stall;
1577                         udc->ep0_set_config = 1;
1578                         udc->ep0_reset_config = (w_value == 0);
1579                         VDBG("set config %d\n", w_value);
1580
1581                         /* update udc NOW since gadget driver may start
1582                          * queueing requests immediately; clear config
1583                          * later if it fails the request.
1584                          */
1585                         if (udc->ep0_reset_config)
1586                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1587                         else
1588                                 UDC_SYSCON2_REG = UDC_DEV_CFG;
1589                         update_otg(udc);
1590                         goto delegate;
1591                 case USB_REQ_CLEAR_FEATURE:
1592                         /* clear endpoint halt */
1593                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1594                                 goto delegate;
1595                         if (w_value != USB_ENDPOINT_HALT
1596                                         || w_length != 0)
1597                                 goto do_stall;
1598                         ep = &udc->ep[w_index & 0xf];
1599                         if (ep != ep0) {
1600                                 if (w_index & USB_DIR_IN)
1601                                         ep += 16;
1602                                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1603                                                 || !ep->desc)
1604                                         goto do_stall;
1605                                 use_ep(ep, 0);
1606                                 UDC_CTRL_REG = udc->clr_halt;
1607                                 ep->ackwait = 0;
1608                                 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1609                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1610                                         ep->ackwait = 1 + ep->double_buf;
1611                                 }
1612                                 /* NOTE:  assumes the host behaves sanely,
1613                                  * only clearing real halts.  Else we may
1614                                  * need to kill pending transfers and then
1615                                  * restart the queue... very messy for DMA!
1616                                  */
1617                         }
1618                         VDBG("%s halt cleared by host\n", ep->name);
1619                         goto ep0out_status_stage;
1620                 case USB_REQ_SET_FEATURE:
1621                         /* set endpoint halt */
1622                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1623                                 goto delegate;
1624                         if (w_value != USB_ENDPOINT_HALT
1625                                         || w_length != 0)
1626                                 goto do_stall;
1627                         ep = &udc->ep[w_index & 0xf];
1628                         if (w_index & USB_DIR_IN)
1629                                 ep += 16;
1630                         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1631                                         || ep == ep0 || !ep->desc)
1632                                 goto do_stall;
1633                         if (use_dma && ep->has_dma) {
1634                                 /* this has rude side-effects (aborts) and
1635                                  * can't really work if DMA-IN is active
1636                                  */
1637                                 DBG("%s host set_halt, NYET \n", ep->name);
1638                                 goto do_stall;
1639                         }
1640                         use_ep(ep, 0);
1641                         /* can't halt if fifo isn't empty... */
1642                         UDC_CTRL_REG = UDC_CLR_EP;
1643                         UDC_CTRL_REG = UDC_SET_HALT;
1644                         VDBG("%s halted by host\n", ep->name);
1645 ep0out_status_stage:
1646                         status = 0;
1647                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1648                         UDC_CTRL_REG = UDC_CLR_EP;
1649                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1650                         UDC_EP_NUM_REG = UDC_EP_DIR;
1651                         udc->ep0_pending = 0;
1652                         break;
1653                 case USB_REQ_GET_STATUS:
1654                         /* return interface status.  if we were pedantic,
1655                          * we'd detect non-existent interfaces, and stall.
1656                          */
1657                         if (u.r.bRequestType
1658                                         != (USB_DIR_IN|USB_RECIP_INTERFACE))
1659                                 goto delegate;
1660                         /* return two zero bytes */
1661                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1662                         UDC_DATA_REG = 0;
1663                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1664                         UDC_EP_NUM_REG = UDC_EP_DIR;
1665                         status = 0;
1666                         VDBG("GET_STATUS, interface %d\n", w_index);
1667                         /* next, status stage */
1668                         break;
1669                 default:
1670 delegate:
1671                         /* activate the ep0out fifo right away */
1672                         if (!udc->ep0_in && w_length) {
1673                                 UDC_EP_NUM_REG = 0;
1674                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1675                         }
1676
1677                         /* gadget drivers see class/vendor specific requests,
1678                          * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1679                          * and more
1680                          */
1681                         VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1682                                 u.r.bRequestType, u.r.bRequest,
1683                                 w_value, w_index, w_length);
1684
1685 #undef  w_value
1686 #undef  w_index
1687 #undef  w_length
1688
1689                         /* The gadget driver may return an error here,
1690                          * causing an immediate protocol stall.
1691                          *
1692                          * Else it must issue a response, either queueing a
1693                          * response buffer for the DATA stage, or halting ep0
1694                          * (causing a protocol stall, not a real halt).  A
1695                          * zero length buffer means no DATA stage.
1696                          *
1697                          * It's fine to issue that response after the setup()
1698                          * call returns, and this IRQ was handled.
1699                          */
1700                         udc->ep0_setup = 1;
1701                         spin_unlock(&udc->lock);
1702                         status = udc->driver->setup (&udc->gadget, &u.r);
1703                         spin_lock(&udc->lock);
1704                         udc->ep0_setup = 0;
1705                 }
1706
1707                 if (status < 0) {
1708 do_stall:
1709                         VDBG("req %02x.%02x protocol STALL; stat %d\n",
1710                                         u.r.bRequestType, u.r.bRequest, status);
1711                         if (udc->ep0_set_config) {
1712                                 if (udc->ep0_reset_config)
1713                                         WARN("error resetting config?\n");
1714                                 else
1715                                         UDC_SYSCON2_REG = UDC_CLR_CFG;
1716                         }
1717                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1718                         udc->ep0_pending = 0;
1719                 }
1720         }
1721 }
1722
1723 /*-------------------------------------------------------------------------*/
1724
1725 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1726
1727 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1728 {
1729         u16     devstat, change;
1730
1731         devstat = UDC_DEVSTAT_REG;
1732         change = devstat ^ udc->devstat;
1733         udc->devstat = devstat;
1734
1735         if (change & (UDC_USB_RESET|UDC_ATT)) {
1736                 udc_quiesce(udc);
1737
1738                 if (change & UDC_ATT) {
1739                         /* driver for any external transceiver will
1740                          * have called omap_vbus_session() already
1741                          */
1742                         if (devstat & UDC_ATT) {
1743                                 udc->gadget.speed = USB_SPEED_FULL;
1744                                 VDBG("connect\n");
1745                                 if (!udc->transceiver)
1746                                         pullup_enable(udc);
1747                                 // if (driver->connect) call it
1748                         } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1749                                 udc->gadget.speed = USB_SPEED_UNKNOWN;
1750                                 if (!udc->transceiver)
1751                                         pullup_disable(udc);
1752                                 DBG("disconnect, gadget %s\n",
1753                                         udc->driver->driver.name);
1754                                 if (udc->driver->disconnect) {
1755                                         spin_unlock(&udc->lock);
1756                                         udc->driver->disconnect(&udc->gadget);
1757                                         spin_lock(&udc->lock);
1758                                 }
1759                         }
1760                         change &= ~UDC_ATT;
1761                 }
1762
1763                 if (change & UDC_USB_RESET) {
1764                         if (devstat & UDC_USB_RESET) {
1765                                 VDBG("RESET=1\n");
1766                         } else {
1767                                 udc->gadget.speed = USB_SPEED_FULL;
1768                                 INFO("USB reset done, gadget %s\n",
1769                                         udc->driver->driver.name);
1770                                 /* ep0 traffic is legal from now on */
1771                                 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE;
1772                         }
1773                         change &= ~UDC_USB_RESET;
1774                 }
1775         }
1776         if (change & UDC_SUS) {
1777                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1778                         // FIXME tell isp1301 to suspend/resume (?)
1779                         if (devstat & UDC_SUS) {
1780                                 VDBG("suspend\n");
1781                                 update_otg(udc);
1782                                 /* HNP could be under way already */
1783                                 if (udc->gadget.speed == USB_SPEED_FULL
1784                                                 && udc->driver->suspend) {
1785                                         spin_unlock(&udc->lock);
1786                                         udc->driver->suspend(&udc->gadget);
1787                                         spin_lock(&udc->lock);
1788                                 }
1789                                 if (udc->transceiver)
1790                                         otg_set_suspend(udc->transceiver, 1);
1791                         } else {
1792                                 VDBG("resume\n");
1793                                 if (udc->transceiver)
1794                                         otg_set_suspend(udc->transceiver, 0);
1795                                 if (udc->gadget.speed == USB_SPEED_FULL
1796                                                 && udc->driver->resume) {
1797                                         spin_unlock(&udc->lock);
1798                                         udc->driver->resume(&udc->gadget);
1799                                         spin_lock(&udc->lock);
1800                                 }
1801                         }
1802                 }
1803                 change &= ~UDC_SUS;
1804         }
1805         if (!cpu_is_omap15xx() && (change & OTG_FLAGS)) {
1806                 update_otg(udc);
1807                 change &= ~OTG_FLAGS;
1808         }
1809
1810         change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1811         if (change)
1812                 VDBG("devstat %03x, ignore change %03x\n",
1813                         devstat,  change);
1814
1815         UDC_IRQ_SRC_REG = UDC_DS_CHG;
1816 }
1817
1818 static irqreturn_t omap_udc_irq(int irq, void *_udc)
1819 {
1820         struct omap_udc *udc = _udc;
1821         u16             irq_src;
1822         irqreturn_t     status = IRQ_NONE;
1823         unsigned long   flags;
1824
1825         spin_lock_irqsave(&udc->lock, flags);
1826         irq_src = UDC_IRQ_SRC_REG;
1827
1828         /* Device state change (usb ch9 stuff) */
1829         if (irq_src & UDC_DS_CHG) {
1830                 devstate_irq(_udc, irq_src);
1831                 status = IRQ_HANDLED;
1832                 irq_src &= ~UDC_DS_CHG;
1833         }
1834
1835         /* EP0 control transfers */
1836         if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1837                 ep0_irq(_udc, irq_src);
1838                 status = IRQ_HANDLED;
1839                 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1840         }
1841
1842         /* DMA transfer completion */
1843         if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1844                 dma_irq(_udc, irq_src);
1845                 status = IRQ_HANDLED;
1846                 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1847         }
1848
1849         irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX);
1850         if (irq_src)
1851                 DBG("udc_irq, unhandled %03x\n", irq_src);
1852         spin_unlock_irqrestore(&udc->lock, flags);
1853
1854         return status;
1855 }
1856
1857 /* workaround for seemingly-lost IRQs for RX ACKs... */
1858 #define PIO_OUT_TIMEOUT (jiffies + HZ/3)
1859 #define HALF_FULL(f)    (!((f)&(UDC_NON_ISO_FIFO_FULL|UDC_NON_ISO_FIFO_EMPTY)))
1860
1861 static void pio_out_timer(unsigned long _ep)
1862 {
1863         struct omap_ep  *ep = (void *) _ep;
1864         unsigned long   flags;
1865         u16             stat_flg;
1866
1867         spin_lock_irqsave(&ep->udc->lock, flags);
1868         if (!list_empty(&ep->queue) && ep->ackwait) {
1869                 use_ep(ep, 0);
1870                 stat_flg = UDC_STAT_FLG_REG;
1871
1872                 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1873                                 || (ep->double_buf && HALF_FULL(stat_flg)))) {
1874                         struct omap_req *req;
1875
1876                         VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
1877                         req = container_of(ep->queue.next,
1878                                         struct omap_req, queue);
1879                         UDC_EP_NUM_REG = ep->bEndpointAddress | UDC_EP_SEL;
1880                         (void) read_fifo(ep, req);
1881                         UDC_EP_NUM_REG = ep->bEndpointAddress;
1882                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1883                         ep->ackwait = 1 + ep->double_buf;
1884                 }
1885         }
1886         mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1887         spin_unlock_irqrestore(&ep->udc->lock, flags);
1888 }
1889
1890 static irqreturn_t omap_udc_pio_irq(int irq, void *_dev)
1891 {
1892         u16             epn_stat, irq_src;
1893         irqreturn_t     status = IRQ_NONE;
1894         struct omap_ep  *ep;
1895         int             epnum;
1896         struct omap_udc *udc = _dev;
1897         struct omap_req *req;
1898         unsigned long   flags;
1899
1900         spin_lock_irqsave(&udc->lock, flags);
1901         epn_stat = UDC_EPN_STAT_REG;
1902         irq_src = UDC_IRQ_SRC_REG;
1903
1904         /* handle OUT first, to avoid some wasteful NAKs */
1905         if (irq_src & UDC_EPN_RX) {
1906                 epnum = (epn_stat >> 8) & 0x0f;
1907                 UDC_IRQ_SRC_REG = UDC_EPN_RX;
1908                 status = IRQ_HANDLED;
1909                 ep = &udc->ep[epnum];
1910                 ep->irqs++;
1911
1912                 UDC_EP_NUM_REG = epnum | UDC_EP_SEL;
1913                 ep->fnf = 0;
1914                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1915                         ep->ackwait--;
1916                         if (!list_empty(&ep->queue)) {
1917                                 int stat;
1918                                 req = container_of(ep->queue.next,
1919                                                 struct omap_req, queue);
1920                                 stat = read_fifo(ep, req);
1921                                 if (!ep->double_buf)
1922                                         ep->fnf = 1;
1923                         }
1924                 }
1925                 /* min 6 clock delay before clearing EP_SEL ... */
1926                 epn_stat = UDC_EPN_STAT_REG;
1927                 epn_stat = UDC_EPN_STAT_REG;
1928                 UDC_EP_NUM_REG = epnum;
1929
1930                 /* enabling fifo _after_ clearing ACK, contrary to docs,
1931                  * reduces lossage; timer still needed though (sigh).
1932                  */
1933                 if (ep->fnf) {
1934                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1935                         ep->ackwait = 1 + ep->double_buf;
1936                 }
1937                 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1938         }
1939
1940         /* then IN transfers */
1941         else if (irq_src & UDC_EPN_TX) {
1942                 epnum = epn_stat & 0x0f;
1943                 UDC_IRQ_SRC_REG = UDC_EPN_TX;
1944                 status = IRQ_HANDLED;
1945                 ep = &udc->ep[16 + epnum];
1946                 ep->irqs++;
1947
1948                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL;
1949                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1950                         ep->ackwait = 0;
1951                         if (!list_empty(&ep->queue)) {
1952                                 req = container_of(ep->queue.next,
1953                                                 struct omap_req, queue);
1954                                 (void) write_fifo(ep, req);
1955                         }
1956                 }
1957                 /* min 6 clock delay before clearing EP_SEL ... */
1958                 epn_stat = UDC_EPN_STAT_REG;
1959                 epn_stat = UDC_EPN_STAT_REG;
1960                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR;
1961                 /* then 6 clocks before it'd tx */
1962         }
1963
1964         spin_unlock_irqrestore(&udc->lock, flags);
1965         return status;
1966 }
1967
1968 #ifdef  USE_ISO
1969 static irqreturn_t omap_udc_iso_irq(int irq, void *_dev)
1970 {
1971         struct omap_udc *udc = _dev;
1972         struct omap_ep  *ep;
1973         int             pending = 0;
1974         unsigned long   flags;
1975
1976         spin_lock_irqsave(&udc->lock, flags);
1977
1978         /* handle all non-DMA ISO transfers */
1979         list_for_each_entry (ep, &udc->iso, iso) {
1980                 u16             stat;
1981                 struct omap_req *req;
1982
1983                 if (ep->has_dma || list_empty(&ep->queue))
1984                         continue;
1985                 req = list_entry(ep->queue.next, struct omap_req, queue);
1986
1987                 use_ep(ep, UDC_EP_SEL);
1988                 stat = UDC_STAT_FLG_REG;
1989
1990                 /* NOTE: like the other controller drivers, this isn't
1991                  * currently reporting lost or damaged frames.
1992                  */
1993                 if (ep->bEndpointAddress & USB_DIR_IN) {
1994                         if (stat & UDC_MISS_IN)
1995                                 /* done(ep, req, -EPROTO) */;
1996                         else
1997                                 write_fifo(ep, req);
1998                 } else {
1999                         int     status = 0;
2000
2001                         if (stat & UDC_NO_RXPACKET)
2002                                 status = -EREMOTEIO;
2003                         else if (stat & UDC_ISO_ERR)
2004                                 status = -EILSEQ;
2005                         else if (stat & UDC_DATA_FLUSH)
2006                                 status = -ENOSR;
2007
2008                         if (status)
2009                                 /* done(ep, req, status) */;
2010                         else
2011                                 read_fifo(ep, req);
2012                 }
2013                 deselect_ep();
2014                 /* 6 wait states before next EP */
2015
2016                 ep->irqs++;
2017                 if (!list_empty(&ep->queue))
2018                         pending = 1;
2019         }
2020         if (!pending)
2021                 UDC_IRQ_EN_REG &= ~UDC_SOF_IE;
2022         UDC_IRQ_SRC_REG = UDC_SOF;
2023
2024         spin_unlock_irqrestore(&udc->lock, flags);
2025         return IRQ_HANDLED;
2026 }
2027 #endif
2028
2029 /*-------------------------------------------------------------------------*/
2030
2031 static struct omap_udc *udc;
2032
2033 int usb_gadget_register_driver (struct usb_gadget_driver *driver)
2034 {
2035         int             status = -ENODEV;
2036         struct omap_ep  *ep;
2037         unsigned long   flags;
2038
2039         /* basic sanity tests */
2040         if (!udc)
2041                 return -ENODEV;
2042         if (!driver
2043                         // FIXME if otg, check:  driver->is_otg
2044                         || driver->speed < USB_SPEED_FULL
2045                         || !driver->bind
2046                         || !driver->unbind
2047                         || !driver->setup)
2048                 return -EINVAL;
2049
2050         spin_lock_irqsave(&udc->lock, flags);
2051         if (udc->driver) {
2052                 spin_unlock_irqrestore(&udc->lock, flags);
2053                 return -EBUSY;
2054         }
2055
2056         /* reset state */
2057         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
2058                 ep->irqs = 0;
2059                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2060                         continue;
2061                 use_ep(ep, 0);
2062                 UDC_CTRL_REG = UDC_SET_HALT;
2063         }
2064         udc->ep0_pending = 0;
2065         udc->ep[0].irqs = 0;
2066         udc->softconnect = 1;
2067
2068         /* hook up the driver */
2069         driver->driver.bus = NULL;
2070         udc->driver = driver;
2071         udc->gadget.dev.driver = &driver->driver;
2072         spin_unlock_irqrestore(&udc->lock, flags);
2073
2074         status = driver->bind (&udc->gadget);
2075         if (status) {
2076                 DBG("bind to %s --> %d\n", driver->driver.name, status);
2077                 udc->gadget.dev.driver = NULL;
2078                 udc->driver = NULL;
2079                 goto done;
2080         }
2081         DBG("bound to driver %s\n", driver->driver.name);
2082
2083         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2084
2085         /* connect to bus through transceiver */
2086         if (udc->transceiver) {
2087                 status = otg_set_peripheral(udc->transceiver, &udc->gadget);
2088                 if (status < 0) {
2089                         ERR("can't bind to transceiver\n");
2090                         driver->unbind (&udc->gadget);
2091                         udc->gadget.dev.driver = NULL;
2092                         udc->driver = NULL;
2093                         goto done;
2094                 }
2095         } else {
2096                 if (can_pullup(udc))
2097                         pullup_enable (udc);
2098                 else
2099                         pullup_disable (udc);
2100         }
2101
2102         /* boards that don't have VBUS sensing can't autogate 48MHz;
2103          * can't enter deep sleep while a gadget driver is active.
2104          */
2105         if (machine_is_omap_innovator() || machine_is_omap_osk())
2106                 omap_vbus_session(&udc->gadget, 1);
2107
2108 done:
2109         return status;
2110 }
2111 EXPORT_SYMBOL(usb_gadget_register_driver);
2112
2113 int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
2114 {
2115         unsigned long   flags;
2116         int             status = -ENODEV;
2117
2118         if (!udc)
2119                 return -ENODEV;
2120         if (!driver || driver != udc->driver)
2121                 return -EINVAL;
2122
2123         if (machine_is_omap_innovator() || machine_is_omap_osk())
2124                 omap_vbus_session(&udc->gadget, 0);
2125
2126         if (udc->transceiver)
2127                 (void) otg_set_peripheral(udc->transceiver, NULL);
2128         else
2129                 pullup_disable(udc);
2130
2131         spin_lock_irqsave(&udc->lock, flags);
2132         udc_quiesce(udc);
2133         spin_unlock_irqrestore(&udc->lock, flags);
2134
2135         driver->unbind(&udc->gadget);
2136         udc->gadget.dev.driver = NULL;
2137         udc->driver = NULL;
2138
2139         DBG("unregistered driver '%s'\n", driver->driver.name);
2140         return status;
2141 }
2142 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2143
2144
2145 /*-------------------------------------------------------------------------*/
2146
2147 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2148
2149 #include <linux/seq_file.h>
2150
2151 static const char proc_filename[] = "driver/udc";
2152
2153 #define FOURBITS "%s%s%s%s"
2154 #define EIGHTBITS FOURBITS FOURBITS
2155
2156 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2157 {
2158         u16             stat_flg;
2159         struct omap_req *req;
2160         char            buf[20];
2161
2162         use_ep(ep, 0);
2163
2164         if (use_dma && ep->has_dma)
2165                 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
2166                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
2167                         ep->dma_channel - 1, ep->lch);
2168         else
2169                 buf[0] = 0;
2170
2171         stat_flg = UDC_STAT_FLG_REG;
2172         seq_printf(s,
2173                 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2174                 ep->name, buf,
2175                 ep->double_buf ? "dbuf " : "",
2176                 ({char *s; switch(ep->ackwait){
2177                 case 0: s = ""; break;
2178                 case 1: s = "(ackw) "; break;
2179                 case 2: s = "(ackw2) "; break;
2180                 default: s = "(?) "; break;
2181                 } s;}),
2182                 ep->irqs, stat_flg,
2183                 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2184                 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2185                 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2186                 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2187                 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2188                 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2189                 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2190                 (stat_flg & UDC_STALL) ? "STALL " : "",
2191                 (stat_flg & UDC_NAK) ? "NAK " : "",
2192                 (stat_flg & UDC_ACK) ? "ACK " : "",
2193                 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2194                 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2195                 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2196
2197         if (list_empty (&ep->queue))
2198                 seq_printf(s, "\t(queue empty)\n");
2199         else
2200                 list_for_each_entry (req, &ep->queue, queue) {
2201                         unsigned        length = req->req.actual;
2202
2203                         if (use_dma && buf[0]) {
2204                                 length += ((ep->bEndpointAddress & USB_DIR_IN)
2205                                                 ? dma_src_len : dma_dest_len)
2206                                         (ep, req->req.dma + length);
2207                                 buf[0] = 0;
2208                         }
2209                         seq_printf(s, "\treq %p len %d/%d buf %p\n",
2210                                         &req->req, length,
2211                                         req->req.length, req->req.buf);
2212                 }
2213 }
2214
2215 static char *trx_mode(unsigned m, int enabled)
2216 {
2217         switch (m) {
2218         case 0:         return enabled ? "*6wire" : "unused";
2219         case 1:         return "4wire";
2220         case 2:         return "3wire";
2221         case 3:         return "6wire";
2222         default:        return "unknown";
2223         }
2224 }
2225
2226 static int proc_otg_show(struct seq_file *s)
2227 {
2228         u32             tmp;
2229         u32             trans;
2230
2231         tmp = OTG_REV_REG;
2232         trans = USB_TRANSCEIVER_CTRL_REG;
2233         seq_printf(s, "\nOTG rev %d.%d, transceiver_ctrl %05x\n",
2234                 tmp >> 4, tmp & 0xf, trans);
2235         tmp = OTG_SYSCON_1_REG;
2236         seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2237                         FOURBITS "\n", tmp,
2238                 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2239                 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2240                 (USB0_TRX_MODE(tmp) == 0 && !cpu_is_omap1710())
2241                         ? "internal"
2242                         : trx_mode(USB0_TRX_MODE(tmp), 1),
2243                 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2244                 (tmp & HST_IDLE_EN) ? " !host" : "",
2245                 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2246                 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2247         tmp = OTG_SYSCON_2_REG;
2248         seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2249                         " b_ase_brst=%d hmc=%d\n", tmp,
2250                 (tmp & OTG_EN) ? " otg_en" : "",
2251                 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2252                 // much more SRP stuff
2253                 (tmp & SRP_DATA) ? " srp_data" : "",
2254                 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2255                 (tmp & OTG_PADEN) ? " otg_paden" : "",
2256                 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2257                 (tmp & UHOST_EN) ? " uhost_en" : "",
2258                 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2259                 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2260                 B_ASE_BRST(tmp),
2261                 OTG_HMC(tmp));
2262         tmp = OTG_CTRL_REG;
2263         seq_printf(s, "otg_ctrl    %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2264                 (tmp & OTG_ASESSVLD) ? " asess" : "",
2265                 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2266                 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2267                 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2268                 (tmp & OTG_ID) ? " id" : "",
2269                 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2270                 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2271                 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2272                 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2273                 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2274                 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2275                 (tmp & OTG_PULLDOWN) ? " down" : "",
2276                 (tmp & OTG_PULLUP) ? " up" : "",
2277                 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2278                 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2279                 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2280                 (tmp & OTG_PU_ID) ? " pu_id" : ""
2281                 );
2282         tmp = OTG_IRQ_EN_REG;
2283         seq_printf(s, "otg_irq_en  %04x" "\n", tmp);
2284         tmp = OTG_IRQ_SRC_REG;
2285         seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2286         tmp = OTG_OUTCTRL_REG;
2287         seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2288         tmp = OTG_TEST_REG;
2289         seq_printf(s, "otg_test    %04x" "\n", tmp);
2290         return 0;
2291 }
2292
2293 static int proc_udc_show(struct seq_file *s, void *_)
2294 {
2295         u32             tmp;
2296         struct omap_ep  *ep;
2297         unsigned long   flags;
2298
2299         spin_lock_irqsave(&udc->lock, flags);
2300
2301         seq_printf(s, "%s, version: " DRIVER_VERSION
2302 #ifdef  USE_ISO
2303                 " (iso)"
2304 #endif
2305                 "%s\n",
2306                 driver_desc,
2307                 use_dma ?  " (dma)" : "");
2308
2309         tmp = UDC_REV_REG & 0xff;
2310         seq_printf(s,
2311                 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2312                 "hmc %d, transceiver %s\n",
2313                 tmp >> 4, tmp & 0xf,
2314                 fifo_mode,
2315                 udc->driver ? udc->driver->driver.name : "(none)",
2316                 HMC,
2317                 udc->transceiver ? udc->transceiver->label : "(none)");
2318         seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2319                 __REG16(ULPD_CLOCK_CTRL),
2320                 __REG16(ULPD_SOFT_REQ),
2321                 __REG16(ULPD_STATUS_REQ));
2322
2323         /* OTG controller registers */
2324         if (!cpu_is_omap15xx())
2325                 proc_otg_show(s);
2326
2327         tmp = UDC_SYSCON1_REG;
2328         seq_printf(s, "\nsyscon1     %04x" EIGHTBITS "\n", tmp,
2329                 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2330                 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2331                 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2332                 (tmp & UDC_NAK_EN) ? " nak" : "",
2333                 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2334                 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2335                 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2336                 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2337         // syscon2 is write-only
2338
2339         /* UDC controller registers */
2340         if (!(tmp & UDC_PULLUP_EN)) {
2341                 seq_printf(s, "(suspended)\n");
2342                 spin_unlock_irqrestore(&udc->lock, flags);
2343                 return 0;
2344         }
2345
2346         tmp = UDC_DEVSTAT_REG;
2347         seq_printf(s, "devstat     %04x" EIGHTBITS "%s%s\n", tmp,
2348                 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2349                 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2350                 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2351                 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2352                 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2353                 (tmp & UDC_SUS) ? " SUS" : "",
2354                 (tmp & UDC_CFG) ? " CFG" : "",
2355                 (tmp & UDC_ADD) ? " ADD" : "",
2356                 (tmp & UDC_DEF) ? " DEF" : "",
2357                 (tmp & UDC_ATT) ? " ATT" : "");
2358         seq_printf(s, "sof         %04x\n", UDC_SOF_REG);
2359         tmp = UDC_IRQ_EN_REG;
2360         seq_printf(s, "irq_en      %04x" FOURBITS "%s\n", tmp,
2361                 (tmp & UDC_SOF_IE) ? " sof" : "",
2362                 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2363                 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2364                 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2365                 (tmp & UDC_EP0_IE) ? " ep0" : "");
2366         tmp = UDC_IRQ_SRC_REG;
2367         seq_printf(s, "irq_src     %04x" EIGHTBITS "%s%s\n", tmp,
2368                 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2369                 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2370                 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2371                 (tmp & UDC_SOF) ? " sof" : "",
2372                 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2373                 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2374                 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2375                 (tmp & UDC_SETUP) ? " setup" : "",
2376                 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2377                 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2378         if (use_dma) {
2379                 unsigned i;
2380
2381                 tmp = UDC_DMA_IRQ_EN_REG;
2382                 seq_printf(s, "dma_irq_en  %04x%s" EIGHTBITS "\n", tmp,
2383                         (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2384                         (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2385                         (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2386
2387                         (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2388                         (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2389                         (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2390
2391                         (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2392                         (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2393                         (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2394
2395                 tmp = UDC_RXDMA_CFG_REG;
2396                 seq_printf(s, "rxdma_cfg   %04x\n", tmp);
2397                 if (tmp) {
2398                         for (i = 0; i < 3; i++) {
2399                                 if ((tmp & (0x0f << (i * 4))) == 0)
2400                                         continue;
2401                                 seq_printf(s, "rxdma[%d]    %04x\n", i,
2402                                                 UDC_RXDMA_REG(i + 1));
2403                         }
2404                 }
2405                 tmp = UDC_TXDMA_CFG_REG;
2406                 seq_printf(s, "txdma_cfg   %04x\n", tmp);
2407                 if (tmp) {
2408                         for (i = 0; i < 3; i++) {
2409                                 if (!(tmp & (0x0f << (i * 4))))
2410                                         continue;
2411                                 seq_printf(s, "txdma[%d]    %04x\n", i,
2412                                                 UDC_TXDMA_REG(i + 1));
2413                         }
2414                 }
2415         }
2416
2417         tmp = UDC_DEVSTAT_REG;
2418         if (tmp & UDC_ATT) {
2419                 proc_ep_show(s, &udc->ep[0]);
2420                 if (tmp & UDC_ADD) {
2421                         list_for_each_entry (ep, &udc->gadget.ep_list,
2422                                         ep.ep_list) {
2423                                 if (ep->desc)
2424                                         proc_ep_show(s, ep);
2425                         }
2426                 }
2427         }
2428         spin_unlock_irqrestore(&udc->lock, flags);
2429         return 0;
2430 }
2431
2432 static int proc_udc_open(struct inode *inode, struct file *file)
2433 {
2434         return single_open(file, proc_udc_show, NULL);
2435 }
2436
2437 static const struct file_operations proc_ops = {
2438         .open           = proc_udc_open,
2439         .read           = seq_read,
2440         .llseek         = seq_lseek,
2441         .release        = single_release,
2442 };
2443
2444 static void create_proc_file(void)
2445 {
2446         struct proc_dir_entry *pde;
2447
2448         pde = create_proc_entry (proc_filename, 0, NULL);
2449         if (pde)
2450                 pde->proc_fops = &proc_ops;
2451 }
2452
2453 static void remove_proc_file(void)
2454 {
2455         remove_proc_entry(proc_filename, NULL);
2456 }
2457
2458 #else
2459
2460 static inline void create_proc_file(void) {}
2461 static inline void remove_proc_file(void) {}
2462
2463 #endif
2464
2465 /*-------------------------------------------------------------------------*/
2466
2467 /* Before this controller can enumerate, we need to pick an endpoint
2468  * configuration, or "fifo_mode"  That involves allocating 2KB of packet
2469  * buffer space among the endpoints we'll be operating.
2470  *
2471  * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when
2472  * UDC_SYSCON_1_REG.CFG_LOCK is set can now work.  We won't use that
2473  * capability yet though.
2474  */
2475 static unsigned __init
2476 omap_ep_setup(char *name, u8 addr, u8 type,
2477                 unsigned buf, unsigned maxp, int dbuf)
2478 {
2479         struct omap_ep  *ep;
2480         u16             epn_rxtx = 0;
2481
2482         /* OUT endpoints first, then IN */
2483         ep = &udc->ep[addr & 0xf];
2484         if (addr & USB_DIR_IN)
2485                 ep += 16;
2486
2487         /* in case of ep init table bugs */
2488         BUG_ON(ep->name[0]);
2489
2490         /* chip setup ... bit values are same for IN, OUT */
2491         if (type == USB_ENDPOINT_XFER_ISOC) {
2492                 switch (maxp) {
2493                 case 8:         epn_rxtx = 0 << 12; break;
2494                 case 16:        epn_rxtx = 1 << 12; break;
2495                 case 32:        epn_rxtx = 2 << 12; break;
2496                 case 64:        epn_rxtx = 3 << 12; break;
2497                 case 128:       epn_rxtx = 4 << 12; break;
2498                 case 256:       epn_rxtx = 5 << 12; break;
2499                 case 512:       epn_rxtx = 6 << 12; break;
2500                 default:        BUG();
2501                 }
2502                 epn_rxtx |= UDC_EPN_RX_ISO;
2503                 dbuf = 1;
2504         } else {
2505                 /* double-buffering "not supported" on 15xx,
2506                  * and ignored for PIO-IN on 16xx
2507                  */
2508                 if (!use_dma || cpu_is_omap15xx())
2509                         dbuf = 0;
2510
2511                 switch (maxp) {
2512                 case 8:         epn_rxtx = 0 << 12; break;
2513                 case 16:        epn_rxtx = 1 << 12; break;
2514                 case 32:        epn_rxtx = 2 << 12; break;
2515                 case 64:        epn_rxtx = 3 << 12; break;
2516                 default:        BUG();
2517                 }
2518                 if (dbuf && addr)
2519                         epn_rxtx |= UDC_EPN_RX_DB;
2520                 init_timer(&ep->timer);
2521                 ep->timer.function = pio_out_timer;
2522                 ep->timer.data = (unsigned long) ep;
2523         }
2524         if (addr)
2525                 epn_rxtx |= UDC_EPN_RX_VALID;
2526         BUG_ON(buf & 0x07);
2527         epn_rxtx |= buf >> 3;
2528
2529         DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2530                 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2531
2532         if (addr & USB_DIR_IN)
2533                 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx;
2534         else
2535                 UDC_EP_RX_REG(addr) = epn_rxtx;
2536
2537         /* next endpoint's buffer starts after this one's */
2538         buf += maxp;
2539         if (dbuf)
2540                 buf += maxp;
2541         BUG_ON(buf > 2048);
2542
2543         /* set up driver data structures */
2544         BUG_ON(strlen(name) >= sizeof ep->name);
2545         strlcpy(ep->name, name, sizeof ep->name);
2546         INIT_LIST_HEAD(&ep->queue);
2547         INIT_LIST_HEAD(&ep->iso);
2548         ep->bEndpointAddress = addr;
2549         ep->bmAttributes = type;
2550         ep->double_buf = dbuf;
2551         ep->udc = udc;
2552
2553         ep->ep.name = ep->name;
2554         ep->ep.ops = &omap_ep_ops;
2555         ep->ep.maxpacket = ep->maxpacket = maxp;
2556         list_add_tail (&ep->ep.ep_list, &udc->gadget.ep_list);
2557
2558         return buf;
2559 }
2560
2561 static void omap_udc_release(struct device *dev)
2562 {
2563         complete(udc->done);
2564         kfree (udc);
2565         udc = NULL;
2566 }
2567
2568 static int __init
2569 omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2570 {
2571         unsigned        tmp, buf;
2572
2573         /* abolish any previous hardware state */
2574         UDC_SYSCON1_REG = 0;
2575         UDC_IRQ_EN_REG = 0;
2576         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2577         UDC_DMA_IRQ_EN_REG = 0;
2578         UDC_RXDMA_CFG_REG = 0;
2579         UDC_TXDMA_CFG_REG = 0;
2580
2581         /* UDC_PULLUP_EN gates the chip clock */
2582         // OTG_SYSCON_1_REG |= DEV_IDLE_EN;
2583
2584         udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2585         if (!udc)
2586                 return -ENOMEM;
2587
2588         spin_lock_init (&udc->lock);
2589
2590         udc->gadget.ops = &omap_gadget_ops;
2591         udc->gadget.ep0 = &udc->ep[0].ep;
2592         INIT_LIST_HEAD(&udc->gadget.ep_list);
2593         INIT_LIST_HEAD(&udc->iso);
2594         udc->gadget.speed = USB_SPEED_UNKNOWN;
2595         udc->gadget.name = driver_name;
2596
2597         device_initialize(&udc->gadget.dev);
2598         strcpy (udc->gadget.dev.bus_id, "gadget");
2599         udc->gadget.dev.release = omap_udc_release;
2600         udc->gadget.dev.parent = &odev->dev;
2601         if (use_dma)
2602                 udc->gadget.dev.dma_mask = odev->dev.dma_mask;
2603
2604         udc->transceiver = xceiv;
2605
2606         /* ep0 is special; put it right after the SETUP buffer */
2607         buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2608                         8 /* after SETUP */, 64 /* maxpacket */, 0);
2609         list_del_init(&udc->ep[0].ep.ep_list);
2610
2611         /* initially disable all non-ep0 endpoints */
2612         for (tmp = 1; tmp < 15; tmp++) {
2613                 UDC_EP_RX_REG(tmp) = 0;
2614                 UDC_EP_TX_REG(tmp) = 0;
2615         }
2616
2617 #define OMAP_BULK_EP(name,addr) \
2618         buf = omap_ep_setup(name "-bulk", addr, \
2619                         USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2620 #define OMAP_INT_EP(name,addr, maxp) \
2621         buf = omap_ep_setup(name "-int", addr, \
2622                         USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2623 #define OMAP_ISO_EP(name,addr, maxp) \
2624         buf = omap_ep_setup(name "-iso", addr, \
2625                         USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2626
2627         switch (fifo_mode) {
2628         case 0:
2629                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2630                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2631                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2632                 break;
2633         case 1:
2634                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2635                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2636                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2637
2638                 OMAP_BULK_EP("ep3in",  USB_DIR_IN  | 3);
2639                 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2640                 OMAP_INT_EP("ep10in",  USB_DIR_IN  | 10, 16);
2641
2642                 OMAP_BULK_EP("ep5in",  USB_DIR_IN  | 5);
2643                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2644                 OMAP_INT_EP("ep11in",  USB_DIR_IN  | 11, 16);
2645
2646                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2647                 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2648                 OMAP_INT_EP("ep12in",  USB_DIR_IN  | 12, 16);
2649
2650                 OMAP_BULK_EP("ep7in",  USB_DIR_IN  | 7);
2651                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2652                 OMAP_INT_EP("ep13in",  USB_DIR_IN  | 13, 16);
2653                 OMAP_INT_EP("ep13out", USB_DIR_OUT | 13, 16);
2654
2655                 OMAP_BULK_EP("ep8in",  USB_DIR_IN  | 8);
2656                 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2657                 OMAP_INT_EP("ep14in",  USB_DIR_IN  | 14, 16);
2658                 OMAP_INT_EP("ep14out", USB_DIR_OUT | 14, 16);
2659
2660                 OMAP_BULK_EP("ep15in",  USB_DIR_IN  | 15);
2661                 OMAP_BULK_EP("ep15out", USB_DIR_OUT | 15);
2662
2663                 break;
2664
2665 #ifdef  USE_ISO
2666         case 2:                 /* mixed iso/bulk */
2667                 OMAP_ISO_EP("ep1in",   USB_DIR_IN  | 1, 256);
2668                 OMAP_ISO_EP("ep2out",  USB_DIR_OUT | 2, 256);
2669                 OMAP_ISO_EP("ep3in",   USB_DIR_IN  | 3, 128);
2670                 OMAP_ISO_EP("ep4out",  USB_DIR_OUT | 4, 128);
2671
2672                 OMAP_INT_EP("ep5in",   USB_DIR_IN  | 5, 16);
2673
2674                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2675                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2676                 OMAP_INT_EP("ep8in",   USB_DIR_IN  | 8, 16);
2677                 break;
2678         case 3:                 /* mixed bulk/iso */
2679                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2680                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2681                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2682
2683                 OMAP_BULK_EP("ep4in",  USB_DIR_IN  | 4);
2684                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2685                 OMAP_INT_EP("ep6in",   USB_DIR_IN  | 6, 16);
2686
2687                 OMAP_ISO_EP("ep7in",   USB_DIR_IN  | 7, 256);
2688                 OMAP_ISO_EP("ep8out",  USB_DIR_OUT | 8, 256);
2689                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2690                 break;
2691 #endif
2692
2693         /* add more modes as needed */
2694
2695         default:
2696                 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2697                 return -ENODEV;
2698         }
2699         UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR;
2700         INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2701         return 0;
2702 }
2703
2704 static int __init omap_udc_probe(struct platform_device *pdev)
2705 {
2706         int                     status = -ENODEV;
2707         int                     hmc;
2708         struct otg_transceiver  *xceiv = NULL;
2709         const char              *type = NULL;
2710         struct omap_usb_config  *config = pdev->dev.platform_data;
2711
2712         /* NOTE:  "knows" the order of the resources! */
2713         if (!request_mem_region(pdev->resource[0].start,
2714                         pdev->resource[0].end - pdev->resource[0].start + 1,
2715                         driver_name)) {
2716                 DBG("request_mem_region failed\n");
2717                 return -EBUSY;
2718         }
2719
2720         INFO("OMAP UDC rev %d.%d%s\n",
2721                 UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
2722                 config->otg ? ", Mini-AB" : "");
2723
2724         /* use the mode given to us by board init code */
2725         if (cpu_is_omap15xx()) {
2726                 hmc = HMC_1510;
2727                 type = "(unknown)";
2728
2729                 if (machine_is_omap_innovator()) {
2730                         /* just set up software VBUS detect, and then
2731                          * later rig it so we always report VBUS.
2732                          * FIXME without really sensing VBUS, we can't
2733                          * know when to turn PULLUP_EN on/off; and that
2734                          * means we always "need" the 48MHz clock.
2735                          */
2736                         u32 tmp = FUNC_MUX_CTRL_0_REG;
2737
2738                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
2739                         tmp |= VBUS_MODE_1510;
2740                         tmp &= ~VBUS_CTRL_1510;
2741                         FUNC_MUX_CTRL_0_REG = tmp;
2742                 }
2743         } else {
2744                 /* The transceiver may package some GPIO logic or handle
2745                  * loopback and/or transceiverless setup; if we find one,
2746                  * use it.  Except for OTG, we don't _need_ to talk to one;
2747                  * but not having one probably means no VBUS detection.
2748                  */
2749                 xceiv = otg_get_transceiver();
2750                 if (xceiv)
2751                         type = xceiv->label;
2752                 else if (config->otg) {
2753                         DBG("OTG requires external transceiver!\n");
2754                         goto cleanup0;
2755                 }
2756
2757                 hmc = HMC_1610;
2758                 switch (hmc) {
2759                 case 0:                 /* POWERUP DEFAULT == 0 */
2760                 case 4:
2761                 case 12:
2762                 case 20:
2763                         if (!cpu_is_omap1710()) {
2764                                 type = "integrated";
2765                                 break;
2766                         }
2767                         /* FALL THROUGH */
2768                 case 3:
2769                 case 11:
2770                 case 16:
2771                 case 19:
2772                 case 25:
2773                         if (!xceiv) {
2774                                 DBG("external transceiver not registered!\n");
2775                                 type = "unknown";
2776                         }
2777                         break;
2778                 case 21:                        /* internal loopback */
2779                         type = "loopback";
2780                         break;
2781                 case 14:                        /* transceiverless */
2782                         if (cpu_is_omap1710())
2783                                 goto bad_on_1710;
2784                         /* FALL THROUGH */
2785                 case 13:
2786                 case 15:
2787                         type = "no";
2788                         break;
2789
2790                 default:
2791 bad_on_1710:
2792                         ERR("unrecognized UDC HMC mode %d\n", hmc);
2793                         goto cleanup0;
2794                 }
2795         }
2796         INFO("hmc mode %d, %s transceiver\n", hmc, type);
2797
2798         /* a "gadget" abstracts/virtualizes the controller */
2799         status = omap_udc_setup(pdev, xceiv);
2800         if (status) {
2801                 goto cleanup0;
2802         }
2803         xceiv = NULL;
2804         // "udc" is now valid
2805         pullup_disable(udc);
2806 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
2807         udc->gadget.is_otg = (config->otg != 0);
2808 #endif
2809
2810         /* starting with omap1710 es2.0, clear toggle is a separate bit */
2811         if (UDC_REV_REG >= 0x61)
2812                 udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE;
2813         else
2814                 udc->clr_halt = UDC_RESET_EP;
2815
2816         /* USB general purpose IRQ:  ep0, state changes, dma, etc */
2817         status = request_irq(pdev->resource[1].start, omap_udc_irq,
2818                         IRQF_SAMPLE_RANDOM, driver_name, udc);
2819         if (status != 0) {
2820                 ERR( "can't get irq %ld, err %d\n",
2821                         pdev->resource[1].start, status);
2822                 goto cleanup1;
2823         }
2824
2825         /* USB "non-iso" IRQ (PIO for all but ep0) */
2826         status = request_irq(pdev->resource[2].start, omap_udc_pio_irq,
2827                         IRQF_SAMPLE_RANDOM, "omap_udc pio", udc);
2828         if (status != 0) {
2829                 ERR( "can't get irq %ld, err %d\n",
2830                         pdev->resource[2].start, status);
2831                 goto cleanup2;
2832         }
2833 #ifdef  USE_ISO
2834         status = request_irq(pdev->resource[3].start, omap_udc_iso_irq,
2835                         IRQF_DISABLED, "omap_udc iso", udc);
2836         if (status != 0) {
2837                 ERR("can't get irq %ld, err %d\n",
2838                         pdev->resource[3].start, status);
2839                 goto cleanup3;
2840         }
2841 #endif
2842
2843         create_proc_file();
2844         device_add(&udc->gadget.dev);
2845         return 0;
2846
2847 #ifdef  USE_ISO
2848 cleanup3:
2849         free_irq(pdev->resource[2].start, udc);
2850 #endif
2851
2852 cleanup2:
2853         free_irq(pdev->resource[1].start, udc);
2854
2855 cleanup1:
2856         kfree (udc);
2857         udc = NULL;
2858
2859 cleanup0:
2860         if (xceiv)
2861                 put_device(xceiv->dev);
2862         release_mem_region(pdev->resource[0].start,
2863                         pdev->resource[0].end - pdev->resource[0].start + 1);
2864         return status;
2865 }
2866
2867 static int __exit omap_udc_remove(struct platform_device *pdev)
2868 {
2869         DECLARE_COMPLETION_ONSTACK(done);
2870
2871         if (!udc)
2872                 return -ENODEV;
2873
2874         udc->done = &done;
2875
2876         pullup_disable(udc);
2877         if (udc->transceiver) {
2878                 put_device(udc->transceiver->dev);
2879                 udc->transceiver = NULL;
2880         }
2881         UDC_SYSCON1_REG = 0;
2882
2883         remove_proc_file();
2884
2885 #ifdef  USE_ISO
2886         free_irq(pdev->resource[3].start, udc);
2887 #endif
2888         free_irq(pdev->resource[2].start, udc);
2889         free_irq(pdev->resource[1].start, udc);
2890
2891         release_mem_region(pdev->resource[0].start,
2892                         pdev->resource[0].end - pdev->resource[0].start + 1);
2893
2894         device_unregister(&udc->gadget.dev);
2895         wait_for_completion(&done);
2896
2897         return 0;
2898 }
2899
2900 /* suspend/resume/wakeup from sysfs (echo > power/state) or when the
2901  * system is forced into deep sleep
2902  *
2903  * REVISIT we should probably reject suspend requests when there's a host
2904  * session active, rather than disconnecting, at least on boards that can
2905  * report VBUS irqs (UDC_DEVSTAT_REG.UDC_ATT).  And in any case, we need to
2906  * make host resumes and VBUS detection trigger OMAP wakeup events; that
2907  * may involve talking to an external transceiver (e.g. isp1301).
2908  */
2909
2910 static int omap_udc_suspend(struct platform_device *dev, pm_message_t message)
2911 {
2912         u32     devstat;
2913
2914         devstat = UDC_DEVSTAT_REG;
2915
2916         /* we're requesting 48 MHz clock if the pullup is enabled
2917          * (== we're attached to the host) and we're not suspended,
2918          * which would prevent entry to deep sleep...
2919          */
2920         if ((devstat & UDC_ATT) != 0 && (devstat & UDC_SUS) == 0) {
2921                 WARN("session active; suspend requires disconnect\n");
2922                 omap_pullup(&udc->gadget, 0);
2923         }
2924
2925         udc->gadget.dev.power.power_state = PMSG_SUSPEND;
2926         udc->gadget.dev.parent->power.power_state = PMSG_SUSPEND;
2927         return 0;
2928 }
2929
2930 static int omap_udc_resume(struct platform_device *dev)
2931 {
2932         DBG("resume + wakeup/SRP\n");
2933         omap_pullup(&udc->gadget, 1);
2934
2935         /* maybe the host would enumerate us if we nudged it */
2936         msleep(100);
2937         return omap_wakeup(&udc->gadget);
2938 }
2939
2940 /*-------------------------------------------------------------------------*/
2941
2942 static struct platform_driver udc_driver = {
2943         .probe          = omap_udc_probe,
2944         .remove         = __exit_p(omap_udc_remove),
2945         .suspend        = omap_udc_suspend,
2946         .resume         = omap_udc_resume,
2947         .driver         = {
2948                 .owner  = THIS_MODULE,
2949                 .name   = (char *) driver_name,
2950         },
2951 };
2952
2953 static int __init udc_init(void)
2954 {
2955         INFO("%s, version: " DRIVER_VERSION
2956 #ifdef  USE_ISO
2957                 " (iso)"
2958 #endif
2959                 "%s\n", driver_desc,
2960                 use_dma ?  " (dma)" : "");
2961         return platform_driver_register(&udc_driver);
2962 }
2963 module_init(udc_init);
2964
2965 static void __exit udc_exit(void)
2966 {
2967         platform_driver_unregister(&udc_driver);
2968 }
2969 module_exit(udc_exit);
2970
2971 MODULE_DESCRIPTION(DRIVER_DESC);
2972 MODULE_LICENSE("GPL");
2973