drivers/tty/serial/omap-serial.c

   1 /*
   2  * Driver for OMAP-UART controller.
   3  * Based on drivers/serial/8250.c
   4  *
   5  * Copyright (C) 2010 Texas Instruments.
   6  *
   7  * Authors:
   8  *      Govindraj R     <govindraj.raja@ti.com>
   9  *      Thara Gopinath  <thara@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * Note: This driver is made separate from 8250 driver as we cannot
  17  * over load 8250 driver with omap platform specific configuration for
  18  * features like DMA, it makes easier to implement features like DMA and
  19  * hardware flow control and software flow control configuration with
  20  * this driver as required for the omap-platform.
  21  */
  22
  23 #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  24 #define SUPPORT_SYSRQ
  25 #endif
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/console.h>
  30 #include <linux/serial_reg.h>
  31 #include <linux/delay.h>
  32 #include <linux/slab.h>
  33 #include <linux/tty.h>
  34 #include <linux/tty_flip.h>
  35 #include <linux/io.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/clk.h>
  38 #include <linux/serial_core.h>
  39 #include <linux/irq.h>
  40
  41 #include <plat/dma.h>
  42 #include <plat/dmtimer.h>
  43 #include <plat/omap-serial.h>
  44
  45 /* SCR register bitmasks */
  46 #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK               (1 << 7)
  47
  48 /* FCR register bitmasks */
  49 #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT                6
  50 #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK                 (0x3 << 6)
  51
  52 static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
  53
  54 /* Forward declaration of functions */
  55 static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
  56 static void serial_omap_rx_timeout(unsigned long uart_no);
  57 static int serial_omap_start_rxdma(struct uart_omap_port *up);
  58
  59 static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
  60 {
  61         offset <<= up->port.regshift;
  62         return readw(up->port.membase + offset);
  63 }
  64
  65 static inline void serial_out(struct uart_omap_port *up, int offset, int value)
  66 {
  67         offset <<= up->port.regshift;
  68         writew(value, up->port.membase + offset);
  69 }
  70
  71 static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
  72 {
  73         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  74         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  75                        UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  76         serial_out(up, UART_FCR, 0);
  77 }
  78
  79 /*
  80  * serial_omap_get_divisor - calculate divisor value
  81  * @port: uart port info
  82  * @baud: baudrate for which divisor needs to be calculated.
  83  *
  84  * We have written our own function to get the divisor so as to support
  85  * 13x mode. 3Mbps Baudrate as an different divisor.
  86  * Reference OMAP TRM Chapter 17:
  87  * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates
  88  * referring to oversampling - divisor value
  89  * baudrate 460,800 to 3,686,400 all have divisor 13
  90  * except 3,000,000 which has divisor value 16
  91  */
  92 static unsigned int
  93 serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
  94 {
  95         unsigned int divisor;
  96
  97         if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
  98                 divisor = 13;
  99         else
 100                 divisor = 16;
 101         return port->uartclk/(baud * divisor);
 102 }
 103
 104 static void serial_omap_stop_rxdma(struct uart_omap_port *up)
 105 {
 106         if (up->uart_dma.rx_dma_used) {
 107                 del_timer(&up->uart_dma.rx_timer);
 108                 omap_stop_dma(up->uart_dma.rx_dma_channel);
 109                 omap_free_dma(up->uart_dma.rx_dma_channel);
 110                 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
 111                 up->uart_dma.rx_dma_used = false;
 112         }
 113 }
 114
 115 static void serial_omap_enable_ms(struct uart_port *port)
 116 {
 117         struct uart_omap_port *up = (struct uart_omap_port *)port;
 118
 119         dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
 120         up->ier |= UART_IER_MSI;
 121         serial_out(up, UART_IER, up->ier);
 122 }
 123
 124 static void serial_omap_stop_tx(struct uart_port *port)
 125 {
 126         struct uart_omap_port *up = (struct uart_omap_port *)port;
 127
 128         if (up->use_dma &&
 129                 up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
 130                 /*
 131                  * Check if dma is still active. If yes do nothing,
 132                  * return. Else stop dma
 133                  */
 134                 if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
 135                         return;
 136                 omap_stop_dma(up->uart_dma.tx_dma_channel);
 137                 omap_free_dma(up->uart_dma.tx_dma_channel);
 138                 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
 139         }
 140
 141         if (up->ier & UART_IER_THRI) {
 142                 up->ier &= ~UART_IER_THRI;
 143                 serial_out(up, UART_IER, up->ier);
 144         }
 145 }
 146
 147 static void serial_omap_stop_rx(struct uart_port *port)
 148 {
 149         struct uart_omap_port *up = (struct uart_omap_port *)port;
 150
 151         if (up->use_dma)
 152                 serial_omap_stop_rxdma(up);
 153         up->ier &= ~UART_IER_RLSI;
 154         up->port.read_status_mask &= ~UART_LSR_DR;
 155         serial_out(up, UART_IER, up->ier);
 156 }
 157
 158 static inline void receive_chars(struct uart_omap_port *up, int *status)
 159 {
 160         struct tty_struct *tty = up->port.state->port.tty;
 161         unsigned int flag;
 162         unsigned char ch, lsr = *status;
 163         int max_count = 256;
 164
 165         do {
 166                 if (likely(lsr & UART_LSR_DR))
 167                         ch = serial_in(up, UART_RX);
 168                 flag = TTY_NORMAL;
 169                 up->port.icount.rx++;
 170
 171                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
 172                         /*
 173                          * For statistics only
 174                          */
 175                         if (lsr & UART_LSR_BI) {
 176                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 177                                 up->port.icount.brk++;
 178                                 /*
 179                                  * We do the SysRQ and SAK checking
 180                                  * here because otherwise the break
 181                                  * may get masked by ignore_status_mask
 182                                  * or read_status_mask.
 183                                  */
 184                                 if (uart_handle_break(&up->port))
 185                                         goto ignore_char;
 186                         } else if (lsr & UART_LSR_PE) {
 187                                 up->port.icount.parity++;
 188                         } else if (lsr & UART_LSR_FE) {
 189                                 up->port.icount.frame++;
 190                         }
 191
 192                         if (lsr & UART_LSR_OE)
 193                                 up->port.icount.overrun++;
 194
 195                         /*
 196                          * Mask off conditions which should be ignored.
 197                          */
 198                         lsr &= up->port.read_status_mask;
 199
 200 #ifdef CONFIG_SERIAL_OMAP_CONSOLE
 201                         if (up->port.line == up->port.cons->index) {
 202                                 /* Recover the break flag from console xmit */
 203                                 lsr |= up->lsr_break_flag;
 204                         }
 205 #endif
 206                         if (lsr & UART_LSR_BI)
 207                                 flag = TTY_BREAK;
 208                         else if (lsr & UART_LSR_PE)
 209                                 flag = TTY_PARITY;
 210                         else if (lsr & UART_LSR_FE)
 211                                 flag = TTY_FRAME;
 212                 }
 213
 214                 if (uart_handle_sysrq_char(&up->port, ch))
 215                         goto ignore_char;
 216                 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
 217 ignore_char:
 218                 lsr = serial_in(up, UART_LSR);
 219         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
 220         spin_unlock(&up->port.lock);
 221         tty_flip_buffer_push(tty);
 222         spin_lock(&up->port.lock);
 223 }
 224
 225 static void transmit_chars(struct uart_omap_port *up)
 226 {
 227         struct circ_buf *xmit = &up->port.state->xmit;
 228         int count;
 229
 230         if (up->port.x_char) {
 231                 serial_out(up, UART_TX, up->port.x_char);
 232                 up->port.icount.tx++;
 233                 up->port.x_char = 0;
 234                 return;
 235         }
 236         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 237                 serial_omap_stop_tx(&up->port);
 238                 return;
 239         }
 240         count = up->port.fifosize / 4;
 241         do {
 242                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 243                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 244                 up->port.icount.tx++;
 245                 if (uart_circ_empty(xmit))
 246                         break;
 247         } while (--count > 0);
 248
 249         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 250                 uart_write_wakeup(&up->port);
 251
 252         if (uart_circ_empty(xmit))
 253                 serial_omap_stop_tx(&up->port);
 254 }
 255
 256 static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
 257 {
 258         if (!(up->ier & UART_IER_THRI)) {
 259                 up->ier |= UART_IER_THRI;
 260                 serial_out(up, UART_IER, up->ier);
 261         }
 262 }
 263
 264 static void serial_omap_start_tx(struct uart_port *port)
 265 {
 266         struct uart_omap_port *up = (struct uart_omap_port *)port;
 267         struct circ_buf *xmit;
 268         unsigned int start;
 269         int ret = 0;
 270
 271         if (!up->use_dma) {
 272                 omap_uart_block_sleep_id(up->pdev->id);
 273                 serial_omap_enable_ier_thri(up);
 274                 return;
 275         }
 276
 277         if (up->uart_dma.tx_dma_used)
 278                 return;
 279
 280         xmit = &up->port.state->xmit;
 281
 282         if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
 283                 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
 284                                 "UART Tx DMA",
 285                                 (void *)uart_tx_dma_callback, up,
 286                                 &(up->uart_dma.tx_dma_channel));
 287
 288                 if (ret < 0) {
 289                         serial_omap_enable_ier_thri(up);
 290                         return;
 291                 }
 292         }
 293         spin_lock(&(up->uart_dma.tx_lock));
 294         up->uart_dma.tx_dma_used = true;
 295         spin_unlock(&(up->uart_dma.tx_lock));
 296
 297         start = up->uart_dma.tx_buf_dma_phys +
 298                                 (xmit->tail & (UART_XMIT_SIZE - 1));
 299
 300         up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
 301         /*
 302          * It is a circular buffer. See if the buffer has wounded back.
 303          * If yes it will have to be transferred in two separate dma
 304          * transfers
 305          */
 306         if (start + up->uart_dma.tx_buf_size >=
 307                         up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
 308                 up->uart_dma.tx_buf_size =
 309                         (up->uart_dma.tx_buf_dma_phys +
 310                         UART_XMIT_SIZE) - start;
 311
 312         omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
 313                                 OMAP_DMA_AMODE_CONSTANT,
 314                                 up->uart_dma.uart_base, 0, 0);
 315         omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
 316                                 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
 317         omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
 318                                 OMAP_DMA_DATA_TYPE_S8,
 319                                 up->uart_dma.tx_buf_size, 1,
 320                                 OMAP_DMA_SYNC_ELEMENT,
 321                                 up->uart_dma.uart_dma_tx, 0);
 322         /* FIXME: Cache maintenance needed here? */
 323         omap_start_dma(up->uart_dma.tx_dma_channel);
 324 }
 325
 326 static unsigned int check_modem_status(struct uart_omap_port *up)
 327 {
 328         unsigned int status;
 329
 330         status = serial_in(up, UART_MSR);
 331         status |= up->msr_saved_flags;
 332         up->msr_saved_flags = 0;
 333         if ((status & UART_MSR_ANY_DELTA) == 0)
 334                 return status;
 335
 336         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
 337             up->port.state != NULL) {
 338                 if (status & UART_MSR_TERI)
 339                         up->port.icount.rng++;
 340                 if (status & UART_MSR_DDSR)
 341                         up->port.icount.dsr++;
 342                 if (status & UART_MSR_DDCD)
 343                         uart_handle_dcd_change
 344                                 (&up->port, status & UART_MSR_DCD);
 345                 if (status & UART_MSR_DCTS)
 346                         uart_handle_cts_change
 347                                 (&up->port, status & UART_MSR_CTS);
 348                 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 349         }
 350
 351         return status;
 352 }
 353
 354 /**
 355  * serial_omap_irq() - This handles the interrupt from one port
 356  * @irq: uart port irq number
 357  * @dev_id: uart port info
 358  */
 359 static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
 360 {
 361         struct uart_omap_port *up = dev_id;
 362         unsigned int iir, lsr;
 363         unsigned long flags;
 364
 365         iir = serial_in(up, UART_IIR);
 366         if (iir & UART_IIR_NO_INT)
 367                 return IRQ_NONE;
 368
 369         spin_lock_irqsave(&up->port.lock, flags);
 370         lsr = serial_in(up, UART_LSR);
 371         if (iir & UART_IIR_RLSI) {
 372                 if (!up->use_dma) {
 373                         if (lsr & UART_LSR_DR)
 374                                 receive_chars(up, &lsr);
 375                 } else {
 376                         up->ier &= ~(UART_IER_RDI | UART_IER_RLSI);
 377                         serial_out(up, UART_IER, up->ier);
 378                         if ((serial_omap_start_rxdma(up) != 0) &&
 379                                         (lsr & UART_LSR_DR))
 380                                 receive_chars(up, &lsr);
 381                 }
 382         }
 383
 384         check_modem_status(up);
 385         if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
 386                 transmit_chars(up);
 387
 388         spin_unlock_irqrestore(&up->port.lock, flags);
 389         up->port_activity = jiffies;
 390         return IRQ_HANDLED;
 391 }
 392
 393 static unsigned int serial_omap_tx_empty(struct uart_port *port)
 394 {
 395         struct uart_omap_port *up = (struct uart_omap_port *)port;
 396         unsigned long flags = 0;
 397         unsigned int ret = 0;
 398
 399         dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
 400         spin_lock_irqsave(&up->port.lock, flags);
 401         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 402         spin_unlock_irqrestore(&up->port.lock, flags);
 403
 404         return ret;
 405 }
 406
 407 static unsigned int serial_omap_get_mctrl(struct uart_port *port)
 408 {
 409         struct uart_omap_port *up = (struct uart_omap_port *)port;
 410         unsigned char status;
 411         unsigned int ret = 0;
 412
 413         status = check_modem_status(up);
 414         dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
 415
 416         if (status & UART_MSR_DCD)
 417                 ret |= TIOCM_CAR;
 418         if (status & UART_MSR_RI)
 419                 ret |= TIOCM_RNG;
 420         if (status & UART_MSR_DSR)
 421                 ret |= TIOCM_DSR;
 422         if (status & UART_MSR_CTS)
 423                 ret |= TIOCM_CTS;
 424         return ret;
 425 }
 426
 427 static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
 428 {
 429         struct uart_omap_port *up = (struct uart_omap_port *)port;
 430         unsigned char mcr = 0;
 431
 432         dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
 433         if (mctrl & TIOCM_RTS)
 434                 mcr |= UART_MCR_RTS;
 435         if (mctrl & TIOCM_DTR)
 436                 mcr |= UART_MCR_DTR;
 437         if (mctrl & TIOCM_OUT1)
 438                 mcr |= UART_MCR_OUT1;
 439         if (mctrl & TIOCM_OUT2)
 440                 mcr |= UART_MCR_OUT2;
 441         if (mctrl & TIOCM_LOOP)
 442                 mcr |= UART_MCR_LOOP;
 443
 444         mcr |= up->mcr;
 445         serial_out(up, UART_MCR, mcr);
 446 }
 447
 448 static void serial_omap_break_ctl(struct uart_port *port, int break_state)
 449 {
 450         struct uart_omap_port *up = (struct uart_omap_port *)port;
 451         unsigned long flags = 0;
 452
 453         dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
 454         spin_lock_irqsave(&up->port.lock, flags);
 455         if (break_state == -1)
 456                 up->lcr |= UART_LCR_SBC;
 457         else
 458                 up->lcr &= ~UART_LCR_SBC;
 459         serial_out(up, UART_LCR, up->lcr);
 460         spin_unlock_irqrestore(&up->port.lock, flags);
 461 }
 462
 463 static int serial_omap_startup(struct uart_port *port)
 464 {
 465         struct uart_omap_port *up = (struct uart_omap_port *)port;
 466         unsigned long flags = 0;
 467         int retval;
 468
 469         /*
 470          * Allocate the IRQ
 471          */
 472         retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
 473                                 up->name, up);
 474         if (retval)
 475                 return retval;
 476
 477         dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
 478
 479         /*
 480          * Clear the FIFO buffers and disable them.
 481          * (they will be reenabled in set_termios())
 482          */
 483         serial_omap_clear_fifos(up);
 484         /* For Hardware flow control */
 485         serial_out(up, UART_MCR, UART_MCR_RTS);
 486
 487         /*
 488          * Clear the interrupt registers.
 489          */
 490         (void) serial_in(up, UART_LSR);
 491         if (serial_in(up, UART_LSR) & UART_LSR_DR)
 492                 (void) serial_in(up, UART_RX);
 493         (void) serial_in(up, UART_IIR);
 494         (void) serial_in(up, UART_MSR);
 495
 496         /*
 497          * Now, initialize the UART
 498          */
 499         serial_out(up, UART_LCR, UART_LCR_WLEN8);
 500         spin_lock_irqsave(&up->port.lock, flags);
 501         /*
 502          * Most PC uarts need OUT2 raised to enable interrupts.
 503          */
 504         up->port.mctrl |= TIOCM_OUT2;
 505         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 506         spin_unlock_irqrestore(&up->port.lock, flags);
 507
 508         up->msr_saved_flags = 0;
 509         if (up->use_dma) {
 510                 free_page((unsigned long)up->port.state->xmit.buf);
 511                 up->port.state->xmit.buf = dma_alloc_coherent(NULL,
 512                         UART_XMIT_SIZE,
 513                         (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
 514                         0);
 515                 init_timer(&(up->uart_dma.rx_timer));
 516                 up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
 517                 up->uart_dma.rx_timer.data = up->pdev->id;
 518                 /* Currently the buffer size is 4KB. Can increase it */
 519                 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
 520                         up->uart_dma.rx_buf_size,
 521                         (dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
 522         }
 523         /*
 524          * Finally, enable interrupts. Note: Modem status interrupts
 525          * are set via set_termios(), which will be occurring imminently
 526          * anyway, so we don't enable them here.
 527          */
 528         up->ier = UART_IER_RLSI | UART_IER_RDI;
 529         serial_out(up, UART_IER, up->ier);
 530
 531         /* Enable module level wake up */
 532         serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
 533
 534         up->port_activity = jiffies;
 535         return 0;
 536 }
 537
 538 static void serial_omap_shutdown(struct uart_port *port)
 539 {
 540         struct uart_omap_port *up = (struct uart_omap_port *)port;
 541         unsigned long flags = 0;
 542
 543         dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
 544         /*
 545          * Disable interrupts from this port
 546          */
 547         up->ier = 0;
 548         serial_out(up, UART_IER, 0);
 549
 550         spin_lock_irqsave(&up->port.lock, flags);
 551         up->port.mctrl &= ~TIOCM_OUT2;
 552         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 553         spin_unlock_irqrestore(&up->port.lock, flags);
 554
 555         /*
 556          * Disable break condition and FIFOs
 557          */
 558         serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
 559         serial_omap_clear_fifos(up);
 560
 561         /*
 562          * Read data port to reset things, and then free the irq
 563          */
 564         if (serial_in(up, UART_LSR) & UART_LSR_DR)
 565                 (void) serial_in(up, UART_RX);
 566         if (up->use_dma) {
 567                 dma_free_coherent(up->port.dev,
 568                         UART_XMIT_SIZE, up->port.state->xmit.buf,
 569                         up->uart_dma.tx_buf_dma_phys);
 570                 up->port.state->xmit.buf = NULL;
 571                 serial_omap_stop_rx(port);
 572                 dma_free_coherent(up->port.dev,
 573                         up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
 574                         up->uart_dma.rx_buf_dma_phys);
 575                 up->uart_dma.rx_buf = NULL;
 576         }
 577         free_irq(up->port.irq, up);
 578 }
 579
 580 static inline void
 581 serial_omap_configure_xonxoff
 582                 (struct uart_omap_port *up, struct ktermios *termios)
 583 {
 584         unsigned char efr = 0;
 585
 586         up->lcr = serial_in(up, UART_LCR);
 587         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 588         up->efr = serial_in(up, UART_EFR);
 589         serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
 590
 591         serial_out(up, UART_XON1, termios->c_cc[VSTART]);
 592         serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
 593
 594         /* clear SW control mode bits */
 595         efr = up->efr;
 596         efr &= OMAP_UART_SW_CLR;
 597
 598         /*
 599          * IXON Flag:
 600          * Enable XON/XOFF flow control on output.
 601          * Transmit XON1, XOFF1
 602          */
 603         if (termios->c_iflag & IXON)
 604                 efr |= OMAP_UART_SW_TX;
 605
 606         /*
 607          * IXOFF Flag:
 608          * Enable XON/XOFF flow control on input.
 609          * Receiver compares XON1, XOFF1.
 610          */
 611         if (termios->c_iflag & IXOFF)
 612                 efr |= OMAP_UART_SW_RX;
 613
 614         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 615         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 616
 617         up->mcr = serial_in(up, UART_MCR);
 618
 619         /*
 620          * IXANY Flag:
 621          * Enable any character to restart output.
 622          * Operation resumes after receiving any
 623          * character after recognition of the XOFF character
 624          */
 625         if (termios->c_iflag & IXANY)
 626                 up->mcr |= UART_MCR_XONANY;
 627
 628         serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 629         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 630         serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
 631         /* Enable special char function UARTi.EFR_REG[5] and
 632          * load the new software flow control mode IXON or IXOFF
 633          * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
 634          */
 635         serial_out(up, UART_EFR, efr | UART_EFR_SCD);
 636         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 637
 638         serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
 639         serial_out(up, UART_LCR, up->lcr);
 640 }
 641
 642 static void
 643 serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
 644                         struct ktermios *old)
 645 {
 646         struct uart_omap_port *up = (struct uart_omap_port *)port;
 647         unsigned char cval = 0;
 648         unsigned char efr = 0;
 649         unsigned long flags = 0;
 650         unsigned int baud, quot;
 651
 652         switch (termios->c_cflag & CSIZE) {
 653         case CS5:
 654                 cval = UART_LCR_WLEN5;
 655                 break;
 656         case CS6:
 657                 cval = UART_LCR_WLEN6;
 658                 break;
 659         case CS7:
 660                 cval = UART_LCR_WLEN7;
 661                 break;
 662         default:
 663         case CS8:
 664                 cval = UART_LCR_WLEN8;
 665                 break;
 666         }
 667
 668         if (termios->c_cflag & CSTOPB)
 669                 cval |= UART_LCR_STOP;
 670         if (termios->c_cflag & PARENB)
 671                 cval |= UART_LCR_PARITY;
 672         if (!(termios->c_cflag & PARODD))
 673                 cval |= UART_LCR_EPAR;
 674
 675         /*
 676          * Ask the core to calculate the divisor for us.
 677          */
 678
 679         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
 680         quot = serial_omap_get_divisor(port, baud);
 681
 682         up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
 683                         UART_FCR_ENABLE_FIFO;
 684         if (up->use_dma)
 685                 up->fcr |= UART_FCR_DMA_SELECT;
 686
 687         /*
 688          * Ok, we're now changing the port state. Do it with
 689          * interrupts disabled.
 690          */
 691         spin_lock_irqsave(&up->port.lock, flags);
 692
 693         /*
 694          * Update the per-port timeout.
 695          */
 696         uart_update_timeout(port, termios->c_cflag, baud);
 697
 698         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 699         if (termios->c_iflag & INPCK)
 700                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 701         if (termios->c_iflag & (BRKINT | PARMRK))
 702                 up->port.read_status_mask |= UART_LSR_BI;
 703
 704         /*
 705          * Characters to ignore
 706          */
 707         up->port.ignore_status_mask = 0;
 708         if (termios->c_iflag & IGNPAR)
 709                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 710         if (termios->c_iflag & IGNBRK) {
 711                 up->port.ignore_status_mask |= UART_LSR_BI;
 712                 /*
 713                  * If we're ignoring parity and break indicators,
 714                  * ignore overruns too (for real raw support).
 715                  */
 716                 if (termios->c_iflag & IGNPAR)
 717                         up->port.ignore_status_mask |= UART_LSR_OE;
 718         }
 719
 720         /*
 721          * ignore all characters if CREAD is not set
 722          */
 723         if ((termios->c_cflag & CREAD) == 0)
 724                 up->port.ignore_status_mask |= UART_LSR_DR;
 725
 726         /*
 727          * Modem status interrupts
 728          */
 729         up->ier &= ~UART_IER_MSI;
 730         if (UART_ENABLE_MS(&up->port, termios->c_cflag))
 731                 up->ier |= UART_IER_MSI;
 732         serial_out(up, UART_IER, up->ier);
 733         serial_out(up, UART_LCR, cval);         /* reset DLAB */
 734         up->scr = OMAP_UART_SCR_TX_EMPTY;
 735
 736         /* FIFOs and DMA Settings */
 737
 738         /* FCR can be changed only when the
 739          * baud clock is not running
 740          * DLL_REG and DLH_REG set to 0.
 741          */
 742         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 743         serial_out(up, UART_DLL, 0);
 744         serial_out(up, UART_DLM, 0);
 745         serial_out(up, UART_LCR, 0);
 746
 747         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 748
 749         up->efr = serial_in(up, UART_EFR);
 750         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 751
 752         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 753         up->mcr = serial_in(up, UART_MCR);
 754         serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 755         /* FIFO ENABLE, DMA MODE */
 756
 757         up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
 758
 759         if (up->use_dma) {
 760                 serial_out(up, UART_TI752_TLR, 0);
 761                 up->scr |= UART_FCR_TRIGGER_4;
 762         } else {
 763                 /* Set receive FIFO threshold to 1 byte */
 764                 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
 765                 up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT);
 766         }
 767
 768         serial_out(up, UART_FCR, up->fcr);
 769         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 770
 771         serial_out(up, UART_OMAP_SCR, up->scr);
 772
 773         serial_out(up, UART_EFR, up->efr);
 774         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 775         serial_out(up, UART_MCR, up->mcr);
 776
 777         /* Protocol, Baud Rate, and Interrupt Settings */
 778
 779         serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
 780         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 781
 782         up->efr = serial_in(up, UART_EFR);
 783         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 784
 785         serial_out(up, UART_LCR, 0);
 786         serial_out(up, UART_IER, 0);
 787         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 788
 789         serial_out(up, UART_DLL, quot & 0xff);          /* LS of divisor */
 790         serial_out(up, UART_DLM, quot >> 8);            /* MS of divisor */
 791
 792         serial_out(up, UART_LCR, 0);
 793         serial_out(up, UART_IER, up->ier);
 794         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 795
 796         serial_out(up, UART_EFR, up->efr);
 797         serial_out(up, UART_LCR, cval);
 798
 799         if (baud > 230400 && baud != 3000000)
 800                 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
 801         else
 802                 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
 803
 804         /* Hardware Flow Control Configuration */
 805
 806         if (termios->c_cflag & CRTSCTS) {
 807                 efr |= (UART_EFR_CTS | UART_EFR_RTS);
 808                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 809
 810                 up->mcr = serial_in(up, UART_MCR);
 811                 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 812
 813                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 814                 up->efr = serial_in(up, UART_EFR);
 815                 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 816
 817                 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
 818                 serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
 819                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 820                 serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
 821                 serial_out(up, UART_LCR, cval);
 822         }
 823
 824         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 825         /* Software Flow Control Configuration */
 826         serial_omap_configure_xonxoff(up, termios);
 827
 828         spin_unlock_irqrestore(&up->port.lock, flags);
 829         dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
 830 }
 831
 832 static void
 833 serial_omap_pm(struct uart_port *port, unsigned int state,
 834                unsigned int oldstate)
 835 {
 836         struct uart_omap_port *up = (struct uart_omap_port *)port;
 837         unsigned char efr;
 838
 839         dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
 840         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 841         efr = serial_in(up, UART_EFR);
 842         serial_out(up, UART_EFR, efr | UART_EFR_ECB);
 843         serial_out(up, UART_LCR, 0);
 844
 845         serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
 846         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 847         serial_out(up, UART_EFR, efr);
 848         serial_out(up, UART_LCR, 0);
 849 }
 850
 851 static void serial_omap_release_port(struct uart_port *port)
 852 {
 853         dev_dbg(port->dev, "serial_omap_release_port+\n");
 854 }
 855
 856 static int serial_omap_request_port(struct uart_port *port)
 857 {
 858         dev_dbg(port->dev, "serial_omap_request_port+\n");
 859         return 0;
 860 }
 861
 862 static void serial_omap_config_port(struct uart_port *port, int flags)
 863 {
 864         struct uart_omap_port *up = (struct uart_omap_port *)port;
 865
 866         dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
 867                                                         up->pdev->id);
 868         up->port.type = PORT_OMAP;
 869 }
 870
 871 static int
 872 serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
 873 {
 874         /* we don't want the core code to modify any port params */
 875         dev_dbg(port->dev, "serial_omap_verify_port+\n");
 876         return -EINVAL;
 877 }
 878
 879 static const char *
 880 serial_omap_type(struct uart_port *port)
 881 {
 882         struct uart_omap_port *up = (struct uart_omap_port *)port;
 883
 884         dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
 885         return up->name;
 886 }
 887
 888 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 889
 890 static inline void wait_for_xmitr(struct uart_omap_port *up)
 891 {
 892         unsigned int status, tmout = 10000;
 893
 894         /* Wait up to 10ms for the character(s) to be sent. */
 895         do {
 896                 status = serial_in(up, UART_LSR);
 897
 898                 if (status & UART_LSR_BI)
 899                         up->lsr_break_flag = UART_LSR_BI;
 900
 901                 if (--tmout == 0)
 902                         break;
 903                 udelay(1);
 904         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
 905
 906         /* Wait up to 1s for flow control if necessary */
 907         if (up->port.flags & UPF_CONS_FLOW) {
 908                 tmout = 1000000;
 909                 for (tmout = 1000000; tmout; tmout--) {
 910                         unsigned int msr = serial_in(up, UART_MSR);
 911
 912                         up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
 913                         if (msr & UART_MSR_CTS)
 914                                 break;
 915
 916                         udelay(1);
 917                 }
 918         }
 919 }
 920
 921 #ifdef CONFIG_CONSOLE_POLL
 922
 923 static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
 924 {
 925         struct uart_omap_port *up = (struct uart_omap_port *)port;
 926         wait_for_xmitr(up);
 927         serial_out(up, UART_TX, ch);
 928 }
 929
 930 static int serial_omap_poll_get_char(struct uart_port *port)
 931 {
 932         struct uart_omap_port *up = (struct uart_omap_port *)port;
 933         unsigned int status = serial_in(up, UART_LSR);
 934
 935         if (!(status & UART_LSR_DR))
 936                 return NO_POLL_CHAR;
 937
 938         return serial_in(up, UART_RX);
 939 }
 940
 941 #endif /* CONFIG_CONSOLE_POLL */
 942
 943 #ifdef CONFIG_SERIAL_OMAP_CONSOLE
 944
 945 static struct uart_omap_port *serial_omap_console_ports[4];
 946
 947 static struct uart_driver serial_omap_reg;
 948
 949 static void serial_omap_console_putchar(struct uart_port *port, int ch)
 950 {
 951         struct uart_omap_port *up = (struct uart_omap_port *)port;
 952
 953         wait_for_xmitr(up);
 954         serial_out(up, UART_TX, ch);
 955 }
 956
 957 static void
 958 serial_omap_console_write(struct console *co, const char *s,
 959                 unsigned int count)
 960 {
 961         struct uart_omap_port *up = serial_omap_console_ports[co->index];
 962         unsigned long flags;
 963         unsigned int ier;
 964         int locked = 1;
 965
 966         local_irq_save(flags);
 967         if (up->port.sysrq)
 968                 locked = 0;
 969         else if (oops_in_progress)
 970                 locked = spin_trylock(&up->port.lock);
 971         else
 972                 spin_lock(&up->port.lock);
 973
 974         /*
 975          * First save the IER then disable the interrupts
 976          */
 977         ier = serial_in(up, UART_IER);
 978         serial_out(up, UART_IER, 0);
 979
 980         uart_console_write(&up->port, s, count, serial_omap_console_putchar);
 981
 982         /*
 983          * Finally, wait for transmitter to become empty
 984          * and restore the IER
 985          */
 986         wait_for_xmitr(up);
 987         serial_out(up, UART_IER, ier);
 988         /*
 989          * The receive handling will happen properly because the
 990          * receive ready bit will still be set; it is not cleared
 991          * on read.  However, modem control will not, we must
 992          * call it if we have saved something in the saved flags
 993          * while processing with interrupts off.
 994          */
 995         if (up->msr_saved_flags)
 996                 check_modem_status(up);
 997
 998         if (locked)
 999                 spin_unlock(&up->port.lock);
1000         local_irq_restore(flags);
1001 }
1002
1003 static int __init
1004 serial_omap_console_setup(struct console *co, char *options)
1005 {
1006         struct uart_omap_port *up;
1007         int baud = 115200;
1008         int bits = 8;
1009         int parity = 'n';
1010         int flow = 'n';
1011
1012         if (serial_omap_console_ports[co->index] == NULL)
1013                 return -ENODEV;
1014         up = serial_omap_console_ports[co->index];
1015
1016         if (options)
1017                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1018
1019         return uart_set_options(&up->port, co, baud, parity, bits, flow);
1020 }
1021
1022 static struct console serial_omap_console = {
1023         .name           = OMAP_SERIAL_NAME,
1024         .write          = serial_omap_console_write,
1025         .device         = uart_console_device,
1026         .setup          = serial_omap_console_setup,
1027         .flags          = CON_PRINTBUFFER,
1028         .index          = -1,
1029         .data           = &serial_omap_reg,
1030 };
1031
1032 static void serial_omap_add_console_port(struct uart_omap_port *up)
1033 {
1034         serial_omap_console_ports[up->pdev->id] = up;
1035 }
1036
1037 #define OMAP_CONSOLE    (&serial_omap_console)
1038
1039 #else
1040
1041 #define OMAP_CONSOLE    NULL
1042
1043 static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1044 {}
1045
1046 #endif
1047
1048 static struct uart_ops serial_omap_pops = {
1049         .tx_empty       = serial_omap_tx_empty,
1050         .set_mctrl      = serial_omap_set_mctrl,
1051         .get_mctrl      = serial_omap_get_mctrl,
1052         .stop_tx        = serial_omap_stop_tx,
1053         .start_tx       = serial_omap_start_tx,
1054         .stop_rx        = serial_omap_stop_rx,
1055         .enable_ms      = serial_omap_enable_ms,
1056         .break_ctl      = serial_omap_break_ctl,
1057         .startup        = serial_omap_startup,
1058         .shutdown       = serial_omap_shutdown,
1059         .set_termios    = serial_omap_set_termios,
1060         .pm             = serial_omap_pm,
1061         .type           = serial_omap_type,
1062         .release_port   = serial_omap_release_port,
1063         .request_port   = serial_omap_request_port,
1064         .config_port    = serial_omap_config_port,
1065         .verify_port    = serial_omap_verify_port,
1066 #ifdef CONFIG_CONSOLE_POLL
1067         .poll_put_char  = serial_omap_poll_put_char,
1068         .poll_get_char  = serial_omap_poll_get_char,
1069 #endif
1070 };
1071
1072 static struct uart_driver serial_omap_reg = {
1073         .owner          = THIS_MODULE,
1074         .driver_name    = "OMAP-SERIAL",
1075         .dev_name       = OMAP_SERIAL_NAME,
1076         .nr             = OMAP_MAX_HSUART_PORTS,
1077         .cons           = OMAP_CONSOLE,
1078 };
1079
1080 static int
1081 serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
1082 {
1083         struct uart_omap_port *up = platform_get_drvdata(pdev);
1084
1085         if (up)
1086                 uart_suspend_port(&serial_omap_reg, &up->port);
1087         return 0;
1088 }
1089
1090 static int serial_omap_resume(struct platform_device *dev)
1091 {
1092         struct uart_omap_port *up = platform_get_drvdata(dev);
1093
1094         if (up)
1095                 uart_resume_port(&serial_omap_reg, &up->port);
1096         return 0;
1097 }
1098
1099 static void serial_omap_rx_timeout(unsigned long uart_no)
1100 {
1101         struct uart_omap_port *up = ui[uart_no];
1102         unsigned int curr_dma_pos, curr_transmitted_size;
1103         int ret = 0;
1104
1105         curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1106         if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1107                              (curr_dma_pos == 0)) {
1108                 if (jiffies_to_msecs(jiffies - up->port_activity) <
1109                                                         RX_TIMEOUT) {
1110                         mod_timer(&up->uart_dma.rx_timer, jiffies +
1111                                 usecs_to_jiffies(up->uart_dma.rx_timeout));
1112                 } else {
1113                         serial_omap_stop_rxdma(up);
1114                         up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1115                         serial_out(up, UART_IER, up->ier);
1116                 }
1117                 return;
1118         }
1119
1120         curr_transmitted_size = curr_dma_pos -
1121                                         up->uart_dma.prev_rx_dma_pos;
1122         up->port.icount.rx += curr_transmitted_size;
1123         tty_insert_flip_string(up->port.state->port.tty,
1124                         up->uart_dma.rx_buf +
1125                         (up->uart_dma.prev_rx_dma_pos -
1126                         up->uart_dma.rx_buf_dma_phys),
1127                         curr_transmitted_size);
1128         tty_flip_buffer_push(up->port.state->port.tty);
1129         up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1130         if (up->uart_dma.rx_buf_size +
1131                         up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1132                 ret = serial_omap_start_rxdma(up);
1133                 if (ret < 0) {
1134                         serial_omap_stop_rxdma(up);
1135                         up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1136                         serial_out(up, UART_IER, up->ier);
1137                 }
1138         } else  {
1139                 mod_timer(&up->uart_dma.rx_timer, jiffies +
1140                         usecs_to_jiffies(up->uart_dma.rx_timeout));
1141         }
1142         up->port_activity = jiffies;
1143 }
1144
1145 static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1146 {
1147         return;
1148 }
1149
1150 static int serial_omap_start_rxdma(struct uart_omap_port *up)
1151 {
1152         int ret = 0;
1153
1154         if (up->uart_dma.rx_dma_channel == -1) {
1155                 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1156                                 "UART Rx DMA",
1157                                 (void *)uart_rx_dma_callback, up,
1158                                 &(up->uart_dma.rx_dma_channel));
1159                 if (ret < 0)
1160                         return ret;
1161
1162                 omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1163                                 OMAP_DMA_AMODE_CONSTANT,
1164                                 up->uart_dma.uart_base, 0, 0);
1165                 omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1166                                 OMAP_DMA_AMODE_POST_INC,
1167                                 up->uart_dma.rx_buf_dma_phys, 0, 0);
1168                 omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1169                                 OMAP_DMA_DATA_TYPE_S8,
1170                                 up->uart_dma.rx_buf_size, 1,
1171                                 OMAP_DMA_SYNC_ELEMENT,
1172                                 up->uart_dma.uart_dma_rx, 0);
1173         }
1174         up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1175         /* FIXME: Cache maintenance needed here? */
1176         omap_start_dma(up->uart_dma.rx_dma_channel);
1177         mod_timer(&up->uart_dma.rx_timer, jiffies +
1178                                 usecs_to_jiffies(up->uart_dma.rx_timeout));
1179         up->uart_dma.rx_dma_used = true;
1180         return ret;
1181 }
1182
1183 static void serial_omap_continue_tx(struct uart_omap_port *up)
1184 {
1185         struct circ_buf *xmit = &up->port.state->xmit;
1186         unsigned int start = up->uart_dma.tx_buf_dma_phys
1187                         + (xmit->tail & (UART_XMIT_SIZE - 1));
1188
1189         if (uart_circ_empty(xmit))
1190                 return;
1191
1192         up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1193         /*
1194          * It is a circular buffer. See if the buffer has wounded back.
1195          * If yes it will have to be transferred in two separate dma
1196          * transfers
1197          */
1198         if (start + up->uart_dma.tx_buf_size >=
1199                         up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1200                 up->uart_dma.tx_buf_size =
1201                         (up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1202         omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1203                                 OMAP_DMA_AMODE_CONSTANT,
1204                                 up->uart_dma.uart_base, 0, 0);
1205         omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1206                                 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1207         omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1208                                 OMAP_DMA_DATA_TYPE_S8,
1209                                 up->uart_dma.tx_buf_size, 1,
1210                                 OMAP_DMA_SYNC_ELEMENT,
1211                                 up->uart_dma.uart_dma_tx, 0);
1212         /* FIXME: Cache maintenance needed here? */
1213         omap_start_dma(up->uart_dma.tx_dma_channel);
1214 }
1215
1216 static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1217 {
1218         struct uart_omap_port *up = (struct uart_omap_port *)data;
1219         struct circ_buf *xmit = &up->port.state->xmit;
1220
1221         xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1222                         (UART_XMIT_SIZE - 1);
1223         up->port.icount.tx += up->uart_dma.tx_buf_size;
1224
1225         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1226                 uart_write_wakeup(&up->port);
1227
1228         if (uart_circ_empty(xmit)) {
1229                 spin_lock(&(up->uart_dma.tx_lock));
1230                 serial_omap_stop_tx(&up->port);
1231                 up->uart_dma.tx_dma_used = false;
1232                 spin_unlock(&(up->uart_dma.tx_lock));
1233         } else {
1234                 omap_stop_dma(up->uart_dma.tx_dma_channel);
1235                 serial_omap_continue_tx(up);
1236         }
1237         up->port_activity = jiffies;
1238         return;
1239 }
1240
1241 static int serial_omap_probe(struct platform_device *pdev)
1242 {
1243         struct uart_omap_port   *up;
1244         struct resource         *mem, *irq, *dma_tx, *dma_rx;
1245         struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1246         int ret = -ENOSPC;
1247
1248         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1249         if (!mem) {
1250                 dev_err(&pdev->dev, "no mem resource?\n");
1251                 return -ENODEV;
1252         }
1253
1254         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1255         if (!irq) {
1256                 dev_err(&pdev->dev, "no irq resource?\n");
1257                 return -ENODEV;
1258         }
1259
1260         if (!request_mem_region(mem->start, resource_size(mem),
1261                                 pdev->dev.driver->name)) {
1262                 dev_err(&pdev->dev, "memory region already claimed\n");
1263                 return -EBUSY;
1264         }
1265
1266         dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1267         if (!dma_rx) {
1268                 ret = -EINVAL;
1269                 goto err;
1270         }
1271
1272         dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1273         if (!dma_tx) {
1274                 ret = -EINVAL;
1275                 goto err;
1276         }
1277
1278         up = kzalloc(sizeof(*up), GFP_KERNEL);
1279         if (up == NULL) {
1280                 ret = -ENOMEM;
1281                 goto do_release_region;
1282         }
1283         sprintf(up->name, "OMAP UART%d", pdev->id);
1284         up->pdev = pdev;
1285         up->port.dev = &pdev->dev;
1286         up->port.type = PORT_OMAP;
1287         up->port.iotype = UPIO_MEM;
1288         up->port.irq = irq->start;
1289
1290         up->port.regshift = 2;
1291         up->port.fifosize = 64;
1292         up->port.ops = &serial_omap_pops;
1293         up->port.line = pdev->id;
1294
1295         up->port.membase = omap_up_info->membase;
1296         up->port.mapbase = omap_up_info->mapbase;
1297         up->port.flags = omap_up_info->flags;
1298         up->port.irqflags = omap_up_info->irqflags;
1299         up->port.uartclk = omap_up_info->uartclk;
1300         up->uart_dma.uart_base = mem->start;
1301
1302         if (omap_up_info->dma_enabled) {
1303                 up->uart_dma.uart_dma_tx = dma_tx->start;
1304                 up->uart_dma.uart_dma_rx = dma_rx->start;
1305                 up->use_dma = 1;
1306                 up->uart_dma.rx_buf_size = 4096;
1307                 up->uart_dma.rx_timeout = 2;
1308                 spin_lock_init(&(up->uart_dma.tx_lock));
1309                 spin_lock_init(&(up->uart_dma.rx_lock));
1310                 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1311                 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1312         }
1313
1314         ui[pdev->id] = up;
1315         serial_omap_add_console_port(up);
1316
1317         ret = uart_add_one_port(&serial_omap_reg, &up->port);
1318         if (ret != 0)
1319                 goto do_release_region;
1320
1321         platform_set_drvdata(pdev, up);
1322         return 0;
1323 err:
1324         dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
1325                                 pdev->id, __func__, ret);
1326 do_release_region:
1327         release_mem_region(mem->start, resource_size(mem));
1328         return ret;
1329 }
1330
1331 static int serial_omap_remove(struct platform_device *dev)
1332 {
1333         struct uart_omap_port *up = platform_get_drvdata(dev);
1334
1335         platform_set_drvdata(dev, NULL);
1336         if (up) {
1337                 uart_remove_one_port(&serial_omap_reg, &up->port);
1338                 kfree(up);
1339         }
1340         return 0;
1341 }
1342
1343 static struct platform_driver serial_omap_driver = {
1344         .probe          = serial_omap_probe,
1345         .remove         = serial_omap_remove,
1346
1347         .suspend        = serial_omap_suspend,
1348         .resume         = serial_omap_resume,
1349         .driver         = {
1350                 .name   = DRIVER_NAME,
1351         },
1352 };
1353
1354 static int __init serial_omap_init(void)
1355 {
1356         int ret;
1357
1358         ret = uart_register_driver(&serial_omap_reg);
1359         if (ret != 0)
1360                 return ret;
1361         ret = platform_driver_register(&serial_omap_driver);
1362         if (ret != 0)
1363                 uart_unregister_driver(&serial_omap_reg);
1364         return ret;
1365 }
1366
1367 static void __exit serial_omap_exit(void)
1368 {
1369         platform_driver_unregister(&serial_omap_driver);
1370         uart_unregister_driver(&serial_omap_reg);
1371 }
1372
1373 module_init(serial_omap_init);
1374 module_exit(serial_omap_exit);
1375
1376 MODULE_DESCRIPTION("OMAP High Speed UART driver");
1377 MODULE_LICENSE("GPL");
1378 MODULE_AUTHOR("Texas Instruments Inc");