drivers/tty/serial/omap-serial.c

   1 /*
   2  * Driver for OMAP-UART controller.
   3  * Based on drivers/serial/8250.c
   4  *
   5  * Copyright (C) 2010 Texas Instruments.
   6  *
   7  * Authors:
   8  *      Govindraj R     <govindraj.raja@ti.com>
   9  *      Thara Gopinath  <thara@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * Note: This driver is made separate from 8250 driver as we cannot
  17  * over load 8250 driver with omap platform specific configuration for
  18  * features like DMA, it makes easier to implement features like DMA and
  19  * hardware flow control and software flow control configuration with
  20  * this driver as required for the omap-platform.
  21  */
  22
  23 #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  24 #define SUPPORT_SYSRQ
  25 #endif
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/console.h>
  30 #include <linux/serial_reg.h>
  31 #include <linux/delay.h>
  32 #include <linux/slab.h>
  33 #include <linux/tty.h>
  34 #include <linux/tty_flip.h>
  35 #include <linux/io.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/clk.h>
  38 #include <linux/serial_core.h>
  39 #include <linux/irq.h>
  40
  41 #include <plat/dma.h>
  42 #include <plat/dmtimer.h>
  43 #include <plat/omap-serial.h>
  44
  45 static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
  46
  47 /* Forward declaration of functions */
  48 static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
  49 static void serial_omap_rx_timeout(unsigned long uart_no);
  50 static int serial_omap_start_rxdma(struct uart_omap_port *up);
  51
  52 static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
  53 {
  54         offset <<= up->port.regshift;
  55         return readw(up->port.membase + offset);
  56 }
  57
  58 static inline void serial_out(struct uart_omap_port *up, int offset, int value)
  59 {
  60         offset <<= up->port.regshift;
  61         writew(value, up->port.membase + offset);
  62 }
  63
  64 static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
  65 {
  66         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  67         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  68                        UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  69         serial_out(up, UART_FCR, 0);
  70 }
  71
  72 /*
  73  * serial_omap_get_divisor - calculate divisor value
  74  * @port: uart port info
  75  * @baud: baudrate for which divisor needs to be calculated.
  76  *
  77  * We have written our own function to get the divisor so as to support
  78  * 13x mode. 3Mbps Baudrate as an different divisor.
  79  * Reference OMAP TRM Chapter 17:
  80  * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates
  81  * referring to oversampling - divisor value
  82  * baudrate 460,800 to 3,686,400 all have divisor 13
  83  * except 3,000,000 which has divisor value 16
  84  */
  85 static unsigned int
  86 serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
  87 {
  88         unsigned int divisor;
  89
  90         if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
  91                 divisor = 13;
  92         else
  93                 divisor = 16;
  94         return port->uartclk/(baud * divisor);
  95 }
  96
  97 static void serial_omap_stop_rxdma(struct uart_omap_port *up)
  98 {
  99         if (up->uart_dma.rx_dma_used) {
 100                 del_timer(&up->uart_dma.rx_timer);
 101                 omap_stop_dma(up->uart_dma.rx_dma_channel);
 102                 omap_free_dma(up->uart_dma.rx_dma_channel);
 103                 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
 104                 up->uart_dma.rx_dma_used = false;
 105         }
 106 }
 107
 108 static void serial_omap_enable_ms(struct uart_port *port)
 109 {
 110         struct uart_omap_port *up = (struct uart_omap_port *)port;
 111
 112         dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
 113         up->ier |= UART_IER_MSI;
 114         serial_out(up, UART_IER, up->ier);
 115 }
 116
 117 static void serial_omap_stop_tx(struct uart_port *port)
 118 {
 119         struct uart_omap_port *up = (struct uart_omap_port *)port;
 120
 121         if (up->use_dma &&
 122                 up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
 123                 /*
 124                  * Check if dma is still active. If yes do nothing,
 125                  * return. Else stop dma
 126                  */
 127                 if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
 128                         return;
 129                 omap_stop_dma(up->uart_dma.tx_dma_channel);
 130                 omap_free_dma(up->uart_dma.tx_dma_channel);
 131                 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
 132         }
 133
 134         if (up->ier & UART_IER_THRI) {
 135                 up->ier &= ~UART_IER_THRI;
 136                 serial_out(up, UART_IER, up->ier);
 137         }
 138 }
 139
 140 static void serial_omap_stop_rx(struct uart_port *port)
 141 {
 142         struct uart_omap_port *up = (struct uart_omap_port *)port;
 143
 144         if (up->use_dma)
 145                 serial_omap_stop_rxdma(up);
 146         up->ier &= ~UART_IER_RLSI;
 147         up->port.read_status_mask &= ~UART_LSR_DR;
 148         serial_out(up, UART_IER, up->ier);
 149 }
 150
 151 static inline void receive_chars(struct uart_omap_port *up, int *status)
 152 {
 153         struct tty_struct *tty = up->port.state->port.tty;
 154         unsigned int flag;
 155         unsigned char ch, lsr = *status;
 156         int max_count = 256;
 157
 158         do {
 159                 if (likely(lsr & UART_LSR_DR))
 160                         ch = serial_in(up, UART_RX);
 161                 flag = TTY_NORMAL;
 162                 up->port.icount.rx++;
 163
 164                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
 165                         /*
 166                          * For statistics only
 167                          */
 168                         if (lsr & UART_LSR_BI) {
 169                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 170                                 up->port.icount.brk++;
 171                                 /*
 172                                  * We do the SysRQ and SAK checking
 173                                  * here because otherwise the break
 174                                  * may get masked by ignore_status_mask
 175                                  * or read_status_mask.
 176                                  */
 177                                 if (uart_handle_break(&up->port))
 178                                         goto ignore_char;
 179                         } else if (lsr & UART_LSR_PE) {
 180                                 up->port.icount.parity++;
 181                         } else if (lsr & UART_LSR_FE) {
 182                                 up->port.icount.frame++;
 183                         }
 184
 185                         if (lsr & UART_LSR_OE)
 186                                 up->port.icount.overrun++;
 187
 188                         /*
 189                          * Mask off conditions which should be ignored.
 190                          */
 191                         lsr &= up->port.read_status_mask;
 192
 193 #ifdef CONFIG_SERIAL_OMAP_CONSOLE
 194                         if (up->port.line == up->port.cons->index) {
 195                                 /* Recover the break flag from console xmit */
 196                                 lsr |= up->lsr_break_flag;
 197                         }
 198 #endif
 199                         if (lsr & UART_LSR_BI)
 200                                 flag = TTY_BREAK;
 201                         else if (lsr & UART_LSR_PE)
 202                                 flag = TTY_PARITY;
 203                         else if (lsr & UART_LSR_FE)
 204                                 flag = TTY_FRAME;
 205                 }
 206
 207                 if (uart_handle_sysrq_char(&up->port, ch))
 208                         goto ignore_char;
 209                 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
 210 ignore_char:
 211                 lsr = serial_in(up, UART_LSR);
 212         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
 213         spin_unlock(&up->port.lock);
 214         tty_flip_buffer_push(tty);
 215         spin_lock(&up->port.lock);
 216 }
 217
 218 static void transmit_chars(struct uart_omap_port *up)
 219 {
 220         struct circ_buf *xmit = &up->port.state->xmit;
 221         int count;
 222
 223         if (up->port.x_char) {
 224                 serial_out(up, UART_TX, up->port.x_char);
 225                 up->port.icount.tx++;
 226                 up->port.x_char = 0;
 227                 return;
 228         }
 229         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 230                 serial_omap_stop_tx(&up->port);
 231                 return;
 232         }
 233         count = up->port.fifosize / 4;
 234         do {
 235                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 236                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 237                 up->port.icount.tx++;
 238                 if (uart_circ_empty(xmit))
 239                         break;
 240         } while (--count > 0);
 241
 242         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 243                 uart_write_wakeup(&up->port);
 244
 245         if (uart_circ_empty(xmit))
 246                 serial_omap_stop_tx(&up->port);
 247 }
 248
 249 static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
 250 {
 251         if (!(up->ier & UART_IER_THRI)) {
 252                 up->ier |= UART_IER_THRI;
 253                 serial_out(up, UART_IER, up->ier);
 254         }
 255 }
 256
 257 static void serial_omap_start_tx(struct uart_port *port)
 258 {
 259         struct uart_omap_port *up = (struct uart_omap_port *)port;
 260         struct circ_buf *xmit;
 261         unsigned int start;
 262         int ret = 0;
 263
 264         if (!up->use_dma) {
 265                 serial_omap_enable_ier_thri(up);
 266                 return;
 267         }
 268
 269         if (up->uart_dma.tx_dma_used)
 270                 return;
 271
 272         xmit = &up->port.state->xmit;
 273
 274         if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
 275                 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
 276                                 "UART Tx DMA",
 277                                 (void *)uart_tx_dma_callback, up,
 278                                 &(up->uart_dma.tx_dma_channel));
 279
 280                 if (ret < 0) {
 281                         serial_omap_enable_ier_thri(up);
 282                         return;
 283                 }
 284         }
 285         spin_lock(&(up->uart_dma.tx_lock));
 286         up->uart_dma.tx_dma_used = true;
 287         spin_unlock(&(up->uart_dma.tx_lock));
 288
 289         start = up->uart_dma.tx_buf_dma_phys +
 290                                 (xmit->tail & (UART_XMIT_SIZE - 1));
 291
 292         up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
 293         /*
 294          * It is a circular buffer. See if the buffer has wounded back.
 295          * If yes it will have to be transferred in two separate dma
 296          * transfers
 297          */
 298         if (start + up->uart_dma.tx_buf_size >=
 299                         up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
 300                 up->uart_dma.tx_buf_size =
 301                         (up->uart_dma.tx_buf_dma_phys +
 302                         UART_XMIT_SIZE) - start;
 303
 304         omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
 305                                 OMAP_DMA_AMODE_CONSTANT,
 306                                 up->uart_dma.uart_base, 0, 0);
 307         omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
 308                                 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
 309         omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
 310                                 OMAP_DMA_DATA_TYPE_S8,
 311                                 up->uart_dma.tx_buf_size, 1,
 312                                 OMAP_DMA_SYNC_ELEMENT,
 313                                 up->uart_dma.uart_dma_tx, 0);
 314         /* FIXME: Cache maintenance needed here? */
 315         omap_start_dma(up->uart_dma.tx_dma_channel);
 316 }
 317
 318 static unsigned int check_modem_status(struct uart_omap_port *up)
 319 {
 320         unsigned int status;
 321
 322         status = serial_in(up, UART_MSR);
 323         status |= up->msr_saved_flags;
 324         up->msr_saved_flags = 0;
 325         if ((status & UART_MSR_ANY_DELTA) == 0)
 326                 return status;
 327
 328         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
 329             up->port.state != NULL) {
 330                 if (status & UART_MSR_TERI)
 331                         up->port.icount.rng++;
 332                 if (status & UART_MSR_DDSR)
 333                         up->port.icount.dsr++;
 334                 if (status & UART_MSR_DDCD)
 335                         uart_handle_dcd_change
 336                                 (&up->port, status & UART_MSR_DCD);
 337                 if (status & UART_MSR_DCTS)
 338                         uart_handle_cts_change
 339                                 (&up->port, status & UART_MSR_CTS);
 340                 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 341         }
 342
 343         return status;
 344 }
 345
 346 /**
 347  * serial_omap_irq() - This handles the interrupt from one port
 348  * @irq: uart port irq number
 349  * @dev_id: uart port info
 350  */
 351 static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
 352 {
 353         struct uart_omap_port *up = dev_id;
 354         unsigned int iir, lsr;
 355         unsigned long flags;
 356
 357         iir = serial_in(up, UART_IIR);
 358         if (iir & UART_IIR_NO_INT)
 359                 return IRQ_NONE;
 360
 361         spin_lock_irqsave(&up->port.lock, flags);
 362         lsr = serial_in(up, UART_LSR);
 363         if (iir & UART_IIR_RLSI) {
 364                 if (!up->use_dma) {
 365                         if (lsr & UART_LSR_DR)
 366                                 receive_chars(up, &lsr);
 367                 } else {
 368                         up->ier &= ~(UART_IER_RDI | UART_IER_RLSI);
 369                         serial_out(up, UART_IER, up->ier);
 370                         if ((serial_omap_start_rxdma(up) != 0) &&
 371                                         (lsr & UART_LSR_DR))
 372                                 receive_chars(up, &lsr);
 373                 }
 374         }
 375
 376         check_modem_status(up);
 377         if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
 378                 transmit_chars(up);
 379
 380         spin_unlock_irqrestore(&up->port.lock, flags);
 381         up->port_activity = jiffies;
 382         return IRQ_HANDLED;
 383 }
 384
 385 static unsigned int serial_omap_tx_empty(struct uart_port *port)
 386 {
 387         struct uart_omap_port *up = (struct uart_omap_port *)port;
 388         unsigned long flags = 0;
 389         unsigned int ret = 0;
 390
 391         dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
 392         spin_lock_irqsave(&up->port.lock, flags);
 393         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 394         spin_unlock_irqrestore(&up->port.lock, flags);
 395
 396         return ret;
 397 }
 398
 399 static unsigned int serial_omap_get_mctrl(struct uart_port *port)
 400 {
 401         struct uart_omap_port *up = (struct uart_omap_port *)port;
 402         unsigned char status;
 403         unsigned int ret = 0;
 404
 405         status = check_modem_status(up);
 406         dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
 407
 408         if (status & UART_MSR_DCD)
 409                 ret |= TIOCM_CAR;
 410         if (status & UART_MSR_RI)
 411                 ret |= TIOCM_RNG;
 412         if (status & UART_MSR_DSR)
 413                 ret |= TIOCM_DSR;
 414         if (status & UART_MSR_CTS)
 415                 ret |= TIOCM_CTS;
 416         return ret;
 417 }
 418
 419 static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
 420 {
 421         struct uart_omap_port *up = (struct uart_omap_port *)port;
 422         unsigned char mcr = 0;
 423
 424         dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
 425         if (mctrl & TIOCM_RTS)
 426                 mcr |= UART_MCR_RTS;
 427         if (mctrl & TIOCM_DTR)
 428                 mcr |= UART_MCR_DTR;
 429         if (mctrl & TIOCM_OUT1)
 430                 mcr |= UART_MCR_OUT1;
 431         if (mctrl & TIOCM_OUT2)
 432                 mcr |= UART_MCR_OUT2;
 433         if (mctrl & TIOCM_LOOP)
 434                 mcr |= UART_MCR_LOOP;
 435
 436         mcr |= up->mcr;
 437         serial_out(up, UART_MCR, mcr);
 438 }
 439
 440 static void serial_omap_break_ctl(struct uart_port *port, int break_state)
 441 {
 442         struct uart_omap_port *up = (struct uart_omap_port *)port;
 443         unsigned long flags = 0;
 444
 445         dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
 446         spin_lock_irqsave(&up->port.lock, flags);
 447         if (break_state == -1)
 448                 up->lcr |= UART_LCR_SBC;
 449         else
 450                 up->lcr &= ~UART_LCR_SBC;
 451         serial_out(up, UART_LCR, up->lcr);
 452         spin_unlock_irqrestore(&up->port.lock, flags);
 453 }
 454
 455 static int serial_omap_startup(struct uart_port *port)
 456 {
 457         struct uart_omap_port *up = (struct uart_omap_port *)port;
 458         unsigned long flags = 0;
 459         int retval;
 460
 461         /*
 462          * Allocate the IRQ
 463          */
 464         retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
 465                                 up->name, up);
 466         if (retval)
 467                 return retval;
 468
 469         dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
 470
 471         /*
 472          * Clear the FIFO buffers and disable them.
 473          * (they will be reenabled in set_termios())
 474          */
 475         serial_omap_clear_fifos(up);
 476         /* For Hardware flow control */
 477         serial_out(up, UART_MCR, UART_MCR_RTS);
 478
 479         /*
 480          * Clear the interrupt registers.
 481          */
 482         (void) serial_in(up, UART_LSR);
 483         if (serial_in(up, UART_LSR) & UART_LSR_DR)
 484                 (void) serial_in(up, UART_RX);
 485         (void) serial_in(up, UART_IIR);
 486         (void) serial_in(up, UART_MSR);
 487
 488         /*
 489          * Now, initialize the UART
 490          */
 491         serial_out(up, UART_LCR, UART_LCR_WLEN8);
 492         spin_lock_irqsave(&up->port.lock, flags);
 493         /*
 494          * Most PC uarts need OUT2 raised to enable interrupts.
 495          */
 496         up->port.mctrl |= TIOCM_OUT2;
 497         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 498         spin_unlock_irqrestore(&up->port.lock, flags);
 499
 500         up->msr_saved_flags = 0;
 501         if (up->use_dma) {
 502                 free_page((unsigned long)up->port.state->xmit.buf);
 503                 up->port.state->xmit.buf = dma_alloc_coherent(NULL,
 504                         UART_XMIT_SIZE,
 505                         (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
 506                         0);
 507                 init_timer(&(up->uart_dma.rx_timer));
 508                 up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
 509                 up->uart_dma.rx_timer.data = up->pdev->id;
 510                 /* Currently the buffer size is 4KB. Can increase it */
 511                 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
 512                         up->uart_dma.rx_buf_size,
 513                         (dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
 514         }
 515         /*
 516          * Finally, enable interrupts. Note: Modem status interrupts
 517          * are set via set_termios(), which will be occurring imminently
 518          * anyway, so we don't enable them here.
 519          */
 520         up->ier = UART_IER_RLSI | UART_IER_RDI;
 521         serial_out(up, UART_IER, up->ier);
 522
 523         /* Enable module level wake up */
 524         serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
 525
 526         up->port_activity = jiffies;
 527         return 0;
 528 }
 529
 530 static void serial_omap_shutdown(struct uart_port *port)
 531 {
 532         struct uart_omap_port *up = (struct uart_omap_port *)port;
 533         unsigned long flags = 0;
 534
 535         dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
 536         /*
 537          * Disable interrupts from this port
 538          */
 539         up->ier = 0;
 540         serial_out(up, UART_IER, 0);
 541
 542         spin_lock_irqsave(&up->port.lock, flags);
 543         up->port.mctrl &= ~TIOCM_OUT2;
 544         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 545         spin_unlock_irqrestore(&up->port.lock, flags);
 546
 547         /*
 548          * Disable break condition and FIFOs
 549          */
 550         serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
 551         serial_omap_clear_fifos(up);
 552
 553         /*
 554          * Read data port to reset things, and then free the irq
 555          */
 556         if (serial_in(up, UART_LSR) & UART_LSR_DR)
 557                 (void) serial_in(up, UART_RX);
 558         if (up->use_dma) {
 559                 dma_free_coherent(up->port.dev,
 560                         UART_XMIT_SIZE, up->port.state->xmit.buf,
 561                         up->uart_dma.tx_buf_dma_phys);
 562                 up->port.state->xmit.buf = NULL;
 563                 serial_omap_stop_rx(port);
 564                 dma_free_coherent(up->port.dev,
 565                         up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
 566                         up->uart_dma.rx_buf_dma_phys);
 567                 up->uart_dma.rx_buf = NULL;
 568         }
 569         free_irq(up->port.irq, up);
 570 }
 571
 572 static inline void
 573 serial_omap_configure_xonxoff
 574                 (struct uart_omap_port *up, struct ktermios *termios)
 575 {
 576         unsigned char efr = 0;
 577
 578         up->lcr = serial_in(up, UART_LCR);
 579         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 580         up->efr = serial_in(up, UART_EFR);
 581         serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
 582
 583         serial_out(up, UART_XON1, termios->c_cc[VSTART]);
 584         serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
 585
 586         /* clear SW control mode bits */
 587         efr = up->efr;
 588         efr &= OMAP_UART_SW_CLR;
 589
 590         /*
 591          * IXON Flag:
 592          * Enable XON/XOFF flow control on output.
 593          * Transmit XON1, XOFF1
 594          */
 595         if (termios->c_iflag & IXON)
 596                 efr |= OMAP_UART_SW_TX;
 597
 598         /*
 599          * IXOFF Flag:
 600          * Enable XON/XOFF flow control on input.
 601          * Receiver compares XON1, XOFF1.
 602          */
 603         if (termios->c_iflag & IXOFF)
 604                 efr |= OMAP_UART_SW_RX;
 605
 606         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 607         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 608
 609         up->mcr = serial_in(up, UART_MCR);
 610
 611         /*
 612          * IXANY Flag:
 613          * Enable any character to restart output.
 614          * Operation resumes after receiving any
 615          * character after recognition of the XOFF character
 616          */
 617         if (termios->c_iflag & IXANY)
 618                 up->mcr |= UART_MCR_XONANY;
 619
 620         serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 621         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 622         serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
 623         /* Enable special char function UARTi.EFR_REG[5] and
 624          * load the new software flow control mode IXON or IXOFF
 625          * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
 626          */
 627         serial_out(up, UART_EFR, efr | UART_EFR_SCD);
 628         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 629
 630         serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
 631         serial_out(up, UART_LCR, up->lcr);
 632 }
 633
 634 static void
 635 serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
 636                         struct ktermios *old)
 637 {
 638         struct uart_omap_port *up = (struct uart_omap_port *)port;
 639         unsigned char cval = 0;
 640         unsigned char efr = 0;
 641         unsigned long flags = 0;
 642         unsigned int baud, quot;
 643
 644         switch (termios->c_cflag & CSIZE) {
 645         case CS5:
 646                 cval = UART_LCR_WLEN5;
 647                 break;
 648         case CS6:
 649                 cval = UART_LCR_WLEN6;
 650                 break;
 651         case CS7:
 652                 cval = UART_LCR_WLEN7;
 653                 break;
 654         default:
 655         case CS8:
 656                 cval = UART_LCR_WLEN8;
 657                 break;
 658         }
 659
 660         if (termios->c_cflag & CSTOPB)
 661                 cval |= UART_LCR_STOP;
 662         if (termios->c_cflag & PARENB)
 663                 cval |= UART_LCR_PARITY;
 664         if (!(termios->c_cflag & PARODD))
 665                 cval |= UART_LCR_EPAR;
 666
 667         /*
 668          * Ask the core to calculate the divisor for us.
 669          */
 670
 671         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
 672         quot = serial_omap_get_divisor(port, baud);
 673
 674         up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
 675                         UART_FCR_ENABLE_FIFO;
 676         if (up->use_dma)
 677                 up->fcr |= UART_FCR_DMA_SELECT;
 678
 679         /*
 680          * Ok, we're now changing the port state. Do it with
 681          * interrupts disabled.
 682          */
 683         spin_lock_irqsave(&up->port.lock, flags);
 684
 685         /*
 686          * Update the per-port timeout.
 687          */
 688         uart_update_timeout(port, termios->c_cflag, baud);
 689
 690         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 691         if (termios->c_iflag & INPCK)
 692                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 693         if (termios->c_iflag & (BRKINT | PARMRK))
 694                 up->port.read_status_mask |= UART_LSR_BI;
 695
 696         /*
 697          * Characters to ignore
 698          */
 699         up->port.ignore_status_mask = 0;
 700         if (termios->c_iflag & IGNPAR)
 701                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 702         if (termios->c_iflag & IGNBRK) {
 703                 up->port.ignore_status_mask |= UART_LSR_BI;
 704                 /*
 705                  * If we're ignoring parity and break indicators,
 706                  * ignore overruns too (for real raw support).
 707                  */
 708                 if (termios->c_iflag & IGNPAR)
 709                         up->port.ignore_status_mask |= UART_LSR_OE;
 710         }
 711
 712         /*
 713          * ignore all characters if CREAD is not set
 714          */
 715         if ((termios->c_cflag & CREAD) == 0)
 716                 up->port.ignore_status_mask |= UART_LSR_DR;
 717
 718         /*
 719          * Modem status interrupts
 720          */
 721         up->ier &= ~UART_IER_MSI;
 722         if (UART_ENABLE_MS(&up->port, termios->c_cflag))
 723                 up->ier |= UART_IER_MSI;
 724         serial_out(up, UART_IER, up->ier);
 725         serial_out(up, UART_LCR, cval);         /* reset DLAB */
 726
 727         /* FIFOs and DMA Settings */
 728
 729         /* FCR can be changed only when the
 730          * baud clock is not running
 731          * DLL_REG and DLH_REG set to 0.
 732          */
 733         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 734         serial_out(up, UART_DLL, 0);
 735         serial_out(up, UART_DLM, 0);
 736         serial_out(up, UART_LCR, 0);
 737
 738         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 739
 740         up->efr = serial_in(up, UART_EFR);
 741         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 742
 743         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 744         up->mcr = serial_in(up, UART_MCR);
 745         serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 746         /* FIFO ENABLE, DMA MODE */
 747         serial_out(up, UART_FCR, up->fcr);
 748         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 749
 750         if (up->use_dma) {
 751                 serial_out(up, UART_TI752_TLR, 0);
 752                 serial_out(up, UART_OMAP_SCR,
 753                         (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8));
 754         }
 755
 756         serial_out(up, UART_EFR, up->efr);
 757         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 758         serial_out(up, UART_MCR, up->mcr);
 759
 760         /* Protocol, Baud Rate, and Interrupt Settings */
 761
 762         serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
 763         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 764
 765         up->efr = serial_in(up, UART_EFR);
 766         serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 767
 768         serial_out(up, UART_LCR, 0);
 769         serial_out(up, UART_IER, 0);
 770         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 771
 772         serial_out(up, UART_DLL, quot & 0xff);          /* LS of divisor */
 773         serial_out(up, UART_DLM, quot >> 8);            /* MS of divisor */
 774
 775         serial_out(up, UART_LCR, 0);
 776         serial_out(up, UART_IER, up->ier);
 777         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 778
 779         serial_out(up, UART_EFR, up->efr);
 780         serial_out(up, UART_LCR, cval);
 781
 782         if (baud > 230400 && baud != 3000000)
 783                 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
 784         else
 785                 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
 786
 787         /* Hardware Flow Control Configuration */
 788
 789         if (termios->c_cflag & CRTSCTS) {
 790                 efr |= (UART_EFR_CTS | UART_EFR_RTS);
 791                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 792
 793                 up->mcr = serial_in(up, UART_MCR);
 794                 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
 795
 796                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 797                 up->efr = serial_in(up, UART_EFR);
 798                 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
 799
 800                 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
 801                 serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
 802                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
 803                 serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
 804                 serial_out(up, UART_LCR, cval);
 805         }
 806
 807         serial_omap_set_mctrl(&up->port, up->port.mctrl);
 808         /* Software Flow Control Configuration */
 809         if (termios->c_iflag & (IXON | IXOFF))
 810                 serial_omap_configure_xonxoff(up, termios);
 811
 812         spin_unlock_irqrestore(&up->port.lock, flags);
 813         dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
 814 }
 815
 816 static void
 817 serial_omap_pm(struct uart_port *port, unsigned int state,
 818                unsigned int oldstate)
 819 {
 820         struct uart_omap_port *up = (struct uart_omap_port *)port;
 821         unsigned char efr;
 822
 823         dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
 824         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 825         efr = serial_in(up, UART_EFR);
 826         serial_out(up, UART_EFR, efr | UART_EFR_ECB);
 827         serial_out(up, UART_LCR, 0);
 828
 829         serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
 830         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 831         serial_out(up, UART_EFR, efr);
 832         serial_out(up, UART_LCR, 0);
 833 }
 834
 835 static void serial_omap_release_port(struct uart_port *port)
 836 {
 837         dev_dbg(port->dev, "serial_omap_release_port+\n");
 838 }
 839
 840 static int serial_omap_request_port(struct uart_port *port)
 841 {
 842         dev_dbg(port->dev, "serial_omap_request_port+\n");
 843         return 0;
 844 }
 845
 846 static void serial_omap_config_port(struct uart_port *port, int flags)
 847 {
 848         struct uart_omap_port *up = (struct uart_omap_port *)port;
 849
 850         dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
 851                                                         up->pdev->id);
 852         up->port.type = PORT_OMAP;
 853 }
 854
 855 static int
 856 serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
 857 {
 858         /* we don't want the core code to modify any port params */
 859         dev_dbg(port->dev, "serial_omap_verify_port+\n");
 860         return -EINVAL;
 861 }
 862
 863 static const char *
 864 serial_omap_type(struct uart_port *port)
 865 {
 866         struct uart_omap_port *up = (struct uart_omap_port *)port;
 867
 868         dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
 869         return up->name;
 870 }
 871
 872 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 873
 874 static inline void wait_for_xmitr(struct uart_omap_port *up)
 875 {
 876         unsigned int status, tmout = 10000;
 877
 878         /* Wait up to 10ms for the character(s) to be sent. */
 879         do {
 880                 status = serial_in(up, UART_LSR);
 881
 882                 if (status & UART_LSR_BI)
 883                         up->lsr_break_flag = UART_LSR_BI;
 884
 885                 if (--tmout == 0)
 886                         break;
 887                 udelay(1);
 888         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
 889
 890         /* Wait up to 1s for flow control if necessary */
 891         if (up->port.flags & UPF_CONS_FLOW) {
 892                 tmout = 1000000;
 893                 for (tmout = 1000000; tmout; tmout--) {
 894                         unsigned int msr = serial_in(up, UART_MSR);
 895
 896                         up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
 897                         if (msr & UART_MSR_CTS)
 898                                 break;
 899
 900                         udelay(1);
 901                 }
 902         }
 903 }
 904
 905 #ifdef CONFIG_CONSOLE_POLL
 906
 907 static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
 908 {
 909         struct uart_omap_port *up = (struct uart_omap_port *)port;
 910         wait_for_xmitr(up);
 911         serial_out(up, UART_TX, ch);
 912 }
 913
 914 static int serial_omap_poll_get_char(struct uart_port *port)
 915 {
 916         struct uart_omap_port *up = (struct uart_omap_port *)port;
 917         unsigned int status = serial_in(up, UART_LSR);
 918
 919         if (!(status & UART_LSR_DR))
 920                 return NO_POLL_CHAR;
 921
 922         return serial_in(up, UART_RX);
 923 }
 924
 925 #endif /* CONFIG_CONSOLE_POLL */
 926
 927 #ifdef CONFIG_SERIAL_OMAP_CONSOLE
 928
 929 static struct uart_omap_port *serial_omap_console_ports[4];
 930
 931 static struct uart_driver serial_omap_reg;
 932
 933 static void serial_omap_console_putchar(struct uart_port *port, int ch)
 934 {
 935         struct uart_omap_port *up = (struct uart_omap_port *)port;
 936
 937         wait_for_xmitr(up);
 938         serial_out(up, UART_TX, ch);
 939 }
 940
 941 static void
 942 serial_omap_console_write(struct console *co, const char *s,
 943                 unsigned int count)
 944 {
 945         struct uart_omap_port *up = serial_omap_console_ports[co->index];
 946         unsigned long flags;
 947         unsigned int ier;
 948         int locked = 1;
 949
 950         local_irq_save(flags);
 951         if (up->port.sysrq)
 952                 locked = 0;
 953         else if (oops_in_progress)
 954                 locked = spin_trylock(&up->port.lock);
 955         else
 956                 spin_lock(&up->port.lock);
 957
 958         /*
 959          * First save the IER then disable the interrupts
 960          */
 961         ier = serial_in(up, UART_IER);
 962         serial_out(up, UART_IER, 0);
 963
 964         uart_console_write(&up->port, s, count, serial_omap_console_putchar);
 965
 966         /*
 967          * Finally, wait for transmitter to become empty
 968          * and restore the IER
 969          */
 970         wait_for_xmitr(up);
 971         serial_out(up, UART_IER, ier);
 972         /*
 973          * The receive handling will happen properly because the
 974          * receive ready bit will still be set; it is not cleared
 975          * on read.  However, modem control will not, we must
 976          * call it if we have saved something in the saved flags
 977          * while processing with interrupts off.
 978          */
 979         if (up->msr_saved_flags)
 980                 check_modem_status(up);
 981
 982         if (locked)
 983                 spin_unlock(&up->port.lock);
 984         local_irq_restore(flags);
 985 }
 986
 987 static int __init
 988 serial_omap_console_setup(struct console *co, char *options)
 989 {
 990         struct uart_omap_port *up;
 991         int baud = 115200;
 992         int bits = 8;
 993         int parity = 'n';
 994         int flow = 'n';
 995
 996         if (serial_omap_console_ports[co->index] == NULL)
 997                 return -ENODEV;
 998         up = serial_omap_console_ports[co->index];
 999
1000         if (options)
1001                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1002
1003         return uart_set_options(&up->port, co, baud, parity, bits, flow);
1004 }
1005
1006 static struct console serial_omap_console = {
1007         .name           = OMAP_SERIAL_NAME,
1008         .write          = serial_omap_console_write,
1009         .device         = uart_console_device,
1010         .setup          = serial_omap_console_setup,
1011         .flags          = CON_PRINTBUFFER,
1012         .index          = -1,
1013         .data           = &serial_omap_reg,
1014 };
1015
1016 static void serial_omap_add_console_port(struct uart_omap_port *up)
1017 {
1018         serial_omap_console_ports[up->pdev->id] = up;
1019 }
1020
1021 #define OMAP_CONSOLE    (&serial_omap_console)
1022
1023 #else
1024
1025 #define OMAP_CONSOLE    NULL
1026
1027 static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1028 {}
1029
1030 #endif
1031
1032 static struct uart_ops serial_omap_pops = {
1033         .tx_empty       = serial_omap_tx_empty,
1034         .set_mctrl      = serial_omap_set_mctrl,
1035         .get_mctrl      = serial_omap_get_mctrl,
1036         .stop_tx        = serial_omap_stop_tx,
1037         .start_tx       = serial_omap_start_tx,
1038         .stop_rx        = serial_omap_stop_rx,
1039         .enable_ms      = serial_omap_enable_ms,
1040         .break_ctl      = serial_omap_break_ctl,
1041         .startup        = serial_omap_startup,
1042         .shutdown       = serial_omap_shutdown,
1043         .set_termios    = serial_omap_set_termios,
1044         .pm             = serial_omap_pm,
1045         .type           = serial_omap_type,
1046         .release_port   = serial_omap_release_port,
1047         .request_port   = serial_omap_request_port,
1048         .config_port    = serial_omap_config_port,
1049         .verify_port    = serial_omap_verify_port,
1050 #ifdef CONFIG_CONSOLE_POLL
1051         .poll_put_char  = serial_omap_poll_put_char,
1052         .poll_get_char  = serial_omap_poll_get_char,
1053 #endif
1054 };
1055
1056 static struct uart_driver serial_omap_reg = {
1057         .owner          = THIS_MODULE,
1058         .driver_name    = "OMAP-SERIAL",
1059         .dev_name       = OMAP_SERIAL_NAME,
1060         .nr             = OMAP_MAX_HSUART_PORTS,
1061         .cons           = OMAP_CONSOLE,
1062 };
1063
1064 static int
1065 serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
1066 {
1067         struct uart_omap_port *up = platform_get_drvdata(pdev);
1068
1069         if (up)
1070                 uart_suspend_port(&serial_omap_reg, &up->port);
1071         return 0;
1072 }
1073
1074 static int serial_omap_resume(struct platform_device *dev)
1075 {
1076         struct uart_omap_port *up = platform_get_drvdata(dev);
1077
1078         if (up)
1079                 uart_resume_port(&serial_omap_reg, &up->port);
1080         return 0;
1081 }
1082
1083 static void serial_omap_rx_timeout(unsigned long uart_no)
1084 {
1085         struct uart_omap_port *up = ui[uart_no];
1086         unsigned int curr_dma_pos, curr_transmitted_size;
1087         int ret = 0;
1088
1089         curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1090         if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1091                              (curr_dma_pos == 0)) {
1092                 if (jiffies_to_msecs(jiffies - up->port_activity) <
1093                                                         RX_TIMEOUT) {
1094                         mod_timer(&up->uart_dma.rx_timer, jiffies +
1095                                 usecs_to_jiffies(up->uart_dma.rx_timeout));
1096                 } else {
1097                         serial_omap_stop_rxdma(up);
1098                         up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1099                         serial_out(up, UART_IER, up->ier);
1100                 }
1101                 return;
1102         }
1103
1104         curr_transmitted_size = curr_dma_pos -
1105                                         up->uart_dma.prev_rx_dma_pos;
1106         up->port.icount.rx += curr_transmitted_size;
1107         tty_insert_flip_string(up->port.state->port.tty,
1108                         up->uart_dma.rx_buf +
1109                         (up->uart_dma.prev_rx_dma_pos -
1110                         up->uart_dma.rx_buf_dma_phys),
1111                         curr_transmitted_size);
1112         tty_flip_buffer_push(up->port.state->port.tty);
1113         up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1114         if (up->uart_dma.rx_buf_size +
1115                         up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1116                 ret = serial_omap_start_rxdma(up);
1117                 if (ret < 0) {
1118                         serial_omap_stop_rxdma(up);
1119                         up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1120                         serial_out(up, UART_IER, up->ier);
1121                 }
1122         } else  {
1123                 mod_timer(&up->uart_dma.rx_timer, jiffies +
1124                         usecs_to_jiffies(up->uart_dma.rx_timeout));
1125         }
1126         up->port_activity = jiffies;
1127 }
1128
1129 static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1130 {
1131         return;
1132 }
1133
1134 static int serial_omap_start_rxdma(struct uart_omap_port *up)
1135 {
1136         int ret = 0;
1137
1138         if (up->uart_dma.rx_dma_channel == -1) {
1139                 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1140                                 "UART Rx DMA",
1141                                 (void *)uart_rx_dma_callback, up,
1142                                 &(up->uart_dma.rx_dma_channel));
1143                 if (ret < 0)
1144                         return ret;
1145
1146                 omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1147                                 OMAP_DMA_AMODE_CONSTANT,
1148                                 up->uart_dma.uart_base, 0, 0);
1149                 omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1150                                 OMAP_DMA_AMODE_POST_INC,
1151                                 up->uart_dma.rx_buf_dma_phys, 0, 0);
1152                 omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1153                                 OMAP_DMA_DATA_TYPE_S8,
1154                                 up->uart_dma.rx_buf_size, 1,
1155                                 OMAP_DMA_SYNC_ELEMENT,
1156                                 up->uart_dma.uart_dma_rx, 0);
1157         }
1158         up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1159         /* FIXME: Cache maintenance needed here? */
1160         omap_start_dma(up->uart_dma.rx_dma_channel);
1161         mod_timer(&up->uart_dma.rx_timer, jiffies +
1162                                 usecs_to_jiffies(up->uart_dma.rx_timeout));
1163         up->uart_dma.rx_dma_used = true;
1164         return ret;
1165 }
1166
1167 static void serial_omap_continue_tx(struct uart_omap_port *up)
1168 {
1169         struct circ_buf *xmit = &up->port.state->xmit;
1170         unsigned int start = up->uart_dma.tx_buf_dma_phys
1171                         + (xmit->tail & (UART_XMIT_SIZE - 1));
1172
1173         if (uart_circ_empty(xmit))
1174                 return;
1175
1176         up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1177         /*
1178          * It is a circular buffer. See if the buffer has wounded back.
1179          * If yes it will have to be transferred in two separate dma
1180          * transfers
1181          */
1182         if (start + up->uart_dma.tx_buf_size >=
1183                         up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1184                 up->uart_dma.tx_buf_size =
1185                         (up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1186         omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1187                                 OMAP_DMA_AMODE_CONSTANT,
1188                                 up->uart_dma.uart_base, 0, 0);
1189         omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1190                                 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1191         omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1192                                 OMAP_DMA_DATA_TYPE_S8,
1193                                 up->uart_dma.tx_buf_size, 1,
1194                                 OMAP_DMA_SYNC_ELEMENT,
1195                                 up->uart_dma.uart_dma_tx, 0);
1196         /* FIXME: Cache maintenance needed here? */
1197         omap_start_dma(up->uart_dma.tx_dma_channel);
1198 }
1199
1200 static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1201 {
1202         struct uart_omap_port *up = (struct uart_omap_port *)data;
1203         struct circ_buf *xmit = &up->port.state->xmit;
1204
1205         xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1206                         (UART_XMIT_SIZE - 1);
1207         up->port.icount.tx += up->uart_dma.tx_buf_size;
1208
1209         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1210                 uart_write_wakeup(&up->port);
1211
1212         if (uart_circ_empty(xmit)) {
1213                 spin_lock(&(up->uart_dma.tx_lock));
1214                 serial_omap_stop_tx(&up->port);
1215                 up->uart_dma.tx_dma_used = false;
1216                 spin_unlock(&(up->uart_dma.tx_lock));
1217         } else {
1218                 omap_stop_dma(up->uart_dma.tx_dma_channel);
1219                 serial_omap_continue_tx(up);
1220         }
1221         up->port_activity = jiffies;
1222         return;
1223 }
1224
1225 static int serial_omap_probe(struct platform_device *pdev)
1226 {
1227         struct uart_omap_port   *up;
1228         struct resource         *mem, *irq, *dma_tx, *dma_rx;
1229         struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1230         int ret = -ENOSPC;
1231
1232         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1233         if (!mem) {
1234                 dev_err(&pdev->dev, "no mem resource?\n");
1235                 return -ENODEV;
1236         }
1237
1238         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1239         if (!irq) {
1240                 dev_err(&pdev->dev, "no irq resource?\n");
1241                 return -ENODEV;
1242         }
1243
1244         if (!request_mem_region(mem->start, resource_size(mem),
1245                                 pdev->dev.driver->name)) {
1246                 dev_err(&pdev->dev, "memory region already claimed\n");
1247                 return -EBUSY;
1248         }
1249
1250         dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1251         if (!dma_rx) {
1252                 ret = -EINVAL;
1253                 goto err;
1254         }
1255
1256         dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1257         if (!dma_tx) {
1258                 ret = -EINVAL;
1259                 goto err;
1260         }
1261
1262         up = kzalloc(sizeof(*up), GFP_KERNEL);
1263         if (up == NULL) {
1264                 ret = -ENOMEM;
1265                 goto do_release_region;
1266         }
1267         sprintf(up->name, "OMAP UART%d", pdev->id);
1268         up->pdev = pdev;
1269         up->port.dev = &pdev->dev;
1270         up->port.type = PORT_OMAP;
1271         up->port.iotype = UPIO_MEM;
1272         up->port.irq = irq->start;
1273
1274         up->port.regshift = 2;
1275         up->port.fifosize = 64;
1276         up->port.ops = &serial_omap_pops;
1277         up->port.line = pdev->id;
1278
1279         up->port.membase = omap_up_info->membase;
1280         up->port.mapbase = omap_up_info->mapbase;
1281         up->port.flags = omap_up_info->flags;
1282         up->port.irqflags = omap_up_info->irqflags;
1283         up->port.uartclk = omap_up_info->uartclk;
1284         up->uart_dma.uart_base = mem->start;
1285
1286         if (omap_up_info->dma_enabled) {
1287                 up->uart_dma.uart_dma_tx = dma_tx->start;
1288                 up->uart_dma.uart_dma_rx = dma_rx->start;
1289                 up->use_dma = 1;
1290                 up->uart_dma.rx_buf_size = 4096;
1291                 up->uart_dma.rx_timeout = 2;
1292                 spin_lock_init(&(up->uart_dma.tx_lock));
1293                 spin_lock_init(&(up->uart_dma.rx_lock));
1294                 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1295                 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1296         }
1297
1298         ui[pdev->id] = up;
1299         serial_omap_add_console_port(up);
1300
1301         ret = uart_add_one_port(&serial_omap_reg, &up->port);
1302         if (ret != 0)
1303                 goto do_release_region;
1304
1305         platform_set_drvdata(pdev, up);
1306         return 0;
1307 err:
1308         dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
1309                                 pdev->id, __func__, ret);
1310 do_release_region:
1311         release_mem_region(mem->start, resource_size(mem));
1312         return ret;
1313 }
1314
1315 static int serial_omap_remove(struct platform_device *dev)
1316 {
1317         struct uart_omap_port *up = platform_get_drvdata(dev);
1318
1319         platform_set_drvdata(dev, NULL);
1320         if (up) {
1321                 uart_remove_one_port(&serial_omap_reg, &up->port);
1322                 kfree(up);
1323         }
1324         return 0;
1325 }
1326
1327 static struct platform_driver serial_omap_driver = {
1328         .probe          = serial_omap_probe,
1329         .remove         = serial_omap_remove,
1330
1331         .suspend        = serial_omap_suspend,
1332         .resume         = serial_omap_resume,
1333         .driver         = {
1334                 .name   = DRIVER_NAME,
1335         },
1336 };
1337
1338 static int __init serial_omap_init(void)
1339 {
1340         int ret;
1341
1342         ret = uart_register_driver(&serial_omap_reg);
1343         if (ret != 0)
1344                 return ret;
1345         ret = platform_driver_register(&serial_omap_driver);
1346         if (ret != 0)
1347                 uart_unregister_driver(&serial_omap_reg);
1348         return ret;
1349 }
1350
1351 static void __exit serial_omap_exit(void)
1352 {
1353         platform_driver_unregister(&serial_omap_driver);
1354         uart_unregister_driver(&serial_omap_reg);
1355 }
1356
1357 module_init(serial_omap_init);
1358 module_exit(serial_omap_exit);
1359
1360 MODULE_DESCRIPTION("OMAP High Speed UART driver");
1361 MODULE_LICENSE("GPL");
1362 MODULE_AUTHOR("Texas Instruments Inc");