2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41 #include <linux/uaccess.h>
44 #include <asm/ioctls.h>
46 #include <asm/mach/serial_at91.h>
47 #include <mach/board.h>
54 #define PDC_BUFFER_SIZE 512
55 /* Revisit: We should calculate this based on the actual port settings */
56 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
58 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
62 #include <linux/serial_core.h>
64 static void atmel_start_rx(struct uart_port *port);
65 static void atmel_stop_rx(struct uart_port *port);
67 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
69 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
70 * should coexist with the 8250 driver, such as if we have an external 16C550
72 #define SERIAL_ATMEL_MAJOR 204
73 #define MINOR_START 154
74 #define ATMEL_DEVICENAME "ttyAT"
78 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
79 * name, but it is legally reserved for the 8250 driver. */
80 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
81 #define MINOR_START 64
82 #define ATMEL_DEVICENAME "ttyS"
86 #define ATMEL_ISR_PASS_LIMIT 256
88 /* UART registers. CR is write-only, hence no GET macro */
89 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
90 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
91 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
92 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
93 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
94 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
95 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
96 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
97 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
98 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
99 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
100 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
101 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
104 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
105 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
107 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
108 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
109 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
110 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
111 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
113 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
114 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
115 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
117 static int (*atmel_open_hook)(struct uart_port *);
118 static void (*atmel_close_hook)(struct uart_port *);
120 struct atmel_dma_buffer {
123 unsigned int dma_size;
127 struct atmel_uart_char {
132 #define ATMEL_SERIAL_RINGSIZE 1024
135 * We wrap our port structure around the generic uart_port.
137 struct atmel_uart_port {
138 struct uart_port uart; /* uart */
139 struct clk *clk; /* uart clock */
140 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
141 u32 backup_imr; /* IMR saved during suspend */
142 int break_active; /* break being received */
144 short use_dma_rx; /* enable PDC receiver */
145 short pdc_rx_idx; /* current PDC RX buffer */
146 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
148 short use_dma_tx; /* enable PDC transmitter */
149 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
151 struct tasklet_struct tasklet;
152 unsigned int irq_status;
153 unsigned int irq_status_prev;
155 struct circ_buf rx_ring;
157 struct serial_rs485 rs485; /* rs485 settings */
158 unsigned int tx_done_mask;
161 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
162 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
165 static struct console atmel_console;
168 #if defined(CONFIG_OF)
169 static const struct of_device_id atmel_serial_dt_ids[] = {
170 { .compatible = "atmel,at91rm9200-usart" },
171 { .compatible = "atmel,at91sam9260-usart" },
175 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
178 static inline struct atmel_uart_port *
179 to_atmel_uart_port(struct uart_port *uart)
181 return container_of(uart, struct atmel_uart_port, uart);
184 #ifdef CONFIG_SERIAL_ATMEL_PDC
185 static bool atmel_use_dma_rx(struct uart_port *port)
187 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
189 return atmel_port->use_dma_rx;
192 static bool atmel_use_dma_tx(struct uart_port *port)
194 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
196 return atmel_port->use_dma_tx;
199 static bool atmel_use_dma_rx(struct uart_port *port)
204 static bool atmel_use_dma_tx(struct uart_port *port)
210 /* Enable or disable the rs485 support */
211 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
213 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
217 spin_lock_irqsave(&port->lock, flags);
219 /* Disable interrupts */
220 UART_PUT_IDR(port, atmel_port->tx_done_mask);
222 mode = UART_GET_MR(port);
224 /* Resetting serial mode to RS232 (0x0) */
225 mode &= ~ATMEL_US_USMODE;
227 atmel_port->rs485 = *rs485conf;
229 if (rs485conf->flags & SER_RS485_ENABLED) {
230 dev_dbg(port->dev, "Setting UART to RS485\n");
231 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
232 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
233 mode |= ATMEL_US_USMODE_RS485;
235 dev_dbg(port->dev, "Setting UART to RS232\n");
236 if (atmel_use_dma_tx(port))
237 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
240 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
242 UART_PUT_MR(port, mode);
244 /* Enable interrupts */
245 UART_PUT_IER(port, atmel_port->tx_done_mask);
247 spin_unlock_irqrestore(&port->lock, flags);
252 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
254 static u_int atmel_tx_empty(struct uart_port *port)
256 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
260 * Set state of the modem control output lines
262 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
264 unsigned int control = 0;
266 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
268 #ifdef CONFIG_ARCH_AT91RM9200
269 if (cpu_is_at91rm9200()) {
271 * AT91RM9200 Errata #39: RTS0 is not internally connected
272 * to PA21. We need to drive the pin manually.
274 if (port->mapbase == AT91RM9200_BASE_US0) {
275 if (mctrl & TIOCM_RTS)
276 at91_set_gpio_value(AT91_PIN_PA21, 0);
278 at91_set_gpio_value(AT91_PIN_PA21, 1);
283 if (mctrl & TIOCM_RTS)
284 control |= ATMEL_US_RTSEN;
286 control |= ATMEL_US_RTSDIS;
288 if (mctrl & TIOCM_DTR)
289 control |= ATMEL_US_DTREN;
291 control |= ATMEL_US_DTRDIS;
293 UART_PUT_CR(port, control);
295 /* Local loopback mode? */
296 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
297 if (mctrl & TIOCM_LOOP)
298 mode |= ATMEL_US_CHMODE_LOC_LOOP;
300 mode |= ATMEL_US_CHMODE_NORMAL;
302 /* Resetting serial mode to RS232 (0x0) */
303 mode &= ~ATMEL_US_USMODE;
305 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
306 dev_dbg(port->dev, "Setting UART to RS485\n");
307 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_after_send);
308 mode |= ATMEL_US_USMODE_RS485;
310 dev_dbg(port->dev, "Setting UART to RS232\n");
312 UART_PUT_MR(port, mode);
316 * Get state of the modem control input lines
318 static u_int atmel_get_mctrl(struct uart_port *port)
320 unsigned int status, ret = 0;
322 status = UART_GET_CSR(port);
325 * The control signals are active low.
327 if (!(status & ATMEL_US_DCD))
329 if (!(status & ATMEL_US_CTS))
331 if (!(status & ATMEL_US_DSR))
333 if (!(status & ATMEL_US_RI))
342 static void atmel_stop_tx(struct uart_port *port)
344 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
346 if (atmel_use_dma_tx(port)) {
347 /* disable PDC transmit */
348 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
350 /* Disable interrupts */
351 UART_PUT_IDR(port, atmel_port->tx_done_mask);
353 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
354 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
355 atmel_start_rx(port);
359 * Start transmitting.
361 static void atmel_start_tx(struct uart_port *port)
363 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
365 if (atmel_use_dma_tx(port)) {
366 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
367 /* The transmitter is already running. Yes, we
371 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
372 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
375 /* re-enable PDC transmit */
376 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
378 /* Enable interrupts */
379 UART_PUT_IER(port, atmel_port->tx_done_mask);
383 * start receiving - port is in process of being opened.
385 static void atmel_start_rx(struct uart_port *port)
387 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
389 if (atmel_use_dma_rx(port)) {
390 /* enable PDC controller */
391 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
392 port->read_status_mask);
393 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
395 UART_PUT_IER(port, ATMEL_US_RXRDY);
400 * Stop receiving - port is in process of being closed.
402 static void atmel_stop_rx(struct uart_port *port)
404 if (atmel_use_dma_rx(port)) {
405 /* disable PDC receive */
406 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
407 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
408 port->read_status_mask);
410 UART_PUT_IDR(port, ATMEL_US_RXRDY);
415 * Enable modem status interrupts
417 static void atmel_enable_ms(struct uart_port *port)
419 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
420 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
424 * Control the transmission of a break signal
426 static void atmel_break_ctl(struct uart_port *port, int break_state)
428 if (break_state != 0)
429 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
431 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
435 * Stores the incoming character in the ring buffer
438 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
441 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
442 struct circ_buf *ring = &atmel_port->rx_ring;
443 struct atmel_uart_char *c;
445 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
446 /* Buffer overflow, ignore char */
449 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
453 /* Make sure the character is stored before we update head. */
456 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
460 * Deal with parity, framing and overrun errors.
462 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
465 UART_PUT_CR(port, ATMEL_US_RSTSTA);
467 if (status & ATMEL_US_RXBRK) {
468 /* ignore side-effect */
469 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
472 if (status & ATMEL_US_PARE)
473 port->icount.parity++;
474 if (status & ATMEL_US_FRAME)
475 port->icount.frame++;
476 if (status & ATMEL_US_OVRE)
477 port->icount.overrun++;
481 * Characters received (called from interrupt handler)
483 static void atmel_rx_chars(struct uart_port *port)
485 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
486 unsigned int status, ch;
488 status = UART_GET_CSR(port);
489 while (status & ATMEL_US_RXRDY) {
490 ch = UART_GET_CHAR(port);
493 * note that the error handling code is
494 * out of the main execution path
496 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
497 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
498 || atmel_port->break_active)) {
501 UART_PUT_CR(port, ATMEL_US_RSTSTA);
503 if (status & ATMEL_US_RXBRK
504 && !atmel_port->break_active) {
505 atmel_port->break_active = 1;
506 UART_PUT_IER(port, ATMEL_US_RXBRK);
509 * This is either the end-of-break
510 * condition or we've received at
511 * least one character without RXBRK
512 * being set. In both cases, the next
513 * RXBRK will indicate start-of-break.
515 UART_PUT_IDR(port, ATMEL_US_RXBRK);
516 status &= ~ATMEL_US_RXBRK;
517 atmel_port->break_active = 0;
521 atmel_buffer_rx_char(port, status, ch);
522 status = UART_GET_CSR(port);
525 tasklet_schedule(&atmel_port->tasklet);
529 * Transmit characters (called from tasklet with TXRDY interrupt
532 static void atmel_tx_chars(struct uart_port *port)
534 struct circ_buf *xmit = &port->state->xmit;
535 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
537 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
538 UART_PUT_CHAR(port, port->x_char);
542 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
545 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
546 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
547 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
549 if (uart_circ_empty(xmit))
553 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
554 uart_write_wakeup(port);
556 if (!uart_circ_empty(xmit))
557 /* Enable interrupts */
558 UART_PUT_IER(port, atmel_port->tx_done_mask);
562 * receive interrupt handler.
565 atmel_handle_receive(struct uart_port *port, unsigned int pending)
567 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
569 if (atmel_use_dma_rx(port)) {
571 * PDC receive. Just schedule the tasklet and let it
572 * figure out the details.
574 * TODO: We're not handling error flags correctly at
577 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
578 UART_PUT_IDR(port, (ATMEL_US_ENDRX
579 | ATMEL_US_TIMEOUT));
580 tasklet_schedule(&atmel_port->tasklet);
583 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
584 ATMEL_US_FRAME | ATMEL_US_PARE))
585 atmel_pdc_rxerr(port, pending);
588 /* Interrupt receive */
589 if (pending & ATMEL_US_RXRDY)
590 atmel_rx_chars(port);
591 else if (pending & ATMEL_US_RXBRK) {
593 * End of break detected. If it came along with a
594 * character, atmel_rx_chars will handle it.
596 UART_PUT_CR(port, ATMEL_US_RSTSTA);
597 UART_PUT_IDR(port, ATMEL_US_RXBRK);
598 atmel_port->break_active = 0;
603 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
606 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
608 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
610 if (pending & atmel_port->tx_done_mask) {
611 /* Either PDC or interrupt transmission */
612 UART_PUT_IDR(port, atmel_port->tx_done_mask);
613 tasklet_schedule(&atmel_port->tasklet);
618 * status flags interrupt handler.
621 atmel_handle_status(struct uart_port *port, unsigned int pending,
624 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
626 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
628 atmel_port->irq_status = status;
629 tasklet_schedule(&atmel_port->tasklet);
636 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
638 struct uart_port *port = dev_id;
639 unsigned int status, pending, pass_counter = 0;
642 status = UART_GET_CSR(port);
643 pending = status & UART_GET_IMR(port);
647 atmel_handle_receive(port, pending);
648 atmel_handle_status(port, pending, status);
649 atmel_handle_transmit(port, pending);
650 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
652 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
656 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
658 static void atmel_tx_dma(struct uart_port *port)
660 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
661 struct circ_buf *xmit = &port->state->xmit;
662 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
665 /* nothing left to transmit? */
666 if (UART_GET_TCR(port))
669 xmit->tail += pdc->ofs;
670 xmit->tail &= UART_XMIT_SIZE - 1;
672 port->icount.tx += pdc->ofs;
675 /* more to transmit - setup next transfer */
677 /* disable PDC transmit */
678 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
680 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
681 dma_sync_single_for_device(port->dev,
686 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
689 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
690 UART_PUT_TCR(port, count);
691 /* re-enable PDC transmit */
692 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
693 /* Enable interrupts */
694 UART_PUT_IER(port, atmel_port->tx_done_mask);
696 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
697 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
698 /* DMA done, stop TX, start RX for RS485 */
699 atmel_start_rx(port);
703 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
704 uart_write_wakeup(port);
707 static void atmel_rx_from_ring(struct uart_port *port)
709 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
710 struct circ_buf *ring = &atmel_port->rx_ring;
714 while (ring->head != ring->tail) {
715 struct atmel_uart_char c;
717 /* Make sure c is loaded after head. */
720 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
722 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
729 * note that the error handling code is
730 * out of the main execution path
732 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
733 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
734 if (status & ATMEL_US_RXBRK) {
735 /* ignore side-effect */
736 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
739 if (uart_handle_break(port))
742 if (status & ATMEL_US_PARE)
743 port->icount.parity++;
744 if (status & ATMEL_US_FRAME)
745 port->icount.frame++;
746 if (status & ATMEL_US_OVRE)
747 port->icount.overrun++;
749 status &= port->read_status_mask;
751 if (status & ATMEL_US_RXBRK)
753 else if (status & ATMEL_US_PARE)
755 else if (status & ATMEL_US_FRAME)
760 if (uart_handle_sysrq_char(port, c.ch))
763 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
767 * Drop the lock here since it might end up calling
768 * uart_start(), which takes the lock.
770 spin_unlock(&port->lock);
771 tty_flip_buffer_push(port->state->port.tty);
772 spin_lock(&port->lock);
775 static void atmel_rx_from_dma(struct uart_port *port)
777 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
778 struct tty_struct *tty = port->state->port.tty;
779 struct atmel_dma_buffer *pdc;
780 int rx_idx = atmel_port->pdc_rx_idx;
786 /* Reset the UART timeout early so that we don't miss one */
787 UART_PUT_CR(port, ATMEL_US_STTTO);
789 pdc = &atmel_port->pdc_rx[rx_idx];
790 head = UART_GET_RPR(port) - pdc->dma_addr;
793 /* If the PDC has switched buffers, RPR won't contain
794 * any address within the current buffer. Since head
795 * is unsigned, we just need a one-way comparison to
798 * In this case, we just need to consume the entire
799 * buffer and resubmit it for DMA. This will clear the
800 * ENDRX bit as well, so that we can safely re-enable
801 * all interrupts below.
803 head = min(head, pdc->dma_size);
805 if (likely(head != tail)) {
806 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
807 pdc->dma_size, DMA_FROM_DEVICE);
810 * head will only wrap around when we recycle
811 * the DMA buffer, and when that happens, we
812 * explicitly set tail to 0. So head will
813 * always be greater than tail.
817 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
819 dma_sync_single_for_device(port->dev, pdc->dma_addr,
820 pdc->dma_size, DMA_FROM_DEVICE);
822 port->icount.rx += count;
827 * If the current buffer is full, we need to check if
828 * the next one contains any additional data.
830 if (head >= pdc->dma_size) {
832 UART_PUT_RNPR(port, pdc->dma_addr);
833 UART_PUT_RNCR(port, pdc->dma_size);
836 atmel_port->pdc_rx_idx = rx_idx;
838 } while (head >= pdc->dma_size);
841 * Drop the lock here since it might end up calling
842 * uart_start(), which takes the lock.
844 spin_unlock(&port->lock);
845 tty_flip_buffer_push(tty);
846 spin_lock(&port->lock);
848 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
852 * tasklet handling tty stuff outside the interrupt handler.
854 static void atmel_tasklet_func(unsigned long data)
856 struct uart_port *port = (struct uart_port *)data;
857 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
859 unsigned int status_change;
861 /* The interrupt handler does not take the lock */
862 spin_lock(&port->lock);
864 if (atmel_use_dma_tx(port))
867 atmel_tx_chars(port);
869 status = atmel_port->irq_status;
870 status_change = status ^ atmel_port->irq_status_prev;
872 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
873 | ATMEL_US_DCD | ATMEL_US_CTS)) {
874 /* TODO: All reads to CSR will clear these interrupts! */
875 if (status_change & ATMEL_US_RI)
877 if (status_change & ATMEL_US_DSR)
879 if (status_change & ATMEL_US_DCD)
880 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
881 if (status_change & ATMEL_US_CTS)
882 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
884 wake_up_interruptible(&port->state->port.delta_msr_wait);
886 atmel_port->irq_status_prev = status;
889 if (atmel_use_dma_rx(port))
890 atmel_rx_from_dma(port);
892 atmel_rx_from_ring(port);
894 spin_unlock(&port->lock);
898 * Perform initialization and enable port for reception
900 static int atmel_startup(struct uart_port *port)
902 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
903 struct tty_struct *tty = port->state->port.tty;
907 * Ensure that no interrupts are enabled otherwise when
908 * request_irq() is called we could get stuck trying to
909 * handle an unexpected interrupt
911 UART_PUT_IDR(port, -1);
916 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
917 tty ? tty->name : "atmel_serial", port);
919 printk("atmel_serial: atmel_startup - Can't get irq\n");
924 * Initialize DMA (if necessary)
926 if (atmel_use_dma_rx(port)) {
929 for (i = 0; i < 2; i++) {
930 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
932 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
933 if (pdc->buf == NULL) {
935 dma_unmap_single(port->dev,
936 atmel_port->pdc_rx[0].dma_addr,
939 kfree(atmel_port->pdc_rx[0].buf);
941 free_irq(port->irq, port);
944 pdc->dma_addr = dma_map_single(port->dev,
948 pdc->dma_size = PDC_BUFFER_SIZE;
952 atmel_port->pdc_rx_idx = 0;
954 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
955 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
957 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
958 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
960 if (atmel_use_dma_tx(port)) {
961 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
962 struct circ_buf *xmit = &port->state->xmit;
964 pdc->buf = xmit->buf;
965 pdc->dma_addr = dma_map_single(port->dev,
969 pdc->dma_size = UART_XMIT_SIZE;
974 * If there is a specific "open" function (to register
975 * control line interrupts)
977 if (atmel_open_hook) {
978 retval = atmel_open_hook(port);
980 free_irq(port->irq, port);
985 /* Save current CSR for comparison in atmel_tasklet_func() */
986 atmel_port->irq_status_prev = UART_GET_CSR(port);
987 atmel_port->irq_status = atmel_port->irq_status_prev;
990 * Finally, enable the serial port
992 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
993 /* enable xmit & rcvr */
994 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
996 if (atmel_use_dma_rx(port)) {
997 /* set UART timeout */
998 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
999 UART_PUT_CR(port, ATMEL_US_STTTO);
1001 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1002 /* enable PDC controller */
1003 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1005 /* enable receive only */
1006 UART_PUT_IER(port, ATMEL_US_RXRDY);
1015 static void atmel_shutdown(struct uart_port *port)
1017 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1019 * Ensure everything is stopped.
1021 atmel_stop_rx(port);
1022 atmel_stop_tx(port);
1025 * Shut-down the DMA.
1027 if (atmel_use_dma_rx(port)) {
1030 for (i = 0; i < 2; i++) {
1031 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1033 dma_unmap_single(port->dev,
1040 if (atmel_use_dma_tx(port)) {
1041 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1043 dma_unmap_single(port->dev,
1050 * Disable all interrupts, port and break condition.
1052 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1053 UART_PUT_IDR(port, -1);
1056 * Free the interrupt
1058 free_irq(port->irq, port);
1061 * If there is a specific "close" function (to unregister
1062 * control line interrupts)
1064 if (atmel_close_hook)
1065 atmel_close_hook(port);
1069 * Flush any TX data submitted for DMA. Called when the TX circular
1072 static void atmel_flush_buffer(struct uart_port *port)
1074 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1076 if (atmel_use_dma_tx(port)) {
1077 UART_PUT_TCR(port, 0);
1078 atmel_port->pdc_tx.ofs = 0;
1083 * Power / Clock management.
1085 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1086 unsigned int oldstate)
1088 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1093 * Enable the peripheral clock for this serial port.
1094 * This is called on uart_open() or a resume event.
1096 clk_enable(atmel_port->clk);
1098 /* re-enable interrupts if we disabled some on suspend */
1099 UART_PUT_IER(port, atmel_port->backup_imr);
1102 /* Back up the interrupt mask and disable all interrupts */
1103 atmel_port->backup_imr = UART_GET_IMR(port);
1104 UART_PUT_IDR(port, -1);
1107 * Disable the peripheral clock for this serial port.
1108 * This is called on uart_close() or a suspend event.
1110 clk_disable(atmel_port->clk);
1113 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1118 * Change the port parameters
1120 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1121 struct ktermios *old)
1123 unsigned long flags;
1124 unsigned int mode, imr, quot, baud;
1125 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1127 /* Get current mode register */
1128 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1129 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1132 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1133 quot = uart_get_divisor(port, baud);
1135 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1137 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1141 switch (termios->c_cflag & CSIZE) {
1143 mode |= ATMEL_US_CHRL_5;
1146 mode |= ATMEL_US_CHRL_6;
1149 mode |= ATMEL_US_CHRL_7;
1152 mode |= ATMEL_US_CHRL_8;
1157 if (termios->c_cflag & CSTOPB)
1158 mode |= ATMEL_US_NBSTOP_2;
1161 if (termios->c_cflag & PARENB) {
1162 /* Mark or Space parity */
1163 if (termios->c_cflag & CMSPAR) {
1164 if (termios->c_cflag & PARODD)
1165 mode |= ATMEL_US_PAR_MARK;
1167 mode |= ATMEL_US_PAR_SPACE;
1168 } else if (termios->c_cflag & PARODD)
1169 mode |= ATMEL_US_PAR_ODD;
1171 mode |= ATMEL_US_PAR_EVEN;
1173 mode |= ATMEL_US_PAR_NONE;
1175 /* hardware handshake (RTS/CTS) */
1176 if (termios->c_cflag & CRTSCTS)
1177 mode |= ATMEL_US_USMODE_HWHS;
1179 mode |= ATMEL_US_USMODE_NORMAL;
1181 spin_lock_irqsave(&port->lock, flags);
1183 port->read_status_mask = ATMEL_US_OVRE;
1184 if (termios->c_iflag & INPCK)
1185 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1186 if (termios->c_iflag & (BRKINT | PARMRK))
1187 port->read_status_mask |= ATMEL_US_RXBRK;
1189 if (atmel_use_dma_rx(port))
1190 /* need to enable error interrupts */
1191 UART_PUT_IER(port, port->read_status_mask);
1194 * Characters to ignore
1196 port->ignore_status_mask = 0;
1197 if (termios->c_iflag & IGNPAR)
1198 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1199 if (termios->c_iflag & IGNBRK) {
1200 port->ignore_status_mask |= ATMEL_US_RXBRK;
1202 * If we're ignoring parity and break indicators,
1203 * ignore overruns too (for real raw support).
1205 if (termios->c_iflag & IGNPAR)
1206 port->ignore_status_mask |= ATMEL_US_OVRE;
1208 /* TODO: Ignore all characters if CREAD is set.*/
1210 /* update the per-port timeout */
1211 uart_update_timeout(port, termios->c_cflag, baud);
1214 * save/disable interrupts. The tty layer will ensure that the
1215 * transmitter is empty if requested by the caller, so there's
1216 * no need to wait for it here.
1218 imr = UART_GET_IMR(port);
1219 UART_PUT_IDR(port, -1);
1221 /* disable receiver and transmitter */
1222 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1224 /* Resetting serial mode to RS232 (0x0) */
1225 mode &= ~ATMEL_US_USMODE;
1227 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1228 dev_dbg(port->dev, "Setting UART to RS485\n");
1229 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_after_send);
1230 mode |= ATMEL_US_USMODE_RS485;
1232 dev_dbg(port->dev, "Setting UART to RS232\n");
1235 /* set the parity, stop bits and data size */
1236 UART_PUT_MR(port, mode);
1238 /* set the baud rate */
1239 UART_PUT_BRGR(port, quot);
1240 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1241 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1243 /* restore interrupts */
1244 UART_PUT_IER(port, imr);
1246 /* CTS flow-control and modem-status interrupts */
1247 if (UART_ENABLE_MS(port, termios->c_cflag))
1248 port->ops->enable_ms(port);
1250 spin_unlock_irqrestore(&port->lock, flags);
1253 static void atmel_set_ldisc(struct uart_port *port, int new)
1255 int line = port->line;
1257 if (line >= port->state->port.tty->driver->num)
1260 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
1261 port->flags |= UPF_HARDPPS_CD;
1262 atmel_enable_ms(port);
1264 port->flags &= ~UPF_HARDPPS_CD;
1269 * Return string describing the specified port
1271 static const char *atmel_type(struct uart_port *port)
1273 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1277 * Release the memory region(s) being used by 'port'.
1279 static void atmel_release_port(struct uart_port *port)
1281 struct platform_device *pdev = to_platform_device(port->dev);
1282 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1284 release_mem_region(port->mapbase, size);
1286 if (port->flags & UPF_IOREMAP) {
1287 iounmap(port->membase);
1288 port->membase = NULL;
1293 * Request the memory region(s) being used by 'port'.
1295 static int atmel_request_port(struct uart_port *port)
1297 struct platform_device *pdev = to_platform_device(port->dev);
1298 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1300 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1303 if (port->flags & UPF_IOREMAP) {
1304 port->membase = ioremap(port->mapbase, size);
1305 if (port->membase == NULL) {
1306 release_mem_region(port->mapbase, size);
1315 * Configure/autoconfigure the port.
1317 static void atmel_config_port(struct uart_port *port, int flags)
1319 if (flags & UART_CONFIG_TYPE) {
1320 port->type = PORT_ATMEL;
1321 atmel_request_port(port);
1326 * Verify the new serial_struct (for TIOCSSERIAL).
1328 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1331 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1333 if (port->irq != ser->irq)
1335 if (ser->io_type != SERIAL_IO_MEM)
1337 if (port->uartclk / 16 != ser->baud_base)
1339 if ((void *)port->mapbase != ser->iomem_base)
1341 if (port->iobase != ser->port)
1348 #ifdef CONFIG_CONSOLE_POLL
1349 static int atmel_poll_get_char(struct uart_port *port)
1351 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1354 return UART_GET_CHAR(port);
1357 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1359 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1362 UART_PUT_CHAR(port, ch);
1367 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1369 struct serial_rs485 rs485conf;
1373 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1377 atmel_config_rs485(port, &rs485conf);
1381 if (copy_to_user((struct serial_rs485 *) arg,
1382 &(to_atmel_uart_port(port)->rs485),
1388 return -ENOIOCTLCMD;
1395 static struct uart_ops atmel_pops = {
1396 .tx_empty = atmel_tx_empty,
1397 .set_mctrl = atmel_set_mctrl,
1398 .get_mctrl = atmel_get_mctrl,
1399 .stop_tx = atmel_stop_tx,
1400 .start_tx = atmel_start_tx,
1401 .stop_rx = atmel_stop_rx,
1402 .enable_ms = atmel_enable_ms,
1403 .break_ctl = atmel_break_ctl,
1404 .startup = atmel_startup,
1405 .shutdown = atmel_shutdown,
1406 .flush_buffer = atmel_flush_buffer,
1407 .set_termios = atmel_set_termios,
1408 .set_ldisc = atmel_set_ldisc,
1410 .release_port = atmel_release_port,
1411 .request_port = atmel_request_port,
1412 .config_port = atmel_config_port,
1413 .verify_port = atmel_verify_port,
1414 .pm = atmel_serial_pm,
1415 .ioctl = atmel_ioctl,
1416 #ifdef CONFIG_CONSOLE_POLL
1417 .poll_get_char = atmel_poll_get_char,
1418 .poll_put_char = atmel_poll_put_char,
1422 static void __devinit atmel_of_init_port(struct atmel_uart_port *atmel_port,
1423 struct device_node *np)
1427 /* DMA/PDC usage specification */
1428 if (of_get_property(np, "atmel,use-dma-rx", NULL))
1429 atmel_port->use_dma_rx = 1;
1431 atmel_port->use_dma_rx = 0;
1432 if (of_get_property(np, "atmel,use-dma-tx", NULL))
1433 atmel_port->use_dma_tx = 1;
1435 atmel_port->use_dma_tx = 0;
1437 /* rs485 properties */
1438 if (of_property_read_u32_array(np, "rs485-rts-delay",
1439 rs485_delay, 2) == 0) {
1440 struct serial_rs485 *rs485conf = &atmel_port->rs485;
1442 rs485conf->delay_rts_before_send = rs485_delay[0];
1443 rs485conf->delay_rts_after_send = rs485_delay[1];
1444 rs485conf->flags = 0;
1446 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1447 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1449 if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL))
1450 rs485conf->flags |= SER_RS485_ENABLED;
1455 * Configure the port from the platform device resource info.
1457 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1458 struct platform_device *pdev)
1460 struct uart_port *port = &atmel_port->uart;
1461 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1463 if (pdev->dev.of_node) {
1464 atmel_of_init_port(atmel_port, pdev->dev.of_node);
1466 atmel_port->use_dma_rx = pdata->use_dma_rx;
1467 atmel_port->use_dma_tx = pdata->use_dma_tx;
1468 atmel_port->rs485 = pdata->rs485;
1471 port->iotype = UPIO_MEM;
1472 port->flags = UPF_BOOT_AUTOCONF;
1473 port->ops = &atmel_pops;
1475 port->dev = &pdev->dev;
1476 port->mapbase = pdev->resource[0].start;
1477 port->irq = pdev->resource[1].start;
1479 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1480 (unsigned long)port);
1482 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1484 if (pdata && pdata->regs) {
1485 /* Already mapped by setup code */
1486 port->membase = pdata->regs;
1488 port->flags |= UPF_IOREMAP;
1489 port->membase = NULL;
1492 /* for console, the clock could already be configured */
1493 if (!atmel_port->clk) {
1494 atmel_port->clk = clk_get(&pdev->dev, "usart");
1495 clk_enable(atmel_port->clk);
1496 port->uartclk = clk_get_rate(atmel_port->clk);
1497 clk_disable(atmel_port->clk);
1498 /* only enable clock when USART is in use */
1501 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
1502 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1503 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1504 else if (atmel_use_dma_tx(port)) {
1505 port->fifosize = PDC_BUFFER_SIZE;
1506 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
1508 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1513 * Register board-specific modem-control line handlers.
1515 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1518 atmel_pops.enable_ms = fns->enable_ms;
1520 atmel_pops.get_mctrl = fns->get_mctrl;
1522 atmel_pops.set_mctrl = fns->set_mctrl;
1523 atmel_open_hook = fns->open;
1524 atmel_close_hook = fns->close;
1525 atmel_pops.pm = fns->pm;
1526 atmel_pops.set_wake = fns->set_wake;
1529 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1530 static void atmel_console_putchar(struct uart_port *port, int ch)
1532 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1534 UART_PUT_CHAR(port, ch);
1538 * Interrupts are disabled on entering
1540 static void atmel_console_write(struct console *co, const char *s, u_int count)
1542 struct uart_port *port = &atmel_ports[co->index].uart;
1543 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1544 unsigned int status, imr;
1545 unsigned int pdc_tx;
1548 * First, save IMR and then disable interrupts
1550 imr = UART_GET_IMR(port);
1551 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1553 /* Store PDC transmit status and disable it */
1554 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1555 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1557 uart_console_write(port, s, count, atmel_console_putchar);
1560 * Finally, wait for transmitter to become empty
1564 status = UART_GET_CSR(port);
1565 } while (!(status & ATMEL_US_TXRDY));
1567 /* Restore PDC transmit status */
1569 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1571 /* set interrupts back the way they were */
1572 UART_PUT_IER(port, imr);
1576 * If the port was already initialised (eg, by a boot loader),
1577 * try to determine the current setup.
1579 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1580 int *parity, int *bits)
1582 unsigned int mr, quot;
1585 * If the baud rate generator isn't running, the port wasn't
1586 * initialized by the boot loader.
1588 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1592 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1593 if (mr == ATMEL_US_CHRL_8)
1598 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1599 if (mr == ATMEL_US_PAR_EVEN)
1601 else if (mr == ATMEL_US_PAR_ODD)
1605 * The serial core only rounds down when matching this to a
1606 * supported baud rate. Make sure we don't end up slightly
1607 * lower than one of those, as it would make us fall through
1608 * to a much lower baud rate than we really want.
1610 *baud = port->uartclk / (16 * (quot - 1));
1613 static int __init atmel_console_setup(struct console *co, char *options)
1615 struct uart_port *port = &atmel_ports[co->index].uart;
1621 if (port->membase == NULL) {
1622 /* Port not initialized yet - delay setup */
1626 clk_enable(atmel_ports[co->index].clk);
1628 UART_PUT_IDR(port, -1);
1629 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1630 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1633 uart_parse_options(options, &baud, &parity, &bits, &flow);
1635 atmel_console_get_options(port, &baud, &parity, &bits);
1637 return uart_set_options(port, co, baud, parity, bits, flow);
1640 static struct uart_driver atmel_uart;
1642 static struct console atmel_console = {
1643 .name = ATMEL_DEVICENAME,
1644 .write = atmel_console_write,
1645 .device = uart_console_device,
1646 .setup = atmel_console_setup,
1647 .flags = CON_PRINTBUFFER,
1649 .data = &atmel_uart,
1652 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
1655 * Early console initialization (before VM subsystem initialized).
1657 static int __init atmel_console_init(void)
1659 if (atmel_default_console_device) {
1660 struct atmel_uart_data *pdata =
1661 atmel_default_console_device->dev.platform_data;
1662 int id = pdata->num;
1663 struct atmel_uart_port *port = &atmel_ports[id];
1665 port->backup_imr = 0;
1666 port->uart.line = id;
1668 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
1669 atmel_init_port(port, atmel_default_console_device);
1670 register_console(&atmel_console);
1676 console_initcall(atmel_console_init);
1679 * Late console initialization.
1681 static int __init atmel_late_console_init(void)
1683 if (atmel_default_console_device
1684 && !(atmel_console.flags & CON_ENABLED))
1685 register_console(&atmel_console);
1690 core_initcall(atmel_late_console_init);
1692 static inline bool atmel_is_console_port(struct uart_port *port)
1694 return port->cons && port->cons->index == port->line;
1698 #define ATMEL_CONSOLE_DEVICE NULL
1700 static inline bool atmel_is_console_port(struct uart_port *port)
1706 static struct uart_driver atmel_uart = {
1707 .owner = THIS_MODULE,
1708 .driver_name = "atmel_serial",
1709 .dev_name = ATMEL_DEVICENAME,
1710 .major = SERIAL_ATMEL_MAJOR,
1711 .minor = MINOR_START,
1712 .nr = ATMEL_MAX_UART,
1713 .cons = ATMEL_CONSOLE_DEVICE,
1717 static bool atmel_serial_clk_will_stop(void)
1719 #ifdef CONFIG_ARCH_AT91
1720 return at91_suspend_entering_slow_clock();
1726 static int atmel_serial_suspend(struct platform_device *pdev,
1729 struct uart_port *port = platform_get_drvdata(pdev);
1730 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1732 if (atmel_is_console_port(port) && console_suspend_enabled) {
1733 /* Drain the TX shifter */
1734 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1738 /* we can not wake up if we're running on slow clock */
1739 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1740 if (atmel_serial_clk_will_stop())
1741 device_set_wakeup_enable(&pdev->dev, 0);
1743 uart_suspend_port(&atmel_uart, port);
1748 static int atmel_serial_resume(struct platform_device *pdev)
1750 struct uart_port *port = platform_get_drvdata(pdev);
1751 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1753 uart_resume_port(&atmel_uart, port);
1754 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1759 #define atmel_serial_suspend NULL
1760 #define atmel_serial_resume NULL
1763 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1765 struct atmel_uart_port *port;
1766 struct device_node *np = pdev->dev.of_node;
1767 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1771 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1774 ret = of_alias_get_id(np, "serial");
1780 /* port id not found in platform data nor device-tree aliases:
1781 * auto-enumerate it */
1782 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
1784 if (ret >= ATMEL_MAX_UART) {
1789 if (test_and_set_bit(ret, atmel_ports_in_use)) {
1790 /* port already in use */
1795 port = &atmel_ports[ret];
1796 port->backup_imr = 0;
1797 port->uart.line = ret;
1799 atmel_init_port(port, pdev);
1801 if (!atmel_use_dma_rx(&port->uart)) {
1803 data = kmalloc(sizeof(struct atmel_uart_char)
1804 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1806 goto err_alloc_ring;
1807 port->rx_ring.buf = data;
1810 ret = uart_add_one_port(&atmel_uart, &port->uart);
1814 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1815 if (atmel_is_console_port(&port->uart)
1816 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1818 * The serial core enabled the clock for us, so undo
1819 * the clk_enable() in atmel_console_setup()
1821 clk_disable(port->clk);
1825 device_init_wakeup(&pdev->dev, 1);
1826 platform_set_drvdata(pdev, port);
1828 if (port->rs485.flags & SER_RS485_ENABLED) {
1829 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
1830 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
1836 kfree(port->rx_ring.buf);
1837 port->rx_ring.buf = NULL;
1839 if (!atmel_is_console_port(&port->uart)) {
1847 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1849 struct uart_port *port = platform_get_drvdata(pdev);
1850 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1853 device_init_wakeup(&pdev->dev, 0);
1854 platform_set_drvdata(pdev, NULL);
1856 ret = uart_remove_one_port(&atmel_uart, port);
1858 tasklet_kill(&atmel_port->tasklet);
1859 kfree(atmel_port->rx_ring.buf);
1861 /* "port" is allocated statically, so we shouldn't free it */
1863 clear_bit(port->line, atmel_ports_in_use);
1865 clk_put(atmel_port->clk);
1870 static struct platform_driver atmel_serial_driver = {
1871 .probe = atmel_serial_probe,
1872 .remove = __devexit_p(atmel_serial_remove),
1873 .suspend = atmel_serial_suspend,
1874 .resume = atmel_serial_resume,
1876 .name = "atmel_usart",
1877 .owner = THIS_MODULE,
1878 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
1882 static int __init atmel_serial_init(void)
1886 ret = uart_register_driver(&atmel_uart);
1890 ret = platform_driver_register(&atmel_serial_driver);
1892 uart_unregister_driver(&atmel_uart);
1897 static void __exit atmel_serial_exit(void)
1899 platform_driver_unregister(&atmel_serial_driver);
1900 uart_unregister_driver(&atmel_uart);
1903 module_init(atmel_serial_init);
1904 module_exit(atmel_serial_exit);
1906 MODULE_AUTHOR("Rick Bronson");
1907 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1908 MODULE_LICENSE("GPL");
1909 MODULE_ALIAS("platform:atmel_usart");