Merge branch 'staging-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[pandora-kernel.git] / drivers / staging / rts_pstor / ms.c
1 /* Driver for Realtek PCI-Express card reader
2  *
3  * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2, or (at your option) any
8  * later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, see <http://www.gnu.org/licenses/>.
17  *
18  * Author:
19  *   wwang (wei_wang@realsil.com.cn)
20  *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21  */
22
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
27
28 #include "rtsx.h"
29 #include "rtsx_transport.h"
30 #include "rtsx_scsi.h"
31 #include "rtsx_card.h"
32 #include "ms.h"
33
34 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
35 {
36         struct ms_info *ms_card = &(chip->ms_card);
37
38         ms_card->err_code = err_code;
39 }
40
41 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
42 {
43         struct ms_info *ms_card = &(chip->ms_card);
44
45         return (ms_card->err_code == err_code);
46 }
47
48 static int ms_parse_err_code(struct rtsx_chip *chip)
49 {
50         TRACE_RET(chip, STATUS_FAIL);
51 }
52
53 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u8 cnt, u8 cfg)
54 {
55         struct ms_info *ms_card = &(chip->ms_card);
56         int retval;
57         u8 *ptr;
58
59         RTSX_DEBUGP("ms_transfer_tpc: tpc = 0x%x\n", tpc);
60
61         rtsx_init_cmd(chip);
62
63         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
64         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
65         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
66         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
67
68         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
69         rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
70
71         rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
72
73         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
74         if (retval < 0) {
75                 rtsx_clear_ms_error(chip);
76                 ms_set_err_code(chip, MS_TO_ERROR);
77                 TRACE_RET(chip, ms_parse_err_code(chip));
78         }
79
80         ptr = rtsx_get_cmd_data(chip) + 1;
81
82         if (!(tpc & 0x08)) {            /* Read Packet */
83                 if (*ptr & MS_CRC16_ERR) {
84                         ms_set_err_code(chip, MS_CRC16_ERROR);
85                         TRACE_RET(chip, ms_parse_err_code(chip));
86                 }
87         } else {                        /* Write Packet */
88                 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
89                         if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
90                                 ms_set_err_code(chip, MS_CMD_NK);
91                                 TRACE_RET(chip, ms_parse_err_code(chip));
92                         }
93                 }
94         }
95
96         if (*ptr & MS_RDY_TIMEOUT) {
97                 rtsx_clear_ms_error(chip);
98                 ms_set_err_code(chip, MS_TO_ERROR);
99                 TRACE_RET(chip, ms_parse_err_code(chip));
100         }
101
102         return STATUS_SUCCESS;
103 }
104
105 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u16 sec_cnt,
106                 u8 cfg, int mode_2k, int use_sg, void *buf, int buf_len)
107 {
108         int retval;
109         u8 val, err_code = 0;
110         enum dma_data_direction dir;
111
112         if (!buf || !buf_len) {
113                 TRACE_RET(chip, STATUS_FAIL);
114         }
115
116         if (trans_mode == MS_TM_AUTO_READ) {
117                 dir = DMA_FROM_DEVICE;
118                 err_code = MS_FLASH_READ_ERROR;
119         } else if (trans_mode == MS_TM_AUTO_WRITE) {
120                 dir = DMA_TO_DEVICE;
121                 err_code = MS_FLASH_WRITE_ERROR;
122         } else {
123                 TRACE_RET(chip, STATUS_FAIL);
124         }
125
126         rtsx_init_cmd(chip);
127
128         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
129         rtsx_add_cmd(chip, WRITE_REG_CMD,
130                      MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
131         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
132         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
133
134         if (mode_2k) {
135                 rtsx_add_cmd(chip, WRITE_REG_CMD,
136                              MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
137         } else {
138                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
139         }
140
141         trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
142
143         rtsx_add_cmd(chip, WRITE_REG_CMD,
144                      MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
145         rtsx_add_cmd(chip, CHECK_REG_CMD,
146                      MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
147
148         rtsx_send_cmd_no_wait(chip);
149
150         retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
151                                     use_sg, dir, chip->mspro_timeout);
152         if (retval < 0) {
153                 ms_set_err_code(chip, err_code);
154                 if (retval == -ETIMEDOUT) {
155                         retval = STATUS_TIMEDOUT;
156                 } else {
157                         retval = STATUS_FAIL;
158                 }
159                 TRACE_RET(chip, retval);
160         }
161
162         RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
163         if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
164                 TRACE_RET(chip, STATUS_FAIL);
165         }
166
167         return STATUS_SUCCESS;
168 }
169
170 static int ms_write_bytes(struct rtsx_chip *chip,
171                           u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
172 {
173         struct ms_info *ms_card = &(chip->ms_card);
174         int retval, i;
175
176         if (!data || (data_len < cnt)) {
177                 TRACE_RET(chip, STATUS_ERROR);
178         }
179
180         rtsx_init_cmd(chip);
181
182         for (i = 0; i < cnt; i++) {
183                 rtsx_add_cmd(chip, WRITE_REG_CMD,
184                              PPBUF_BASE2 + i, 0xFF, data[i]);
185         }
186         if (cnt % 2) {
187                 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
188         }
189
190         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
191         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
192         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
193         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
194
195         rtsx_add_cmd(chip, WRITE_REG_CMD,
196                      MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
197         rtsx_add_cmd(chip, CHECK_REG_CMD,
198                      MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
199
200         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
201         if (retval < 0) {
202                 u8 val = 0;
203
204                 rtsx_read_register(chip, MS_TRANS_CFG, &val);
205                 RTSX_DEBUGP("MS_TRANS_CFG: 0x%02x\n", val);
206
207                 rtsx_clear_ms_error(chip);
208
209                 if (!(tpc & 0x08)) {
210                         if (val & MS_CRC16_ERR) {
211                                 ms_set_err_code(chip, MS_CRC16_ERROR);
212                                 TRACE_RET(chip, ms_parse_err_code(chip));
213                         }
214                 } else {
215                         if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
216                                 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
217                                         ms_set_err_code(chip, MS_CMD_NK);
218                                         TRACE_RET(chip, ms_parse_err_code(chip));
219                                 }
220                         }
221                 }
222
223                 if (val & MS_RDY_TIMEOUT) {
224                         ms_set_err_code(chip, MS_TO_ERROR);
225                         TRACE_RET(chip, ms_parse_err_code(chip));
226                 }
227
228                 ms_set_err_code(chip, MS_TO_ERROR);
229                 TRACE_RET(chip, ms_parse_err_code(chip));
230         }
231
232         return STATUS_SUCCESS;
233 }
234
235 static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
236 {
237         struct ms_info *ms_card = &(chip->ms_card);
238         int retval, i;
239         u8 *ptr;
240
241         if (!data) {
242                 TRACE_RET(chip, STATUS_ERROR);
243         }
244
245         rtsx_init_cmd(chip);
246
247         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
248         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
249         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
250         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
251
252         rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES);
253         rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
254
255         for (i = 0; i < data_len - 1; i++) {
256                rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
257         }
258         if (data_len % 2) {
259                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
260         } else {
261                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, 0, 0);
262         }
263
264         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
265         if (retval < 0) {
266                 u8 val = 0;
267
268                 rtsx_read_register(chip, MS_TRANS_CFG, &val);
269                 rtsx_clear_ms_error(chip);
270
271                 if (!(tpc & 0x08)) {
272                         if (val & MS_CRC16_ERR) {
273                                 ms_set_err_code(chip, MS_CRC16_ERROR);
274                                 TRACE_RET(chip, ms_parse_err_code(chip));
275                         }
276                 } else {
277                         if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
278                                 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
279                                         ms_set_err_code(chip, MS_CMD_NK);
280                                         TRACE_RET(chip, ms_parse_err_code(chip));
281                                 }
282                         }
283                 }
284
285                 if (val & MS_RDY_TIMEOUT) {
286                         ms_set_err_code(chip, MS_TO_ERROR);
287                         TRACE_RET(chip, ms_parse_err_code(chip));
288                 }
289
290                 ms_set_err_code(chip, MS_TO_ERROR);
291                 TRACE_RET(chip, ms_parse_err_code(chip));
292         }
293
294         ptr = rtsx_get_cmd_data(chip) + 1;
295
296         for (i = 0; i < data_len; i++) {
297                 data[i] = ptr[i];
298         }
299
300         if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
301                 RTSX_DEBUGP("Read format progress:\n");
302                 RTSX_DUMP(ptr, cnt);
303         }
304
305         return STATUS_SUCCESS;
306 }
307
308 static int ms_set_rw_reg_addr(struct rtsx_chip *chip,
309                 u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt)
310 {
311         int retval, i;
312         u8 data[4];
313
314         data[0] = read_start;
315         data[1] = read_cnt;
316         data[2] = write_start;
317         data[3] = write_cnt;
318
319         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
320                 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
321                                         NO_WAIT_INT, data, 4);
322                 if (retval == STATUS_SUCCESS)
323                         return STATUS_SUCCESS;
324                 rtsx_clear_ms_error(chip);
325         }
326
327         TRACE_RET(chip, STATUS_FAIL);
328 }
329
330 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
331 {
332         u8 data[2];
333
334         data[0] = cmd;
335         data[1] = 0;
336
337         return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
338 }
339
340 static int ms_set_init_para(struct rtsx_chip *chip)
341 {
342         struct ms_info *ms_card = &(chip->ms_card);
343         int retval;
344
345         if (CHK_HG8BIT(ms_card)) {
346                 if (chip->asic_code) {
347                         ms_card->ms_clock = chip->asic_ms_hg_clk;
348                 } else {
349                         ms_card->ms_clock = chip->fpga_ms_hg_clk;
350                 }
351         } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
352                 if (chip->asic_code) {
353                         ms_card->ms_clock = chip->asic_ms_4bit_clk;
354                 } else {
355                         ms_card->ms_clock = chip->fpga_ms_4bit_clk;
356                 }
357         } else {
358                 if (chip->asic_code) {
359                         ms_card->ms_clock = chip->asic_ms_1bit_clk;
360                 } else {
361                         ms_card->ms_clock = chip->fpga_ms_1bit_clk;
362                 }
363         }
364
365         retval = switch_clock(chip, ms_card->ms_clock);
366         if (retval != STATUS_SUCCESS) {
367                 TRACE_RET(chip, STATUS_FAIL);
368         }
369
370         retval = select_card(chip, MS_CARD);
371         if (retval != STATUS_SUCCESS) {
372                 TRACE_RET(chip, STATUS_FAIL);
373         }
374
375         return STATUS_SUCCESS;
376 }
377
378 static int ms_switch_clock(struct rtsx_chip *chip)
379 {
380         struct ms_info *ms_card = &(chip->ms_card);
381         int retval;
382
383         retval = select_card(chip, MS_CARD);
384         if (retval != STATUS_SUCCESS) {
385                 TRACE_RET(chip, STATUS_FAIL);
386         }
387
388         retval = switch_clock(chip, ms_card->ms_clock);
389         if (retval != STATUS_SUCCESS) {
390                 TRACE_RET(chip, STATUS_FAIL);
391         }
392
393         return STATUS_SUCCESS;
394 }
395
396 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
397 {
398         if (CHECK_PID(chip, 0x5209)) {
399                 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x55);
400                 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF, 0x55);
401                 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, 0x15);
402         } else if (CHECK_PID(chip, 0x5208)) {
403                 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
404                         MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
405                 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
406                         MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
407                 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
408                         MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
409                 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
410                         XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
411                 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
412                         MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
413                 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF,
414                         MS_D5_PD | MS_D4_PD);
415         } else if (CHECK_PID(chip, 0x5288)) {
416                 if (CHECK_BARO_PKG(chip, QFN)) {
417                         RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
418                         RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
419                         RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
420                         RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
421                 }
422         }
423
424         return STATUS_SUCCESS;
425 }
426
427 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
428 {
429         int retval;
430
431         rtsx_init_cmd(chip);
432
433         if (CHECK_PID(chip, 0x5209)) {
434                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
435                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
436                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x15);
437         } else if (CHECK_PID(chip, 0x5208)) {
438                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
439                         MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
440                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
441                         MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
442                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
443                         MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
444                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
445                         XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
446                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
447                         MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
448                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
449                         MS_D5_PD | MS_D4_PD);
450         } else if (CHECK_PID(chip, 0x5288)) {
451                 if (CHECK_BARO_PKG(chip, QFN)) {
452                         rtsx_add_cmd(chip, WRITE_REG_CMD,
453                                      CARD_PULL_CTL1, 0xFF, 0x55);
454                         rtsx_add_cmd(chip, WRITE_REG_CMD,
455                                      CARD_PULL_CTL2, 0xFF, 0x45);
456                         rtsx_add_cmd(chip, WRITE_REG_CMD,
457                                      CARD_PULL_CTL3, 0xFF, 0x4B);
458                         rtsx_add_cmd(chip, WRITE_REG_CMD,
459                                      CARD_PULL_CTL4, 0xFF, 0x29);
460                 }
461         }
462
463         retval = rtsx_send_cmd(chip, MS_CARD, 100);
464         if (retval < 0) {
465                 TRACE_RET(chip, STATUS_FAIL);
466         }
467
468         return STATUS_SUCCESS;
469 }
470
471 static int ms_prepare_reset(struct rtsx_chip *chip)
472 {
473         struct ms_info *ms_card = &(chip->ms_card);
474         int retval;
475         u8 oc_mask = 0;
476
477         ms_card->ms_type = 0;
478         ms_card->check_ms_flow = 0;
479         ms_card->switch_8bit_fail = 0;
480         ms_card->delay_write.delay_write_flag = 0;
481
482         ms_card->pro_under_formatting = 0;
483
484         retval = ms_power_off_card3v3(chip);
485         if (retval != STATUS_SUCCESS) {
486                 TRACE_RET(chip, STATUS_FAIL);
487         }
488
489         if (!chip->ft2_fast_mode)
490                 wait_timeout(250);
491
492         retval = enable_card_clock(chip, MS_CARD);
493         if (retval != STATUS_SUCCESS) {
494                 TRACE_RET(chip, STATUS_FAIL);
495         }
496
497         if (chip->asic_code) {
498                 retval = ms_pull_ctl_enable(chip);
499                 if (retval != STATUS_SUCCESS) {
500                         TRACE_RET(chip, STATUS_FAIL);
501                 }
502         } else {
503                 RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, 0);
504         }
505
506         if (!chip->ft2_fast_mode) {
507                 retval = card_power_on(chip, MS_CARD);
508                 if (retval != STATUS_SUCCESS) {
509                         TRACE_RET(chip, STATUS_FAIL);
510                 }
511                 wait_timeout(150);
512
513 #ifdef SUPPORT_OCP
514                 if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
515                         oc_mask = MS_OC_NOW | MS_OC_EVER;
516                 } else {
517                         oc_mask = SD_OC_NOW | SD_OC_EVER;
518                 }
519                 if (chip->ocp_stat & oc_mask) {
520                         RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
521                                      chip->ocp_stat);
522                         TRACE_RET(chip, STATUS_FAIL);
523                 }
524 #endif
525         }
526
527         RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN);
528
529         if (chip->asic_code) {
530                 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
531                         SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT |
532                         NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
533         } else {
534                 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
535                         SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT |
536                         NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
537         }
538         RTSX_WRITE_REG(chip, MS_TRANS_CFG, 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG);
539         RTSX_WRITE_REG(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
540
541         retval = ms_set_init_para(chip);
542         if (retval != STATUS_SUCCESS) {
543                 TRACE_RET(chip, STATUS_FAIL);
544         }
545
546         return STATUS_SUCCESS;
547 }
548
549 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
550 {
551         struct ms_info *ms_card = &(chip->ms_card);
552         int retval, i;
553         u8 val;
554
555         retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
556         if (retval != STATUS_SUCCESS) {
557                 TRACE_RET(chip, STATUS_FAIL);
558         }
559
560         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
561                 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, 6, NO_WAIT_INT);
562                 if (retval == STATUS_SUCCESS) {
563                         break;
564                 }
565         }
566         if (i == MS_MAX_RETRY_COUNT) {
567                 TRACE_RET(chip, STATUS_FAIL);
568         }
569
570         RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
571         RTSX_DEBUGP("Type register: 0x%x\n", val);
572         if (val != 0x01) {
573                 if (val != 0x02) {
574                         ms_card->check_ms_flow = 1;
575                 }
576                 TRACE_RET(chip, STATUS_FAIL);
577         }
578
579         RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
580         RTSX_DEBUGP("Category register: 0x%x\n", val);
581         if (val != 0) {
582                 ms_card->check_ms_flow = 1;
583                 TRACE_RET(chip, STATUS_FAIL);
584         }
585
586         RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
587         RTSX_DEBUGP("Class register: 0x%x\n", val);
588         if (val == 0) {
589                 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
590                 if (val & WRT_PRTCT) {
591                         chip->card_wp |= MS_CARD;
592                 } else {
593                         chip->card_wp &= ~MS_CARD;
594                 }
595         } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
596                 chip->card_wp |= MS_CARD;
597         } else {
598                 ms_card->check_ms_flow = 1;
599                 TRACE_RET(chip, STATUS_FAIL);
600         }
601
602         ms_card->ms_type |= TYPE_MSPRO;
603
604         RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
605         RTSX_DEBUGP("IF Mode register: 0x%x\n", val);
606         if (val == 0) {
607                 ms_card->ms_type &= 0x0F;
608         } else if (val == 7) {
609                 if (switch_8bit_bus) {
610                         ms_card->ms_type |= MS_HG;
611                 } else {
612                         ms_card->ms_type &= 0x0F;
613                 }
614         } else {
615                 TRACE_RET(chip, STATUS_FAIL);
616         }
617
618         return STATUS_SUCCESS;
619 }
620
621 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
622 {
623         int retval, i, k;
624         u8 val;
625
626         /* Confirm CPU StartUp */
627         k = 0;
628         do {
629                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
630                         ms_set_err_code(chip, MS_NO_CARD);
631                         TRACE_RET(chip, STATUS_FAIL);
632                 }
633
634                 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
635                         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
636                         if (retval == STATUS_SUCCESS) {
637                                 break;
638                         }
639                 }
640                 if (i == MS_MAX_RETRY_COUNT) {
641                         TRACE_RET(chip, STATUS_FAIL);
642                 }
643
644                 if (k > 100) {
645                         TRACE_RET(chip, STATUS_FAIL);
646                 }
647                 k++;
648                 wait_timeout(100);
649         } while (!(val & INT_REG_CED));
650
651         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
652                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
653                 if (retval == STATUS_SUCCESS)
654                         break;
655         }
656         if (i == MS_MAX_RETRY_COUNT) {
657                 TRACE_RET(chip, STATUS_FAIL);
658         }
659
660         if (val & INT_REG_ERR) {
661                 if (val & INT_REG_CMDNK) {
662                         chip->card_wp |= (MS_CARD);
663                 } else {
664                         TRACE_RET(chip, STATUS_FAIL);
665                 }
666         }
667         /* --  end confirm CPU startup */
668
669         return STATUS_SUCCESS;
670 }
671
672 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
673 {
674         int retval, i;
675         u8 data[2];
676
677         data[0] = PARALLEL_4BIT_IF;
678         data[1] = 0;
679         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
680                 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2);
681                 if (retval == STATUS_SUCCESS)
682                         break;
683         }
684         if (retval != STATUS_SUCCESS) {
685                 TRACE_RET(chip, STATUS_FAIL);
686         }
687
688         return STATUS_SUCCESS;
689 }
690
691 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
692 {
693         struct ms_info *ms_card = &(chip->ms_card);
694         int retval, i;
695         u8 data[2];
696
697         data[0] = PARALLEL_8BIT_IF;
698         data[1] = 0;
699         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
700                 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2);
701                 if (retval == STATUS_SUCCESS) {
702                         break;
703                 }
704         }
705         if (retval != STATUS_SUCCESS) {
706                 TRACE_RET(chip, STATUS_FAIL);
707         }
708
709         RTSX_WRITE_REG(chip, MS_CFG, 0x98, MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
710         ms_card->ms_type |= MS_8BIT;
711         retval = ms_set_init_para(chip);
712         if (retval != STATUS_SUCCESS) {
713                 TRACE_RET(chip, STATUS_FAIL);
714         }
715
716         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
717                 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT);
718                 if (retval != STATUS_SUCCESS) {
719                         TRACE_RET(chip, STATUS_FAIL);
720                 }
721         }
722
723         return STATUS_SUCCESS;
724 }
725
726 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
727 {
728         struct ms_info *ms_card = &(chip->ms_card);
729         int retval, i;
730
731         for (i = 0; i < 3; i++) {
732                 retval = ms_prepare_reset(chip);
733                 if (retval != STATUS_SUCCESS) {
734                         TRACE_RET(chip, STATUS_FAIL);
735                 }
736
737                 retval = ms_identify_media_type(chip, switch_8bit_bus);
738                 if (retval != STATUS_SUCCESS) {
739                         TRACE_RET(chip, STATUS_FAIL);
740                 }
741
742                 retval = ms_confirm_cpu_startup(chip);
743                 if (retval != STATUS_SUCCESS) {
744                         TRACE_RET(chip, STATUS_FAIL);
745                 }
746
747                 retval = ms_switch_parallel_bus(chip);
748                 if (retval != STATUS_SUCCESS) {
749                         if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
750                                 ms_set_err_code(chip, MS_NO_CARD);
751                                 TRACE_RET(chip, STATUS_FAIL);
752                         }
753                         continue;
754                 } else {
755                         break;
756                 }
757         }
758
759         if (retval != STATUS_SUCCESS) {
760                 TRACE_RET(chip, STATUS_FAIL);
761         }
762
763         /* Switch MS-PRO into Parallel mode */
764         RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
765         RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD);
766
767         retval = ms_set_init_para(chip);
768         if (retval != STATUS_SUCCESS) {
769                 TRACE_RET(chip, STATUS_FAIL);
770         }
771
772         /* If MSPro HG Card, We shall try to switch to 8-bit bus */
773         if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
774                 retval = ms_switch_8bit_bus(chip);
775                 if (retval != STATUS_SUCCESS) {
776                         ms_card->switch_8bit_fail = 1;
777                         TRACE_RET(chip, STATUS_FAIL);
778                 }
779         }
780
781         return STATUS_SUCCESS;
782 }
783
784 #ifdef XC_POWERCLASS
785 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
786 {
787         int retval;
788         u8 buf[6];
789
790         ms_cleanup_work(chip);
791
792         retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
793         if (retval != STATUS_SUCCESS) {
794                 TRACE_RET(chip, STATUS_FAIL);
795         }
796
797         buf[0] = 0;
798         buf[1] = mode;
799         buf[2] = 0;
800         buf[3] = 0;
801         buf[4] = 0;
802         buf[5] = 0;
803
804         retval = ms_write_bytes(chip, PRO_WRITE_REG , 6, NO_WAIT_INT, buf, 6);
805         if (retval != STATUS_SUCCESS) {
806                 TRACE_RET(chip, STATUS_FAIL);
807         }
808
809         retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
810         if (retval != STATUS_SUCCESS) {
811                 TRACE_RET(chip, STATUS_FAIL);
812         }
813
814         RTSX_READ_REG(chip, MS_TRANS_CFG, buf);
815         if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
816                 TRACE_RET(chip, STATUS_FAIL);
817         }
818
819         return STATUS_SUCCESS;
820 }
821 #endif
822
823 static int ms_read_attribute_info(struct rtsx_chip *chip)
824 {
825         struct ms_info *ms_card = &(chip->ms_card);
826         int retval, i;
827         u8 val, *buf, class_code, device_type, sub_class, data[16];
828         u16 total_blk = 0, blk_size = 0;
829 #ifdef SUPPORT_MSXC
830         u32 xc_total_blk = 0, xc_blk_size = 0;
831 #endif
832         u32 sys_info_addr = 0, sys_info_size;
833 #ifdef SUPPORT_PCGL_1P18
834         u32 model_name_addr = 0, model_name_size;
835         int found_sys_info = 0, found_model_name = 0;
836 #endif
837
838         retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
839         if (retval != STATUS_SUCCESS) {
840                 TRACE_RET(chip, STATUS_FAIL);
841         }
842
843         if (CHK_MS8BIT(ms_card)) {
844                 data[0] = PARALLEL_8BIT_IF;
845         } else {
846                 data[0] = PARALLEL_4BIT_IF;
847         }
848         data[1] = 0;
849
850         data[2] = 0x40;
851         data[3] = 0;
852         data[4] = 0;
853         data[5] = 0;
854         data[6] = 0;
855         data[7] = 0;
856
857         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
858                 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT, data, 8);
859                 if (retval == STATUS_SUCCESS) {
860                         break;
861                 }
862         }
863         if (retval != STATUS_SUCCESS) {
864                 TRACE_RET(chip, STATUS_FAIL);
865         }
866
867         buf = kmalloc(64 * 512, GFP_KERNEL);
868         if (buf == NULL) {
869                 TRACE_RET(chip, STATUS_ERROR);
870         }
871
872         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
873                 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
874                 if (retval != STATUS_SUCCESS) {
875                         continue;
876                 }
877                 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
878                 if (retval != STATUS_SUCCESS) {
879                         kfree(buf);
880                         TRACE_RET(chip, STATUS_FAIL);
881                 }
882                 if (!(val & MS_INT_BREQ)) {
883                         kfree(buf);
884                         TRACE_RET(chip, STATUS_FAIL);
885                 }
886                 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
887                                 0x40, WAIT_INT, 0, 0, buf, 64 * 512);
888                 if (retval == STATUS_SUCCESS) {
889                         break;
890                 } else {
891                         rtsx_clear_ms_error(chip);
892                 }
893         }
894         if (retval != STATUS_SUCCESS) {
895                 kfree(buf);
896                 TRACE_RET(chip, STATUS_FAIL);
897         }
898
899         i = 0;
900         do {
901                 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
902                 if (retval != STATUS_SUCCESS) {
903                         kfree(buf);
904                         TRACE_RET(chip, STATUS_FAIL);
905                 }
906
907                 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
908                         break;
909
910                 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, PRO_READ_LONG_DATA, 0, WAIT_INT);
911                 if (retval != STATUS_SUCCESS) {
912                         kfree(buf);
913                         TRACE_RET(chip, STATUS_FAIL);
914                 }
915
916                 i++;
917         } while (i < 1024);
918
919         if (retval != STATUS_SUCCESS) {
920                 kfree(buf);
921                 TRACE_RET(chip, STATUS_FAIL);
922         }
923
924         if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
925                 /* Signature code is wrong */
926                 kfree(buf);
927                 TRACE_RET(chip, STATUS_FAIL);
928         }
929
930         if ((buf[4] < 1) || (buf[4] > 12)) {
931                 kfree(buf);
932                 TRACE_RET(chip, STATUS_FAIL);
933         }
934
935         for (i = 0; i < buf[4]; i++) {
936                 int cur_addr_off = 16 + i * 12;
937
938 #ifdef SUPPORT_MSXC
939                 if ((buf[cur_addr_off + 8] == 0x10) || (buf[cur_addr_off + 8] == 0x13))
940 #else
941                 if (buf[cur_addr_off + 8] == 0x10)
942 #endif
943                 {
944                         sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
945                                 ((u32)buf[cur_addr_off + 1] << 16) |
946                                 ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3];
947                         sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
948                                 ((u32)buf[cur_addr_off + 5] << 16) |
949                                 ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7];
950                         RTSX_DEBUGP("sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
951                                         sys_info_addr, sys_info_size);
952                         if (sys_info_size != 96)  {
953                                 kfree(buf);
954                                 TRACE_RET(chip, STATUS_FAIL);
955                         }
956                         if (sys_info_addr < 0x1A0) {
957                                 kfree(buf);
958                                 TRACE_RET(chip, STATUS_FAIL);
959                         }
960                         if ((sys_info_size + sys_info_addr) > 0x8000) {
961                                 kfree(buf);
962                                 TRACE_RET(chip, STATUS_FAIL);
963                         }
964
965 #ifdef SUPPORT_MSXC
966                         if (buf[cur_addr_off + 8] == 0x13) {
967                                 ms_card->ms_type |= MS_XC;
968                         }
969 #endif
970 #ifdef SUPPORT_PCGL_1P18
971                         found_sys_info = 1;
972 #else
973                         break;
974 #endif
975                 }
976 #ifdef SUPPORT_PCGL_1P18
977                 if (buf[cur_addr_off + 8] == 0x15) {
978                         model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
979                                 ((u32)buf[cur_addr_off + 1] << 16) |
980                                 ((u32)buf[cur_addr_off + 2] << 8) | buf[cur_addr_off + 3];
981                         model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
982                                 ((u32)buf[cur_addr_off + 5] << 16) |
983                                 ((u32)buf[cur_addr_off + 6] << 8) | buf[cur_addr_off + 7];
984                         RTSX_DEBUGP("model_name_addr = 0x%x, model_name_size = 0x%x\n",
985                                         model_name_addr, model_name_size);
986                         if (model_name_size != 48)  {
987                                 kfree(buf);
988                                 TRACE_RET(chip, STATUS_FAIL);
989                         }
990                         if (model_name_addr < 0x1A0) {
991                                 kfree(buf);
992                                 TRACE_RET(chip, STATUS_FAIL);
993                         }
994                         if ((model_name_size + model_name_addr) > 0x8000) {
995                                 kfree(buf);
996                                 TRACE_RET(chip, STATUS_FAIL);
997                         }
998
999                         found_model_name = 1;
1000                 }
1001
1002                 if (found_sys_info && found_model_name)
1003                         break;
1004 #endif
1005         }
1006
1007         if (i == buf[4]) {
1008                 kfree(buf);
1009                 TRACE_RET(chip, STATUS_FAIL);
1010         }
1011
1012         class_code =  buf[sys_info_addr + 0];
1013         device_type = buf[sys_info_addr + 56];
1014         sub_class = buf[sys_info_addr + 46];
1015 #ifdef SUPPORT_MSXC
1016         if (CHK_MSXC(ms_card)) {
1017                 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1018                                 ((u32)buf[sys_info_addr + 7] << 16) |
1019                                 ((u32)buf[sys_info_addr + 8] << 8) |
1020                                 buf[sys_info_addr + 9];
1021                 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1022                                 ((u32)buf[sys_info_addr + 33] << 16) |
1023                                 ((u32)buf[sys_info_addr + 34] << 8) |
1024                                 buf[sys_info_addr + 35];
1025                 RTSX_DEBUGP("xc_total_blk = 0x%x, xc_blk_size = 0x%x\n", xc_total_blk, xc_blk_size);
1026         } else {
1027                 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1028                 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1029                 RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
1030         }
1031 #else
1032         total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1033         blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1034         RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
1035 #endif
1036
1037         RTSX_DEBUGP("class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1038                         class_code, device_type, sub_class);
1039
1040         memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1041 #ifdef SUPPORT_PCGL_1P18
1042         memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1043 #endif
1044
1045         kfree(buf);
1046
1047 #ifdef SUPPORT_MSXC
1048         if (CHK_MSXC(ms_card)) {
1049                 if (class_code != 0x03) {
1050                         TRACE_RET(chip, STATUS_FAIL);
1051                 }
1052         } else {
1053                 if (class_code != 0x02) {
1054                         TRACE_RET(chip, STATUS_FAIL);
1055                 }
1056         }
1057 #else
1058         if (class_code != 0x02) {
1059                 TRACE_RET(chip, STATUS_FAIL);
1060         }
1061 #endif
1062
1063         if (device_type != 0x00) {
1064                 if ((device_type == 0x01) || (device_type == 0x02) ||
1065                                 (device_type == 0x03)) {
1066                         chip->card_wp |= MS_CARD;
1067                 } else {
1068                         TRACE_RET(chip, STATUS_FAIL);
1069                 }
1070         }
1071
1072         if (sub_class & 0xC0) {
1073                 TRACE_RET(chip, STATUS_FAIL);
1074         }
1075
1076         RTSX_DEBUGP("class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1077                 class_code, device_type, sub_class);
1078
1079 #ifdef SUPPORT_MSXC
1080         if (CHK_MSXC(ms_card)) {
1081                 chip->capacity[chip->card2lun[MS_CARD]] =
1082                         ms_card->capacity = xc_total_blk * xc_blk_size;
1083         } else {
1084                 chip->capacity[chip->card2lun[MS_CARD]] =
1085                         ms_card->capacity = total_blk * blk_size;
1086         }
1087 #else
1088         chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity = total_blk * blk_size;
1089 #endif
1090
1091         return STATUS_SUCCESS;
1092 }
1093
1094 #ifdef SUPPORT_MAGIC_GATE
1095 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num);
1096 #endif
1097
1098 static int reset_ms_pro(struct rtsx_chip *chip)
1099 {
1100         struct ms_info *ms_card = &(chip->ms_card);
1101         int retval;
1102 #ifdef XC_POWERCLASS
1103         u8 change_power_class;
1104
1105         if (chip->ms_power_class_en & 0x02)
1106                 change_power_class = 2;
1107         else if (chip->ms_power_class_en & 0x01)
1108                 change_power_class = 1;
1109         else
1110                 change_power_class = 0;
1111 #endif
1112
1113 #ifdef XC_POWERCLASS
1114 Retry:
1115 #endif
1116         retval = ms_pro_reset_flow(chip, 1);
1117         if (retval != STATUS_SUCCESS) {
1118                 if (ms_card->switch_8bit_fail) {
1119                         retval = ms_pro_reset_flow(chip, 0);
1120                         if (retval != STATUS_SUCCESS) {
1121                                 TRACE_RET(chip, STATUS_FAIL);
1122                         }
1123                 } else {
1124                         TRACE_RET(chip, STATUS_FAIL);
1125                 }
1126         }
1127
1128         retval = ms_read_attribute_info(chip);
1129         if (retval != STATUS_SUCCESS) {
1130                 TRACE_RET(chip, STATUS_FAIL);
1131         }
1132
1133 #ifdef XC_POWERCLASS
1134         if (CHK_HG8BIT(ms_card)) {
1135                 change_power_class = 0;
1136         }
1137
1138         if (change_power_class && CHK_MSXC(ms_card)) {
1139                 u8 power_class_en = chip->ms_power_class_en;
1140
1141                 RTSX_DEBUGP("power_class_en = 0x%x\n", power_class_en);
1142                 RTSX_DEBUGP("change_power_class = %d\n", change_power_class);
1143
1144                 if (change_power_class) {
1145                         power_class_en &= (1 << (change_power_class - 1));
1146                 } else {
1147                         power_class_en = 0;
1148                 }
1149
1150                 if (power_class_en) {
1151                         u8 power_class_mode = (ms_card->raw_sys_info[46] & 0x18) >> 3;
1152                         RTSX_DEBUGP("power_class_mode = 0x%x", power_class_mode);
1153                         if (change_power_class > power_class_mode)
1154                                 change_power_class = power_class_mode;
1155                         if (change_power_class) {
1156                                 retval = msxc_change_power(chip, change_power_class);
1157                                 if (retval != STATUS_SUCCESS) {
1158                                         change_power_class--;
1159                                         goto Retry;
1160                                 }
1161                         }
1162                 }
1163         }
1164 #endif
1165
1166 #ifdef SUPPORT_MAGIC_GATE
1167         retval = mg_set_tpc_para_sub(chip, 0, 0);
1168         if (retval != STATUS_SUCCESS) {
1169                 TRACE_RET(chip, STATUS_FAIL);
1170         }
1171 #endif
1172
1173         if (CHK_HG8BIT(ms_card)) {
1174                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1175         } else {
1176                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1177         }
1178
1179         return STATUS_SUCCESS;
1180 }
1181
1182 static int ms_read_status_reg(struct rtsx_chip *chip)
1183 {
1184         int retval;
1185         u8 val[2];
1186
1187         retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1188         if (retval != STATUS_SUCCESS) {
1189                 TRACE_RET(chip, STATUS_FAIL);
1190         }
1191
1192         retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1193         if (retval != STATUS_SUCCESS) {
1194                 TRACE_RET(chip, STATUS_FAIL);
1195         }
1196
1197         if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1198                 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1199                 TRACE_RET(chip, STATUS_FAIL);
1200         }
1201
1202         return STATUS_SUCCESS;
1203 }
1204
1205
1206 static int ms_read_extra_data(struct rtsx_chip *chip,
1207                 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1208 {
1209         struct ms_info *ms_card = &(chip->ms_card);
1210         int retval, i;
1211         u8 val, data[10];
1212
1213         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1214         if (retval != STATUS_SUCCESS) {
1215                 TRACE_RET(chip, STATUS_FAIL);
1216         }
1217
1218         if (CHK_MS4BIT(ms_card)) {
1219                 /* Parallel interface */
1220                 data[0] = 0x88;
1221         } else {
1222                 /* Serial interface */
1223                 data[0] = 0x80;
1224         }
1225         data[1] = 0;
1226         data[2] = (u8)(block_addr >> 8);
1227         data[3] = (u8)block_addr;
1228         data[4] = 0x40;
1229         data[5] = page_num;
1230
1231         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1232                 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1233                 if (retval == STATUS_SUCCESS)
1234                         break;
1235         }
1236         if (i == MS_MAX_RETRY_COUNT) {
1237                 TRACE_RET(chip, STATUS_FAIL);
1238         }
1239
1240         ms_set_err_code(chip, MS_NO_ERROR);
1241
1242         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1243                 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1244                 if (retval == STATUS_SUCCESS)
1245                         break;
1246         }
1247         if (i == MS_MAX_RETRY_COUNT) {
1248                 TRACE_RET(chip, STATUS_FAIL);
1249         }
1250
1251         ms_set_err_code(chip, MS_NO_ERROR);
1252         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1253         if (retval != STATUS_SUCCESS) {
1254                 TRACE_RET(chip, STATUS_FAIL);
1255         }
1256         if (val & INT_REG_CMDNK) {
1257                 ms_set_err_code(chip, MS_CMD_NK);
1258                 TRACE_RET(chip, STATUS_FAIL);
1259         }
1260         if (val & INT_REG_CED) {
1261                 if (val & INT_REG_ERR) {
1262                         retval = ms_read_status_reg(chip);
1263                         if (retval != STATUS_SUCCESS) {
1264                                 TRACE_RET(chip, STATUS_FAIL);
1265                         }
1266                         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1267                         if (retval != STATUS_SUCCESS) {
1268                                 TRACE_RET(chip, STATUS_FAIL);
1269                         }
1270                 }
1271         }
1272
1273         retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, data, MS_EXTRA_SIZE);
1274         if (retval != STATUS_SUCCESS) {
1275                 TRACE_RET(chip, STATUS_FAIL);
1276         }
1277
1278         if (buf && buf_len) {
1279                 if (buf_len > MS_EXTRA_SIZE)
1280                         buf_len = MS_EXTRA_SIZE;
1281                 memcpy(buf, data, buf_len);
1282         }
1283
1284         return STATUS_SUCCESS;
1285 }
1286
1287 static int ms_write_extra_data(struct rtsx_chip *chip,
1288                 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1289 {
1290         struct ms_info *ms_card = &(chip->ms_card);
1291         int retval, i;
1292         u8 val, data[16];
1293
1294         if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1295                 TRACE_RET(chip, STATUS_FAIL);
1296         }
1297
1298         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6 + MS_EXTRA_SIZE);
1299         if (retval != STATUS_SUCCESS) {
1300                 TRACE_RET(chip, STATUS_FAIL);
1301         }
1302
1303         if (CHK_MS4BIT(ms_card)) {
1304                 data[0] = 0x88;
1305         } else {
1306                 data[0] = 0x80;
1307         }
1308         data[1] = 0;
1309         data[2] = (u8)(block_addr >> 8);
1310         data[3] = (u8)block_addr;
1311         data[4] = 0x40;
1312         data[5] = page_num;
1313
1314         for (i = 6; i < MS_EXTRA_SIZE + 6; i++) {
1315                 data[i] = buf[i - 6];
1316         }
1317
1318         retval = ms_write_bytes(chip, WRITE_REG , (6+MS_EXTRA_SIZE), NO_WAIT_INT, data, 16);
1319         if (retval != STATUS_SUCCESS) {
1320                 TRACE_RET(chip, STATUS_FAIL);
1321         }
1322
1323         retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1324         if (retval != STATUS_SUCCESS) {
1325                 TRACE_RET(chip, STATUS_FAIL);
1326         }
1327
1328         ms_set_err_code(chip, MS_NO_ERROR);
1329         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1330         if (retval != STATUS_SUCCESS) {
1331                 TRACE_RET(chip, STATUS_FAIL);
1332         }
1333         if (val & INT_REG_CMDNK) {
1334                 ms_set_err_code(chip, MS_CMD_NK);
1335                 TRACE_RET(chip, STATUS_FAIL);
1336         }
1337         if (val & INT_REG_CED) {
1338                 if (val & INT_REG_ERR) {
1339                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1340                         TRACE_RET(chip, STATUS_FAIL);
1341                 }
1342         }
1343
1344         return STATUS_SUCCESS;
1345 }
1346
1347
1348 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1349 {
1350         struct ms_info *ms_card = &(chip->ms_card);
1351         int retval;
1352         u8 val, data[6];
1353
1354         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1355         if (retval != STATUS_SUCCESS) {
1356                 TRACE_RET(chip, STATUS_FAIL);
1357         }
1358
1359         if (CHK_MS4BIT(ms_card)) {
1360                 data[0] = 0x88;
1361         } else {
1362                 data[0] = 0x80;
1363         }
1364         data[1] = 0;
1365         data[2] = (u8)(block_addr >> 8);
1366         data[3] = (u8)block_addr;
1367         data[4] = 0x20;
1368         data[5] = page_num;
1369
1370         retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1371         if (retval != STATUS_SUCCESS) {
1372                 TRACE_RET(chip, STATUS_FAIL);
1373         }
1374
1375         retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1376         if (retval != STATUS_SUCCESS) {
1377                 TRACE_RET(chip, STATUS_FAIL);
1378         }
1379
1380         ms_set_err_code(chip, MS_NO_ERROR);
1381         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1382         if (retval != STATUS_SUCCESS) {
1383                 TRACE_RET(chip, STATUS_FAIL);
1384         }
1385         if (val & INT_REG_CMDNK) {
1386                 ms_set_err_code(chip, MS_CMD_NK);
1387                 TRACE_RET(chip, STATUS_FAIL);
1388         }
1389
1390         if (val & INT_REG_CED) {
1391                 if (val & INT_REG_ERR) {
1392                         if (!(val & INT_REG_BREQ)) {
1393                                 ms_set_err_code(chip,  MS_FLASH_READ_ERROR);
1394                                 TRACE_RET(chip, STATUS_FAIL);
1395                         }
1396                         retval = ms_read_status_reg(chip);
1397                         if (retval != STATUS_SUCCESS) {
1398                                 ms_set_err_code(chip,  MS_FLASH_WRITE_ERROR);
1399                         }
1400                 } else {
1401                         if (!(val & INT_REG_BREQ)) {
1402                                 ms_set_err_code(chip, MS_BREQ_ERROR);
1403                                 TRACE_RET(chip, STATUS_FAIL);
1404                         }
1405                 }
1406         }
1407
1408         retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT);
1409         if (retval != STATUS_SUCCESS) {
1410                 TRACE_RET(chip, STATUS_FAIL);
1411         }
1412
1413         if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1414                 TRACE_RET(chip, STATUS_FAIL);
1415         }
1416
1417         return STATUS_SUCCESS;
1418 }
1419
1420
1421 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1422 {
1423         struct ms_info *ms_card = &(chip->ms_card);
1424         int retval;
1425         u8 val, data[8], extra[MS_EXTRA_SIZE];
1426
1427         retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1428         if (retval != STATUS_SUCCESS) {
1429                 TRACE_RET(chip, STATUS_FAIL);
1430         }
1431
1432         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
1433         if (retval != STATUS_SUCCESS) {
1434                 TRACE_RET(chip, STATUS_FAIL);
1435         }
1436
1437         ms_set_err_code(chip, MS_NO_ERROR);
1438
1439         if (CHK_MS4BIT(ms_card)) {
1440                 data[0] = 0x88;
1441         } else {
1442                 data[0] = 0x80;
1443         }
1444         data[1] = 0;
1445         data[2] = (u8)(phy_blk >> 8);
1446         data[3] = (u8)phy_blk;
1447         data[4] = 0x80;
1448         data[5] = 0;
1449         data[6] = extra[0] & 0x7F;
1450         data[7] = 0xFF;
1451
1452         retval = ms_write_bytes(chip, WRITE_REG , 7, NO_WAIT_INT, data, 7);
1453         if (retval != STATUS_SUCCESS) {
1454                 TRACE_RET(chip, STATUS_FAIL);
1455         }
1456
1457         retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1458         if (retval != STATUS_SUCCESS) {
1459                 TRACE_RET(chip, STATUS_FAIL);
1460         }
1461
1462         ms_set_err_code(chip, MS_NO_ERROR);
1463         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1464         if (retval != STATUS_SUCCESS) {
1465                 TRACE_RET(chip, STATUS_FAIL);
1466         }
1467
1468         if (val & INT_REG_CMDNK) {
1469                 ms_set_err_code(chip, MS_CMD_NK);
1470                 TRACE_RET(chip, STATUS_FAIL);
1471         }
1472
1473         if (val & INT_REG_CED) {
1474                 if (val & INT_REG_ERR) {
1475                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1476                         TRACE_RET(chip, STATUS_FAIL);
1477                 }
1478         }
1479
1480         return STATUS_SUCCESS;
1481 }
1482
1483
1484 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1485 {
1486         struct ms_info *ms_card = &(chip->ms_card);
1487         int retval, i = 0;
1488         u8 val, data[6];
1489
1490         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1491         if (retval != STATUS_SUCCESS) {
1492                 TRACE_RET(chip, STATUS_FAIL);
1493         }
1494
1495         ms_set_err_code(chip, MS_NO_ERROR);
1496
1497         if (CHK_MS4BIT(ms_card)) {
1498                 data[0] = 0x88;
1499         } else {
1500                 data[0] = 0x80;
1501         }
1502         data[1] = 0;
1503         data[2] = (u8)(phy_blk >> 8);
1504         data[3] = (u8)phy_blk;
1505         data[4] = 0;
1506         data[5] = 0;
1507
1508         retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1509         if (retval != STATUS_SUCCESS) {
1510                 TRACE_RET(chip, STATUS_FAIL);
1511         }
1512
1513 ERASE_RTY:
1514         retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1515         if (retval != STATUS_SUCCESS) {
1516                 TRACE_RET(chip, STATUS_FAIL);
1517         }
1518
1519         ms_set_err_code(chip, MS_NO_ERROR);
1520         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1521         if (retval != STATUS_SUCCESS) {
1522                 TRACE_RET(chip, STATUS_FAIL);
1523         }
1524
1525         if (val & INT_REG_CMDNK) {
1526                 if (i < 3) {
1527                         i++;
1528                         goto ERASE_RTY;
1529                 }
1530
1531                 ms_set_err_code(chip, MS_CMD_NK);
1532                 ms_set_bad_block(chip, phy_blk);
1533                 TRACE_RET(chip, STATUS_FAIL);
1534         }
1535
1536         if (val & INT_REG_CED) {
1537                 if (val & INT_REG_ERR) {
1538                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1539                         TRACE_RET(chip, STATUS_FAIL);
1540                 }
1541         }
1542
1543         return STATUS_SUCCESS;
1544 }
1545
1546
1547 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1548 {
1549         if (!extra || (extra_len < MS_EXTRA_SIZE)) {
1550                 return;
1551         }
1552
1553         memset(extra, 0xFF, MS_EXTRA_SIZE);
1554
1555         if (type == setPS_NG) {
1556                 /* set page status as 1:NG,and block status keep 1:OK */
1557                 extra[0] = 0xB8;
1558         } else {
1559                 /* set page status as 0:Data Error,and block status keep 1:OK */
1560                 extra[0] = 0x98;
1561         }
1562
1563         extra[2] = (u8)(log_blk >> 8);
1564         extra[3] = (u8)log_blk;
1565 }
1566
1567 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, u8 start_page, u8 end_page)
1568 {
1569         int retval;
1570         u8 extra[MS_EXTRA_SIZE], i;
1571
1572         memset(extra, 0xff, MS_EXTRA_SIZE);
1573
1574         extra[0] = 0xf8;        /* Block, page OK, data erased */
1575         extra[1] = 0xff;
1576         extra[2] = (u8)(log_blk >> 8);
1577         extra[3] = (u8)log_blk;
1578
1579         for (i = start_page; i < end_page; i++) {
1580                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1581                         ms_set_err_code(chip, MS_NO_CARD);
1582                         TRACE_RET(chip, STATUS_FAIL);
1583                 }
1584
1585                 retval = ms_write_extra_data(chip, phy_blk, i, extra, MS_EXTRA_SIZE);
1586                 if (retval != STATUS_SUCCESS) {
1587                         TRACE_RET(chip, STATUS_FAIL);
1588                 }
1589         }
1590
1591         return STATUS_SUCCESS;
1592 }
1593
1594 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1595                 u16 log_blk, u8 start_page, u8 end_page)
1596 {
1597         struct ms_info *ms_card = &(chip->ms_card);
1598         int retval, rty_cnt, uncorrect_flag = 0;
1599         u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1600
1601         RTSX_DEBUGP("Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1602                 old_blk, new_blk, log_blk);
1603         RTSX_DEBUGP("start_page = %d, end_page = %d\n", start_page, end_page);
1604
1605         retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1606         if (retval != STATUS_SUCCESS) {
1607                 TRACE_RET(chip, STATUS_FAIL);
1608         }
1609
1610         retval = ms_read_status_reg(chip);
1611         if (retval != STATUS_SUCCESS) {
1612                 TRACE_RET(chip, STATUS_FAIL);
1613         }
1614
1615         RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1616
1617         if (val & BUF_FULL) {
1618                 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1619                 if (retval != STATUS_SUCCESS) {
1620                         TRACE_RET(chip, STATUS_FAIL);
1621                 }
1622
1623                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1624                 if (retval != STATUS_SUCCESS) {
1625                         TRACE_RET(chip, STATUS_FAIL);
1626                 }
1627
1628                 if (!(val & INT_REG_CED)) {
1629                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1630                         TRACE_RET(chip, STATUS_FAIL);
1631                 }
1632         }
1633
1634         for (i = start_page; i < end_page; i++) {
1635                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1636                         ms_set_err_code(chip, MS_NO_CARD);
1637                         TRACE_RET(chip, STATUS_FAIL);
1638                 }
1639
1640                 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1641
1642                 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
1643                 if (retval != STATUS_SUCCESS) {
1644                         TRACE_RET(chip, STATUS_FAIL);
1645                 }
1646
1647                 ms_set_err_code(chip, MS_NO_ERROR);
1648
1649                 if (CHK_MS4BIT(ms_card)) {
1650                         data[0] = 0x88;
1651                 } else {
1652                         data[0] = 0x80;
1653                 }
1654                 data[1] = 0;
1655                 data[2] = (u8)(old_blk >> 8);
1656                 data[3] = (u8)old_blk;
1657                 data[4] = 0x20;
1658                 data[5] = i;
1659
1660                 retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1661                 if (retval != STATUS_SUCCESS) {
1662                         TRACE_RET(chip, STATUS_FAIL);
1663                 }
1664
1665                 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1666                 if (retval != STATUS_SUCCESS) {
1667                         TRACE_RET(chip, STATUS_FAIL);
1668                 }
1669
1670                 ms_set_err_code(chip, MS_NO_ERROR);
1671                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1672                 if (retval != STATUS_SUCCESS) {
1673                         TRACE_RET(chip, STATUS_FAIL);
1674                 }
1675
1676                 if (val & INT_REG_CMDNK) {
1677                         ms_set_err_code(chip, MS_CMD_NK);
1678                         TRACE_RET(chip, STATUS_FAIL);
1679                 }
1680
1681                 if (val & INT_REG_CED) {
1682                         if (val & INT_REG_ERR) {
1683                                 retval = ms_read_status_reg(chip);
1684                                 if (retval != STATUS_SUCCESS) {
1685                                         uncorrect_flag = 1;
1686                                         RTSX_DEBUGP("Uncorrectable error\n");
1687                                 } else {
1688                                         uncorrect_flag = 0;
1689                                 }
1690
1691                                 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT);
1692                                 if (retval != STATUS_SUCCESS) {
1693                                         TRACE_RET(chip, STATUS_FAIL);
1694                                 }
1695
1696                                 if (uncorrect_flag) {
1697                                         ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
1698                                         if (i == 0) {
1699                                                 extra[0] &= 0xEF;
1700                                         }
1701                                         ms_write_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1702                                         RTSX_DEBUGP("page %d : extra[0] = 0x%x\n", i, extra[0]);
1703                                         MS_SET_BAD_BLOCK_FLG(ms_card);
1704
1705                                         ms_set_page_status(log_blk, setPS_Error, extra, MS_EXTRA_SIZE);
1706                                         ms_write_extra_data(chip, new_blk, i, extra, MS_EXTRA_SIZE);
1707                                         continue;
1708                                 }
1709
1710                                 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT; rty_cnt++) {
1711                                         retval = ms_transfer_tpc(chip, MS_TM_NORMAL_WRITE,
1712                                                         WRITE_PAGE_DATA, 0, NO_WAIT_INT);
1713                                         if (retval == STATUS_SUCCESS) {
1714                                                 break;
1715                                         }
1716                                 }
1717                                 if (rty_cnt == MS_MAX_RETRY_COUNT) {
1718                                         TRACE_RET(chip, STATUS_FAIL);
1719                                 }
1720                         }
1721
1722                         if (!(val & INT_REG_BREQ)) {
1723                                 ms_set_err_code(chip, MS_BREQ_ERROR);
1724                                 TRACE_RET(chip, STATUS_FAIL);
1725                         }
1726                 }
1727
1728                 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1729                                 MS_EXTRA_SIZE, SystemParm, (6+MS_EXTRA_SIZE));
1730
1731                 ms_set_err_code(chip, MS_NO_ERROR);
1732
1733                 if (CHK_MS4BIT(ms_card)) {
1734                         data[0] = 0x88;
1735                 } else {
1736                         data[0] = 0x80;
1737                 }
1738                 data[1] = 0;
1739                 data[2] = (u8)(new_blk >> 8);
1740                 data[3] = (u8)new_blk;
1741                 data[4] = 0x20;
1742                 data[5] = i;
1743
1744                 if ((extra[0] & 0x60) != 0x60) {
1745                         data[6] = extra[0];
1746                 } else {
1747                         data[6] = 0xF8;
1748                 }
1749                 data[6 + 1] = 0xFF;
1750                 data[6 + 2] = (u8)(log_blk >> 8);
1751                 data[6 + 3] = (u8)log_blk;
1752
1753                 for (j = 4; j <= MS_EXTRA_SIZE; j++) {
1754                         data[6 + j] = 0xFF;
1755                 }
1756
1757                 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16);
1758                 if (retval != STATUS_SUCCESS) {
1759                         TRACE_RET(chip, STATUS_FAIL);
1760                 }
1761
1762                 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1763                 if (retval != STATUS_SUCCESS) {
1764                         TRACE_RET(chip, STATUS_FAIL);
1765                 }
1766
1767                 ms_set_err_code(chip, MS_NO_ERROR);
1768                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1769                 if (retval != STATUS_SUCCESS) {
1770                         TRACE_RET(chip, STATUS_FAIL);
1771                 }
1772
1773                 if (val & INT_REG_CMDNK) {
1774                         ms_set_err_code(chip, MS_CMD_NK);
1775                         TRACE_RET(chip, STATUS_FAIL);
1776                 }
1777
1778                 if (val & INT_REG_CED) {
1779                         if (val & INT_REG_ERR) {
1780                                 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1781                                 TRACE_RET(chip, STATUS_FAIL);
1782                         }
1783                 }
1784
1785                 if (i == 0) {
1786                         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
1787                         if (retval != STATUS_SUCCESS) {
1788                                 TRACE_RET(chip, STATUS_FAIL);
1789                         }
1790
1791                         ms_set_err_code(chip, MS_NO_ERROR);
1792
1793                         if (CHK_MS4BIT(ms_card)) {
1794                                 data[0] = 0x88;
1795                         } else {
1796                                 data[0] = 0x80;
1797                         }
1798                         data[1] = 0;
1799                         data[2] = (u8)(old_blk >> 8);
1800                         data[3] = (u8)old_blk;
1801                         data[4] = 0x80;
1802                         data[5] = 0;
1803                         data[6] = 0xEF;
1804                         data[7] = 0xFF;
1805
1806                         retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8);
1807                         if (retval != STATUS_SUCCESS) {
1808                                 TRACE_RET(chip, STATUS_FAIL);
1809                         }
1810
1811                         retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1812                         if (retval != STATUS_SUCCESS) {
1813                                 TRACE_RET(chip, STATUS_FAIL);
1814                         }
1815
1816                         ms_set_err_code(chip, MS_NO_ERROR);
1817                         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1818                         if (retval != STATUS_SUCCESS) {
1819                                 TRACE_RET(chip, STATUS_FAIL);
1820                         }
1821
1822                         if (val & INT_REG_CMDNK) {
1823                                 ms_set_err_code(chip, MS_CMD_NK);
1824                                 TRACE_RET(chip, STATUS_FAIL);
1825                         }
1826
1827                         if (val & INT_REG_CED) {
1828                                 if (val & INT_REG_ERR) {
1829                                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1830                                         TRACE_RET(chip, STATUS_FAIL);
1831                                 }
1832                         }
1833                 }
1834         }
1835
1836         return STATUS_SUCCESS;
1837 }
1838
1839
1840 static int reset_ms(struct rtsx_chip *chip)
1841 {
1842         struct ms_info *ms_card = &(chip->ms_card);
1843         int retval;
1844         u16 i, reg_addr, block_size;
1845         u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1846 #ifndef SUPPORT_MAGIC_GATE
1847         u16 eblock_cnt;
1848 #endif
1849
1850         retval = ms_prepare_reset(chip);
1851         if (retval != STATUS_SUCCESS) {
1852                 TRACE_RET(chip, STATUS_FAIL);
1853         }
1854
1855         ms_card->ms_type |= TYPE_MS;
1856
1857         retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1858         if (retval != STATUS_SUCCESS) {
1859                 TRACE_RET(chip, STATUS_FAIL);
1860         }
1861
1862         retval = ms_read_status_reg(chip);
1863         if (retval != STATUS_SUCCESS) {
1864                 TRACE_RET(chip, STATUS_FAIL);
1865         }
1866
1867         RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1868         if (val & WRT_PRTCT) {
1869                 chip->card_wp |= MS_CARD;
1870         } else {
1871                 chip->card_wp &= ~MS_CARD;
1872         }
1873
1874         i = 0;
1875
1876 RE_SEARCH:
1877         /* Search Boot Block */
1878         while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1879                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1880                         ms_set_err_code(chip, MS_NO_CARD);
1881                         TRACE_RET(chip, STATUS_FAIL);
1882                 }
1883
1884                 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1885                 if (retval != STATUS_SUCCESS) {
1886                         i++;
1887                         continue;
1888                 }
1889
1890                 if (extra[0] & BLOCK_OK) {
1891                         if (!(extra[1] & NOT_BOOT_BLOCK)) {
1892                                 ms_card->boot_block = i;
1893                                 break;
1894                         }
1895                 }
1896                 i++;
1897         }
1898
1899         if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1900                 RTSX_DEBUGP("No boot block found!");
1901                 TRACE_RET(chip, STATUS_FAIL);
1902         }
1903
1904         for (j = 0; j < 3; j++) {
1905                 retval = ms_read_page(chip, ms_card->boot_block, j);
1906                 if (retval != STATUS_SUCCESS) {
1907                         if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1908                                 i = ms_card->boot_block + 1;
1909                                 ms_set_err_code(chip, MS_NO_ERROR);
1910                                 goto RE_SEARCH;
1911                         }
1912                 }
1913         }
1914
1915         retval = ms_read_page(chip, ms_card->boot_block, 0);
1916         if (retval != STATUS_SUCCESS) {
1917                 TRACE_RET(chip, STATUS_FAIL);
1918         }
1919
1920         /* Read MS system information as sys_info */
1921         rtsx_init_cmd(chip);
1922
1923         for (i = 0; i < 96; i++) {
1924                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1925         }
1926
1927         retval = rtsx_send_cmd(chip, MS_CARD, 100);
1928         if (retval < 0) {
1929                 TRACE_RET(chip, STATUS_FAIL);
1930         }
1931
1932         ptr = rtsx_get_cmd_data(chip);
1933         memcpy(ms_card->raw_sys_info, ptr, 96);
1934
1935         /* Read useful block contents */
1936         rtsx_init_cmd(chip);
1937
1938         rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1939         rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1940
1941         for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++) {
1942                 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1943         }
1944
1945         for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) {
1946                 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1947         }
1948
1949         rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
1950         rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
1951
1952         retval = rtsx_send_cmd(chip, MS_CARD, 100);
1953         if (retval < 0) {
1954                 TRACE_RET(chip, STATUS_FAIL);
1955         }
1956
1957         ptr = rtsx_get_cmd_data(chip);
1958
1959         RTSX_DEBUGP("Boot block data:\n");
1960         RTSX_DUMP(ptr, 16);
1961
1962         /* Block ID error
1963          * HEADER_ID0, HEADER_ID1
1964          */
1965         if (ptr[0] != 0x00 || ptr[1] != 0x01) {
1966                 i = ms_card->boot_block + 1;
1967                 goto RE_SEARCH;
1968         }
1969
1970         /* Page size error
1971          * PAGE_SIZE_0, PAGE_SIZE_1
1972          */
1973         if (ptr[12] != 0x02 || ptr[13] != 0x00) {
1974                 i = ms_card->boot_block + 1;
1975                 goto RE_SEARCH;
1976         }
1977
1978         if ((ptr[14] == 1) || (ptr[14] == 3)) {
1979                 chip->card_wp |= MS_CARD;
1980         }
1981
1982         /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
1983         block_size = ((u16)ptr[6] << 8) | ptr[7];
1984         if (block_size == 0x0010) {
1985                 /* Block size 16KB */
1986                 ms_card->block_shift = 5;
1987                 ms_card->page_off = 0x1F;
1988         } else if (block_size == 0x0008) {
1989                 /* Block size 8KB */
1990                 ms_card->block_shift = 4;
1991                 ms_card->page_off = 0x0F;
1992         }
1993
1994         /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
1995         ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
1996
1997 #ifdef SUPPORT_MAGIC_GATE
1998         j = ptr[10];
1999
2000         if (ms_card->block_shift == 4)  { /* 4MB or 8MB */
2001                 if (j < 2)  { /* Effective block for 4MB: 0x1F0 */
2002                         ms_card->capacity = 0x1EE0;
2003                 } else { /* Effective block for 8MB: 0x3E0 */
2004                         ms_card->capacity = 0x3DE0;
2005                 }
2006         } else  { /* 16MB, 32MB, 64MB or 128MB */
2007                 if (j < 5)  { /* Effective block for 16MB: 0x3E0 */
2008                         ms_card->capacity = 0x7BC0;
2009                 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2010                         ms_card->capacity = 0xF7C0;
2011                 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2012                         ms_card->capacity = 0x1EF80;
2013                 } else { /* Effective block for 128MB: 0x1F00 */
2014                         ms_card->capacity = 0x3DF00;
2015                 }
2016         }
2017 #else
2018         /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2019         eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2020
2021         ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2022 #endif
2023
2024         chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2025
2026         /* Switch I/F Mode */
2027         if (ptr[15]) {
2028                 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2029                 if (retval != STATUS_SUCCESS) {
2030                         TRACE_RET(chip, STATUS_FAIL);
2031                 }
2032
2033                 RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88);
2034                 RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2035
2036                 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG , 1, NO_WAIT_INT);
2037                 if (retval != STATUS_SUCCESS) {
2038                         TRACE_RET(chip, STATUS_FAIL);
2039                 }
2040
2041                 RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT,
2042                                 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
2043
2044                 ms_card->ms_type |= MS_4BIT;
2045         }
2046
2047         if (CHK_MS4BIT(ms_card)) {
2048                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2049         } else {
2050                 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2051         }
2052
2053         return STATUS_SUCCESS;
2054 }
2055
2056 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2057 {
2058         struct ms_info *ms_card = &(chip->ms_card);
2059         int size, i, seg_no, retval;
2060         u16 defect_block, reg_addr;
2061         u8 val1, val2;
2062
2063         ms_card->segment_cnt = ms_card->total_block >> 9;
2064         RTSX_DEBUGP("ms_card->segment_cnt = %d\n", ms_card->segment_cnt);
2065
2066         size = ms_card->segment_cnt * sizeof(struct zone_entry);
2067         ms_card->segment = (struct zone_entry *)vmalloc(size);
2068         if (ms_card->segment == NULL) {
2069                 TRACE_RET(chip, STATUS_FAIL);
2070         }
2071         memset(ms_card->segment, 0, size);
2072
2073         retval = ms_read_page(chip, ms_card->boot_block, 1);
2074         if (retval != STATUS_SUCCESS) {
2075                 TRACE_GOTO(chip, INIT_FAIL);
2076         }
2077
2078         reg_addr = PPBUF_BASE2;
2079         for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2080                 retval = rtsx_read_register(chip, reg_addr++, &val1);
2081                 if (retval != STATUS_SUCCESS) {
2082                         TRACE_GOTO(chip, INIT_FAIL);
2083                 }
2084                 retval = rtsx_read_register(chip, reg_addr++, &val2);
2085                 if (retval != STATUS_SUCCESS) {
2086                         TRACE_GOTO(chip, INIT_FAIL);
2087                 }
2088
2089                 defect_block = ((u16)val1 << 8) | val2;
2090                 if (defect_block == 0xFFFF) {
2091                         break;
2092                 }
2093                 seg_no = defect_block / 512;
2094                 ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block;
2095         }
2096
2097         for (i = 0; i < ms_card->segment_cnt; i++) {
2098                 ms_card->segment[i].build_flag = 0;
2099                 ms_card->segment[i].l2p_table = NULL;
2100                 ms_card->segment[i].free_table = NULL;
2101                 ms_card->segment[i].get_index = 0;
2102                 ms_card->segment[i].set_index = 0;
2103                 ms_card->segment[i].unused_blk_cnt = 0;
2104
2105                 RTSX_DEBUGP("defective block count of segment %d is %d\n",
2106                                         i, ms_card->segment[i].disable_count);
2107         }
2108
2109         return STATUS_SUCCESS;
2110
2111 INIT_FAIL:
2112         if (ms_card->segment) {
2113                 vfree(ms_card->segment);
2114                 ms_card->segment = NULL;
2115         }
2116
2117         return STATUS_FAIL;
2118 }
2119
2120 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2121 {
2122         struct ms_info *ms_card = &(chip->ms_card);
2123         struct zone_entry *segment;
2124
2125         if (ms_card->segment == NULL)
2126                 return 0xFFFF;
2127
2128         segment = &(ms_card->segment[seg_no]);
2129
2130         if (segment->l2p_table)
2131                 return segment->l2p_table[log_off];
2132
2133         return 0xFFFF;
2134 }
2135
2136 static void ms_set_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off, u16 phy_blk)
2137 {
2138         struct ms_info *ms_card = &(chip->ms_card);
2139         struct zone_entry *segment;
2140
2141         if (ms_card->segment == NULL)
2142                 return;
2143
2144         segment = &(ms_card->segment[seg_no]);
2145         if (segment->l2p_table) {
2146                 segment->l2p_table[log_off] = phy_blk;
2147         }
2148 }
2149
2150 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2151 {
2152         struct ms_info *ms_card = &(chip->ms_card);
2153         struct zone_entry *segment;
2154         int seg_no;
2155
2156         seg_no = (int)phy_blk >> 9;
2157         segment = &(ms_card->segment[seg_no]);
2158
2159         segment->free_table[segment->set_index++] = phy_blk;
2160         if (segment->set_index >= MS_FREE_TABLE_CNT) {
2161                 segment->set_index = 0;
2162         }
2163         segment->unused_blk_cnt++;
2164 }
2165
2166 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2167 {
2168         struct ms_info *ms_card = &(chip->ms_card);
2169         struct zone_entry *segment;
2170         u16 phy_blk;
2171
2172         segment = &(ms_card->segment[seg_no]);
2173
2174         if (segment->unused_blk_cnt <= 0)
2175                 return 0xFFFF;
2176
2177         phy_blk = segment->free_table[segment->get_index];
2178         segment->free_table[segment->get_index++] = 0xFFFF;
2179         if (segment->get_index >= MS_FREE_TABLE_CNT) {
2180                 segment->get_index = 0;
2181         }
2182         segment->unused_blk_cnt--;
2183
2184         return phy_blk;
2185 }
2186
2187 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478, 2974, 3470,
2188         3966, 4462, 4958, 5454, 5950, 6446, 6942, 7438, 7934};
2189
2190 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk, u16 log_off, u8 us1, u8 us2)
2191 {
2192         struct ms_info *ms_card = &(chip->ms_card);
2193         struct zone_entry *segment;
2194         int seg_no;
2195         u16 tmp_blk;
2196
2197         seg_no = (int)phy_blk >> 9;
2198         segment = &(ms_card->segment[seg_no]);
2199         tmp_blk = segment->l2p_table[log_off];
2200
2201         if (us1 != us2) {
2202                 if (us1 == 0) {
2203                         if (!(chip->card_wp & MS_CARD)) {
2204                                 ms_erase_block(chip, tmp_blk);
2205                         }
2206                         ms_set_unused_block(chip, tmp_blk);
2207                         segment->l2p_table[log_off] = phy_blk;
2208                 } else {
2209                         if (!(chip->card_wp & MS_CARD)) {
2210                                 ms_erase_block(chip, phy_blk);
2211                         }
2212                         ms_set_unused_block(chip, phy_blk);
2213                 }
2214         } else {
2215                 if (phy_blk < tmp_blk) {
2216                         if (!(chip->card_wp & MS_CARD)) {
2217                                 ms_erase_block(chip, phy_blk);
2218                         }
2219                         ms_set_unused_block(chip, phy_blk);
2220                 } else {
2221                         if (!(chip->card_wp & MS_CARD)) {
2222                                 ms_erase_block(chip, tmp_blk);
2223                         }
2224                         ms_set_unused_block(chip, tmp_blk);
2225                         segment->l2p_table[log_off] = phy_blk;
2226                 }
2227         }
2228
2229         return STATUS_SUCCESS;
2230 }
2231
2232 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2233 {
2234         struct ms_info *ms_card = &(chip->ms_card);
2235         struct zone_entry *segment;
2236         int retval, table_size, disable_cnt, defect_flag, i;
2237         u16 start, end, phy_blk, log_blk, tmp_blk;
2238         u8 extra[MS_EXTRA_SIZE], us1, us2;
2239
2240         RTSX_DEBUGP("ms_build_l2p_tbl: %d\n", seg_no);
2241
2242         if (ms_card->segment == NULL) {
2243                 retval = ms_init_l2p_tbl(chip);
2244                 if (retval != STATUS_SUCCESS) {
2245                         TRACE_RET(chip, retval);
2246                 }
2247         }
2248
2249         if (ms_card->segment[seg_no].build_flag) {
2250                 RTSX_DEBUGP("l2p table of segment %d has been built\n", seg_no);
2251                 return STATUS_SUCCESS;
2252         }
2253
2254         if (seg_no == 0) {
2255                 table_size = 494;
2256         } else {
2257                 table_size = 496;
2258         }
2259
2260         segment = &(ms_card->segment[seg_no]);
2261
2262         if (segment->l2p_table == NULL) {
2263                 segment->l2p_table = (u16 *)vmalloc(table_size * 2);
2264                 if (segment->l2p_table == NULL) {
2265                         TRACE_GOTO(chip, BUILD_FAIL);
2266                 }
2267         }
2268         memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2269
2270         if (segment->free_table == NULL) {
2271                 segment->free_table = (u16 *)vmalloc(MS_FREE_TABLE_CNT * 2);
2272                 if (segment->free_table == NULL) {
2273                         TRACE_GOTO(chip, BUILD_FAIL);
2274                 }
2275         }
2276         memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2277
2278         start = (u16)seg_no << 9;
2279         end = (u16)(seg_no + 1) << 9;
2280
2281         disable_cnt = segment->disable_count;
2282
2283         segment->get_index = segment->set_index = 0;
2284         segment->unused_blk_cnt = 0;
2285
2286         for (phy_blk = start; phy_blk < end; phy_blk++) {
2287                 if (disable_cnt) {
2288                         defect_flag = 0;
2289                         for (i = 0; i < segment->disable_count; i++) {
2290                                 if (phy_blk == segment->defect_list[i]) {
2291                                         defect_flag = 1;
2292                                         break;
2293                                 }
2294                         }
2295                         if (defect_flag) {
2296                                 disable_cnt--;
2297                                 continue;
2298                         }
2299                 }
2300
2301                 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
2302                 if (retval != STATUS_SUCCESS) {
2303                         RTSX_DEBUGP("read extra data fail\n");
2304                         ms_set_bad_block(chip, phy_blk);
2305                         continue;
2306                 }
2307
2308                 if (seg_no == ms_card->segment_cnt - 1) {
2309                         if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2310                                 if (!(chip->card_wp & MS_CARD)) {
2311                                         retval = ms_erase_block(chip, phy_blk);
2312                                         if (retval != STATUS_SUCCESS)
2313                                                 continue;
2314                                         extra[2] = 0xff;
2315                                         extra[3] = 0xff;
2316                                 }
2317                         }
2318                 }
2319
2320                 if (!(extra[0] & BLOCK_OK))
2321                         continue;
2322                 if (!(extra[1] & NOT_BOOT_BLOCK))
2323                         continue;
2324                 if ((extra[0] & PAGE_OK) != PAGE_OK)
2325                         continue;
2326
2327                 log_blk = ((u16)extra[2] << 8) | extra[3];
2328
2329                 if (log_blk == 0xFFFF) {
2330                         if (!(chip->card_wp & MS_CARD)) {
2331                                 retval = ms_erase_block(chip, phy_blk);
2332                                 if (retval != STATUS_SUCCESS)
2333                                         continue;
2334                         }
2335                         ms_set_unused_block(chip, phy_blk);
2336                         continue;
2337                 }
2338
2339                 if ((log_blk < ms_start_idx[seg_no]) ||
2340                                 (log_blk >= ms_start_idx[seg_no+1])) {
2341                         if (!(chip->card_wp & MS_CARD)) {
2342                                 retval = ms_erase_block(chip, phy_blk);
2343                                 if (retval != STATUS_SUCCESS)
2344                                         continue;
2345                         }
2346                         ms_set_unused_block(chip, phy_blk);
2347                         continue;
2348                 }
2349
2350                 if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) {
2351                         segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk;
2352                         continue;
2353                 }
2354
2355                 us1 = extra[0] & 0x10;
2356                 tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]];
2357                 retval = ms_read_extra_data(chip, tmp_blk, 0, extra, MS_EXTRA_SIZE);
2358                 if (retval != STATUS_SUCCESS)
2359                         continue;
2360                 us2 = extra[0] & 0x10;
2361
2362                 (void)ms_arbitrate_l2p(chip, phy_blk, log_blk-ms_start_idx[seg_no], us1, us2);
2363                 continue;
2364         }
2365
2366         segment->build_flag = 1;
2367
2368         RTSX_DEBUGP("unused block count: %d\n", segment->unused_blk_cnt);
2369
2370         /* Logical Address Confirmation Process */
2371         if (seg_no == ms_card->segment_cnt - 1) {
2372                 if (segment->unused_blk_cnt < 2) {
2373                         chip->card_wp |= MS_CARD;
2374                 }
2375         } else {
2376                 if (segment->unused_blk_cnt < 1) {
2377                         chip->card_wp |= MS_CARD;
2378                 }
2379         }
2380
2381         if (chip->card_wp & MS_CARD)
2382                 return STATUS_SUCCESS;
2383
2384         for (log_blk = ms_start_idx[seg_no]; log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2385                 if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) {
2386                         phy_blk = ms_get_unused_block(chip, seg_no);
2387                         if (phy_blk == 0xFFFF) {
2388                                 chip->card_wp |= MS_CARD;
2389                                 return STATUS_SUCCESS;
2390                         }
2391                         retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2392                         if (retval != STATUS_SUCCESS) {
2393                                 TRACE_GOTO(chip, BUILD_FAIL);
2394                         }
2395                         segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk;
2396                         if (seg_no == ms_card->segment_cnt - 1) {
2397                                 if (segment->unused_blk_cnt < 2) {
2398                                         chip->card_wp |= MS_CARD;
2399                                         return STATUS_SUCCESS;
2400                                 }
2401                         } else {
2402                                 if (segment->unused_blk_cnt < 1) {
2403                                         chip->card_wp |= MS_CARD;
2404                                         return STATUS_SUCCESS;
2405                                 }
2406                         }
2407                 }
2408         }
2409
2410         /* Make boot block be the first normal block */
2411         if (seg_no == 0) {
2412                 for (log_blk = 0; log_blk < 494; log_blk++) {
2413                         tmp_blk = segment->l2p_table[log_blk];
2414                         if (tmp_blk < ms_card->boot_block) {
2415                                 RTSX_DEBUGP("Boot block is not the first normal block.\n");
2416
2417                                 if (chip->card_wp & MS_CARD)
2418                                         break;
2419
2420                                 phy_blk = ms_get_unused_block(chip, 0);
2421                                 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2422                                                 log_blk, 0, ms_card->page_off + 1);
2423                                 if (retval != STATUS_SUCCESS) {
2424                                         TRACE_RET(chip, STATUS_FAIL);
2425                                 }
2426
2427                                 segment->l2p_table[log_blk] = phy_blk;
2428
2429                                 retval = ms_set_bad_block(chip, tmp_blk);
2430                                 if (retval != STATUS_SUCCESS) {
2431                                         TRACE_RET(chip, STATUS_FAIL);
2432                                 }
2433                         }
2434                 }
2435         }
2436
2437         return STATUS_SUCCESS;
2438
2439 BUILD_FAIL:
2440         segment->build_flag = 0;
2441         if (segment->l2p_table) {
2442                 vfree(segment->l2p_table);
2443                 segment->l2p_table = NULL;
2444         }
2445         if (segment->free_table) {
2446                 vfree(segment->free_table);
2447                 segment->free_table = NULL;
2448         }
2449
2450         return STATUS_FAIL;
2451 }
2452
2453
2454 int reset_ms_card(struct rtsx_chip *chip)
2455 {
2456         struct ms_info *ms_card = &(chip->ms_card);
2457         int retval;
2458
2459         memset(ms_card, 0, sizeof(struct ms_info));
2460
2461         retval = enable_card_clock(chip, MS_CARD);
2462         if (retval != STATUS_SUCCESS) {
2463                 TRACE_RET(chip, STATUS_FAIL);
2464         }
2465
2466         retval = select_card(chip, MS_CARD);
2467         if (retval != STATUS_SUCCESS) {
2468                 TRACE_RET(chip, STATUS_FAIL);
2469         }
2470
2471         ms_card->ms_type = 0;
2472
2473         retval = reset_ms_pro(chip);
2474         if (retval != STATUS_SUCCESS) {
2475                 if (ms_card->check_ms_flow) {
2476                         retval = reset_ms(chip);
2477                         if (retval != STATUS_SUCCESS) {
2478                                 TRACE_RET(chip, STATUS_FAIL);
2479                         }
2480                 } else {
2481                         TRACE_RET(chip, STATUS_FAIL);
2482                 }
2483         }
2484
2485         retval = ms_set_init_para(chip);
2486         if (retval != STATUS_SUCCESS) {
2487                 TRACE_RET(chip, STATUS_FAIL);
2488         }
2489
2490         if (!CHK_MSPRO(ms_card)) {
2491                 /* Build table for the last segment,
2492                  * to check if L2P talbe block exist,erasing it
2493                  */
2494                 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2495                 if (retval != STATUS_SUCCESS) {
2496                         TRACE_RET(chip, STATUS_FAIL);
2497                 }
2498         }
2499
2500         RTSX_DEBUGP("ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2501
2502         return STATUS_SUCCESS;
2503 }
2504
2505 static int mspro_set_rw_cmd(struct rtsx_chip *chip, u32 start_sec, u16 sec_cnt, u8 cmd)
2506 {
2507         int retval, i;
2508         u8 data[8];
2509
2510         data[0] = cmd;
2511         data[1] = (u8)(sec_cnt >> 8);
2512         data[2] = (u8)sec_cnt;
2513         data[3] = (u8)(start_sec >> 24);
2514         data[4] = (u8)(start_sec >> 16);
2515         data[5] = (u8)(start_sec >> 8);
2516         data[6] = (u8)start_sec;
2517         data[7] = 0;
2518
2519         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2520                 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8);
2521                 if (retval == STATUS_SUCCESS)
2522                         break;
2523         }
2524         if (i == MS_MAX_RETRY_COUNT) {
2525                 TRACE_RET(chip, STATUS_FAIL);
2526         }
2527
2528         return STATUS_SUCCESS;
2529 }
2530
2531
2532 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2533 {
2534         struct ms_info *ms_card = &(chip->ms_card);
2535         int retval;
2536
2537         RTSX_DEBUGP("--%s--\n", __func__);
2538
2539         if (ms_card->seq_mode) {
2540                 retval = ms_switch_clock(chip);
2541                 if (retval != STATUS_SUCCESS)
2542                         return;
2543
2544                 ms_card->seq_mode = 0;
2545                 ms_card->total_sec_cnt = 0;
2546                 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2547
2548                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2549         }
2550 }
2551
2552 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2553 {
2554         struct ms_info *ms_card = &(chip->ms_card);
2555         int retval;
2556
2557         RTSX_DEBUGP("--%s--\n", __func__);
2558
2559         if (chip->asic_code) {
2560                 if (ms_card->ms_clock > 30) {
2561                         ms_card->ms_clock -= 20;
2562                 }
2563         } else {
2564                 if (ms_card->ms_clock == CLK_80) {
2565                         ms_card->ms_clock = CLK_60;
2566                 } else if (ms_card->ms_clock == CLK_60) {
2567                         ms_card->ms_clock = CLK_40;
2568                 }
2569         }
2570
2571         retval = ms_switch_clock(chip);
2572         if (retval != STATUS_SUCCESS) {
2573                 TRACE_RET(chip, STATUS_FAIL);
2574         }
2575
2576         return STATUS_SUCCESS;
2577 }
2578
2579 static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
2580 {
2581         struct ms_info *ms_card = &(chip->ms_card);
2582         int retval, mode_2k = 0;
2583         u16 count;
2584         u8 val, trans_mode, rw_tpc, rw_cmd;
2585
2586         ms_set_err_code(chip, MS_NO_ERROR);
2587
2588         ms_card->cleanup_counter = 0;
2589
2590         if (CHK_MSHG(ms_card)) {
2591                 if ((start_sector % 4) || (sector_cnt % 4)) {
2592                         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2593                                 rw_tpc = PRO_READ_LONG_DATA;
2594                                 rw_cmd = PRO_READ_DATA;
2595                         } else {
2596                                 rw_tpc = PRO_WRITE_LONG_DATA;
2597                                 rw_cmd = PRO_WRITE_DATA;
2598                         }
2599                 } else {
2600                         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2601                                 rw_tpc = PRO_READ_QUAD_DATA;
2602                                 rw_cmd = PRO_READ_2K_DATA;
2603                         } else {
2604                                 rw_tpc = PRO_WRITE_QUAD_DATA;
2605                                 rw_cmd = PRO_WRITE_2K_DATA;
2606                         }
2607                         mode_2k = 1;
2608                 }
2609         } else {
2610                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2611                         rw_tpc = PRO_READ_LONG_DATA;
2612                         rw_cmd = PRO_READ_DATA;
2613                 } else {
2614                         rw_tpc = PRO_WRITE_LONG_DATA;
2615                         rw_cmd = PRO_WRITE_DATA;
2616                 }
2617         }
2618
2619         retval = ms_switch_clock(chip);
2620         if (retval != STATUS_SUCCESS) {
2621                 TRACE_RET(chip, STATUS_FAIL);
2622         }
2623
2624         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2625                 trans_mode = MS_TM_AUTO_READ;
2626         } else {
2627                 trans_mode = MS_TM_AUTO_WRITE;
2628         }
2629
2630         RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
2631
2632         if (ms_card->seq_mode) {
2633                 if ((ms_card->pre_dir != srb->sc_data_direction)
2634                                 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
2635                                 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
2636                                 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
2637                                 || !(val & MS_INT_BREQ)
2638                                 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2639                         ms_card->seq_mode = 0;
2640                         ms_card->total_sec_cnt = 0;
2641                         if (val & MS_INT_BREQ) {
2642                                 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2643                                 if (retval != STATUS_SUCCESS) {
2644                                         TRACE_RET(chip, STATUS_FAIL);
2645                                 }
2646
2647                                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2648                         }
2649                 }
2650         }
2651
2652         if (!ms_card->seq_mode) {
2653                 ms_card->total_sec_cnt = 0;
2654                 if (sector_cnt >= SEQ_START_CRITERIA) {
2655                         if ((ms_card->capacity - start_sector) > 0xFE00) {
2656                                 count = 0xFE00;
2657                         } else {
2658                                 count = (u16)(ms_card->capacity - start_sector);
2659                         }
2660                         if (count > sector_cnt) {
2661                                 if (mode_2k) {
2662                                         ms_card->seq_mode |= MODE_2K_SEQ;
2663                                 } else {
2664                                         ms_card->seq_mode |= MODE_512_SEQ;
2665                                 }
2666                         }
2667                 } else {
2668                         count = sector_cnt;
2669                 }
2670                 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2671                 if (retval != STATUS_SUCCESS) {
2672                         ms_card->seq_mode = 0;
2673                         TRACE_RET(chip, STATUS_FAIL);
2674                 }
2675         }
2676
2677         retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt, WAIT_INT, mode_2k,
2678                         scsi_sg_count(srb), scsi_sglist(srb), scsi_bufflen(srb));
2679         if (retval != STATUS_SUCCESS) {
2680                 ms_card->seq_mode = 0;
2681                 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2682                 rtsx_clear_ms_error(chip);
2683
2684                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2685                         chip->rw_need_retry = 0;
2686                         RTSX_DEBUGP("No card exist, exit mspro_rw_multi_sector\n");
2687                         TRACE_RET(chip, STATUS_FAIL);
2688                 }
2689
2690                 if (val & MS_INT_BREQ) {
2691                         ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2692                 }
2693                 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2694                         RTSX_DEBUGP("MSPro CRC error, tune clock!\n");
2695                         chip->rw_need_retry = 1;
2696                         ms_auto_tune_clock(chip);
2697                 }
2698
2699                 TRACE_RET(chip, retval);
2700         }
2701
2702         if (ms_card->seq_mode) {
2703                 ms_card->pre_sec_addr = start_sector;
2704                 ms_card->pre_sec_cnt = sector_cnt;
2705                 ms_card->pre_dir = srb->sc_data_direction;
2706                 ms_card->total_sec_cnt += sector_cnt;
2707         }
2708
2709         return STATUS_SUCCESS;
2710 }
2711
2712 static int mspro_read_format_progress(struct rtsx_chip *chip, const int short_data_len)
2713 {
2714         struct ms_info *ms_card = &(chip->ms_card);
2715         int retval, i;
2716         u32 total_progress, cur_progress;
2717         u8 cnt, tmp;
2718         u8 data[8];
2719
2720         RTSX_DEBUGP("mspro_read_format_progress, short_data_len = %d\n", short_data_len);
2721
2722         retval = ms_switch_clock(chip);
2723         if (retval != STATUS_SUCCESS) {
2724                 ms_card->format_status = FORMAT_FAIL;
2725                 TRACE_RET(chip, STATUS_FAIL);
2726         }
2727
2728         retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2729         if (retval != STATUS_SUCCESS) {
2730                 ms_card->format_status = FORMAT_FAIL;
2731                 TRACE_RET(chip, STATUS_FAIL);
2732         }
2733
2734         if (!(tmp & MS_INT_BREQ)) {
2735                 if ((tmp &  (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
2736                         ms_card->format_status = FORMAT_SUCCESS;
2737                         return STATUS_SUCCESS;
2738                 }
2739                 ms_card->format_status = FORMAT_FAIL;
2740                 TRACE_RET(chip, STATUS_FAIL);
2741         }
2742
2743         if (short_data_len >= 256) {
2744                 cnt = 0;
2745         } else {
2746                 cnt = (u8)short_data_len;
2747         }
2748
2749         retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, MS_NO_CHECK_INT);
2750         if (retval != STATUS_SUCCESS) {
2751                 ms_card->format_status = FORMAT_FAIL;
2752                 TRACE_RET(chip, STATUS_FAIL);
2753         }
2754
2755         retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT, data, 8);
2756         if (retval != STATUS_SUCCESS) {
2757                 ms_card->format_status = FORMAT_FAIL;
2758                 TRACE_RET(chip, STATUS_FAIL);
2759         }
2760
2761         total_progress = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3];
2762         cur_progress = (data[4] << 24) | (data[5] << 16) | (data[6] << 8) | data[7];
2763
2764         RTSX_DEBUGP("total_progress = %d, cur_progress = %d\n",
2765                                 total_progress, cur_progress);
2766
2767         if (total_progress == 0) {
2768                 ms_card->progress = 0;
2769         } else {
2770                 u64 ulltmp = (u64)cur_progress * (u64)65535;
2771                 do_div(ulltmp, total_progress);
2772                 ms_card->progress = (u16)ulltmp;
2773         }
2774         RTSX_DEBUGP("progress = %d\n", ms_card->progress);
2775
2776         for (i = 0; i < 5000; i++) {
2777                 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2778                 if (retval != STATUS_SUCCESS) {
2779                         ms_card->format_status = FORMAT_FAIL;
2780                         TRACE_RET(chip, STATUS_FAIL);
2781                 }
2782                 if (tmp & (MS_INT_CED | MS_INT_CMDNK | MS_INT_BREQ | MS_INT_ERR)) {
2783                         break;
2784                 }
2785
2786                 wait_timeout(1);
2787         }
2788
2789         retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2790         if (retval != STATUS_SUCCESS) {
2791                 ms_card->format_status = FORMAT_FAIL;
2792                 TRACE_RET(chip, STATUS_FAIL);
2793         }
2794
2795         if (i == 5000) {
2796                 ms_card->format_status = FORMAT_FAIL;
2797                 TRACE_RET(chip, STATUS_FAIL);
2798         }
2799
2800         if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2801                 ms_card->format_status = FORMAT_FAIL;
2802                 TRACE_RET(chip, STATUS_FAIL);
2803         }
2804
2805         if (tmp & MS_INT_CED) {
2806                 ms_card->format_status = FORMAT_SUCCESS;
2807                 ms_card->pro_under_formatting = 0;
2808         } else if (tmp & MS_INT_BREQ) {
2809                 ms_card->format_status = FORMAT_IN_PROGRESS;
2810         } else {
2811                 ms_card->format_status = FORMAT_FAIL;
2812                 ms_card->pro_under_formatting = 0;
2813                 TRACE_RET(chip, STATUS_FAIL);
2814         }
2815
2816         return STATUS_SUCCESS;
2817 }
2818
2819 void mspro_polling_format_status(struct rtsx_chip *chip)
2820 {
2821         struct ms_info *ms_card = &(chip->ms_card);
2822         int i;
2823
2824         if (ms_card->pro_under_formatting && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2825                 rtsx_set_stat(chip, RTSX_STAT_RUN);
2826
2827                 for (i = 0; i < 65535; i++) {
2828                         mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2829                         if (ms_card->format_status != FORMAT_IN_PROGRESS)
2830                                 break;
2831                 }
2832         }
2833
2834         return;
2835 }
2836
2837 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_len, int quick_format)
2838 {
2839         struct ms_info *ms_card = &(chip->ms_card);
2840         int retval, i;
2841         u8 buf[8], tmp;
2842         u16 para;
2843
2844         RTSX_DEBUGP("--%s--\n", __func__);
2845
2846         retval = ms_switch_clock(chip);
2847         if (retval != STATUS_SUCCESS) {
2848                 TRACE_RET(chip, STATUS_FAIL);
2849         }
2850
2851         retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
2852         if (retval != STATUS_SUCCESS) {
2853                 TRACE_RET(chip, STATUS_FAIL);
2854         }
2855
2856         memset(buf, 0, 2);
2857         switch (short_data_len) {
2858         case 32:
2859                 buf[0] = 0;
2860                 break;
2861         case 64:
2862                 buf[0] = 1;
2863                 break;
2864         case 128:
2865                 buf[0] = 2;
2866                 break;
2867         case 256:
2868         default:
2869                 buf[0] = 3;
2870                 break;
2871         }
2872
2873         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2874                 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1, NO_WAIT_INT, buf, 2);
2875                 if (retval == STATUS_SUCCESS)
2876                         break;
2877         }
2878         if (i == MS_MAX_RETRY_COUNT) {
2879                 TRACE_RET(chip, STATUS_FAIL);
2880         }
2881
2882         if (quick_format) {
2883                 para = 0x0000;
2884         } else {
2885                 para = 0x0001;
2886         }
2887         retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2888         if (retval != STATUS_SUCCESS) {
2889                 TRACE_RET(chip, STATUS_FAIL);
2890         }
2891
2892         RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp);
2893
2894         if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2895                 TRACE_RET(chip, STATUS_FAIL);
2896         }
2897
2898         if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2899                 ms_card->pro_under_formatting = 1;
2900                 ms_card->progress = 0;
2901                 ms_card->format_status = FORMAT_IN_PROGRESS;
2902                 return STATUS_SUCCESS;
2903         }
2904
2905         if (tmp & MS_INT_CED) {
2906                 ms_card->pro_under_formatting = 0;
2907                 ms_card->progress = 0;
2908                 ms_card->format_status = FORMAT_SUCCESS;
2909                 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2910                 return STATUS_SUCCESS;
2911         }
2912
2913         TRACE_RET(chip, STATUS_FAIL);
2914 }
2915
2916
2917 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
2918                 u8 start_page, u8 end_page, u8 *buf, unsigned int *index, unsigned int *offset)
2919 {
2920         struct ms_info *ms_card = &(chip->ms_card);
2921         int retval, i;
2922         u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2923         u8 *ptr;
2924
2925         retval = ms_read_extra_data(chip, phy_blk, start_page, extra, MS_EXTRA_SIZE);
2926         if (retval == STATUS_SUCCESS) {
2927                 if ((extra[1] & 0x30) != 0x30) {
2928                         ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2929                         TRACE_RET(chip, STATUS_FAIL);
2930                 }
2931         }
2932
2933         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6);
2934         if (retval != STATUS_SUCCESS) {
2935                 TRACE_RET(chip, STATUS_FAIL);
2936         }
2937
2938         if (CHK_MS4BIT(ms_card)) {
2939                 data[0] = 0x88;
2940         } else {
2941                 data[0] = 0x80;
2942         }
2943         data[1] = 0;
2944         data[2] = (u8)(phy_blk >> 8);
2945         data[3] = (u8)phy_blk;
2946         data[4] = 0;
2947         data[5] = start_page;
2948
2949         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2950                 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
2951                 if (retval == STATUS_SUCCESS)
2952                         break;
2953         }
2954         if (i == MS_MAX_RETRY_COUNT) {
2955                 TRACE_RET(chip, STATUS_FAIL);
2956         }
2957
2958         ms_set_err_code(chip, MS_NO_ERROR);
2959
2960         retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
2961         if (retval != STATUS_SUCCESS) {
2962                 TRACE_RET(chip, STATUS_FAIL);
2963         }
2964
2965         ptr = buf;
2966
2967         for (page_addr = start_page; page_addr < end_page; page_addr++) {
2968                 ms_set_err_code(chip, MS_NO_ERROR);
2969
2970                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2971                         ms_set_err_code(chip, MS_NO_CARD);
2972                         TRACE_RET(chip, STATUS_FAIL);
2973                 }
2974
2975                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2976                 if (retval != STATUS_SUCCESS) {
2977                         TRACE_RET(chip, STATUS_FAIL);
2978                 }
2979                 if (val & INT_REG_CMDNK) {
2980                         ms_set_err_code(chip, MS_CMD_NK);
2981                         TRACE_RET(chip, STATUS_FAIL);
2982                 }
2983                 if (val & INT_REG_ERR) {
2984                         if (val & INT_REG_BREQ) {
2985                                 retval = ms_read_status_reg(chip);
2986                                 if (retval != STATUS_SUCCESS) {
2987                                         if (!(chip->card_wp & MS_CARD)) {
2988                                                 reset_ms(chip);
2989                                                 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
2990                                                 ms_write_extra_data(chip, phy_blk,
2991                                                                 page_addr, extra, MS_EXTRA_SIZE);
2992                                         }
2993                                         ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2994                                         TRACE_RET(chip, STATUS_FAIL);
2995                                 }
2996                         } else {
2997                                 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2998                                 TRACE_RET(chip, STATUS_FAIL);
2999                         }
3000                 } else {
3001                         if (!(val & INT_REG_BREQ)) {
3002                                 ms_set_err_code(chip, MS_BREQ_ERROR);
3003                                 TRACE_RET(chip, STATUS_FAIL);
3004                         }
3005                 }
3006
3007                 if (page_addr == (end_page - 1)) {
3008                         if (!(val & INT_REG_CED)) {
3009                                 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3010                                 if (retval != STATUS_SUCCESS) {
3011                                         TRACE_RET(chip, STATUS_FAIL);
3012                                 }
3013                         }
3014
3015                         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3016                         if (retval != STATUS_SUCCESS) {
3017                                 TRACE_RET(chip, STATUS_FAIL);
3018                         }
3019                         if (!(val & INT_REG_CED)) {
3020                                 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3021                                 TRACE_RET(chip, STATUS_FAIL);
3022                         }
3023
3024                         trans_cfg = NO_WAIT_INT;
3025                 } else {
3026                         trans_cfg = WAIT_INT;
3027                 }
3028
3029                 rtsx_init_cmd(chip);
3030
3031                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3032                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, trans_cfg);
3033                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3034
3035                 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3036
3037                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3038                                 MS_TRANSFER_START |  MS_TM_NORMAL_READ);
3039                 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
3040
3041                 rtsx_send_cmd_no_wait(chip);
3042
3043                 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb),
3044                                 index, offset, DMA_FROM_DEVICE, chip->ms_timeout);
3045                 if (retval < 0) {
3046                         if (retval == -ETIMEDOUT) {
3047                                 ms_set_err_code(chip, MS_TO_ERROR);
3048                                 rtsx_clear_ms_error(chip);
3049                                 TRACE_RET(chip, STATUS_TIMEDOUT);
3050                         }
3051
3052                         retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3053                         if (retval != STATUS_SUCCESS) {
3054                                 ms_set_err_code(chip, MS_TO_ERROR);
3055                                 rtsx_clear_ms_error(chip);
3056                                 TRACE_RET(chip, STATUS_TIMEDOUT);
3057                         }
3058                         if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3059                                 ms_set_err_code(chip, MS_CRC16_ERROR);
3060                                 rtsx_clear_ms_error(chip);
3061                                 TRACE_RET(chip, STATUS_FAIL);
3062                         }
3063                 }
3064
3065                 if (scsi_sg_count(chip->srb) == 0)
3066                         ptr += 512;
3067         }
3068
3069         return STATUS_SUCCESS;
3070 }
3071
3072 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3073                 u16 log_blk, u8 start_page, u8 end_page, u8 *buf,
3074                 unsigned int *index, unsigned int *offset)
3075 {
3076         struct ms_info *ms_card = &(chip->ms_card);
3077         int retval, i;
3078         u8 page_addr, val, data[16];
3079         u8 *ptr;
3080
3081         if (!start_page) {
3082                 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7);
3083                 if (retval != STATUS_SUCCESS) {
3084                         TRACE_RET(chip, STATUS_FAIL);
3085                 }
3086
3087                 if (CHK_MS4BIT(ms_card)) {
3088                         data[0] = 0x88;
3089                 } else {
3090                         data[0] = 0x80;
3091                 }
3092                 data[1] = 0;
3093                 data[2] = (u8)(old_blk >> 8);
3094                 data[3] = (u8)old_blk;
3095                 data[4] = 0x80;
3096                 data[5] = 0;
3097                 data[6] = 0xEF;
3098                 data[7] = 0xFF;
3099
3100                 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8);
3101                 if (retval != STATUS_SUCCESS) {
3102                         TRACE_RET(chip, STATUS_FAIL);
3103                 }
3104
3105                 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3106                 if (retval != STATUS_SUCCESS) {
3107                         TRACE_RET(chip, STATUS_FAIL);
3108                 }
3109
3110                 ms_set_err_code(chip, MS_NO_ERROR);
3111                 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT);
3112                 if (retval != STATUS_SUCCESS) {
3113                         TRACE_RET(chip, STATUS_FAIL);
3114                 }
3115         }
3116
3117         retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE));
3118         if (retval != STATUS_SUCCESS) {
3119                 TRACE_RET(chip, STATUS_FAIL);
3120         }
3121
3122         ms_set_err_code(chip, MS_NO_ERROR);
3123
3124         if (CHK_MS4BIT(ms_card)) {
3125                 data[0] = 0x88;
3126         } else {
3127                 data[0] = 0x80;
3128         }
3129         data[1] = 0;
3130         data[2] = (u8)(new_blk >> 8);
3131         data[3] = (u8)new_blk;
3132         if ((end_page - start_page) == 1) {
3133                 data[4] = 0x20;
3134         } else {
3135                 data[4] = 0;
3136         }
3137         data[5] = start_page;
3138         data[6] = 0xF8;
3139         data[7] = 0xFF;
3140         data[8] = (u8)(log_blk >> 8);
3141         data[9] = (u8)log_blk;
3142
3143         for (i = 0x0A; i < 0x10; i++) {
3144                 data[i] = 0xFF;
3145         }
3146
3147         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3148                 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE, NO_WAIT_INT, data, 16);
3149                 if (retval == STATUS_SUCCESS)
3150                         break;
3151         }
3152         if (i == MS_MAX_RETRY_COUNT) {
3153                 TRACE_RET(chip, STATUS_FAIL);
3154         }
3155
3156         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3157                 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3158                 if (retval == STATUS_SUCCESS)
3159                         break;
3160         }
3161         if (i == MS_MAX_RETRY_COUNT) {
3162                 TRACE_RET(chip, STATUS_FAIL);
3163         }
3164
3165         retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3166         if (retval != STATUS_SUCCESS) {
3167                 TRACE_RET(chip, STATUS_FAIL);
3168         }
3169
3170         ptr = buf;
3171         for (page_addr = start_page; page_addr < end_page; page_addr++) {
3172                 ms_set_err_code(chip, MS_NO_ERROR);
3173
3174                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3175                         ms_set_err_code(chip, MS_NO_CARD);
3176                         TRACE_RET(chip, STATUS_FAIL);
3177                 }
3178
3179                 if (val & INT_REG_CMDNK) {
3180                         ms_set_err_code(chip, MS_CMD_NK);
3181                         TRACE_RET(chip, STATUS_FAIL);
3182                 }
3183                 if (val & INT_REG_ERR) {
3184                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3185                         TRACE_RET(chip, STATUS_FAIL);
3186                 }
3187                 if (!(val & INT_REG_BREQ)) {
3188                         ms_set_err_code(chip, MS_BREQ_ERROR);
3189                         TRACE_RET(chip, STATUS_FAIL);
3190                 }
3191
3192                 udelay(30);
3193
3194                 rtsx_init_cmd(chip);
3195
3196                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, WRITE_PAGE_DATA);
3197                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
3198                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3199
3200                 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3201
3202                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3203                                 MS_TRANSFER_START |  MS_TM_NORMAL_WRITE);
3204                 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
3205
3206                 rtsx_send_cmd_no_wait(chip);
3207
3208                 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512, scsi_sg_count(chip->srb),
3209                                 index, offset, DMA_TO_DEVICE, chip->ms_timeout);
3210                 if (retval < 0) {
3211                         ms_set_err_code(chip, MS_TO_ERROR);
3212                         rtsx_clear_ms_error(chip);
3213
3214                         if (retval == -ETIMEDOUT) {
3215                                 TRACE_RET(chip, STATUS_TIMEDOUT);
3216                         } else {
3217                                 TRACE_RET(chip, STATUS_FAIL);
3218                         }
3219                 }
3220
3221                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3222                 if (retval != STATUS_SUCCESS) {
3223                         TRACE_RET(chip, STATUS_FAIL);
3224                 }
3225
3226                 if ((end_page - start_page) == 1) {
3227                         if (!(val & INT_REG_CED)) {
3228                                 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3229                                 TRACE_RET(chip, STATUS_FAIL);
3230                         }
3231                 } else {
3232                         if (page_addr == (end_page - 1)) {
3233                                 if (!(val & INT_REG_CED)) {
3234                                         retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3235                                         if (retval != STATUS_SUCCESS) {
3236                                                 TRACE_RET(chip, STATUS_FAIL);
3237                                         }
3238                                 }
3239
3240                                 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3241                                 if (retval != STATUS_SUCCESS) {
3242                                         TRACE_RET(chip, STATUS_FAIL);
3243                                 }
3244                         }
3245
3246                         if ((page_addr == (end_page - 1)) || (page_addr == ms_card->page_off)) {
3247                                 if (!(val & INT_REG_CED)) {
3248                                         ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3249                                         TRACE_RET(chip, STATUS_FAIL);
3250                                 }
3251                         }
3252                 }
3253
3254                 if (scsi_sg_count(chip->srb) == 0)
3255                         ptr += 512;
3256         }
3257
3258         return STATUS_SUCCESS;
3259 }
3260
3261
3262 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3263                 u16 log_blk, u8 page_off)
3264 {
3265         struct ms_info *ms_card = &(chip->ms_card);
3266         int retval, seg_no;
3267
3268         retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3269                         page_off, ms_card->page_off + 1);
3270         if (retval != STATUS_SUCCESS) {
3271                 TRACE_RET(chip, STATUS_FAIL);
3272         }
3273
3274         seg_no = old_blk >> 9;
3275
3276         if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3277                 MS_CLR_BAD_BLOCK_FLG(ms_card);
3278                 ms_set_bad_block(chip, old_blk);
3279         } else {
3280                 retval = ms_erase_block(chip, old_blk);
3281                 if (retval == STATUS_SUCCESS) {
3282                         ms_set_unused_block(chip, old_blk);
3283                 }
3284         }
3285
3286         ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3287
3288         return STATUS_SUCCESS;
3289 }
3290
3291 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3292                 u16 log_blk, u8 start_page)
3293 {
3294         int retval;
3295
3296         if (start_page) {
3297                 retval = ms_copy_page(chip, old_blk, new_blk, log_blk, 0, start_page);
3298                 if (retval != STATUS_SUCCESS) {
3299                         TRACE_RET(chip, STATUS_FAIL);
3300                 }
3301         }
3302
3303         return STATUS_SUCCESS;
3304 }
3305
3306 #ifdef MS_DELAY_WRITE
3307 int ms_delay_write(struct rtsx_chip *chip)
3308 {
3309         struct ms_info *ms_card = &(chip->ms_card);
3310         struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3311         int retval;
3312
3313         if (delay_write->delay_write_flag) {
3314                 retval = ms_set_init_para(chip);
3315                 if (retval != STATUS_SUCCESS) {
3316                         TRACE_RET(chip, STATUS_FAIL);
3317                 }
3318
3319                 delay_write->delay_write_flag = 0;
3320                 retval = ms_finish_write(chip,
3321                                 delay_write->old_phyblock, delay_write->new_phyblock,
3322                                 delay_write->logblock, delay_write->pageoff);
3323                 if (retval != STATUS_SUCCESS) {
3324                         TRACE_RET(chip, STATUS_FAIL);
3325                 }
3326         }
3327
3328         return STATUS_SUCCESS;
3329 }
3330 #endif
3331
3332 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3333 {
3334         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3335                 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3336         } else {
3337                 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3338         }
3339 }
3340
3341 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3342 {
3343         struct ms_info *ms_card = &(chip->ms_card);
3344         unsigned int lun = SCSI_LUN(srb);
3345         int retval, seg_no;
3346         unsigned int index = 0, offset = 0;
3347         u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3348         u8 start_page, end_page = 0, page_cnt;
3349         u8 *ptr;
3350 #ifdef MS_DELAY_WRITE
3351         struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3352 #endif
3353
3354         ms_set_err_code(chip, MS_NO_ERROR);
3355
3356         ms_card->cleanup_counter = 0;
3357
3358         ptr = (u8 *)scsi_sglist(srb);
3359
3360         retval = ms_switch_clock(chip);
3361         if (retval != STATUS_SUCCESS) {
3362                 ms_rw_fail(srb, chip);
3363                 TRACE_RET(chip, STATUS_FAIL);
3364         }
3365
3366         log_blk = (u16)(start_sector >> ms_card->block_shift);
3367         start_page = (u8)(start_sector & ms_card->page_off);
3368
3369         for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3370                 if (log_blk < ms_start_idx[seg_no+1])
3371                         break;
3372         }
3373
3374         if (ms_card->segment[seg_no].build_flag == 0) {
3375                 retval = ms_build_l2p_tbl(chip, seg_no);
3376                 if (retval != STATUS_SUCCESS) {
3377                         chip->card_fail |= MS_CARD;
3378                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3379                         TRACE_RET(chip, STATUS_FAIL);
3380                 }
3381         }
3382
3383         if (srb->sc_data_direction == DMA_TO_DEVICE) {
3384 #ifdef MS_DELAY_WRITE
3385                 if (delay_write->delay_write_flag &&
3386                                 (delay_write->logblock == log_blk) &&
3387                                 (start_page > delay_write->pageoff)) {
3388                         delay_write->delay_write_flag = 0;
3389                         retval = ms_copy_page(chip,
3390                                 delay_write->old_phyblock,
3391                                 delay_write->new_phyblock, log_blk,
3392                                 delay_write->pageoff, start_page);
3393                         if (retval != STATUS_SUCCESS) {
3394                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3395                                 TRACE_RET(chip, STATUS_FAIL);
3396                         }
3397                         old_blk = delay_write->old_phyblock;
3398                         new_blk = delay_write->new_phyblock;
3399                 } else if (delay_write->delay_write_flag &&
3400                                 (delay_write->logblock == log_blk) &&
3401                                 (start_page == delay_write->pageoff)) {
3402                         delay_write->delay_write_flag = 0;
3403                         old_blk = delay_write->old_phyblock;
3404                         new_blk = delay_write->new_phyblock;
3405                 } else {
3406                         retval = ms_delay_write(chip);
3407                         if (retval != STATUS_SUCCESS) {
3408                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3409                                 TRACE_RET(chip, STATUS_FAIL);
3410                         }
3411 #endif
3412                         old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3413                         new_blk  = ms_get_unused_block(chip, seg_no);
3414                         if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3415                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3416                                 TRACE_RET(chip, STATUS_FAIL);
3417                         }
3418
3419                         retval = ms_prepare_write(chip, old_blk, new_blk, log_blk, start_page);
3420                         if (retval != STATUS_SUCCESS) {
3421                                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3422                                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3423                                         TRACE_RET(chip, STATUS_FAIL);
3424                                 }
3425                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
3426                                 TRACE_RET(chip, STATUS_FAIL);
3427                         }
3428 #ifdef MS_DELAY_WRITE
3429                 }
3430 #endif
3431         } else {
3432 #ifdef MS_DELAY_WRITE
3433                 retval = ms_delay_write(chip);
3434                 if (retval != STATUS_SUCCESS) {
3435                         if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3436                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3437                                 TRACE_RET(chip, STATUS_FAIL);
3438                         }
3439                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3440                         TRACE_RET(chip, STATUS_FAIL);
3441                 }
3442 #endif
3443                 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3444                 if (old_blk == 0xFFFF) {
3445                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3446                         TRACE_RET(chip, STATUS_FAIL);
3447                 }
3448         }
3449
3450         RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk);
3451
3452         while (total_sec_cnt) {
3453                 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1)) {
3454                         end_page = ms_card->page_off + 1;
3455                 } else {
3456                         end_page = start_page + (u8)total_sec_cnt;
3457                 }
3458                 page_cnt = end_page - start_page;
3459
3460                 RTSX_DEBUGP("start_page = %d, end_page = %d, page_cnt = %d\n",
3461                                 start_page, end_page, page_cnt);
3462
3463                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3464                         retval = ms_read_multiple_pages(chip,
3465                                 old_blk, log_blk, start_page, end_page,
3466                                 ptr, &index, &offset);
3467                 } else {
3468                         retval = ms_write_multiple_pages(chip, old_blk,
3469                                 new_blk, log_blk, start_page, end_page,
3470                                 ptr, &index, &offset);
3471                 }
3472
3473                 if (retval != STATUS_SUCCESS) {
3474                         toggle_gpio(chip, 1);
3475                         if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3476                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3477                                 TRACE_RET(chip, STATUS_FAIL);
3478                         }
3479                         ms_rw_fail(srb, chip);
3480                         TRACE_RET(chip, STATUS_FAIL);
3481                 }
3482
3483                 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3484                         if (end_page == (ms_card->page_off + 1)) {
3485                                 retval = ms_erase_block(chip, old_blk);
3486                                 if (retval == STATUS_SUCCESS) {
3487                                         ms_set_unused_block(chip, old_blk);
3488                                 }
3489                                 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3490                         }
3491                 }
3492
3493                 total_sec_cnt -= page_cnt;
3494                 if (scsi_sg_count(srb) == 0)
3495                         ptr += page_cnt * 512;
3496
3497                 if (total_sec_cnt == 0)
3498                         break;
3499
3500                 log_blk++;
3501
3502                 for (seg_no = 0; seg_no < sizeof(ms_start_idx)/2; seg_no++) {
3503                         if (log_blk < ms_start_idx[seg_no+1])
3504                                 break;
3505                 }
3506
3507                 if (ms_card->segment[seg_no].build_flag == 0) {
3508                         retval = ms_build_l2p_tbl(chip, seg_no);
3509                         if (retval != STATUS_SUCCESS) {
3510                                 chip->card_fail |= MS_CARD;
3511                                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3512                                 TRACE_RET(chip, STATUS_FAIL);
3513                         }
3514                 }
3515
3516                 old_blk = ms_get_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no]);
3517                 if (old_blk == 0xFFFF) {
3518                         ms_rw_fail(srb, chip);
3519                         TRACE_RET(chip, STATUS_FAIL);
3520                 }
3521
3522                 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3523                         new_blk = ms_get_unused_block(chip, seg_no);
3524                         if (new_blk == 0xFFFF) {
3525                                 ms_rw_fail(srb, chip);
3526                                 TRACE_RET(chip, STATUS_FAIL);
3527                         }
3528                 }
3529
3530                 RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk);
3531
3532                 start_page = 0;
3533         }
3534
3535         if (srb->sc_data_direction == DMA_TO_DEVICE) {
3536                 if (end_page < (ms_card->page_off + 1)) {
3537 #ifdef MS_DELAY_WRITE
3538                         delay_write->delay_write_flag = 1;
3539                         delay_write->old_phyblock = old_blk;
3540                         delay_write->new_phyblock = new_blk;
3541                         delay_write->logblock = log_blk;
3542                         delay_write->pageoff = end_page;
3543 #else
3544                         retval = ms_finish_write(chip, old_blk, new_blk, log_blk, end_page);
3545                         if (retval != STATUS_SUCCESS) {
3546                                 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3547                                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3548                                         TRACE_RET(chip, STATUS_FAIL);
3549                                 }
3550
3551                                 ms_rw_fail(srb, chip);
3552                                 TRACE_RET(chip, STATUS_FAIL);
3553                         }
3554 #endif
3555                 }
3556         }
3557
3558         scsi_set_resid(srb, 0);
3559
3560         return STATUS_SUCCESS;
3561 }
3562
3563 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt)
3564 {
3565         struct ms_info *ms_card = &(chip->ms_card);
3566         int retval;
3567
3568         if (CHK_MSPRO(ms_card)) {
3569                 retval = mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt);
3570         } else {
3571                 retval = ms_rw_multi_sector(srb, chip, start_sector, sector_cnt);
3572         }
3573
3574         return retval;
3575 }
3576
3577
3578 void ms_free_l2p_tbl(struct rtsx_chip *chip)
3579 {
3580         struct ms_info *ms_card = &(chip->ms_card);
3581         int i = 0;
3582
3583         if (ms_card->segment != NULL) {
3584                 for (i = 0; i < ms_card->segment_cnt; i++) {
3585                         if (ms_card->segment[i].l2p_table != NULL) {
3586                                 vfree(ms_card->segment[i].l2p_table);
3587                                 ms_card->segment[i].l2p_table = NULL;
3588                         }
3589                         if (ms_card->segment[i].free_table != NULL) {
3590                                 vfree(ms_card->segment[i].free_table);
3591                                 ms_card->segment[i].free_table = NULL;
3592                         }
3593                 }
3594                 vfree(ms_card->segment);
3595                 ms_card->segment = NULL;
3596         }
3597 }
3598
3599 #ifdef SUPPORT_MAGIC_GATE
3600
3601 #ifdef READ_BYTES_WAIT_INT
3602 static int ms_poll_int(struct rtsx_chip *chip)
3603 {
3604         int retval;
3605         u8 val;
3606
3607         rtsx_init_cmd(chip);
3608
3609         rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3610
3611         retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3612         if (retval != STATUS_SUCCESS) {
3613                 TRACE_RET(chip, STATUS_FAIL);
3614         }
3615
3616         val = *rtsx_get_cmd_data(chip);
3617         if (val & MS_INT_ERR) {
3618                 TRACE_RET(chip, STATUS_FAIL);
3619         }
3620
3621         return STATUS_SUCCESS;
3622 }
3623 #endif
3624
3625 #ifdef MS_SAMPLE_INT_ERR
3626 static int check_ms_err(struct rtsx_chip *chip)
3627 {
3628         int retval;
3629         u8 val;
3630
3631         retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3632         if (retval != STATUS_SUCCESS)
3633                 return 1;
3634         if (val & MS_TRANSFER_ERR)
3635                 return 1;
3636
3637         retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3638         if (retval != STATUS_SUCCESS)
3639                 return 1;
3640
3641         if (val & (MS_INT_ERR | MS_INT_CMDNK))
3642                 return 1;
3643
3644         return 0;
3645 }
3646 #else
3647 static int check_ms_err(struct rtsx_chip *chip)
3648 {
3649         int retval;
3650         u8 val;
3651
3652         retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3653         if (retval != STATUS_SUCCESS)
3654                 return 1;
3655         if (val & MS_TRANSFER_ERR)
3656                 return 1;
3657
3658         return 0;
3659 }
3660 #endif
3661
3662 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3663 {
3664         int retval, i;
3665         u8 data[8];
3666
3667         data[0] = cmd;
3668         data[1] = 0;
3669         data[2] = 0;
3670         data[3] = 0;
3671         data[4] = 0;
3672         data[5] = 0;
3673         data[6] = entry_num;
3674         data[7] = 0;
3675
3676         for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3677                 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT, data, 8);
3678                 if (retval == STATUS_SUCCESS)
3679                         break;
3680         }
3681         if (i == MS_MAX_RETRY_COUNT) {
3682                 TRACE_RET(chip, STATUS_FAIL);
3683         }
3684
3685         if (check_ms_err(chip)) {
3686                 rtsx_clear_ms_error(chip);
3687                 TRACE_RET(chip, STATUS_FAIL);
3688         }
3689
3690         return STATUS_SUCCESS;
3691 }
3692
3693 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num)
3694 {
3695         int retval;
3696         u8 buf[6];
3697
3698         RTSX_DEBUGP("--%s--\n", __func__);
3699
3700         if (type == 0) {
3701                 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
3702         } else {
3703                 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
3704         }
3705         if (retval != STATUS_SUCCESS) {
3706                 TRACE_RET(chip, STATUS_FAIL);
3707         }
3708
3709         buf[0] = 0;
3710         buf[1] = 0;
3711         if (type == 1) {
3712                 buf[2] = 0;
3713                 buf[3] = 0;
3714                 buf[4] = 0;
3715                 buf[5] = mg_entry_num;
3716         }
3717         retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, NO_WAIT_INT, buf, 6);
3718         if (retval != STATUS_SUCCESS) {
3719                 TRACE_RET(chip, STATUS_FAIL);
3720         }
3721
3722         return STATUS_SUCCESS;
3723 }
3724
3725 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3726 {
3727         int retval;
3728         int i;
3729         unsigned int lun = SCSI_LUN(srb);
3730         u8 buf1[32], buf2[12];
3731
3732         RTSX_DEBUGP("--%s--\n", __func__);
3733
3734         if (scsi_bufflen(srb) < 12) {
3735                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3736                 TRACE_RET(chip, STATUS_FAIL);
3737         }
3738
3739         ms_cleanup_work(chip);
3740
3741         retval = ms_switch_clock(chip);
3742         if (retval != STATUS_SUCCESS) {
3743                 TRACE_RET(chip, STATUS_FAIL);
3744         }
3745
3746         retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3747         if (retval != STATUS_SUCCESS) {
3748                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3749                 TRACE_RET(chip, STATUS_FAIL);
3750         }
3751
3752         memset(buf1, 0, 32);
3753         rtsx_stor_get_xfer_buf(buf2, min(12, (int)scsi_bufflen(srb)), srb);
3754         for (i = 0; i < 8; i++) {
3755                 buf1[8+i] = buf2[4+i];
3756         }
3757         retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32);
3758         if (retval != STATUS_SUCCESS) {
3759                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3760                 TRACE_RET(chip, STATUS_FAIL);
3761         }
3762         if (check_ms_err(chip)) {
3763                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3764                 rtsx_clear_ms_error(chip);
3765                 TRACE_RET(chip, STATUS_FAIL);
3766         }
3767
3768         return STATUS_SUCCESS;
3769 }
3770
3771 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3772 {
3773         int retval = STATUS_FAIL;
3774         int bufflen;
3775         unsigned int lun = SCSI_LUN(srb);
3776         u8 *buf = NULL;
3777
3778         RTSX_DEBUGP("--%s--\n", __func__);
3779
3780         ms_cleanup_work(chip);
3781
3782         retval = ms_switch_clock(chip);
3783         if (retval != STATUS_SUCCESS) {
3784                 TRACE_RET(chip, STATUS_FAIL);
3785         }
3786
3787         buf = kmalloc(1540, GFP_KERNEL);
3788         if (!buf) {
3789                 TRACE_RET(chip, STATUS_ERROR);
3790         }
3791
3792         buf[0] = 0x04;
3793         buf[1] = 0x1A;
3794         buf[2] = 0x00;
3795         buf[3] = 0x00;
3796
3797         retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3798         if (retval != STATUS_SUCCESS) {
3799                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3800                 TRACE_GOTO(chip, GetEKBFinish);
3801         }
3802
3803         retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3804                                 3, WAIT_INT, 0, 0, buf + 4, 1536);
3805         if (retval != STATUS_SUCCESS) {
3806                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3807                 rtsx_clear_ms_error(chip);
3808                 TRACE_GOTO(chip, GetEKBFinish);
3809         }
3810         if (check_ms_err(chip)) {
3811                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3812                 rtsx_clear_ms_error(chip);
3813                 TRACE_RET(chip, STATUS_FAIL);
3814         }
3815
3816         bufflen = min(1052, (int)scsi_bufflen(srb));
3817         rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3818
3819 GetEKBFinish:
3820         kfree(buf);
3821         return retval;
3822 }
3823
3824 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3825 {
3826         struct ms_info *ms_card = &(chip->ms_card);
3827         int retval;
3828         int bufflen;
3829         int i;
3830         unsigned int lun = SCSI_LUN(srb);
3831         u8 buf[32];
3832
3833         RTSX_DEBUGP("--%s--\n", __func__);
3834
3835         ms_cleanup_work(chip);
3836
3837         retval = ms_switch_clock(chip);
3838         if (retval != STATUS_SUCCESS) {
3839                 TRACE_RET(chip, STATUS_FAIL);
3840         }
3841
3842         retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3843         if (retval != STATUS_SUCCESS) {
3844                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3845                 TRACE_RET(chip, STATUS_FAIL);
3846         }
3847
3848         retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf, 32);
3849         if (retval != STATUS_SUCCESS) {
3850                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3851                 TRACE_RET(chip, STATUS_FAIL);
3852         }
3853         if (check_ms_err(chip)) {
3854                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3855                 rtsx_clear_ms_error(chip);
3856                 TRACE_RET(chip, STATUS_FAIL);
3857         }
3858
3859         memcpy(ms_card->magic_gate_id, buf, 16);
3860
3861 #ifdef READ_BYTES_WAIT_INT
3862         retval = ms_poll_int(chip);
3863         if (retval != STATUS_SUCCESS) {
3864                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3865                 TRACE_RET(chip, STATUS_FAIL);
3866         }
3867 #endif
3868
3869         retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3870         if (retval != STATUS_SUCCESS) {
3871                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3872                 TRACE_RET(chip, STATUS_FAIL);
3873         }
3874
3875         bufflen = min(12, (int)scsi_bufflen(srb));
3876         rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3877
3878         for (i = 0; i < 8; i++) {
3879                 buf[i] = buf[4+i];
3880         }
3881         for (i = 0; i < 24; i++) {
3882                 buf[8+i] = 0;
3883         }
3884         retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3885                                 32, WAIT_INT, buf, 32);
3886         if (retval != STATUS_SUCCESS) {
3887                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3888                 TRACE_RET(chip, STATUS_FAIL);
3889         }
3890         if (check_ms_err(chip)) {
3891                 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3892                 rtsx_clear_ms_error(chip);
3893                 TRACE_RET(chip, STATUS_FAIL);
3894         }
3895
3896         ms_card->mg_auth = 0;
3897
3898         return STATUS_SUCCESS;
3899 }
3900
3901 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3902 {
3903         struct ms_info *ms_card = &(chip->ms_card);
3904         int retval;
3905         int bufflen;
3906         unsigned int lun = SCSI_LUN(srb);
3907         u8 buf1[32], buf2[36];
3908
3909         RTSX_DEBUGP("--%s--\n", __func__);
3910
3911         ms_cleanup_work(chip);
3912
3913         retval = ms_switch_clock(chip);
3914         if (retval != STATUS_SUCCESS) {
3915                 TRACE_RET(chip, STATUS_FAIL);
3916         }
3917
3918         retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3919         if (retval != STATUS_SUCCESS) {
3920                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3921                 TRACE_RET(chip, STATUS_FAIL);
3922         }
3923
3924         retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT, buf1, 32);
3925         if (retval != STATUS_SUCCESS) {
3926                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3927                 TRACE_RET(chip, STATUS_FAIL);
3928         }
3929         if (check_ms_err(chip)) {
3930                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3931                 rtsx_clear_ms_error(chip);
3932                 TRACE_RET(chip, STATUS_FAIL);
3933         }
3934
3935         buf2[0] = 0x00;
3936         buf2[1] = 0x22;
3937         buf2[2] = 0x00;
3938         buf2[3] = 0x00;
3939
3940         memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
3941         memcpy(buf2 + 20, buf1, 16);
3942
3943         bufflen = min(36, (int)scsi_bufflen(srb));
3944         rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
3945
3946 #ifdef READ_BYTES_WAIT_INT
3947         retval = ms_poll_int(chip);
3948         if (retval != STATUS_SUCCESS) {
3949                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3950                 TRACE_RET(chip, STATUS_FAIL);
3951         }
3952 #endif
3953
3954         return STATUS_SUCCESS;
3955 }
3956
3957 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3958 {
3959         struct ms_info *ms_card = &(chip->ms_card);
3960         int retval;
3961         int i;
3962         int bufflen;
3963         unsigned int lun = SCSI_LUN(srb);
3964         u8 buf[32];
3965
3966         RTSX_DEBUGP("--%s--\n", __func__);
3967
3968         ms_cleanup_work(chip);
3969
3970         retval = ms_switch_clock(chip);
3971         if (retval != STATUS_SUCCESS) {
3972                 TRACE_RET(chip, STATUS_FAIL);
3973         }
3974
3975         retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
3976         if (retval != STATUS_SUCCESS) {
3977                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3978                 TRACE_RET(chip, STATUS_FAIL);
3979         }
3980
3981         bufflen = min(12, (int)scsi_bufflen(srb));
3982         rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3983
3984         for (i = 0; i < 8; i++) {
3985                 buf[i] = buf[4+i];
3986         }
3987         for (i = 0; i < 24; i++) {
3988                 buf[8+i] = 0;
3989         }
3990         retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32);
3991         if (retval != STATUS_SUCCESS) {
3992                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3993                 TRACE_RET(chip, STATUS_FAIL);
3994         }
3995         if (check_ms_err(chip)) {
3996                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3997                 rtsx_clear_ms_error(chip);
3998                 TRACE_RET(chip, STATUS_FAIL);
3999         }
4000
4001         ms_card->mg_auth = 1;
4002
4003         return STATUS_SUCCESS;
4004 }
4005
4006 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4007 {
4008         struct ms_info *ms_card = &(chip->ms_card);
4009         int retval;
4010         int bufflen;
4011         unsigned int lun = SCSI_LUN(srb);
4012         u8 *buf = NULL;
4013
4014         RTSX_DEBUGP("--%s--\n", __func__);
4015
4016         ms_cleanup_work(chip);
4017
4018         retval = ms_switch_clock(chip);
4019         if (retval != STATUS_SUCCESS) {
4020                 TRACE_RET(chip, STATUS_FAIL);
4021         }
4022
4023         buf = kmalloc(1028, GFP_KERNEL);
4024         if (!buf) {
4025                 TRACE_RET(chip, STATUS_ERROR);
4026         }
4027
4028         buf[0] = 0x04;
4029         buf[1] = 0x02;
4030         buf[2] = 0x00;
4031         buf[3] = 0x00;
4032
4033         retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4034         if (retval != STATUS_SUCCESS) {
4035                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4036                 TRACE_GOTO(chip, GetICVFinish);
4037         }
4038
4039         retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4040                                 2, WAIT_INT, 0, 0, buf + 4, 1024);
4041         if (retval != STATUS_SUCCESS) {
4042                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4043                 rtsx_clear_ms_error(chip);
4044                 TRACE_GOTO(chip, GetICVFinish);
4045         }
4046         if (check_ms_err(chip)) {
4047                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4048                 rtsx_clear_ms_error(chip);
4049                 TRACE_RET(chip, STATUS_FAIL);
4050         }
4051
4052         bufflen = min(1028, (int)scsi_bufflen(srb));
4053         rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4054
4055 GetICVFinish:
4056         kfree(buf);
4057         return retval;
4058 }
4059
4060 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4061 {
4062         struct ms_info *ms_card = &(chip->ms_card);
4063         int retval;
4064         int bufflen;
4065 #ifdef MG_SET_ICV_SLOW
4066         int i;
4067 #endif
4068         unsigned int lun = SCSI_LUN(srb);
4069         u8 *buf = NULL;
4070
4071         RTSX_DEBUGP("--%s--\n", __func__);
4072
4073         ms_cleanup_work(chip);
4074
4075         retval = ms_switch_clock(chip);
4076         if (retval != STATUS_SUCCESS) {
4077                 TRACE_RET(chip, STATUS_FAIL);
4078         }
4079
4080         buf = kmalloc(1028, GFP_KERNEL);
4081         if (!buf) {
4082                 TRACE_RET(chip, STATUS_ERROR);
4083         }
4084
4085         bufflen = min(1028, (int)scsi_bufflen(srb));
4086         rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4087
4088         retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4089         if (retval != STATUS_SUCCESS) {
4090                 if (ms_card->mg_auth == 0) {
4091                         if ((buf[5] & 0xC0) != 0) {
4092                                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4093                         } else {
4094                                 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4095                         }
4096                 } else {
4097                         set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4098                 }
4099                 TRACE_GOTO(chip, SetICVFinish);
4100         }
4101
4102 #ifdef MG_SET_ICV_SLOW
4103         for (i = 0; i < 2; i++) {
4104                 udelay(50);
4105
4106                 rtsx_init_cmd(chip);
4107
4108                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, PRO_WRITE_LONG_DATA);
4109                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4110                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
4111
4112                 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4113
4114                 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4115                                 MS_TRANSFER_START |  MS_TM_NORMAL_WRITE);
4116                 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
4117
4118                 rtsx_send_cmd_no_wait(chip);
4119
4120                 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512, 512, 0, DMA_TO_DEVICE, 3000);
4121                 if ((retval < 0) || check_ms_err(chip)) {
4122                         rtsx_clear_ms_error(chip);
4123                         if (ms_card->mg_auth == 0) {
4124                                 if ((buf[5] & 0xC0) != 0) {
4125                                         set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4126                                 } else {
4127                                         set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4128                                 }
4129                         } else {
4130                                 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4131                         }
4132                         retval = STATUS_FAIL;
4133                         TRACE_GOTO(chip, SetICVFinish);
4134                 }
4135         }
4136 #else
4137         retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4138                                 2, WAIT_INT, 0, 0, buf + 4, 1024);
4139         if ((retval != STATUS_SUCCESS) || check_ms_err(chip) {
4140                 rtsx_clear_ms_error(chip);
4141                 if (ms_card->mg_auth == 0) {
4142                         if ((buf[5] & 0xC0) != 0) {
4143                                 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4144                         } else {
4145                                 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4146                         }
4147                 } else {
4148                         set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4149                 }
4150                 TRACE_GOTO(chip, SetICVFinish);
4151         }
4152 #endif
4153
4154 SetICVFinish:
4155         kfree(buf);
4156         return retval;
4157 }
4158
4159 #endif /* SUPPORT_MAGIC_GATE */
4160
4161 void ms_cleanup_work(struct rtsx_chip *chip)
4162 {
4163         struct ms_info *ms_card = &(chip->ms_card);
4164
4165         if (CHK_MSPRO(ms_card)) {
4166                 if (ms_card->seq_mode) {
4167                         RTSX_DEBUGP("MS Pro: stop transmission\n");
4168                         mspro_stop_seq_mode(chip);
4169                         ms_card->cleanup_counter = 0;
4170                 }
4171                 if (CHK_MSHG(ms_card)) {
4172                         rtsx_write_register(chip, MS_CFG,
4173                                 MS_2K_SECTOR_MODE, 0x00);
4174                 }
4175         }
4176 #ifdef MS_DELAY_WRITE
4177         else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
4178                 RTSX_DEBUGP("MS: delay write\n");
4179                 ms_delay_write(chip);
4180                 ms_card->cleanup_counter = 0;
4181         }
4182 #endif
4183 }
4184
4185 int ms_power_off_card3v3(struct rtsx_chip *chip)
4186 {
4187         int retval;
4188
4189         retval = disable_card_clock(chip, MS_CARD);
4190         if (retval != STATUS_SUCCESS) {
4191                 TRACE_RET(chip, STATUS_FAIL);
4192         }
4193         if (chip->asic_code) {
4194                 retval = ms_pull_ctl_disable(chip);
4195                 if (retval != STATUS_SUCCESS) {
4196                         TRACE_RET(chip, STATUS_FAIL);
4197                 }
4198         } else {
4199                 RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
4200                         FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT);
4201         }
4202         RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0);
4203         if (!chip->ft2_fast_mode) {
4204                 retval = card_power_off(chip, MS_CARD);
4205                 if (retval != STATUS_SUCCESS) {
4206                         TRACE_RET(chip, STATUS_FAIL);
4207                 }
4208         }
4209
4210         return STATUS_SUCCESS;
4211 }
4212
4213 int release_ms_card(struct rtsx_chip *chip)
4214 {
4215         struct ms_info *ms_card = &(chip->ms_card);
4216         int retval;
4217
4218         RTSX_DEBUGP("release_ms_card\n");
4219
4220 #ifdef MS_DELAY_WRITE
4221         ms_card->delay_write.delay_write_flag = 0;
4222 #endif
4223         ms_card->pro_under_formatting = 0;
4224
4225         chip->card_ready &= ~MS_CARD;
4226         chip->card_fail &= ~MS_CARD;
4227         chip->card_wp &= ~MS_CARD;
4228
4229         ms_free_l2p_tbl(chip);
4230
4231         memset(ms_card->raw_sys_info, 0, 96);
4232 #ifdef SUPPORT_PCGL_1P18
4233         memset(ms_card->raw_model_name, 0, 48);
4234 #endif
4235
4236         retval = ms_power_off_card3v3(chip);
4237         if (retval != STATUS_SUCCESS) {
4238                 TRACE_RET(chip, STATUS_FAIL);
4239         }
4240
4241         return STATUS_SUCCESS;
4242 }
4243