drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #ifndef RT30xx
  42 #ifdef RT2860
  43 #include "firmware.h"
  44 #include <linux/bitrev.h>
  45 #endif
  46 #ifdef RT2870
  47 #include "../../rt2870/common/firmware.h"
  48 #endif
  49 #endif
  50 #ifdef RT30xx
  51 #include "../../rt3070/firmware.h"
  52 #endif
  53
  54 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  55 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  56                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  57                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  58                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  59                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  60                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  61                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  62                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  63
  64 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  65
  66 const unsigned short ccitt_16Table[] = {
  67         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  68         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  69         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  70         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  71         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  72         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  73         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  74         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  75         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  76         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  77         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  78         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  79         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  80         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  81         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  82         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  83         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  84         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  85         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  86         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  87         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  88         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  89         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  90         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  91         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  92         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  93         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  94         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  95         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  96         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  97         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  98         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  99 };
 100 #define ByteCRC16(v, crc) \
 101         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
 102
 103 #ifdef RT2870
 104 unsigned char BitReverse(unsigned char x)
 105 {
 106         int i;
 107         unsigned char Temp=0;
 108         for(i=0; ; i++)
 109         {
 110                 if(x & 0x80)    Temp |= 0x80;
 111                 if(i==7)                break;
 112                 x       <<= 1;
 113                 Temp >>= 1;
 114         }
 115         return Temp;
 116 }
 117 #endif
 118
 119 //
 120 // BBP register initialization set
 121 //
 122 REG_PAIR   BBPRegTable[] = {
 123         {BBP_R65,               0x2C},          // fix rssi issue
 124         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
 125         {BBP_R69,               0x12},
 126         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 127         {BBP_R73,               0x10},
 128         {BBP_R81,               0x37},
 129         {BBP_R82,               0x62},
 130         {BBP_R83,               0x6A},
 131         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 132         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 133         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 134         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 135         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 136         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 137 };
 138 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 139
 140 //
 141 // RF register initialization set
 142 //
 143 #ifdef RT2870
 144 REG_PAIR   RT30xx_RFRegTable[] = {
 145         {RF_R04,          0x40},
 146         {RF_R05,          0x03},
 147         {RF_R06,          0x02},
 148         {RF_R07,          0x70},
 149         {RF_R09,          0x0F},
 150 #ifndef RT30xx
 151         {RF_R10,          0x71},
 152 #endif
 153 #ifdef RT30xx
 154         {RF_R10,          0x41},
 155 #endif
 156         {RF_R11,          0x21},
 157         {RF_R12,          0x7B},
 158         {RF_R14,          0x90},
 159         {RF_R15,          0x58},
 160         {RF_R16,          0xB3},
 161         {RF_R17,          0x92},
 162         {RF_R18,          0x2C},
 163         {RF_R19,          0x02},
 164         {RF_R20,          0xBA},
 165         {RF_R21,          0xDB},
 166         {RF_R24,          0x16},
 167         {RF_R25,          0x01},
 168 #ifndef RT30xx
 169         {RF_R27,          0x03},
 170 #endif
 171         {RF_R29,          0x1F},
 172 };
 173 #define NUM_RF_REG_PARMS        (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
 174 #endif // RT2870 //
 175
 176 //
 177 // ASIC register initialization sets
 178 //
 179
 180 RTMP_REG_PAIR   MACRegTable[] = {
 181 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 182         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 183         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 184 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 185         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 186         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 187 #else
 188     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 189 #endif // HW_BEACON_OFFSET //
 190
 191         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 192         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 193         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 194         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 195         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 196         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 197         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 198         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 199         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 200         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 201         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 202         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 203         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 204         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 205         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 206         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 207 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
 208 #ifdef RT2870
 209         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 210         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 211         {WPDMA_GLO_CFG,                 0x00000030},
 212 #endif // RT2870 //
 213         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 214         {GF40_PROT_CFG,                 0x03F44084},
 215         {MM20_PROT_CFG,                 0x01744004},
 216 #ifdef RT2860
 217         {MM40_PROT_CFG,                 0x03F54084},
 218 #endif
 219         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 220         {TX_RTS_CFG,                    0x00092b20},
 221         {EXP_ACK_TIME,                  0x002400ca},    // default value
 222         {TXOP_HLDR_ET,                  0x00000002},
 223
 224         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 225                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 226                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 227                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 228         {XIFS_TIME_CFG,                 0x33a41010},
 229         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 230 };
 231
 232 RTMP_REG_PAIR   STAMACRegTable[] =      {
 233         {WMM_AIFSN_CFG,         0x00002273},
 234         {WMM_CWMIN_CFG, 0x00002344},
 235         {WMM_CWMAX_CFG, 0x000034aa},
 236 };
 237
 238 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 239 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 240
 241 #ifdef RT2870
 242 //
 243 // RT2870 Firmware Spec only used 1 oct for version expression
 244 //
 245 #define FIRMWARE_MINOR_VERSION  7
 246
 247 #endif // RT2870 //
 248
 249 // New 8k byte firmware size for RT3071/RT3072
 250 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 251 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 252 #define FIRMWARE_MAJOR_VERSION  0
 253
 254 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 255 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 256
 257 #ifdef RT2860
 258 #define FIRMWARE_MINOR_VERSION  2
 259 #endif
 260
 261
 262 /*
 263         ========================================================================
 264
 265         Routine Description:
 266                 Allocate RTMP_ADAPTER data block and do some initialization
 267
 268         Arguments:
 269                 Adapter         Pointer to our adapter
 270
 271         Return Value:
 272                 NDIS_STATUS_SUCCESS
 273                 NDIS_STATUS_FAILURE
 274
 275         IRQL = PASSIVE_LEVEL
 276
 277         Note:
 278
 279         ========================================================================
 280 */
 281 NDIS_STATUS     RTMPAllocAdapterBlock(
 282         IN  PVOID       handle,
 283         OUT     PRTMP_ADAPTER   *ppAdapter)
 284 {
 285         PRTMP_ADAPTER   pAd;
 286         NDIS_STATUS             Status;
 287         INT                     index;
 288         UCHAR                   *pBeaconBuf = NULL;
 289
 290         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 291
 292         *ppAdapter = NULL;
 293
 294         do
 295         {
 296                 // Allocate RTMP_ADAPTER memory block
 297                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 298                 if (pBeaconBuf == NULL)
 299                 {
 300                         Status = NDIS_STATUS_FAILURE;
 301                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 302                         break;
 303                 }
 304
 305                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 306                 if (Status != NDIS_STATUS_SUCCESS)
 307                 {
 308                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 309                         break;
 310                 }
 311                 pAd->BeaconBuf = pBeaconBuf;
 312                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 313
 314
 315                 // Init spin locks
 316                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 317 #ifdef RT2860
 318                 NdisAllocateSpinLock(&pAd->RxRingLock);
 319 #endif
 320
 321                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 322                 {
 323                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 324                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 325                         pAd->DeQueueRunning[index] = FALSE;
 326                 }
 327
 328                 NdisAllocateSpinLock(&pAd->irq_lock);
 329
 330         } while (FALSE);
 331
 332         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 333                 kfree(pBeaconBuf);
 334
 335         *ppAdapter = pAd;
 336
 337         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 338         return Status;
 339 }
 340
 341 /*
 342         ========================================================================
 343
 344         Routine Description:
 345                 Read initial Tx power per MCS and BW from EEPROM
 346
 347         Arguments:
 348                 Adapter                                         Pointer to our adapter
 349
 350         Return Value:
 351                 None
 352
 353         IRQL = PASSIVE_LEVEL
 354
 355         Note:
 356
 357         ========================================================================
 358 */
 359 VOID    RTMPReadTxPwrPerRate(
 360         IN      PRTMP_ADAPTER   pAd)
 361 {
 362         ULONG           data, Adata, Gdata;
 363         USHORT          i, value, value2;
 364         INT                     Apwrdelta, Gpwrdelta;
 365         UCHAR           t1,t2,t3,t4;
 366         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 367
 368         //
 369         // Get power delta for 20MHz and 40MHz.
 370         //
 371         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 372         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 373         Apwrdelta = 0;
 374         Gpwrdelta = 0;
 375
 376         if ((value2 & 0xff) != 0xff)
 377         {
 378                 if ((value2 & 0x80))
 379                         Gpwrdelta = (value2&0xf);
 380
 381                 if ((value2 & 0x40))
 382                         bGpwrdeltaMinus = FALSE;
 383                 else
 384                         bGpwrdeltaMinus = TRUE;
 385         }
 386         if ((value2 & 0xff00) != 0xff00)
 387         {
 388                 if ((value2 & 0x8000))
 389                         Apwrdelta = ((value2&0xf00)>>8);
 390
 391                 if ((value2 & 0x4000))
 392                         bApwrdeltaMinus = FALSE;
 393                 else
 394                         bApwrdeltaMinus = TRUE;
 395         }
 396         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 397
 398         //
 399         // Get Txpower per MCS for 20MHz in 2.4G.
 400         //
 401         for (i=0; i<5; i++)
 402         {
 403                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 404                 data = value;
 405                 if (bApwrdeltaMinus == FALSE)
 406                 {
 407                         t1 = (value&0xf)+(Apwrdelta);
 408                         if (t1 > 0xf)
 409                                 t1 = 0xf;
 410                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 411                         if (t2 > 0xf)
 412                                 t2 = 0xf;
 413                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 414                         if (t3 > 0xf)
 415                                 t3 = 0xf;
 416                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 417                         if (t4 > 0xf)
 418                                 t4 = 0xf;
 419                 }
 420                 else
 421                 {
 422                         if ((value&0xf) > Apwrdelta)
 423                                 t1 = (value&0xf)-(Apwrdelta);
 424                         else
 425                                 t1 = 0;
 426                         if (((value&0xf0)>>4) > Apwrdelta)
 427                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 428                         else
 429                                 t2 = 0;
 430                         if (((value&0xf00)>>8) > Apwrdelta)
 431                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 432                         else
 433                                 t3 = 0;
 434                         if (((value&0xf000)>>12) > Apwrdelta)
 435                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 436                         else
 437                                 t4 = 0;
 438                 }
 439                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 440                 if (bGpwrdeltaMinus == FALSE)
 441                 {
 442                         t1 = (value&0xf)+(Gpwrdelta);
 443                         if (t1 > 0xf)
 444                                 t1 = 0xf;
 445                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 446                         if (t2 > 0xf)
 447                                 t2 = 0xf;
 448                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 449                         if (t3 > 0xf)
 450                                 t3 = 0xf;
 451                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 452                         if (t4 > 0xf)
 453                                 t4 = 0xf;
 454                 }
 455                 else
 456                 {
 457                         if ((value&0xf) > Gpwrdelta)
 458                                 t1 = (value&0xf)-(Gpwrdelta);
 459                         else
 460                                 t1 = 0;
 461                         if (((value&0xf0)>>4) > Gpwrdelta)
 462                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 463                         else
 464                                 t2 = 0;
 465                         if (((value&0xf00)>>8) > Gpwrdelta)
 466                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 467                         else
 468                                 t3 = 0;
 469                         if (((value&0xf000)>>12) > Gpwrdelta)
 470                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 471                         else
 472                                 t4 = 0;
 473                 }
 474                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 475
 476                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 477                 if (bApwrdeltaMinus == FALSE)
 478                 {
 479                         t1 = (value&0xf)+(Apwrdelta);
 480                         if (t1 > 0xf)
 481                                 t1 = 0xf;
 482                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 483                         if (t2 > 0xf)
 484                                 t2 = 0xf;
 485                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 486                         if (t3 > 0xf)
 487                                 t3 = 0xf;
 488                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 489                         if (t4 > 0xf)
 490                                 t4 = 0xf;
 491                 }
 492                 else
 493                 {
 494                         if ((value&0xf) > Apwrdelta)
 495                                 t1 = (value&0xf)-(Apwrdelta);
 496                         else
 497                                 t1 = 0;
 498                         if (((value&0xf0)>>4) > Apwrdelta)
 499                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 500                         else
 501                                 t2 = 0;
 502                         if (((value&0xf00)>>8) > Apwrdelta)
 503                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 504                         else
 505                                 t3 = 0;
 506                         if (((value&0xf000)>>12) > Apwrdelta)
 507                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 508                         else
 509                                 t4 = 0;
 510                 }
 511                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 512                 if (bGpwrdeltaMinus == FALSE)
 513                 {
 514                         t1 = (value&0xf)+(Gpwrdelta);
 515                         if (t1 > 0xf)
 516                                 t1 = 0xf;
 517                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 518                         if (t2 > 0xf)
 519                                 t2 = 0xf;
 520                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 521                         if (t3 > 0xf)
 522                                 t3 = 0xf;
 523                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 524                         if (t4 > 0xf)
 525                                 t4 = 0xf;
 526                 }
 527                 else
 528                 {
 529                         if ((value&0xf) > Gpwrdelta)
 530                                 t1 = (value&0xf)-(Gpwrdelta);
 531                         else
 532                                 t1 = 0;
 533                         if (((value&0xf0)>>4) > Gpwrdelta)
 534                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 535                         else
 536                                 t2 = 0;
 537                         if (((value&0xf00)>>8) > Gpwrdelta)
 538                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 539                         else
 540                                 t3 = 0;
 541                         if (((value&0xf000)>>12) > Gpwrdelta)
 542                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 543                         else
 544                                 t4 = 0;
 545                 }
 546                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 547                 data |= (value<<16);
 548
 549                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 550                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 551
 552                 if (data != 0xffffffff)
 553                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 554                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 555         }
 556
 557         //
 558         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 559         //
 560         bValid = TRUE;
 561         for (i=0; i<6; i++)
 562         {
 563                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 564                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 565                 {
 566                         bValid = FALSE;
 567                         break;
 568                 }
 569         }
 570
 571         //
 572         // Get Txpower per MCS for 40MHz in 2.4G.
 573         //
 574         if (bValid)
 575         {
 576                 for (i=0; i<4; i++)
 577                 {
 578                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 579                         if (bGpwrdeltaMinus == FALSE)
 580                         {
 581                                 t1 = (value&0xf)+(Gpwrdelta);
 582                                 if (t1 > 0xf)
 583                                         t1 = 0xf;
 584                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 585                                 if (t2 > 0xf)
 586                                         t2 = 0xf;
 587                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 588                                 if (t3 > 0xf)
 589                                         t3 = 0xf;
 590                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 591                                 if (t4 > 0xf)
 592                                         t4 = 0xf;
 593                         }
 594                         else
 595                         {
 596                                 if ((value&0xf) > Gpwrdelta)
 597                                         t1 = (value&0xf)-(Gpwrdelta);
 598                                 else
 599                                         t1 = 0;
 600                                 if (((value&0xf0)>>4) > Gpwrdelta)
 601                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 602                                 else
 603                                         t2 = 0;
 604                                 if (((value&0xf00)>>8) > Gpwrdelta)
 605                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 606                                 else
 607                                         t3 = 0;
 608                                 if (((value&0xf000)>>12) > Gpwrdelta)
 609                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 610                                 else
 611                                         t4 = 0;
 612                         }
 613                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 614
 615                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 616                         if (bGpwrdeltaMinus == FALSE)
 617                         {
 618                                 t1 = (value&0xf)+(Gpwrdelta);
 619                                 if (t1 > 0xf)
 620                                         t1 = 0xf;
 621                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 622                                 if (t2 > 0xf)
 623                                         t2 = 0xf;
 624                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 625                                 if (t3 > 0xf)
 626                                         t3 = 0xf;
 627                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 628                                 if (t4 > 0xf)
 629                                         t4 = 0xf;
 630                         }
 631                         else
 632                         {
 633                                 if ((value&0xf) > Gpwrdelta)
 634                                         t1 = (value&0xf)-(Gpwrdelta);
 635                                 else
 636                                         t1 = 0;
 637                                 if (((value&0xf0)>>4) > Gpwrdelta)
 638                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 639                                 else
 640                                         t2 = 0;
 641                                 if (((value&0xf00)>>8) > Gpwrdelta)
 642                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 643                                 else
 644                                         t3 = 0;
 645                                 if (((value&0xf000)>>12) > Gpwrdelta)
 646                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 647                                 else
 648                                         t4 = 0;
 649                         }
 650                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 651
 652                         if (i == 0)
 653                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 654                         else
 655                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 656
 657                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 658                 }
 659         }
 660
 661         //
 662         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 663         //
 664         bValid = TRUE;
 665         for (i=0; i<8; i++)
 666         {
 667                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 668                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 669                 {
 670                         bValid = FALSE;
 671                         break;
 672                 }
 673         }
 674
 675         //
 676         // Get Txpower per MCS for 20MHz in 5G.
 677         //
 678         if (bValid)
 679         {
 680                 for (i=0; i<5; i++)
 681                 {
 682                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 683                         if (bApwrdeltaMinus == FALSE)
 684                         {
 685                                 t1 = (value&0xf)+(Apwrdelta);
 686                                 if (t1 > 0xf)
 687                                         t1 = 0xf;
 688                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 689                                 if (t2 > 0xf)
 690                                         t2 = 0xf;
 691                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 692                                 if (t3 > 0xf)
 693                                         t3 = 0xf;
 694                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 695                                 if (t4 > 0xf)
 696                                         t4 = 0xf;
 697                         }
 698                         else
 699                         {
 700                                 if ((value&0xf) > Apwrdelta)
 701                                         t1 = (value&0xf)-(Apwrdelta);
 702                                 else
 703                                         t1 = 0;
 704                                 if (((value&0xf0)>>4) > Apwrdelta)
 705                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 706                                 else
 707                                         t2 = 0;
 708                                 if (((value&0xf00)>>8) > Apwrdelta)
 709                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 710                                 else
 711                                         t3 = 0;
 712                                 if (((value&0xf000)>>12) > Apwrdelta)
 713                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 714                                 else
 715                                         t4 = 0;
 716                         }
 717                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 718
 719                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 720                         if (bApwrdeltaMinus == FALSE)
 721                         {
 722                                 t1 = (value&0xf)+(Apwrdelta);
 723                                 if (t1 > 0xf)
 724                                         t1 = 0xf;
 725                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 726                                 if (t2 > 0xf)
 727                                         t2 = 0xf;
 728                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 729                                 if (t3 > 0xf)
 730                                         t3 = 0xf;
 731                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 732                                 if (t4 > 0xf)
 733                                         t4 = 0xf;
 734                         }
 735                         else
 736                         {
 737                                 if ((value&0xf) > Apwrdelta)
 738                                         t1 = (value&0xf)-(Apwrdelta);
 739                                 else
 740                                         t1 = 0;
 741                                 if (((value&0xf0)>>4) > Apwrdelta)
 742                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 743                                 else
 744                                         t2 = 0;
 745                                 if (((value&0xf00)>>8) > Apwrdelta)
 746                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 747                                 else
 748                                         t3 = 0;
 749                                 if (((value&0xf000)>>12) > Apwrdelta)
 750                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 751                                 else
 752                                         t4 = 0;
 753                         }
 754                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 755
 756                         if (i == 0)
 757                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 758                         else
 759                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 760
 761                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 762                 }
 763         }
 764
 765         //
 766         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 767         //
 768         bValid = TRUE;
 769         for (i=0; i<6; i++)
 770         {
 771                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 772                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 773                 {
 774                         bValid = FALSE;
 775                         break;
 776                 }
 777         }
 778
 779         //
 780         // Get Txpower per MCS for 40MHz in 5G.
 781         //
 782         if (bValid)
 783         {
 784                 for (i=0; i<4; i++)
 785                 {
 786                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 787                         if (bApwrdeltaMinus == FALSE)
 788                         {
 789                                 t1 = (value&0xf)+(Apwrdelta);
 790                                 if (t1 > 0xf)
 791                                         t1 = 0xf;
 792                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 793                                 if (t2 > 0xf)
 794                                         t2 = 0xf;
 795                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 796                                 if (t3 > 0xf)
 797                                         t3 = 0xf;
 798                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 799                                 if (t4 > 0xf)
 800                                         t4 = 0xf;
 801                         }
 802                         else
 803                         {
 804                                 if ((value&0xf) > Apwrdelta)
 805                                         t1 = (value&0xf)-(Apwrdelta);
 806                                 else
 807                                         t1 = 0;
 808                                 if (((value&0xf0)>>4) > Apwrdelta)
 809                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 810                                 else
 811                                         t2 = 0;
 812                                 if (((value&0xf00)>>8) > Apwrdelta)
 813                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 814                                 else
 815                                         t3 = 0;
 816                                 if (((value&0xf000)>>12) > Apwrdelta)
 817                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 818                                 else
 819                                         t4 = 0;
 820                         }
 821                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 822
 823                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 824                         if (bApwrdeltaMinus == FALSE)
 825                         {
 826                                 t1 = (value&0xf)+(Apwrdelta);
 827                                 if (t1 > 0xf)
 828                                         t1 = 0xf;
 829                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 830                                 if (t2 > 0xf)
 831                                         t2 = 0xf;
 832                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 833                                 if (t3 > 0xf)
 834                                         t3 = 0xf;
 835                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 836                                 if (t4 > 0xf)
 837                                         t4 = 0xf;
 838                         }
 839                         else
 840                         {
 841                                 if ((value&0xf) > Apwrdelta)
 842                                         t1 = (value&0xf)-(Apwrdelta);
 843                                 else
 844                                         t1 = 0;
 845                                 if (((value&0xf0)>>4) > Apwrdelta)
 846                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 847                                 else
 848                                         t2 = 0;
 849                                 if (((value&0xf00)>>8) > Apwrdelta)
 850                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 851                                 else
 852                                         t3 = 0;
 853                                 if (((value&0xf000)>>12) > Apwrdelta)
 854                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 855                                 else
 856                                         t4 = 0;
 857                         }
 858                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 859
 860                         if (i == 0)
 861                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 862                         else
 863                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 864
 865                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 866                 }
 867         }
 868 }
 869
 870
 871 /*
 872         ========================================================================
 873
 874         Routine Description:
 875                 Read initial channel power parameters from EEPROM
 876
 877         Arguments:
 878                 Adapter                                         Pointer to our adapter
 879
 880         Return Value:
 881                 None
 882
 883         IRQL = PASSIVE_LEVEL
 884
 885         Note:
 886
 887         ========================================================================
 888 */
 889 VOID    RTMPReadChannelPwr(
 890         IN      PRTMP_ADAPTER   pAd)
 891 {
 892         UCHAR                           i, choffset;
 893         EEPROM_TX_PWR_STRUC         Power;
 894         EEPROM_TX_PWR_STRUC         Power2;
 895
 896         // Read Tx power value for all channels
 897         // Value from 1 - 0x7f. Default value is 24.
 898         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 899         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 900
 901         // 0. 11b/g, ch1 - ch 14
 902         for (i = 0; i < 7; i++)
 903         {
 904                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 905                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 906                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 907                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 908
 909                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 910                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 911                 else
 912                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 913
 914                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 915                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 916                 else
 917                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 918
 919                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 920                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 921                 else
 922                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 923
 924                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 925                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 926                 else
 927                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 928         }
 929
 930         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 931         // 1.1 Fill up channel
 932         choffset = 14;
 933         for (i = 0; i < 4; i++)
 934         {
 935                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 936                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 937                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 938
 939                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 940                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 941                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 942
 943                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 944                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 945                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 946         }
 947
 948         // 1.2 Fill up power
 949         for (i = 0; i < 6; i++)
 950         {
 951                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 952                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 953
 954                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 955                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 956
 957                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 958                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 959
 960                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 961                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 962
 963                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 964                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 965         }
 966
 967         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 968         // 2.1 Fill up channel
 969         choffset = 14 + 12;
 970         for (i = 0; i < 5; i++)
 971         {
 972                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 973                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 974                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 975
 976                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 977                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 978                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 979
 980                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 981                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 982                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 983         }
 984         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 985         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 986         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 987
 988         // 2.2 Fill up power
 989         for (i = 0; i < 8; i++)
 990         {
 991                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 992                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 993
 994                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 995                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 996
 997                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 998                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 999
1000                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1001                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1002
1003                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1004                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1005         }
1006
1007         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
1008         // 3.1 Fill up channel
1009         choffset = 14 + 12 + 16;
1010         for (i = 0; i < 2; i++)
1011         {
1012                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
1013                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
1014                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
1015
1016                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
1017                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
1018                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
1019
1020                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
1021                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
1022                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
1023         }
1024         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
1025         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
1026         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
1027
1028         // 3.2 Fill up power
1029         for (i = 0; i < 4; i++)
1030         {
1031                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1032                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1033
1034                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1035                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1036
1037                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1038                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1039
1040                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1041                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1042
1043                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1044                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1045         }
1046
1047         // 4. Print and Debug
1048         choffset = 14 + 12 + 16 + 7;
1049 }
1050
1051 /*
1052         ========================================================================
1053
1054         Routine Description:
1055                 Read the following from the registry
1056                 1. All the parameters
1057                 2. NetworkAddres
1058
1059         Arguments:
1060                 Adapter                                         Pointer to our adapter
1061                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1062
1063         Return Value:
1064                 NDIS_STATUS_SUCCESS
1065                 NDIS_STATUS_FAILURE
1066                 NDIS_STATUS_RESOURCES
1067
1068         IRQL = PASSIVE_LEVEL
1069
1070         Note:
1071
1072         ========================================================================
1073 */
1074 NDIS_STATUS     NICReadRegParameters(
1075         IN      PRTMP_ADAPTER           pAd,
1076         IN      NDIS_HANDLE                     WrapperConfigurationContext
1077         )
1078 {
1079         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1080         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1081         return Status;
1082 }
1083
1084
1085 #ifdef RT2870
1086 /*
1087         ========================================================================
1088
1089         Routine Description:
1090                 For RF filter calibration purpose
1091
1092         Arguments:
1093                 pAd                          Pointer to our adapter
1094
1095         Return Value:
1096                 None
1097
1098         IRQL = PASSIVE_LEVEL
1099
1100         ========================================================================
1101 */
1102 #ifndef RT30xx
1103 VOID RTUSBFilterCalibration(
1104         IN PRTMP_ADAPTER pAd)
1105 {
1106         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue;
1107         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1108         UCHAR   RF_R24_Value = 0;
1109
1110         // Give bbp filter initial value
1111         pAd->Mlme.CaliBW20RfR24 = 0x16;
1112         pAd->Mlme.CaliBW40RfR24 = 0x36;  //Bit[5] must be 1 for BW 40
1113
1114         do
1115         {
1116                 if (loop == 1)  //BandWidth = 40 MHz
1117                 {
1118                         // Write 0x27 to RF_R24 to program filter
1119                         RF_R24_Value = 0x27;
1120                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1121                         FilterTarget = 0x19;
1122
1123                         // when calibrate BW40, BBP mask must set to BW40.
1124                         RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1125                         BBPValue&= (~0x18);
1126                         BBPValue|= (0x10);
1127                         RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1128                 }
1129                 else                    //BandWidth = 20 MHz
1130                 {
1131                         // Write 0x07 to RF_R24 to program filter
1132                         RF_R24_Value = 0x07;
1133                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1134                         FilterTarget = 0x16;
1135                 }
1136
1137                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1138                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1139                 value |= 0x01;
1140                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1141
1142                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1143                 RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1144
1145                 do
1146                 {
1147                         // Write 0x90 to BBP_R25 to transmit test tone
1148                         RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1149
1150                         RTMPusecDelay(1000);
1151                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1152                         RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1153                         R55x = value & 0xFF;
1154
1155                 } while ((ReTry++ < 100) && (R55x == 0));
1156
1157                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1158                 RTUSBWriteBBPRegister(pAd, BBP_R24, 0x06);
1159
1160                 while(TRUE)
1161                 {
1162                         // Write 0x90 to BBP_R25 to transmit test tone
1163                         RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1164
1165                         //We need to wait for calibration
1166                         RTMPusecDelay(1000);
1167                         RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1168                         value &= 0xFF;
1169                         if ((R55x - value) < FilterTarget)
1170                         {
1171                                 RF_R24_Value ++;
1172                         }
1173                         else if ((R55x - value) == FilterTarget)
1174                         {
1175                                 RF_R24_Value ++;
1176                                 count ++;
1177                         }
1178                         else
1179                         {
1180                                 break;
1181                         }
1182
1183                         // prevent infinite loop cause driver hang.
1184                         if (loopcnt++ > 100)
1185                         {
1186                                 DBGPRINT(RT_DEBUG_ERROR, ("RTUSBFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1187                                 break;
1188                         }
1189
1190                         // Write RF_R24 to program filter
1191                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1192                 }
1193
1194                 if (count > 0)
1195                 {
1196                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1197                 }
1198
1199                 // Store for future usage
1200                 if (loopcnt < 100)
1201                 {
1202                         if (loop++ == 0)
1203                         {
1204                                 //BandWidth = 20 MHz
1205                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1206                         }
1207                         else
1208                         {
1209                                 //BandWidth = 40 MHz
1210                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1211                                 break;
1212                         }
1213                 }
1214                 else
1215                         break;
1216
1217                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1218
1219                 // reset count
1220                 count = 0;
1221         } while(TRUE);
1222
1223         //
1224         // Set back to initial state
1225         //
1226         RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1227
1228         RT30xxReadRFRegister(pAd, RF_R22, &value);
1229         value &= ~(0x01);
1230         RT30xxWriteRFRegister(pAd, RF_R22, value);
1231
1232         // set BBP back to BW20
1233         RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1234         BBPValue&= (~0x18);
1235         RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1236
1237         DBGPRINT(RT_DEBUG_TRACE, ("RTUSBFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1238 }
1239 #endif /* RT30xx */
1240 #ifdef RT30xx
1241 VOID RTMPFilterCalibration(
1242         IN PRTMP_ADAPTER pAd)
1243 {
1244         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1245         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1246         UCHAR   RF_R24_Value = 0;
1247
1248         // Give bbp filter initial value
1249         pAd->Mlme.CaliBW20RfR24 = 0x1F;
1250         pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1251
1252         do
1253         {
1254                 if (loop == 1)  //BandWidth = 40 MHz
1255                 {
1256                         // Write 0x27 to RF_R24 to program filter
1257                         RF_R24_Value = 0x27;
1258                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1259                         if (IS_RT3090(pAd))
1260                                 FilterTarget = 0x15;
1261                         else
1262                                 FilterTarget = 0x19;
1263
1264                         // when calibrate BW40, BBP mask must set to BW40.
1265                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1266                         BBPValue&= (~0x18);
1267                         BBPValue|= (0x10);
1268                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1269
1270                         // set to BW40
1271                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1272                         value |= 0x20;
1273                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1274                 }
1275                 else                    //BandWidth = 20 MHz
1276                 {
1277                         // Write 0x07 to RF_R24 to program filter
1278                         RF_R24_Value = 0x07;
1279                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1280                         if (IS_RT3090(pAd))
1281                                 FilterTarget = 0x13;
1282                         else
1283                                 FilterTarget = 0x16;
1284
1285                         // set to BW20
1286                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1287                         value &= (~0x20);
1288                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1289                 }
1290
1291                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1292                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1293                 value |= 0x01;
1294                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1295
1296                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1297                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1298
1299                 do
1300                 {
1301                         // Write 0x90 to BBP_R25 to transmit test tone
1302                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1303
1304                         RTMPusecDelay(1000);
1305                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1306                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1307                         R55x = value & 0xFF;
1308
1309                 } while ((ReTry++ < 100) && (R55x == 0));
1310
1311                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1312                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1313
1314                 while(TRUE)
1315                 {
1316                         // Write 0x90 to BBP_R25 to transmit test tone
1317                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1318
1319                         //We need to wait for calibration
1320                         RTMPusecDelay(1000);
1321                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1322                         value &= 0xFF;
1323                         if ((R55x - value) < FilterTarget)
1324                         {
1325                                 RF_R24_Value ++;
1326                         }
1327                         else if ((R55x - value) == FilterTarget)
1328                         {
1329                                 RF_R24_Value ++;
1330                                 count ++;
1331                         }
1332                         else
1333                         {
1334                                 break;
1335                         }
1336
1337                         // prevent infinite loop cause driver hang.
1338                         if (loopcnt++ > 100)
1339                         {
1340                                 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1341                                 break;
1342                         }
1343
1344                         // Write RF_R24 to program filter
1345                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1346                 }
1347
1348                 if (count > 0)
1349                 {
1350                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1351                 }
1352
1353                 // Store for future usage
1354                 if (loopcnt < 100)
1355                 {
1356                         if (loop++ == 0)
1357                         {
1358                                 //BandWidth = 20 MHz
1359                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1360                         }
1361                         else
1362                         {
1363                                 //BandWidth = 40 MHz
1364                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1365                                 break;
1366                         }
1367                 }
1368                 else
1369                         break;
1370
1371                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1372
1373                 // reset count
1374                 count = 0;
1375         } while(TRUE);
1376
1377         //
1378         // Set back to initial state
1379         //
1380         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1381
1382         RT30xxReadRFRegister(pAd, RF_R22, &value);
1383         value &= ~(0x01);
1384         RT30xxWriteRFRegister(pAd, RF_R22, value);
1385
1386         // set BBP back to BW20
1387         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1388         BBPValue&= (~0x18);
1389         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1390
1391         DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1392 }
1393 #endif /* RT30xx */
1394
1395 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1396 {
1397         INT i;
1398         // Driver must read EEPROM to get RfIcType before initial RF registers
1399         // Initialize RF register to default value
1400 #ifndef RT30xx
1401         if (IS_RT3070(pAd) && ((pAd->RfIcType == RFIC_3020) ||(pAd->RfIcType == RFIC_2020)))
1402         {
1403                 // Init RF calibration
1404                 // Driver should toggle RF R30 bit7 before init RF registers
1405                 ULONG RfReg = 0;
1406                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1407                 RfReg |= 0x80;
1408                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1409                 RTMPusecDelay(1000);
1410                 RfReg &= 0x7F;
1411                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1412
1413                 // Initialize RF register to default value
1414                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1415                 {
1416                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1417                 }
1418
1419                 //For RF filter Calibration
1420                 RTUSBFilterCalibration(pAd);
1421         }
1422 #endif
1423 #ifdef RT30xx
1424         if (IS_RT3070(pAd) || IS_RT3071(pAd))
1425         {
1426                 // Init RF calibration
1427                 // Driver should toggle RF R30 bit7 before init RF registers
1428                 UINT32 RfReg = 0;
1429                 UINT32 data;
1430
1431                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1432                 RfReg |= 0x80;
1433                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1434                 RTMPusecDelay(1000);
1435                 RfReg &= 0x7F;
1436                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1437
1438                 // Initialize RF register to default value
1439                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1440                 {
1441                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1442                 }
1443
1444                 // add by johnli
1445                 if (IS_RT3070(pAd))
1446                 {
1447                         //  Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1448                         RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1449                         data = ((data & 0xF0FFFFFF) | 0x0D000000);
1450                         RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1451                 }
1452                 else if (IS_RT3071(pAd))
1453                 {
1454                         // Driver should set RF R6 bit6 on before init RF registers
1455                         RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1456                         RfReg |= 0x40;
1457                         RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1458
1459                         // init R31
1460                         RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1461
1462                         // RT3071 version E has fixed this issue
1463                         if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1464                         {
1465                                 // patch tx EVM issue temporarily
1466                                 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1467                                 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1468                                 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1469                         }
1470                         else
1471                         {
1472                                 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1473                                 data = ((data & 0xE0FFFFFF) | 0x01000000);
1474                                 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1475                         }
1476
1477                         // patch LNA_PE_G1 failed issue
1478                         RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1479                         data &= ~(0x20);
1480                         RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1481                 }
1482
1483                 //For RF filter Calibration
1484                 RTMPFilterCalibration(pAd);
1485
1486                 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1487                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1488                         RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1489
1490                 // set led open drain enable
1491                 RTUSBReadMACRegister(pAd, OPT_14, &data);
1492                 data |= 0x01;
1493                 RTUSBWriteMACRegister(pAd, OPT_14, data);
1494
1495                 if (IS_RT3071(pAd))
1496                 {
1497                         // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1498                         RT30xxLoadRFNormalModeSetup(pAd);
1499                 }
1500         }
1501 #endif
1502 }
1503 #endif // RT2870 //
1504
1505
1506 /*
1507         ========================================================================
1508
1509         Routine Description:
1510                 Read initial parameters from EEPROM
1511
1512         Arguments:
1513                 Adapter                                         Pointer to our adapter
1514
1515         Return Value:
1516                 None
1517
1518         IRQL = PASSIVE_LEVEL
1519
1520         Note:
1521
1522         ========================================================================
1523 */
1524 VOID    NICReadEEPROMParameters(
1525         IN      PRTMP_ADAPTER   pAd,
1526         IN      PUCHAR                  mac_addr)
1527 {
1528         UINT32                  data = 0;
1529         USHORT                  i, value, value2;
1530         UCHAR                   TmpPhy;
1531         EEPROM_TX_PWR_STRUC         Power;
1532         EEPROM_VERSION_STRUC    Version;
1533         EEPROM_ANTENNA_STRUC    Antenna;
1534         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1535
1536         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1537
1538         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1539         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1540         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1541
1542         if((data & 0x30) == 0)
1543                 pAd->EEPROMAddressNum = 6;              // 93C46
1544         else if((data & 0x30) == 0x10)
1545                 pAd->EEPROMAddressNum = 8;     // 93C66
1546         else
1547                 pAd->EEPROMAddressNum = 8;     // 93C86
1548         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1549
1550         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1551         // MAC address registers according to E2PROM setting
1552         if (mac_addr == NULL ||
1553                 strlen(mac_addr) != 17 ||
1554                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1555                 mac_addr[11] != ':' || mac_addr[14] != ':')
1556         {
1557                 USHORT  Addr01,Addr23,Addr45 ;
1558
1559                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1560                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1561                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1562
1563                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1564                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1565                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1566                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1567                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1568                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1569
1570                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1571         }
1572         else
1573         {
1574                 INT             j;
1575                 PUCHAR  macptr;
1576
1577                 macptr = mac_addr;
1578
1579                 for (j=0; j<MAC_ADDR_LEN; j++)
1580                 {
1581                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1582                         macptr=macptr+3;
1583                 }
1584
1585                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1586         }
1587
1588
1589         {
1590                 //more conveninet to test mbssid, so ap's bssid &0xf1
1591                 if (pAd->PermanentAddress[0] == 0xff)
1592                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1593
1594                 //if (pAd->PermanentAddress[5] == 0xff)
1595                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1596
1597                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1598                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1599                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1600                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1601                 if (pAd->bLocalAdminMAC == FALSE)
1602                 {
1603                         MAC_DW0_STRUC csr2;
1604                         MAC_DW1_STRUC csr3;
1605                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1606                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1607                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1608                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1609                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1610                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1611                         csr3.word = 0;
1612                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1613                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1614                         csr3.field.U2MeMask = 0xff;
1615                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1616                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1617                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1618                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1619                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1620                 }
1621         }
1622
1623         // if not return early. cause fail at emulation.
1624         // Init the channel number for TX channel power
1625         RTMPReadChannelPwr(pAd);
1626
1627         // if E2PROM version mismatch with driver's expectation, then skip
1628         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1629         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1630         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1631         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1632
1633         if (Version.field.Version > VALID_EEPROM_VERSION)
1634         {
1635                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1636                 /*pAd->SystemErrorBitmap |= 0x00000001;
1637
1638                 // hard-code default value when no proper E2PROM installed
1639                 pAd->bAutoTxAgcA = FALSE;
1640                 pAd->bAutoTxAgcG = FALSE;
1641
1642                 // Default the channel power
1643                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1644                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1645
1646                 // Default the channel power
1647                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1648                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1649
1650                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1651                         pAd->EEPROMDefaultValue[i] = 0xffff;
1652                 return;  */
1653         }
1654
1655         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1656         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1657         pAd->EEPROMDefaultValue[0] = value;
1658
1659         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1660         pAd->EEPROMDefaultValue[1] = value;
1661
1662         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1663         pAd->EEPROMDefaultValue[2] = value;
1664
1665         for(i = 0; i < 8; i++)
1666         {
1667                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1668                 pAd->EEPROMDefaultValue[i+3] = value;
1669         }
1670
1671         // We have to parse NIC configuration 0 at here.
1672         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1673         // Therefore, we have to read TxAutoAgc control beforehand.
1674         // Read Tx AGC control bit
1675         Antenna.word = pAd->EEPROMDefaultValue[0];
1676         if (Antenna.word == 0xFFFF)
1677         {
1678 #ifdef RT30xx
1679                 if(IS_RT3090(pAd))
1680                 {
1681                         Antenna.word = 0;
1682                         Antenna.field.RfIcType = RFIC_3020;
1683                         Antenna.field.TxPath = 1;
1684                         Antenna.field.RxPath = 1;
1685                 }
1686                 else
1687                 {
1688 #endif // RT30xx //
1689                 Antenna.word = 0;
1690                 Antenna.field.RfIcType = RFIC_2820;
1691                 Antenna.field.TxPath = 1;
1692                 Antenna.field.RxPath = 2;
1693                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1694 #ifdef RT30xx
1695                 }
1696 #endif // RT30xx //
1697         }
1698
1699         // Choose the desired Tx&Rx stream.
1700         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1701                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1702
1703         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1704         {
1705                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1706
1707                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1708                         (pAd->CommonCfg.RxStream > 2))
1709                 {
1710                         // only 2 Rx streams for RT2860 series
1711                         pAd->CommonCfg.RxStream = 2;
1712                 }
1713         }
1714
1715         // 3*3
1716         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1717         // yet implement
1718         for(i=0; i<3; i++)
1719         {
1720         }
1721
1722         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1723
1724         {
1725 #ifndef RT30xx
1726                 NicConfig2.word = 0;
1727 #endif
1728                 if ((NicConfig2.word & 0x00ff) == 0xff)
1729                 {
1730                         NicConfig2.word &= 0xff00;
1731                 }
1732
1733                 if ((NicConfig2.word >> 8) == 0xff)
1734                 {
1735                         NicConfig2.word &= 0x00ff;
1736                 }
1737         }
1738
1739         if (NicConfig2.field.DynamicTxAgcControl == 1)
1740                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1741         else
1742                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1743
1744         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1745
1746         // Save the antenna for future use
1747         pAd->Antenna.word = Antenna.word;
1748
1749         //
1750         // Reset PhyMode if we don't support 802.11a
1751         // Only RFIC_2850 & RFIC_2750 support 802.11a
1752         //
1753         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1754         {
1755                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1756                         (pAd->CommonCfg.PhyMode == PHY_11A))
1757                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1758                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1759                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1760                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1761                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1762                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1763         }
1764
1765         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1766         // 0. 11b/g
1767         {
1768                 /* these are tempature reference value (0x00 ~ 0xFE)
1769                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1770                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1771                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1772                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1773                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1774                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1775                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1776                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1777                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1778                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1779                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1780                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1781                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1782                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1783                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1784                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1785                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1786                 pAd->TxAgcStepG = Power.field.Byte1;
1787                 pAd->TxAgcCompensateG = 0;
1788                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1789                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1790
1791                 // Disable TxAgc if the based value is not right
1792                 if (pAd->TssiRefG == 0xff)
1793                         pAd->bAutoTxAgcG = FALSE;
1794
1795                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1796                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1797                         pAd->TssiRefG,
1798                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1799                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1800         }
1801         // 1. 11a
1802         {
1803                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1804                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1805                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1806                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1807                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1808                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1809                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1810                 pAd->TssiRefA   = Power.field.Byte0;
1811                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1812                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1813                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1814                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1815                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1816                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1817                 pAd->TxAgcStepA = Power.field.Byte1;
1818                 pAd->TxAgcCompensateA = 0;
1819                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1820                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1821
1822                 // Disable TxAgc if the based value is not right
1823                 if (pAd->TssiRefA == 0xff)
1824                         pAd->bAutoTxAgcA = FALSE;
1825
1826                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1827                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1828                         pAd->TssiRefA,
1829                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1830                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1831         }
1832         pAd->BbpRssiToDbmDelta = 0x0;
1833
1834         // Read frequency offset setting for RF
1835         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1836         if ((value & 0x00FF) != 0x00FF)
1837                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1838         else
1839                 pAd->RfFreqOffset = 0;
1840         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1841
1842         //CountryRegion byte offset (38h)
1843         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1844         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1845
1846         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1847         {
1848                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1849                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1850                 TmpPhy = pAd->CommonCfg.PhyMode;
1851                 pAd->CommonCfg.PhyMode = 0xff;
1852                 RTMPSetPhyMode(pAd, TmpPhy);
1853                 SetCommonHT(pAd);
1854         }
1855
1856         //
1857         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1858         // The valid value are (-10 ~ 10)
1859         //
1860         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1861         pAd->BGRssiOffset0 = value & 0x00ff;
1862         pAd->BGRssiOffset1 = (value >> 8);
1863         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1864         pAd->BGRssiOffset2 = value & 0x00ff;
1865         pAd->ALNAGain1 = (value >> 8);
1866         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1867         pAd->BLNAGain = value & 0x00ff;
1868         pAd->ALNAGain0 = (value >> 8);
1869
1870         // Validate 11b/g RSSI_0 offset.
1871         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1872                 pAd->BGRssiOffset0 = 0;
1873
1874         // Validate 11b/g RSSI_1 offset.
1875         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1876                 pAd->BGRssiOffset1 = 0;
1877
1878         // Validate 11b/g RSSI_2 offset.
1879         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1880                 pAd->BGRssiOffset2 = 0;
1881
1882         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1883         pAd->ARssiOffset0 = value & 0x00ff;
1884         pAd->ARssiOffset1 = (value >> 8);
1885         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1886         pAd->ARssiOffset2 = value & 0x00ff;
1887         pAd->ALNAGain2 = (value >> 8);
1888
1889         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1890                 pAd->ALNAGain1 = pAd->ALNAGain0;
1891         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1892                 pAd->ALNAGain2 = pAd->ALNAGain0;
1893
1894         // Validate 11a RSSI_0 offset.
1895         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1896                 pAd->ARssiOffset0 = 0;
1897
1898         // Validate 11a RSSI_1 offset.
1899         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1900                 pAd->ARssiOffset1 = 0;
1901
1902         //Validate 11a RSSI_2 offset.
1903         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1904                 pAd->ARssiOffset2 = 0;
1905
1906         //
1907         // Get LED Setting.
1908         //
1909         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1910         pAd->LedCntl.word = (value&0xff00) >> 8;
1911         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1912         pAd->Led1 = value;
1913         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1914         pAd->Led2 = value;
1915         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1916         pAd->Led3 = value;
1917
1918         RTMPReadTxPwrPerRate(pAd);
1919
1920 #ifdef RT30xx
1921         if (IS_RT30xx(pAd))
1922         {
1923                 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1924                 pAd->EFuseTag = (value & 0xff);
1925         }
1926 #endif // RT30xx //
1927
1928         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1929 }
1930
1931 /*
1932         ========================================================================
1933
1934         Routine Description:
1935                 Set default value from EEPROM
1936
1937         Arguments:
1938                 Adapter                                         Pointer to our adapter
1939
1940         Return Value:
1941                 None
1942
1943         IRQL = PASSIVE_LEVEL
1944
1945         Note:
1946
1947         ========================================================================
1948 */
1949 VOID    NICInitAsicFromEEPROM(
1950         IN      PRTMP_ADAPTER   pAd)
1951 {
1952         UINT32                                  data = 0;
1953         UCHAR   BBPR1 = 0;
1954         USHORT                                  i;
1955         EEPROM_ANTENNA_STRUC    Antenna;
1956         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1957         UCHAR   BBPR3 = 0;
1958
1959         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1960         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1961         {
1962                 UCHAR BbpRegIdx, BbpValue;
1963
1964                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1965                 {
1966                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1967                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1968                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1969                 }
1970         }
1971
1972 #ifndef RT30xx
1973         Antenna.word = pAd->Antenna.word;
1974 #endif
1975 #ifdef RT30xx
1976         Antenna.word = pAd->EEPROMDefaultValue[0];
1977         if (Antenna.word == 0xFFFF)
1978         {
1979                 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1980                 BUG_ON(Antenna.word == 0xFFFF);
1981         }
1982 #endif
1983         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1984         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1985
1986 #ifdef RT30xx
1987         DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1988
1989         // Save the antenna for future use
1990         pAd->Antenna.word = Antenna.word;
1991 #endif
1992         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1993
1994 #ifdef RT30xx
1995         {
1996                 if ((NicConfig2.word & 0x00ff) == 0xff)
1997                 {
1998                         NicConfig2.word &= 0xff00;
1999                 }
2000
2001                 if ((NicConfig2.word >> 8) == 0xff)
2002                 {
2003                         NicConfig2.word &= 0x00ff;
2004                 }
2005         }
2006 #endif
2007         // Save the antenna for future use
2008         pAd->NicConfig2.word = NicConfig2.word;
2009
2010 #ifdef RT30xx
2011         // set default antenna as main
2012         if (pAd->RfIcType == RFIC_3020)
2013                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
2014 #endif
2015         //
2016         // Send LED Setting to MCU.
2017         //
2018         if (pAd->LedCntl.word == 0xFF)
2019         {
2020                 pAd->LedCntl.word = 0x01;
2021                 pAd->Led1 = 0x5555;
2022                 pAd->Led2 = 0x2221;
2023 #ifdef RT2860
2024                 pAd->Led3 = 0xA9F8;
2025 #endif
2026
2027 #ifdef RT2870
2028                 pAd->Led3 = 0x5627;
2029 #endif // RT2870 //
2030         }
2031
2032         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
2033         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
2034         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
2035     pAd->LedIndicatorStregth = 0xFF;
2036     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
2037
2038         {
2039                 // Read Hardware controlled Radio state enable bit
2040                 if (NicConfig2.field.HardwareRadioControl == 1)
2041                 {
2042                         pAd->StaCfg.bHardwareRadio = TRUE;
2043
2044                         // Read GPIO pin2 as Hardware controlled radio state
2045                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
2046                         if ((data & 0x04) == 0)
2047                         {
2048                                 pAd->StaCfg.bHwRadio = FALSE;
2049                                 pAd->StaCfg.bRadio = FALSE;
2050                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2051                         }
2052                 }
2053                 else
2054                         pAd->StaCfg.bHardwareRadio = FALSE;
2055
2056                 if (pAd->StaCfg.bRadio == FALSE)
2057                 {
2058                         RTMPSetLED(pAd, LED_RADIO_OFF);
2059                 }
2060                 else
2061                 {
2062                         RTMPSetLED(pAd, LED_RADIO_ON);
2063 #ifdef RT2860
2064                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
2065                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
2066                         // 2-1. wait command ok.
2067                         AsicCheckCommanOk(pAd, PowerWakeCID);
2068 #endif
2069                 }
2070         }
2071
2072         // Turn off patching for cardbus controller
2073         if (NicConfig2.field.CardbusAcceleration == 1)
2074         {
2075         }
2076
2077         if (NicConfig2.field.DynamicTxAgcControl == 1)
2078                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
2079         else
2080                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
2081         //
2082         // Since BBP has been progamed, to make sure BBP setting will be
2083         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
2084         //
2085         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2086
2087         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
2088         BBPR3 &= (~0x18);
2089         if(pAd->Antenna.field.RxPath == 3)
2090         {
2091                 BBPR3 |= (0x10);
2092         }
2093         else if(pAd->Antenna.field.RxPath == 2)
2094         {
2095                 BBPR3 |= (0x8);
2096         }
2097         else if(pAd->Antenna.field.RxPath == 1)
2098         {
2099                 BBPR3 |= (0x0);
2100         }
2101         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
2102
2103         {
2104                 // Handle the difference when 1T
2105                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
2106                 if(pAd->Antenna.field.TxPath == 1)
2107                 {
2108                 BBPR1 &= (~0x18);
2109                 }
2110                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
2111
2112                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
2113         }
2114
2115         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
2116         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
2117 }
2118
2119 /*
2120         ========================================================================
2121
2122         Routine Description:
2123                 Initialize NIC hardware
2124
2125         Arguments:
2126                 Adapter                                         Pointer to our adapter
2127
2128         Return Value:
2129                 None
2130
2131         IRQL = PASSIVE_LEVEL
2132
2133         Note:
2134
2135         ========================================================================
2136 */
2137 NDIS_STATUS     NICInitializeAdapter(
2138         IN      PRTMP_ADAPTER   pAd,
2139         IN   BOOLEAN    bHardReset)
2140 {
2141         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
2142         WPDMA_GLO_CFG_STRUC     GloCfg;
2143 #ifdef RT2860
2144         UINT32                  Value;
2145         DELAY_INT_CFG_STRUC     IntCfg;
2146 #endif
2147         ULONG   i =0, j=0;
2148         AC_TXOP_CSR0_STRUC      csr0;
2149
2150         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
2151
2152         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2153 retry:
2154         i = 0;
2155         do
2156         {
2157                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2158                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2159                         break;
2160
2161                 RTMPusecDelay(1000);
2162                 i++;
2163         }while ( i<100);
2164         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
2165         GloCfg.word &= 0xff0;
2166         GloCfg.field.EnTXWriteBackDDONE =1;
2167         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2168
2169         // Record HW Beacon offset
2170         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
2171         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
2172         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
2173         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
2174         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
2175         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
2176         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
2177         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
2178
2179         //
2180         // write all shared Ring's base address into ASIC
2181         //
2182
2183         // asic simulation sequence put this ahead before loading firmware.
2184         // pbf hardware reset
2185 #ifdef RT2860
2186         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
2187         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
2188         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
2189 #endif
2190
2191         // Initialze ASIC for TX & Rx operation
2192         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
2193         {
2194                 if (j++ == 0)
2195                 {
2196                         NICLoadFirmware(pAd);
2197                         goto retry;
2198                 }
2199                 return NDIS_STATUS_FAILURE;
2200         }
2201
2202
2203 #ifdef RT2860
2204         // Write AC_BK base address register
2205         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
2206         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
2207         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
2208
2209         // Write AC_BE base address register
2210         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
2211         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
2212         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
2213
2214         // Write AC_VI base address register
2215         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
2216         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
2217         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
2218
2219         // Write AC_VO base address register
2220         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
2221         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
2222         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
2223
2224         // Write HCCA base address register
2225           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
2226           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
2227         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
2228
2229         // Write MGMT_BASE_CSR register
2230         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
2231         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
2232         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
2233
2234         // Write RX_BASE_CSR register
2235         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
2236         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
2237         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
2238
2239         // Init RX Ring index pointer
2240         pAd->RxRing.RxSwReadIdx = 0;
2241         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
2242         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
2243
2244         // Init TX rings index pointer
2245         {
2246                 for (i=0; i<NUM_OF_TX_RING; i++)
2247                 {
2248                         pAd->TxRing[i].TxSwFreeIdx = 0;
2249                         pAd->TxRing[i].TxCpuIdx = 0;
2250                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
2251                 }
2252         }
2253
2254         // init MGMT ring index pointer
2255         pAd->MgmtRing.TxSwFreeIdx = 0;
2256         pAd->MgmtRing.TxCpuIdx = 0;
2257         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
2258
2259         //
2260         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
2261         //
2262
2263         // Write TX_RING_CSR0 register
2264         Value = TX_RING_SIZE;
2265         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
2266         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
2267         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
2268         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
2269         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
2270         Value = MGMT_RING_SIZE;
2271         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
2272
2273         // Write RX_RING_CSR register
2274         Value = RX_RING_SIZE;
2275         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
2276 #endif /* RT2860 */
2277
2278
2279         // WMM parameter
2280         csr0.word = 0;
2281         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2282         if (pAd->CommonCfg.PhyMode == PHY_11B)
2283         {
2284                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
2285                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
2286         }
2287         else
2288         {
2289                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
2290                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
2291         }
2292         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2293
2294
2295 #ifdef RT2860
2296         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2297         i = 0;
2298         do
2299         {
2300                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2301                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2302                         break;
2303
2304                 RTMPusecDelay(1000);
2305                 i++;
2306         }while ( i < 100);
2307
2308         GloCfg.word &= 0xff0;
2309         GloCfg.field.EnTXWriteBackDDONE =1;
2310         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2311
2312         IntCfg.word = 0;
2313         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
2314 #endif
2315
2316
2317         // reset action
2318         // Load firmware
2319         //  Status = NICLoadFirmware(pAd);
2320
2321         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2322         return Status;
2323 }
2324
2325 /*
2326         ========================================================================
2327
2328         Routine Description:
2329                 Initialize ASIC
2330
2331         Arguments:
2332                 Adapter                                         Pointer to our adapter
2333
2334         Return Value:
2335                 None
2336
2337         IRQL = PASSIVE_LEVEL
2338
2339         Note:
2340
2341         ========================================================================
2342 */
2343 NDIS_STATUS     NICInitializeAsic(
2344         IN      PRTMP_ADAPTER   pAd,
2345         IN  BOOLEAN             bHardReset)
2346 {
2347         ULONG                   Index = 0;
2348         UCHAR                   R0 = 0xff;
2349         UINT32                  MacCsr12 = 0, Counter = 0;
2350 #ifdef RT2870
2351         UINT32                  MacCsr0 = 0;
2352         NTSTATUS                Status;
2353         UCHAR                   Value = 0xff;
2354 #endif // RT2870 //
2355 #ifdef RT30xx
2356         UINT32                  eFuseCtrl;
2357 #endif // RT30xx //
2358         USHORT                  KeyIdx;
2359         INT                             i,apidx;
2360
2361         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2362
2363 #ifdef RT2860
2364         if (bHardReset == TRUE)
2365         {
2366                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2367         }
2368         else
2369                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2370 #endif
2371 #ifdef RT2870
2372         //
2373         // Make sure MAC gets ready after NICLoadFirmware().
2374         //
2375         Index = 0;
2376
2377         //To avoid hang-on issue when interface up in kernel 2.4,
2378         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2379         do
2380         {
2381                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2382
2383                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2384                         break;
2385
2386                 RTMPusecDelay(10);
2387         } while (Index++ < 100);
2388
2389         pAd->MACVersion = MacCsr0;
2390         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2391         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2392         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2393         MacCsr12 &= (~0x2000);
2394         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2395
2396         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2397         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2398         Status = RTUSBVenderReset(pAd);
2399 #endif
2400
2401         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2402
2403         // Initialize MAC register to default value
2404 #ifdef RT2860
2405         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
2406         {
2407                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
2408         }
2409 #endif
2410 #ifdef RT2870
2411         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2412         {
2413 #ifdef RT3070
2414                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2415                 {
2416                         MACRegTable[Index].Value = 0x00000400;
2417                 }
2418 #endif // RT3070 //
2419                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2420         }
2421
2422 #ifndef RT30xx
2423         if(IS_RT3070(pAd))
2424         {
2425                 // According to Frank Hsu (from Gary Tsao)
2426                 RTMP_IO_WRITE32(pAd, (USHORT)TX_SW_CFG0, 0x00000400);
2427
2428                 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
2429                 RTUSBWriteMACRegister(pAd, TX_SW_CFG1, 0);
2430                 RTUSBWriteMACRegister(pAd, TX_SW_CFG2, 0);
2431         }
2432 #endif
2433 #endif // RT2870 //
2434
2435
2436         {
2437                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2438                 {
2439 #ifdef RT2860
2440                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2441 #endif
2442 #ifdef RT2870
2443                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2444 #endif
2445                 }
2446         }
2447
2448 #ifdef RT30xx
2449         // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2450         if (IS_RT3090(pAd))
2451         {
2452                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2453
2454                 // RT3071 version E has fixed this issue
2455                 if ((pAd->MACVersion & 0xffff) < 0x0211)
2456                 {
2457                         if (pAd->NicConfig2.field.DACTestBit == 1)
2458                         {
2459                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2460                         }
2461                         else
2462                         {
2463                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2464                         }
2465                 }
2466                 else
2467                 {
2468                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2469                 }
2470         }
2471         else if (IS_RT3070(pAd))
2472         {
2473                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2474                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2475         }
2476 #endif // RT30xx //
2477
2478         //
2479         // Before program BBP, we need to wait BBP/RF get wake up.
2480         //
2481         Index = 0;
2482         do
2483         {
2484                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2485
2486                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
2487                         break;
2488
2489                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
2490                 RTMPusecDelay(1000);
2491         } while (Index++ < 100);
2492
2493     // The commands to firmware should be after these commands, these commands will init firmware
2494         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2495         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2496         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2497         RTMPusecDelay(1000);
2498
2499         // Read BBP register, make sure BBP is up and running before write new data
2500         Index = 0;
2501         do
2502         {
2503                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2504                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2505         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2506         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2507
2508         if ((R0 == 0xff) || (R0 == 0x00))
2509                 return NDIS_STATUS_FAILURE;
2510
2511         // Initialize BBP register to default value
2512         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2513         {
2514                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2515         }
2516
2517 #ifndef RT30xx
2518         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2519         if ((pAd->MACVersion&0xffff) != 0x0101)
2520                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2521
2522 #ifdef RT2870
2523         //write RT3070 BBP wchich different with 2870 after write RT2870 BBP
2524         if (IS_RT3070(pAd))
2525         {
2526                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
2527                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x99);
2528                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x05);
2529         }
2530 #endif // RT2870 //
2531 #endif
2532 #ifdef RT30xx
2533         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2534         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2535         if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2536                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2537
2538 // add by johnli, RF power sequence setup
2539         if (IS_RT30xx(pAd))
2540         {       //update for RT3070/71/72/90/91/92.
2541                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2542                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2543                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2544         }
2545
2546         if (IS_RT3090(pAd))
2547         {
2548                 UCHAR           bbpreg=0;
2549
2550                 // enable DC filter
2551                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2552                 {
2553                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2554                 }
2555
2556                 // improve power consumption
2557                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2558                 if (pAd->Antenna.field.TxPath == 1)
2559                 {
2560                         // turn off tx DAC_1
2561                         bbpreg = (bbpreg | 0x20);
2562                 }
2563
2564                 if (pAd->Antenna.field.RxPath == 1)
2565                 {
2566                         // turn off tx ADC_1
2567                         bbpreg &= (~0x2);
2568                 }
2569                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2570
2571                 // improve power consumption in RT3071 Ver.E
2572                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2573                 {
2574                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2575                         bbpreg &= (~0x3);
2576                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2577                 }
2578         }
2579 #endif
2580         if (pAd->MACVersion == 0x28600100)
2581         {
2582                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2583                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2584     }
2585
2586         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2587         {
2588                 // enlarge MAX_LEN_CFG
2589                 UINT32 csr;
2590                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2591                 csr &= 0xFFF;
2592                 csr |= 0x2000;
2593                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2594         }
2595
2596 #ifdef RT2870
2597 {
2598         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2599
2600         //Initialize WCID table
2601         Value = 0xff;
2602         for(Index =0 ;Index < 254;Index++)
2603         {
2604                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2605         }
2606 }
2607 #endif // RT2870 //
2608
2609         // Add radio off control
2610         {
2611                 if (pAd->StaCfg.bRadio == FALSE)
2612                 {
2613 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2614                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2615                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2616                 }
2617         }
2618
2619         // Clear raw counters
2620         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2621         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2622         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2623         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2624         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2625         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2626
2627         // ASIC will keep garbage value after boot
2628         // Clear all seared key table when initial
2629         // This routine can be ignored in radio-ON/OFF operation.
2630         if (bHardReset)
2631         {
2632                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2633                 {
2634                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2635                 }
2636
2637                 // Clear all pairwise key table when initial
2638                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2639                 {
2640                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2641                 }
2642         }
2643
2644
2645         // It isn't necessary to clear this space when not hard reset.
2646         if (bHardReset == TRUE)
2647         {
2648                 // clear all on-chip BEACON frame space
2649                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2650                 {
2651                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2652                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2653                 }
2654         }
2655 #ifdef RT2870
2656         AsicDisableSync(pAd);
2657         // Clear raw counters
2658         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2659         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2660         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2661         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2662         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2663         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2664         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2665         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2666         Counter&=0xffffff00;
2667         Counter|=0x000001e;
2668         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2669 #endif // RT2870 //
2670 #ifdef RT30xx
2671         pAd->bUseEfuse=FALSE;
2672         RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2673         pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2674         if(pAd->bUseEfuse)
2675         {
2676                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2677         }
2678         else
2679         {
2680                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2681
2682         }
2683 #endif // RT30xx //
2684
2685         {
2686                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2687                 if ((pAd->MACVersion&0xffff) != 0x0101)
2688                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2689         }
2690
2691         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2692         return NDIS_STATUS_SUCCESS;
2693 }
2694
2695
2696 #ifdef RT2860
2697 VOID NICRestoreBBPValue(
2698         IN PRTMP_ADAPTER pAd)
2699 {
2700         UCHAR           index;
2701         UCHAR           Value = 0;
2702         ULONG           Data;
2703
2704         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2705         // Initialize BBP register to default value (rtmp_init.c)
2706         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2707         {
2708                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2709         }
2710         // copy from (rtmp_init.c)
2711         if (pAd->MACVersion == 0x28600100)
2712         {
2713                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2714                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2715         }
2716
2717         // copy from (connect.c LinkUp function)
2718         if (INFRA_ON(pAd))
2719         {
2720                 // Change to AP channel
2721                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2722                 {
2723                         // Must using 40MHz.
2724                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2725                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2726                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2727
2728                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2729                         Value &= (~0x18);
2730                         Value |= 0x10;
2731                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2732
2733                         //  RX : control channel at lower
2734                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2735                         Value &= (~0x20);
2736                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2737                         // Record BBPR3 setting, But don't keep R Antenna # information.
2738                         pAd->StaCfg.BBPR3 = Value;
2739
2740                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2741                         Data &= 0xfffffffe;
2742                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2743
2744                         if (pAd->MACVersion == 0x28600100)
2745                         {
2746                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2747                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2748                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2749                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2750                         }
2751
2752                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2753                 }
2754                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2755                 {
2756                         // Must using 40MHz.
2757                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2758                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2759                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2760
2761                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2762                         Value &= (~0x18);
2763                         Value |= 0x10;
2764                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2765
2766                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2767                         Data |= 0x1;
2768                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2769
2770                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2771                         Value |= (0x20);
2772                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2773                         // Record BBPR3 setting, But don't keep R Antenna # information.
2774                         pAd->StaCfg.BBPR3 = Value;
2775
2776                         if (pAd->MACVersion == 0x28600100)
2777                         {
2778                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2779                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2780                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2781                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2782                         }
2783
2784                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2785                 }
2786                 else
2787                 {
2788                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2789                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2790                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2791
2792                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2793                         Value &= (~0x18);
2794                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2795
2796                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2797                         Data &= 0xfffffffe;
2798                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2799
2800                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2801                         Value &= (~0x20);
2802                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2803                         // Record BBPR3 setting, But don't keep R Antenna # information.
2804                         pAd->StaCfg.BBPR3 = Value;
2805
2806                         if (pAd->MACVersion == 0x28600100)
2807                         {
2808                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2809                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2810                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2811                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2812                         }
2813
2814                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2815                 }
2816         }
2817
2818         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2819 }
2820 #endif /* RT2860 */
2821
2822 /*
2823         ========================================================================
2824
2825         Routine Description:
2826                 Reset NIC Asics
2827
2828         Arguments:
2829                 Adapter                                         Pointer to our adapter
2830
2831         Return Value:
2832                 None
2833
2834         IRQL = PASSIVE_LEVEL
2835
2836         Note:
2837                 Reset NIC to initial state AS IS system boot up time.
2838
2839         ========================================================================
2840 */
2841 VOID    NICIssueReset(
2842         IN      PRTMP_ADAPTER   pAd)
2843 {
2844         UINT32  Value = 0;
2845         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2846
2847         // Disable Rx, register value supposed will remain after reset
2848         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2849         Value &= (0xfffffff3);
2850         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2851
2852         // Issue reset and clear from reset state
2853         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2854         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2855
2856         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2857 }
2858
2859 /*
2860         ========================================================================
2861
2862         Routine Description:
2863                 Check ASIC registers and find any reason the system might hang
2864
2865         Arguments:
2866                 Adapter                                         Pointer to our adapter
2867
2868         Return Value:
2869                 None
2870
2871         IRQL = DISPATCH_LEVEL
2872
2873         ========================================================================
2874 */
2875 BOOLEAN NICCheckForHang(
2876         IN      PRTMP_ADAPTER   pAd)
2877 {
2878         return (FALSE);
2879 }
2880
2881 VOID NICUpdateFifoStaCounters(
2882         IN PRTMP_ADAPTER pAd)
2883 {
2884         TX_STA_FIFO_STRUC       StaFifo;
2885         MAC_TABLE_ENTRY         *pEntry;
2886         UCHAR                           i = 0;
2887         UCHAR                   pid = 0, wcid = 0;
2888         CHAR                            reTry;
2889         UCHAR                           succMCS;
2890
2891                 do
2892                 {
2893                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2894
2895                         if (StaFifo.field.bValid == 0)
2896                                 break;
2897
2898                         wcid = (UCHAR)StaFifo.field.wcid;
2899
2900
2901                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2902                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2903                         {
2904                                 i++;
2905                                 continue;
2906                         }
2907
2908                         /* PID store Tx MCS Rate */
2909                         pid = (UCHAR)StaFifo.field.PidType;
2910
2911                         pEntry = &pAd->MacTab.Content[wcid];
2912
2913                         pEntry->DebugFIFOCount++;
2914
2915                         if (StaFifo.field.TxBF) // 3*3
2916                                 pEntry->TxBFCount++;
2917
2918 #ifdef UAPSD_AP_SUPPORT
2919                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2920 #endif // UAPSD_AP_SUPPORT //
2921
2922                         if (!StaFifo.field.TxSuccess)
2923                         {
2924                                 pEntry->FIFOCount++;
2925                                 pEntry->OneSecTxFailCount++;
2926
2927                                 if (pEntry->FIFOCount >= 1)
2928                                 {
2929                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2930                                         pEntry->NoBADataCountDown = 64;
2931
2932                                         if(pEntry->PsMode == PWR_ACTIVE)
2933                                         {
2934                                                 int tid;
2935                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2936                                                 {
2937                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2938                                                 }
2939
2940                                                 // Update the continuous transmission counter except PS mode
2941                                                 pEntry->ContinueTxFailCnt++;
2942                                         }
2943                                         else
2944                                         {
2945                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2946                                                 //     this tx error happened due to sta just go to sleep.
2947                                                 pEntry->FIFOCount = 0;
2948                                                 pEntry->ContinueTxFailCnt = 0;
2949                                         }
2950                                 }
2951                         }
2952                         else
2953                         {
2954                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2955                                 {
2956                                         pEntry->NoBADataCountDown--;
2957                                         if (pEntry->NoBADataCountDown==0)
2958                                         {
2959                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2960                                         }
2961                                 }
2962
2963                                 pEntry->FIFOCount = 0;
2964                                 pEntry->OneSecTxNoRetryOkCount++;
2965                                 // update NoDataIdleCount when sucessful send packet to STA.
2966                                 pEntry->NoDataIdleCount = 0;
2967                                 pEntry->ContinueTxFailCnt = 0;
2968                         }
2969
2970                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2971
2972                         reTry = pid - succMCS;
2973
2974                         if (StaFifo.field.TxSuccess)
2975                         {
2976                                 pEntry->TXMCSExpected[pid]++;
2977                                 if (pid == succMCS)
2978                                 {
2979                                         pEntry->TXMCSSuccessful[pid]++;
2980                                 }
2981                                 else
2982                                 {
2983                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2984                                 }
2985                         }
2986                         else
2987                         {
2988                                 pEntry->TXMCSFailed[pid]++;
2989                         }
2990
2991                         if (reTry > 0)
2992                         {
2993                                 if ((pid >= 12) && succMCS <=7)
2994                                 {
2995                                         reTry -= 4;
2996                                 }
2997                                 pEntry->OneSecTxRetryOkCount += reTry;
2998                         }
2999
3000                         i++;
3001                         // ASIC store 16 stack
3002                 } while ( i < (2*TX_RING_SIZE) );
3003
3004 }
3005
3006 /*
3007         ========================================================================
3008
3009         Routine Description:
3010                 Read statistical counters from hardware registers and record them
3011                 in software variables for later on query
3012
3013         Arguments:
3014                 pAd                                     Pointer to our adapter
3015
3016         Return Value:
3017                 None
3018
3019         IRQL = DISPATCH_LEVEL
3020
3021         ========================================================================
3022 */
3023 VOID NICUpdateRawCounters(
3024         IN PRTMP_ADAPTER pAd)
3025 {
3026         UINT32  OldValue;
3027         RX_STA_CNT0_STRUC        RxStaCnt0;
3028         RX_STA_CNT1_STRUC   RxStaCnt1;
3029         RX_STA_CNT2_STRUC   RxStaCnt2;
3030         TX_STA_CNT0_STRUC        TxStaCnt0;
3031         TX_STA_CNT1_STRUC        StaTx1;
3032         TX_STA_CNT2_STRUC        StaTx2;
3033         TX_AGG_CNT_STRUC        TxAggCnt;
3034         TX_AGG_CNT0_STRUC       TxAggCnt0;
3035         TX_AGG_CNT1_STRUC       TxAggCnt1;
3036         TX_AGG_CNT2_STRUC       TxAggCnt2;
3037         TX_AGG_CNT3_STRUC       TxAggCnt3;
3038         TX_AGG_CNT4_STRUC       TxAggCnt4;
3039         TX_AGG_CNT5_STRUC       TxAggCnt5;
3040         TX_AGG_CNT6_STRUC       TxAggCnt6;
3041         TX_AGG_CNT7_STRUC       TxAggCnt7;
3042
3043         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
3044         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
3045
3046         {
3047                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
3048             // Update RX PLCP error counter
3049             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
3050                 // Update False CCA counter
3051                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
3052         }
3053
3054         // Update FCS counters
3055         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
3056         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
3057         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
3058                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
3059
3060         // Add FCS error count to private counters
3061         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
3062         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
3063         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
3064         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
3065                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
3066
3067         // Update Duplicate Rcv check
3068         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
3069         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
3070         // Update RX Overflow counter
3071         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
3072
3073 #ifdef RT2870
3074         if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
3075         {
3076                 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
3077                 pAd->watchDogRxOverFlowCnt = 0;
3078         }
3079         else
3080         {
3081                 if (RxStaCnt2.field.RxFifoOverflowCount)
3082                         pAd->watchDogRxOverFlowCnt++;
3083                 else
3084                         pAd->watchDogRxOverFlowCnt = 0;
3085         }
3086 #endif // RT2870 //
3087
3088
3089         if (!pAd->bUpdateBcnCntDone)
3090         {
3091         // Update BEACON sent count
3092         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
3093         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
3094         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
3095         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
3096         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
3097         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
3098         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
3099         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
3100         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
3101         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
3102         }
3103
3104         {
3105                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
3106                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
3107                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
3108                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
3109                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
3110                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
3111                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
3112                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
3113                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
3114                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
3115                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
3116                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
3117                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
3118
3119                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
3120                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
3121                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
3122                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
3123
3124                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
3125                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
3126                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
3127                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
3128
3129                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
3130                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
3131                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
3132                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
3133
3134                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
3135                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
3136
3137                 // Calculate the transmitted A-MPDU count
3138                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
3139                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
3140
3141                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
3142                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
3143
3144                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
3145                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
3146
3147                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
3148                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
3149
3150                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
3151                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
3152
3153                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
3154                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
3155
3156                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
3157                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
3158
3159                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
3160                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
3161         }
3162
3163 #ifdef DBG_DIAGNOSE
3164         {
3165                 RtmpDiagStruct  *pDiag;
3166                 COUNTER_RALINK  *pRalinkCounters;
3167                 UCHAR                   ArrayCurIdx, i;
3168
3169                 pDiag = &pAd->DiagStruct;
3170                 pRalinkCounters = &pAd->RalinkCounters;
3171                 ArrayCurIdx = pDiag->ArrayCurIdx;
3172
3173                 if (pDiag->inited == 0)
3174                 {
3175                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
3176                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
3177                         pDiag->inited = 1;
3178                 }
3179                 else
3180                 {
3181                         // Tx
3182                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
3183                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
3184                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
3185                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
3186                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
3187                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
3188                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
3189                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
3190                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
3191                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
3192                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
3193                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
3194                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
3195                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
3196                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
3197                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
3198                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
3199                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
3200                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
3201
3202                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
3203
3204                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
3205                         ArrayCurIdx = pDiag->ArrayCurIdx;
3206                         for (i =0; i < 9; i++)
3207                         {
3208                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
3209                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
3210                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
3211                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
3212                         }
3213                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
3214                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
3215                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
3216                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
3217                         for (i = 9; i < 24; i++) // 3*3
3218                         {
3219                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
3220                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
3221                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
3222 }
3223
3224                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
3225                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
3226                 }
3227
3228         }
3229 #endif // DBG_DIAGNOSE //
3230
3231
3232 }
3233
3234
3235 /*
3236         ========================================================================
3237
3238         Routine Description:
3239                 Reset NIC from error
3240
3241         Arguments:
3242                 Adapter                                         Pointer to our adapter
3243
3244         Return Value:
3245                 None
3246
3247         IRQL = PASSIVE_LEVEL
3248
3249         Note:
3250                 Reset NIC from error state
3251
3252         ========================================================================
3253 */
3254 VOID    NICResetFromError(
3255         IN      PRTMP_ADAPTER   pAd)
3256 {
3257         // Reset BBP (according to alex, reset ASIC will force reset BBP
3258         // Therefore, skip the reset BBP
3259         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
3260
3261         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
3262         // Remove ASIC from reset state
3263         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
3264
3265         NICInitializeAdapter(pAd, FALSE);
3266         NICInitAsicFromEEPROM(pAd);
3267
3268         // Switch to current channel, since during reset process, the connection should remains on.
3269         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
3270         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
3271 }
3272
3273 /*
3274         ========================================================================
3275
3276         Routine Description:
3277                 erase 8051 firmware image in MAC ASIC
3278
3279         Arguments:
3280                 Adapter                                         Pointer to our adapter
3281
3282         IRQL = PASSIVE_LEVEL
3283
3284         ========================================================================
3285 */
3286 VOID NICEraseFirmware(
3287         IN PRTMP_ADAPTER pAd)
3288 {
3289         ULONG i;
3290
3291         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
3292                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
3293
3294 }/* End of NICEraseFirmware */
3295
3296 /*
3297         ========================================================================
3298
3299         Routine Description:
3300                 Load 8051 firmware RT2561.BIN file into MAC ASIC
3301
3302         Arguments:
3303                 Adapter                                         Pointer to our adapter
3304
3305         Return Value:
3306                 NDIS_STATUS_SUCCESS         firmware image load ok
3307                 NDIS_STATUS_FAILURE         image not found
3308
3309         IRQL = PASSIVE_LEVEL
3310
3311         ========================================================================
3312 */
3313 NDIS_STATUS NICLoadFirmware(
3314         IN PRTMP_ADAPTER pAd)
3315 {
3316         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
3317         PUCHAR                  pFirmwareImage;
3318         ULONG                   FileLength, Index;
3319         //ULONG                 firm;
3320         UINT32                  MacReg = 0;
3321 #ifdef RT2870
3322         UINT32                  Version = (pAd->MACVersion >> 16);
3323 #endif // RT2870 //
3324
3325         pFirmwareImage = FirmwareImage;
3326         FileLength = sizeof(FirmwareImage);
3327 #ifdef RT2870
3328         // New 8k byte firmware size for RT3071/RT3072
3329         //printk("Usb Chip\n");
3330         if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
3331         //The firmware image consists of two parts. One is the origianl and the other is the new.
3332         //Use Second Part
3333         {
3334                 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
3335                 {       // Use Firmware V2.
3336                         //printk("KH:Use New Version,part2\n");
3337                         pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
3338                         FileLength = FIRMWAREIMAGEV2_LENGTH;
3339                 }
3340                 else
3341                 {
3342                         //printk("KH:Use New Version,part1\n");
3343                         pFirmwareImage = FirmwareImage;
3344                         FileLength = FIRMWAREIMAGEV1_LENGTH;
3345                 }
3346         }
3347         else
3348         {
3349                 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
3350                 Status = NDIS_STATUS_FAILURE;
3351         }
3352
3353 #endif // RT2870 //
3354
3355         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3356
3357         /* check if MCU is ready */
3358         Index = 0;
3359         do
3360         {
3361                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3362
3363                 if (MacReg & 0x80)
3364                         break;
3365
3366                 RTMPusecDelay(1000);
3367         } while (Index++ < 1000);
3368
3369     if (Index > 1000)
3370         {
3371                 Status = NDIS_STATUS_FAILURE;
3372                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3373         } /* End of if */
3374
3375     DBGPRINT(RT_DEBUG_TRACE,
3376                          ("<=== %s (status=%d)\n", __func__, Status));
3377     return Status;
3378 } /* End of NICLoadFirmware */
3379
3380
3381 /*
3382         ========================================================================
3383
3384         Routine Description:
3385                 Load Tx rate switching parameters
3386
3387         Arguments:
3388                 Adapter                                         Pointer to our adapter
3389
3390         Return Value:
3391                 NDIS_STATUS_SUCCESS         firmware image load ok
3392                 NDIS_STATUS_FAILURE         image not found
3393
3394         IRQL = PASSIVE_LEVEL
3395
3396         Rate Table Format:
3397                 1. (B0: Valid Item number) (B1:Initial item from zero)
3398                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
3399
3400         ========================================================================
3401 */
3402 NDIS_STATUS NICLoadRateSwitchingParams(
3403         IN PRTMP_ADAPTER pAd)
3404 {
3405         return NDIS_STATUS_SUCCESS;
3406 }
3407
3408 /*
3409         ========================================================================
3410
3411         Routine Description:
3412                 if  pSrc1 all zero with length Length, return 0.
3413                 If not all zero, return 1
3414
3415         Arguments:
3416                 pSrc1
3417
3418         Return Value:
3419                 1:                      not all zero
3420                 0:                      all zero
3421
3422         IRQL = DISPATCH_LEVEL
3423
3424         Note:
3425
3426         ========================================================================
3427 */
3428 ULONG   RTMPNotAllZero(
3429         IN      PVOID   pSrc1,
3430         IN      ULONG   Length)
3431 {
3432         PUCHAR  pMem1;
3433         ULONG   Index = 0;
3434
3435         pMem1 = (PUCHAR) pSrc1;
3436
3437         for (Index = 0; Index < Length; Index++)
3438         {
3439                 if (pMem1[Index] != 0x0)
3440                 {
3441                         break;
3442                 }
3443         }
3444
3445         if (Index == Length)
3446         {
3447                 return (0);
3448         }
3449         else
3450         {
3451                 return (1);
3452         }
3453 }
3454
3455 /*
3456         ========================================================================
3457
3458         Routine Description:
3459                 Compare two memory block
3460
3461         Arguments:
3462                 pSrc1           Pointer to first memory address
3463                 pSrc2           Pointer to second memory address
3464
3465         Return Value:
3466                 0:                      memory is equal
3467                 1:                      pSrc1 memory is larger
3468                 2:                      pSrc2 memory is larger
3469
3470         IRQL = DISPATCH_LEVEL
3471
3472         Note:
3473
3474         ========================================================================
3475 */
3476 ULONG   RTMPCompareMemory(
3477         IN      PVOID   pSrc1,
3478         IN      PVOID   pSrc2,
3479         IN      ULONG   Length)
3480 {
3481         PUCHAR  pMem1;
3482         PUCHAR  pMem2;
3483         ULONG   Index = 0;
3484
3485         pMem1 = (PUCHAR) pSrc1;
3486         pMem2 = (PUCHAR) pSrc2;
3487
3488         for (Index = 0; Index < Length; Index++)
3489         {
3490                 if (pMem1[Index] > pMem2[Index])
3491                         return (1);
3492                 else if (pMem1[Index] < pMem2[Index])
3493                         return (2);
3494         }
3495
3496         // Equal
3497         return (0);
3498 }
3499
3500 /*
3501         ========================================================================
3502
3503         Routine Description:
3504                 Zero out memory block
3505
3506         Arguments:
3507                 pSrc1           Pointer to memory address
3508                 Length          Size
3509
3510         Return Value:
3511                 None
3512
3513         IRQL = PASSIVE_LEVEL
3514         IRQL = DISPATCH_LEVEL
3515
3516         Note:
3517
3518         ========================================================================
3519 */
3520 VOID    RTMPZeroMemory(
3521         IN      PVOID   pSrc,
3522         IN      ULONG   Length)
3523 {
3524         PUCHAR  pMem;
3525         ULONG   Index = 0;
3526
3527         pMem = (PUCHAR) pSrc;
3528
3529         for (Index = 0; Index < Length; Index++)
3530         {
3531                 pMem[Index] = 0x00;
3532         }
3533 }
3534
3535 VOID    RTMPFillMemory(
3536         IN      PVOID   pSrc,
3537         IN      ULONG   Length,
3538         IN      UCHAR   Fill)
3539 {
3540         PUCHAR  pMem;
3541         ULONG   Index = 0;
3542
3543         pMem = (PUCHAR) pSrc;
3544
3545         for (Index = 0; Index < Length; Index++)
3546         {
3547                 pMem[Index] = Fill;
3548         }
3549 }
3550
3551 /*
3552         ========================================================================
3553
3554         Routine Description:
3555                 Copy data from memory block 1 to memory block 2
3556
3557         Arguments:
3558                 pDest           Pointer to destination memory address
3559                 pSrc            Pointer to source memory address
3560                 Length          Copy size
3561
3562         Return Value:
3563                 None
3564
3565         IRQL = PASSIVE_LEVEL
3566         IRQL = DISPATCH_LEVEL
3567
3568         Note:
3569
3570         ========================================================================
3571 */
3572 VOID    RTMPMoveMemory(
3573         OUT     PVOID   pDest,
3574         IN      PVOID   pSrc,
3575         IN      ULONG   Length)
3576 {
3577         PUCHAR  pMem1;
3578         PUCHAR  pMem2;
3579         UINT    Index;
3580
3581         ASSERT((Length==0) || (pDest && pSrc));
3582
3583         pMem1 = (PUCHAR) pDest;
3584         pMem2 = (PUCHAR) pSrc;
3585
3586         for (Index = 0; Index < Length; Index++)
3587         {
3588                 pMem1[Index] = pMem2[Index];
3589         }
3590 }
3591
3592 /*
3593         ========================================================================
3594
3595         Routine Description:
3596                 Initialize port configuration structure
3597
3598         Arguments:
3599                 Adapter                                         Pointer to our adapter
3600
3601         Return Value:
3602                 None
3603
3604         IRQL = PASSIVE_LEVEL
3605
3606         Note:
3607
3608         ========================================================================
3609 */
3610 VOID    UserCfgInit(
3611         IN      PRTMP_ADAPTER pAd)
3612 {
3613     UINT key_index, bss_index;
3614
3615         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3616
3617         //
3618         //  part I. intialize common configuration
3619         //
3620 #ifdef RT2870
3621         pAd->BulkOutReq = 0;
3622
3623         pAd->BulkOutComplete = 0;
3624         pAd->BulkOutCompleteOther = 0;
3625         pAd->BulkOutCompleteCancel = 0;
3626         pAd->BulkInReq = 0;
3627         pAd->BulkInComplete = 0;
3628         pAd->BulkInCompleteFail = 0;
3629
3630         //pAd->QuickTimerP = 100;
3631         //pAd->TurnAggrBulkInCount = 0;
3632         pAd->bUsbTxBulkAggre = 0;
3633
3634         // init as unsed value to ensure driver will set to MCU once.
3635         pAd->LedIndicatorStregth = 0xFF;
3636
3637         pAd->CommonCfg.MaxPktOneTxBulk = 2;
3638         pAd->CommonCfg.TxBulkFactor = 1;
3639         pAd->CommonCfg.RxBulkFactor =1;
3640
3641         pAd->CommonCfg.TxPower = 100; //mW
3642
3643         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3644 #endif // RT2870 //
3645
3646         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3647         {
3648                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3649                 {
3650                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3651                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3652                 }
3653         }
3654
3655 #ifdef RT30xx
3656         pAd->EepromAccess = FALSE;
3657 #endif
3658         pAd->Antenna.word = 0;
3659         pAd->CommonCfg.BBPCurrentBW = BW_20;
3660
3661         pAd->LedCntl.word = 0;
3662 #ifdef RT2860
3663         pAd->LedIndicatorStregth = 0;
3664         pAd->RLnkCtrlOffset = 0;
3665         pAd->HostLnkCtrlOffset = 0;
3666         pAd->CheckDmaBusyCount = 0;
3667 #endif
3668
3669         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3670         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3671         pAd->RfIcType = RFIC_2820;
3672
3673         // Init timer for reset complete event
3674         pAd->CommonCfg.CentralChannel = 1;
3675         pAd->bForcePrintTX = FALSE;
3676         pAd->bForcePrintRX = FALSE;
3677         pAd->bStaFifoTest = FALSE;
3678         pAd->bProtectionTest = FALSE;
3679         pAd->bHCCATest = FALSE;
3680         pAd->bGenOneHCCA = FALSE;
3681         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3682         pAd->CommonCfg.TxPower = 100; //mW
3683         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3684         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3685         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3686         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3687         pAd->CommonCfg.RtsThreshold = 2347;
3688         pAd->CommonCfg.FragmentThreshold = 2346;
3689         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3690         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3691         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3692         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3693         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3694         pAd->CommonCfg.RadarDetect.CSCount = 0;
3695         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3696         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3697         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3698         pAd->CommonCfg.bAPSDCapable = FALSE;
3699         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3700         pAd->CommonCfg.TriggerTimerCount = 0;
3701         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3702         pAd->CommonCfg.bCountryFlag = FALSE;
3703         pAd->CommonCfg.TxStream = 0;
3704         pAd->CommonCfg.RxStream = 0;
3705
3706         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3707
3708         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3709         pAd->HTCEnable = FALSE;
3710         pAd->bBroadComHT = FALSE;
3711         pAd->CommonCfg.bRdg = FALSE;
3712
3713         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3714         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3715         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3716         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3717         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3718         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3719         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3720
3721         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3722         BATableInit(pAd, &pAd->BATable);
3723
3724         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3725         pAd->CommonCfg.bHTProtect = 1;
3726         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3727         pAd->CommonCfg.bBADecline = FALSE;
3728         pAd->CommonCfg.bDisableReordering = FALSE;
3729
3730         pAd->CommonCfg.TxBASize = 7;
3731
3732         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3733
3734         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3735         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3736         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3737         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3738         pAd->CommonCfg.TxRate = RATE_6;
3739
3740         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3741         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3742         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3743
3744         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3745
3746         //
3747         // part II. intialize STA specific configuration
3748         //
3749         {
3750                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3751                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3752                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3753                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3754
3755                 pAd->StaCfg.Psm = PWR_ACTIVE;
3756
3757                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3758                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3759                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3760                 pAd->StaCfg.bMixCipher = FALSE;
3761                 pAd->StaCfg.DefaultKeyId = 0;
3762
3763                 // 802.1x port control
3764                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3765                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3766                 pAd->StaCfg.LastMicErrorTime = 0;
3767                 pAd->StaCfg.MicErrCnt        = 0;
3768                 pAd->StaCfg.bBlockAssoc      = FALSE;
3769                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3770
3771                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3772
3773                 pAd->StaCfg.RssiTrigger = 0;
3774                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3775                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3776                 pAd->StaCfg.AtimWin = 0;
3777                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3778                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3779                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3780                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3781                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3782
3783                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3784                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3785         }
3786
3787         // global variables mXXXX used in MAC protocol state machines
3788         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3789         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3790         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3791
3792         // PHY specification
3793         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3794         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3795
3796         {
3797                 // user desired power mode
3798                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3799                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3800                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3801
3802                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3803                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3804
3805                 // Patch for Ndtest
3806                 pAd->StaCfg.ScanCnt = 0;
3807
3808                 // CCX 2.0 control flag init
3809                 pAd->StaCfg.CCXEnable = FALSE;
3810                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3811                 pAd->StaCfg.CCXQosECWMin        = 4;
3812                 pAd->StaCfg.CCXQosECWMax        = 10;
3813
3814                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3815                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3816                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3817                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3818                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3819
3820                 // Nitro mode control
3821                 pAd->StaCfg.bAutoReconnect = TRUE;
3822
3823                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3824                 // This patch is for driver wake up from standby mode, system will do scan right away.
3825                 pAd->StaCfg.LastScanTime = 0;
3826                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3827                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3828                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3829                 pAd->StaCfg.IEEE8021X = FALSE;
3830                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3831                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3832                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3833         }
3834
3835         // Default for extra information is not valid
3836         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3837
3838         // Default Config change flag
3839         pAd->bConfigChanged = FALSE;
3840
3841         //
3842         // part III. AP configurations
3843         //
3844
3845
3846         //
3847         // part IV. others
3848         //
3849         // dynamic BBP R66:sensibity tuning to overcome background noise
3850         pAd->BbpTuning.bEnable                = TRUE;
3851         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3852         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3853         pAd->BbpTuning.R66Delta               = 4;
3854         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3855
3856         //
3857         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3858         // if not initial this value, the default value will be 0.
3859         //
3860         pAd->BbpTuning.R66CurrentValue = 0x38;
3861
3862         pAd->Bbp94 = BBPR94_DEFAULT;
3863         pAd->BbpForCCK = FALSE;
3864
3865         // initialize MAC table and allocate spin lock
3866         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3867         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3868         NdisAllocateSpinLock(&pAd->MacTabLock);
3869
3870         pAd->CommonCfg.bWiFiTest = FALSE;
3871 #ifdef RT2860
3872         pAd->bPCIclkOff = FALSE;
3873
3874         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3875 #endif
3876         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3877 }
3878
3879 // IRQL = PASSIVE_LEVEL
3880 UCHAR BtoH(char ch)
3881 {
3882         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3883         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3884         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3885         return(255);
3886 }
3887
3888 //
3889 //  FUNCTION: AtoH(char *, UCHAR *, int)
3890 //
3891 //  PURPOSE:  Converts ascii string to network order hex
3892 //
3893 //  PARAMETERS:
3894 //    src    - pointer to input ascii string
3895 //    dest   - pointer to output hex
3896 //    destlen - size of dest
3897 //
3898 //  COMMENTS:
3899 //
3900 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3901 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3902 //
3903 // IRQL = PASSIVE_LEVEL
3904
3905 void AtoH(char * src, UCHAR * dest, int destlen)
3906 {
3907         char * srcptr;
3908         PUCHAR destTemp;
3909
3910         srcptr = src;
3911         destTemp = (PUCHAR) dest;
3912
3913         while(destlen--)
3914         {
3915                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3916                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3917                 destTemp++;
3918         }
3919 }
3920
3921 VOID    RTMPPatchMacBbpBug(
3922         IN      PRTMP_ADAPTER   pAd)
3923 {
3924         ULONG   Index;
3925
3926         // Initialize BBP register to default value
3927         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3928         {
3929                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3930         }
3931
3932         // Initialize RF register to default value
3933         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3934         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3935
3936         // Re-init BBP register from EEPROM value
3937         NICInitAsicFromEEPROM(pAd);
3938 }
3939
3940 /*
3941         ========================================================================
3942
3943         Routine Description:
3944                 Init timer objects
3945
3946         Arguments:
3947                 pAd                     Pointer to our adapter
3948                 pTimer                          Timer structure
3949                 pTimerFunc                      Function to execute when timer expired
3950                 Repeat                          Ture for period timer
3951
3952         Return Value:
3953                 None
3954
3955         Note:
3956
3957         ========================================================================
3958 */
3959 VOID    RTMPInitTimer(
3960         IN      PRTMP_ADAPTER                   pAd,
3961         IN      PRALINK_TIMER_STRUCT    pTimer,
3962         IN      PVOID                                   pTimerFunc,
3963         IN      PVOID                                   pData,
3964         IN      BOOLEAN                                 Repeat)
3965 {
3966         //
3967         // Set Valid to TRUE for later used.
3968         // It will crash if we cancel a timer or set a timer
3969         // that we haven't initialize before.
3970         //
3971         pTimer->Valid      = TRUE;
3972
3973         pTimer->PeriodicType = Repeat;
3974         pTimer->State      = FALSE;
3975         pTimer->cookie = (ULONG) pData;
3976
3977 #ifdef RT2870
3978         pTimer->pAd = pAd;
3979 #endif // RT2870 //
3980
3981         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3982 }
3983
3984 /*
3985         ========================================================================
3986
3987         Routine Description:
3988                 Init timer objects
3989
3990         Arguments:
3991                 pTimer                          Timer structure
3992                 Value                           Timer value in milliseconds
3993
3994         Return Value:
3995                 None
3996
3997         Note:
3998                 To use this routine, must call RTMPInitTimer before.
3999
4000         ========================================================================
4001 */
4002 VOID    RTMPSetTimer(
4003         IN      PRALINK_TIMER_STRUCT    pTimer,
4004         IN      ULONG                                   Value)
4005 {
4006         if (pTimer->Valid)
4007         {
4008                 pTimer->TimerValue = Value;
4009                 pTimer->State      = FALSE;
4010                 if (pTimer->PeriodicType == TRUE)
4011                 {
4012                         pTimer->Repeat = TRUE;
4013                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
4014                 }
4015                 else
4016                 {
4017                         pTimer->Repeat = FALSE;
4018                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
4019                 }
4020         }
4021         else
4022         {
4023                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
4024         }
4025 }
4026
4027
4028 /*
4029         ========================================================================
4030
4031         Routine Description:
4032                 Init timer objects
4033
4034         Arguments:
4035                 pTimer                          Timer structure
4036                 Value                           Timer value in milliseconds
4037
4038         Return Value:
4039                 None
4040
4041         Note:
4042                 To use this routine, must call RTMPInitTimer before.
4043
4044         ========================================================================
4045 */
4046 VOID    RTMPModTimer(
4047         IN      PRALINK_TIMER_STRUCT    pTimer,
4048         IN      ULONG                                   Value)
4049 {
4050         BOOLEAN Cancel;
4051
4052         if (pTimer->Valid)
4053         {
4054                 pTimer->TimerValue = Value;
4055                 pTimer->State      = FALSE;
4056                 if (pTimer->PeriodicType == TRUE)
4057                 {
4058                         RTMPCancelTimer(pTimer, &Cancel);
4059                         RTMPSetTimer(pTimer, Value);
4060                 }
4061                 else
4062                 {
4063                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
4064                 }
4065         }
4066         else
4067         {
4068                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
4069         }
4070 }
4071
4072 /*
4073         ========================================================================
4074
4075         Routine Description:
4076                 Cancel timer objects
4077
4078         Arguments:
4079                 Adapter                                         Pointer to our adapter
4080
4081         Return Value:
4082                 None
4083
4084         IRQL = PASSIVE_LEVEL
4085         IRQL = DISPATCH_LEVEL
4086
4087         Note:
4088                 1.) To use this routine, must call RTMPInitTimer before.
4089                 2.) Reset NIC to initial state AS IS system boot up time.
4090
4091         ========================================================================
4092 */
4093 VOID    RTMPCancelTimer(
4094         IN      PRALINK_TIMER_STRUCT    pTimer,
4095         OUT     BOOLEAN                                 *pCancelled)
4096 {
4097         if (pTimer->Valid)
4098         {
4099                 if (pTimer->State == FALSE)
4100                         pTimer->Repeat = FALSE;
4101                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
4102
4103                 if (*pCancelled == TRUE)
4104                         pTimer->State = TRUE;
4105
4106 #ifdef RT2870
4107                 // We need to go-through the TimerQ to findout this timer handler and remove it if
4108                 //              it's still waiting for execution.
4109
4110                 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
4111 #endif // RT2870 //
4112         }
4113         else
4114         {
4115                 //
4116                 // NdisMCancelTimer just canced the timer and not mean release the timer.
4117                 // And don't set the "Valid" to False. So that we can use this timer again.
4118                 //
4119                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
4120         }
4121 }
4122
4123 /*
4124         ========================================================================
4125
4126         Routine Description:
4127                 Set LED Status
4128
4129         Arguments:
4130                 pAd                                             Pointer to our adapter
4131                 Status                                  LED Status
4132
4133         Return Value:
4134                 None
4135
4136         IRQL = PASSIVE_LEVEL
4137         IRQL = DISPATCH_LEVEL
4138
4139         Note:
4140
4141         ========================================================================
4142 */
4143 VOID RTMPSetLED(
4144         IN PRTMP_ADAPTER        pAd,
4145         IN UCHAR                        Status)
4146 {
4147         //ULONG                 data;
4148         UCHAR                   HighByte = 0;
4149         UCHAR                   LowByte;
4150
4151         LowByte = pAd->LedCntl.field.LedMode&0x7f;
4152         switch (Status)
4153         {
4154                 case LED_LINK_DOWN:
4155                         HighByte = 0x20;
4156                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4157                         pAd->LedIndicatorStregth = 0;
4158                         break;
4159                 case LED_LINK_UP:
4160                         if (pAd->CommonCfg.Channel > 14)
4161                                 HighByte = 0xa0;
4162                         else
4163                                 HighByte = 0x60;
4164                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4165                         break;
4166                 case LED_RADIO_ON:
4167                         HighByte = 0x20;
4168                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4169                         break;
4170                 case LED_HALT:
4171                         LowByte = 0; // Driver sets MAC register and MAC controls LED
4172                 case LED_RADIO_OFF:
4173                         HighByte = 0;
4174                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4175                         break;
4176         case LED_WPS:
4177                         HighByte = 0x10;
4178                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4179                         break;
4180                 case LED_ON_SITE_SURVEY:
4181                         HighByte = 0x08;
4182                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4183                         break;
4184                 case LED_POWER_UP:
4185                         HighByte = 0x04;
4186                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4187                         break;
4188                 default:
4189                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
4190                         break;
4191         }
4192
4193     //
4194         // Keep LED status for LED SiteSurvey mode.
4195         // After SiteSurvey, we will set the LED mode to previous status.
4196         //
4197         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
4198                 pAd->LedStatus = Status;
4199
4200         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
4201 }
4202
4203 /*
4204         ========================================================================
4205
4206         Routine Description:
4207                 Set LED Signal Stregth
4208
4209         Arguments:
4210                 pAd                                             Pointer to our adapter
4211                 Dbm                                             Signal Stregth
4212
4213         Return Value:
4214                 None
4215
4216         IRQL = PASSIVE_LEVEL
4217
4218         Note:
4219                 Can be run on any IRQL level.
4220
4221                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
4222                 <= -90  No Signal
4223                 <= -81  Very Low
4224                 <= -71  Low
4225                 <= -67  Good
4226                 <= -57  Very Good
4227                  > -57  Excellent
4228         ========================================================================
4229 */
4230 VOID RTMPSetSignalLED(
4231         IN PRTMP_ADAPTER        pAd,
4232         IN NDIS_802_11_RSSI Dbm)
4233 {
4234         UCHAR           nLed = 0;
4235
4236         //
4237         // if not Signal Stregth, then do nothing.
4238         //
4239         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
4240         {
4241                 return;
4242         }
4243
4244         if (Dbm <= -90)
4245                 nLed = 0;
4246         else if (Dbm <= -81)
4247                 nLed = 1;
4248         else if (Dbm <= -71)
4249                 nLed = 3;
4250         else if (Dbm <= -67)
4251                 nLed = 7;
4252         else if (Dbm <= -57)
4253                 nLed = 15;
4254         else
4255                 nLed = 31;
4256
4257         //
4258         // Update Signal Stregth to firmware if changed.
4259         //
4260         if (pAd->LedIndicatorStregth != nLed)
4261         {
4262                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
4263                 pAd->LedIndicatorStregth = nLed;
4264         }
4265 }
4266
4267 /*
4268         ========================================================================
4269
4270         Routine Description:
4271                 Enable RX
4272
4273         Arguments:
4274                 pAd                                             Pointer to our adapter
4275
4276         Return Value:
4277                 None
4278
4279         IRQL <= DISPATCH_LEVEL
4280
4281         Note:
4282                 Before Enable RX, make sure you have enabled Interrupt.
4283         ========================================================================
4284 */
4285 VOID RTMPEnableRxTx(
4286         IN PRTMP_ADAPTER        pAd)
4287 {
4288         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
4289
4290         // Enable Rx DMA.
4291         RT28XXDMAEnable(pAd);
4292
4293         // enable RX of MAC block
4294         if (pAd->OpMode == OPMODE_AP)
4295         {
4296                 UINT32 rx_filter_flag = APNORMAL;
4297
4298
4299                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
4300         }
4301         else
4302         {
4303                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
4304         }
4305
4306         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
4307         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
4308 }
4309
4310