drivers/staging/iio/adc/ad7793.c

   1 /*
   2  * AD7792/AD7793 SPI ADC driver
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/regulator/consumer.h>
  16 #include <linux/err.h>
  17 #include <linux/sched.h>
  18 #include <linux/delay.h>
  19
  20 #include "../iio.h"
  21 #include "../sysfs.h"
  22 #include "../ring_generic.h"
  23 #include "../ring_sw.h"
  24 #include "../trigger.h"
  25 #include "adc.h"
  26
  27 #include "ad7793.h"
  28
  29 /* NOTE:
  30  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
  31  * In order to avoid contentions on the SPI bus, it's therefore necessary
  32  * to use spi bus locking.
  33  *
  34  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
  35  */
  36
  37 struct ad7793_chip_info {
  38         struct iio_chan_spec            channel[7];
  39 };
  40
  41 struct ad7793_state {
  42         struct spi_device               *spi;
  43         struct iio_trigger              *trig;
  44         const struct ad7793_chip_info   *chip_info;
  45         struct regulator                *reg;
  46         struct ad7793_platform_data     *pdata;
  47         wait_queue_head_t               wq_data_avail;
  48         bool                            done;
  49         bool                            irq_dis;
  50         u16                             int_vref_mv;
  51         u16                             mode;
  52         u16                             conf;
  53         u32                             scale_avail[8][2];
  54         u32                             available_scan_masks[7];
  55         /*
  56          * DMA (thus cache coherency maintenance) requires the
  57          * transfer buffers to live in their own cache lines.
  58          */
  59         u8                              data[4] ____cacheline_aligned;
  60 };
  61
  62 enum ad7793_supported_device_ids {
  63         ID_AD7792,
  64         ID_AD7793,
  65 };
  66
  67 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
  68                               bool cs_change, unsigned char reg,
  69                               unsigned size, unsigned val)
  70 {
  71         u8 *data = st->data;
  72         struct spi_transfer t = {
  73                 .tx_buf         = data,
  74                 .len            = size + 1,
  75                 .cs_change      = cs_change,
  76         };
  77         struct spi_message m;
  78
  79         data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
  80
  81         switch (size) {
  82         case 3:
  83                 data[1] = val >> 16;
  84                 data[2] = val >> 8;
  85                 data[3] = val;
  86                 break;
  87         case 2:
  88                 data[1] = val >> 8;
  89                 data[2] = val;
  90                 break;
  91         case 1:
  92                 data[1] = val;
  93                 break;
  94         default:
  95                 return -EINVAL;
  96         }
  97
  98         spi_message_init(&m);
  99         spi_message_add_tail(&t, &m);
 100
 101         if (locked)
 102                 return spi_sync_locked(st->spi, &m);
 103         else
 104                 return spi_sync(st->spi, &m);
 105 }
 106
 107 static int ad7793_write_reg(struct ad7793_state *st,
 108                             unsigned reg, unsigned size, unsigned val)
 109 {
 110         return __ad7793_write_reg(st, false, false, reg, size, val);
 111 }
 112
 113 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
 114                              bool cs_change, unsigned char reg,
 115                              int *val, unsigned size)
 116 {
 117         u8 *data = st->data;
 118         int ret;
 119         struct spi_transfer t[] = {
 120                 {
 121                         .tx_buf = data,
 122                         .len = 1,
 123                 }, {
 124                         .rx_buf = data,
 125                         .len = size,
 126                         .cs_change = cs_change,
 127                 },
 128         };
 129         struct spi_message m;
 130
 131         data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
 132
 133         spi_message_init(&m);
 134         spi_message_add_tail(&t[0], &m);
 135         spi_message_add_tail(&t[1], &m);
 136
 137         if (locked)
 138                 ret = spi_sync_locked(st->spi, &m);
 139         else
 140                 ret = spi_sync(st->spi, &m);
 141
 142         if (ret < 0)
 143                 return ret;
 144
 145         switch (size) {
 146         case 3:
 147                 *val = data[0] << 16 | data[1] << 8 | data[2];
 148                 break;
 149         case 2:
 150                 *val = data[0] << 8 | data[1];
 151                 break;
 152         case 1:
 153                 *val = data[0];
 154                 break;
 155         default:
 156                 return -EINVAL;
 157         }
 158
 159         return 0;
 160 }
 161
 162 static int ad7793_read_reg(struct ad7793_state *st,
 163                            unsigned reg, int *val, unsigned size)
 164 {
 165         return __ad7793_read_reg(st, 0, 0, reg, val, size);
 166 }
 167
 168 static int ad7793_read(struct ad7793_state *st, unsigned ch,
 169                        unsigned len, int *val)
 170 {
 171         int ret;
 172         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
 173         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
 174                 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
 175
 176         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 177
 178         spi_bus_lock(st->spi->master);
 179         st->done = false;
 180
 181         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 182                                  sizeof(st->mode), st->mode);
 183         if (ret < 0)
 184                 goto out;
 185
 186         st->irq_dis = false;
 187         enable_irq(st->spi->irq);
 188         wait_event_interruptible(st->wq_data_avail, st->done);
 189
 190         ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
 191 out:
 192         spi_bus_unlock(st->spi->master);
 193
 194         return ret;
 195 }
 196
 197 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
 198 {
 199         int ret;
 200
 201         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
 202         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
 203
 204         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 205
 206         spi_bus_lock(st->spi->master);
 207         st->done = false;
 208
 209         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 210                                  sizeof(st->mode), st->mode);
 211         if (ret < 0)
 212                 goto out;
 213
 214         st->irq_dis = false;
 215         enable_irq(st->spi->irq);
 216         wait_event_interruptible(st->wq_data_avail, st->done);
 217
 218         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
 219                 AD7793_MODE_SEL(AD7793_MODE_IDLE);
 220
 221         ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
 222                                  sizeof(st->mode), st->mode);
 223 out:
 224         spi_bus_unlock(st->spi->master);
 225
 226         return ret;
 227 }
 228
 229 static const u8 ad7793_calib_arr[6][2] = {
 230         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
 231         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
 232         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
 233         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
 234         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
 235         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
 236 };
 237
 238 static int ad7793_calibrate_all(struct ad7793_state *st)
 239 {
 240         int i, ret;
 241
 242         for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
 243                 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
 244                                        ad7793_calib_arr[i][1]);
 245                 if (ret)
 246                         goto out;
 247         }
 248
 249         return 0;
 250 out:
 251         dev_err(&st->spi->dev, "Calibration failed\n");
 252         return ret;
 253 }
 254
 255 static int ad7793_setup(struct ad7793_state *st)
 256 {
 257         int i, ret = -1;
 258         unsigned long long scale_uv;
 259         u32 id;
 260
 261         /* reset the serial interface */
 262         ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
 263         if (ret < 0)
 264                 goto out;
 265         msleep(1); /* Wait for at least 500us */
 266
 267         /* write/read test for device presence */
 268         ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
 269         if (ret)
 270                 goto out;
 271
 272         id &= AD7793_ID_MASK;
 273
 274         if (!((id == AD7792_ID) || (id == AD7793_ID))) {
 275                 dev_err(&st->spi->dev, "device ID query failed\n");
 276                 goto out;
 277         }
 278
 279         st->mode  = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
 280                         AD7793_MODE_SEL(AD7793_MODE_IDLE);
 281         st->conf  = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
 282
 283         ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
 284         if (ret)
 285                 goto out;
 286
 287         ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 288         if (ret)
 289                 goto out;
 290
 291         ret = ad7793_write_reg(st, AD7793_REG_IO,
 292                                sizeof(st->pdata->io), st->pdata->io);
 293         if (ret)
 294                 goto out;
 295
 296         ret = ad7793_calibrate_all(st);
 297         if (ret)
 298                 goto out;
 299
 300         /* Populate available ADC input ranges */
 301         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
 302                 scale_uv = ((u64)st->int_vref_mv * 100000000)
 303                         >> (st->chip_info->channel[0].scan_type.realbits -
 304                         (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
 305                 scale_uv >>= i;
 306
 307                 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
 308                 st->scale_avail[i][0] = scale_uv;
 309         }
 310
 311         return 0;
 312 out:
 313         dev_err(&st->spi->dev, "setup failed\n");
 314         return ret;
 315 }
 316
 317 static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
 318 {
 319         struct iio_ring_buffer *ring = iio_priv_to_dev(st)->ring;
 320         int ret;
 321         s64 dat64[2];
 322         u32 *dat32 = (u32 *)dat64;
 323
 324         if (!(ring->scan_mask & (1 << ch)))
 325                 return  -EBUSY;
 326
 327         ret = ring->access->read_last(ring, (u8 *) &dat64);
 328         if (ret)
 329                 return ret;
 330
 331         *val = *dat32;
 332
 333         return 0;
 334 }
 335
 336 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
 337 {
 338         struct ad7793_state *st = iio_priv(indio_dev);
 339         struct iio_ring_buffer *ring = indio_dev->ring;
 340         size_t d_size;
 341         unsigned channel;
 342
 343         if (!ring->scan_count)
 344                 return -EINVAL;
 345
 346         channel = __ffs(ring->scan_mask);
 347
 348         d_size = ring->scan_count *
 349                  indio_dev->channels[0].scan_type.storagebits / 8;
 350
 351         if (ring->scan_timestamp) {
 352                 d_size += sizeof(s64);
 353
 354                 if (d_size % sizeof(s64))
 355                         d_size += sizeof(s64) - (d_size % sizeof(s64));
 356         }
 357
 358         if (indio_dev->ring->access->set_bytes_per_datum)
 359                 indio_dev->ring->access->set_bytes_per_datum(indio_dev->ring,
 360                                                              d_size);
 361
 362         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
 363                     AD7793_MODE_SEL(AD7793_MODE_CONT);
 364         st->conf  = (st->conf & ~AD7793_CONF_CHAN(-1)) |
 365                     AD7793_CONF_CHAN(indio_dev->channels[channel].address);
 366
 367         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 368
 369         spi_bus_lock(st->spi->master);
 370         __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 371                            sizeof(st->mode), st->mode);
 372
 373         st->irq_dis = false;
 374         enable_irq(st->spi->irq);
 375
 376         return 0;
 377 }
 378
 379 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
 380 {
 381         struct ad7793_state *st = iio_priv(indio_dev);
 382
 383         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
 384                     AD7793_MODE_SEL(AD7793_MODE_IDLE);
 385
 386         st->done = false;
 387         wait_event_interruptible(st->wq_data_avail, st->done);
 388
 389         if (!st->irq_dis)
 390                 disable_irq_nosync(st->spi->irq);
 391
 392         __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
 393                            sizeof(st->mode), st->mode);
 394
 395         return spi_bus_unlock(st->spi->master);
 396 }
 397
 398 /**
 399  * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
 400  **/
 401
 402 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
 403 {
 404         struct iio_poll_func *pf = p;
 405         struct iio_dev *indio_dev = pf->private_data;
 406         struct iio_ring_buffer *ring = indio_dev->ring;
 407         struct ad7793_state *st = iio_priv(indio_dev);
 408         s64 dat64[2];
 409         s32 *dat32 = (s32 *)dat64;
 410
 411         if (ring->scan_count)
 412                 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
 413                                   dat32,
 414                                   indio_dev->channels[0].scan_type.realbits/8);
 415
 416         /* Guaranteed to be aligned with 8 byte boundary */
 417         if (ring->scan_timestamp)
 418                 dat64[1] = pf->timestamp;
 419
 420         ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
 421
 422         iio_trigger_notify_done(indio_dev->trig);
 423         st->irq_dis = false;
 424         enable_irq(st->spi->irq);
 425
 426         return IRQ_HANDLED;
 427 }
 428
 429 static const struct iio_ring_setup_ops ad7793_ring_setup_ops = {
 430         .preenable = &ad7793_ring_preenable,
 431         .postenable = &iio_triggered_ring_postenable,
 432         .predisable = &iio_triggered_ring_predisable,
 433         .postdisable = &ad7793_ring_postdisable,
 434 };
 435
 436 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
 437 {
 438         int ret;
 439
 440         indio_dev->ring = iio_sw_rb_allocate(indio_dev);
 441         if (!indio_dev->ring) {
 442                 ret = -ENOMEM;
 443                 goto error_ret;
 444         }
 445         /* Effectively select the ring buffer implementation */
 446         indio_dev->ring->access = &ring_sw_access_funcs;
 447         indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
 448                                                  &ad7793_trigger_handler,
 449                                                  IRQF_ONESHOT,
 450                                                  indio_dev,
 451                                                  "ad7793_consumer%d",
 452                                                  indio_dev->id);
 453         if (indio_dev->pollfunc == NULL) {
 454                 ret = -ENOMEM;
 455                 goto error_deallocate_sw_rb;
 456         }
 457
 458         /* Ring buffer functions - here trigger setup related */
 459         indio_dev->ring->setup_ops = &ad7793_ring_setup_ops;
 460
 461         /* Flag that polled ring buffering is possible */
 462         indio_dev->modes |= INDIO_RING_TRIGGERED;
 463         return 0;
 464
 465 error_deallocate_sw_rb:
 466         iio_sw_rb_free(indio_dev->ring);
 467 error_ret:
 468         return ret;
 469 }
 470
 471 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
 472 {
 473         /* ensure that the trigger has been detached */
 474         if (indio_dev->trig) {
 475                 iio_put_trigger(indio_dev->trig);
 476                 iio_trigger_dettach_poll_func(indio_dev->trig,
 477                                               indio_dev->pollfunc);
 478         }
 479         iio_dealloc_pollfunc(indio_dev->pollfunc);
 480         iio_sw_rb_free(indio_dev->ring);
 481 }
 482
 483 /**
 484  * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
 485  **/
 486 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
 487 {
 488         struct ad7793_state *st = iio_priv(private);
 489
 490         st->done = true;
 491         wake_up_interruptible(&st->wq_data_avail);
 492         disable_irq_nosync(irq);
 493         st->irq_dis = true;
 494         iio_trigger_poll(st->trig, iio_get_time_ns());
 495
 496         return IRQ_HANDLED;
 497 }
 498
 499 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
 500 {
 501         struct ad7793_state *st = iio_priv(indio_dev);
 502         int ret;
 503
 504         st->trig = iio_allocate_trigger("%s-dev%d",
 505                                         spi_get_device_id(st->spi)->name,
 506                                         indio_dev->id);
 507         if (st->trig == NULL) {
 508                 ret = -ENOMEM;
 509                 goto error_ret;
 510         }
 511
 512         ret = request_irq(st->spi->irq,
 513                           ad7793_data_rdy_trig_poll,
 514                           IRQF_TRIGGER_LOW,
 515                           spi_get_device_id(st->spi)->name,
 516                           indio_dev);
 517         if (ret)
 518                 goto error_free_trig;
 519
 520         disable_irq_nosync(st->spi->irq);
 521         st->irq_dis = true;
 522         st->trig->dev.parent = &st->spi->dev;
 523         st->trig->owner = THIS_MODULE;
 524         st->trig->private_data = indio_dev;
 525
 526         ret = iio_trigger_register(st->trig);
 527
 528         /* select default trigger */
 529         indio_dev->trig = st->trig;
 530         if (ret)
 531                 goto error_free_irq;
 532
 533         return 0;
 534
 535 error_free_irq:
 536         free_irq(st->spi->irq, indio_dev);
 537 error_free_trig:
 538         iio_free_trigger(st->trig);
 539 error_ret:
 540         return ret;
 541 }
 542
 543 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
 544 {
 545         struct ad7793_state *st = iio_priv(indio_dev);
 546
 547         iio_trigger_unregister(st->trig);
 548         free_irq(st->spi->irq, indio_dev);
 549         iio_free_trigger(st->trig);
 550 }
 551
 552 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
 553                                           17, 16, 12, 10, 8, 6, 4};
 554
 555 static ssize_t ad7793_read_frequency(struct device *dev,
 556                 struct device_attribute *attr,
 557                 char *buf)
 558 {
 559         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 560         struct ad7793_state *st = iio_priv(indio_dev);
 561
 562         return sprintf(buf, "%d\n",
 563                        sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
 564 }
 565
 566 static ssize_t ad7793_write_frequency(struct device *dev,
 567                 struct device_attribute *attr,
 568                 const char *buf,
 569                 size_t len)
 570 {
 571         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 572         struct ad7793_state *st = iio_priv(indio_dev);
 573         long lval;
 574         int i, ret;
 575
 576         mutex_lock(&indio_dev->mlock);
 577         if (iio_ring_enabled(indio_dev)) {
 578                 mutex_unlock(&indio_dev->mlock);
 579                 return -EBUSY;
 580         }
 581         mutex_unlock(&indio_dev->mlock);
 582
 583         ret = strict_strtol(buf, 10, &lval);
 584         if (ret)
 585                 return ret;
 586
 587         ret = -EINVAL;
 588
 589         for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
 590                 if (lval == sample_freq_avail[i]) {
 591                         mutex_lock(&indio_dev->mlock);
 592                         st->mode &= ~AD7793_MODE_RATE(-1);
 593                         st->mode |= AD7793_MODE_RATE(i);
 594                         ad7793_write_reg(st, AD7793_REG_MODE,
 595                                          sizeof(st->mode), st->mode);
 596                         mutex_unlock(&indio_dev->mlock);
 597                         ret = 0;
 598                 }
 599
 600         return ret ? ret : len;
 601 }
 602
 603 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 604                 ad7793_read_frequency,
 605                 ad7793_write_frequency);
 606
 607 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
 608         "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
 609
 610 static ssize_t ad7793_show_scale_available(struct device *dev,
 611                         struct device_attribute *attr, char *buf)
 612 {
 613         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 614         struct ad7793_state *st = iio_priv(indio_dev);
 615         int i, len = 0;
 616
 617         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
 618                 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
 619                                st->scale_avail[i][1]);
 620
 621         len += sprintf(buf + len, "\n");
 622
 623         return len;
 624 }
 625
 626 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
 627                              S_IRUGO, ad7793_show_scale_available, NULL, 0);
 628
 629 static struct attribute *ad7793_attributes[] = {
 630         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 631         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 632         &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
 633         NULL
 634 };
 635
 636 static const struct attribute_group ad7793_attribute_group = {
 637         .attrs = ad7793_attributes,
 638 };
 639
 640 static int ad7793_read_raw(struct iio_dev *indio_dev,
 641                            struct iio_chan_spec const *chan,
 642                            int *val,
 643                            int *val2,
 644                            long m)
 645 {
 646         struct ad7793_state *st = iio_priv(indio_dev);
 647         int ret, smpl = 0;
 648         unsigned long long scale_uv;
 649         bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
 650
 651         switch (m) {
 652         case 0:
 653                 mutex_lock(&indio_dev->mlock);
 654                 if (iio_ring_enabled(indio_dev))
 655                         ret = ad7793_scan_from_ring(st,
 656                                         chan->scan_index, &smpl);
 657                 else
 658                         ret = ad7793_read(st, chan->address,
 659                                         chan->scan_type.realbits / 8, &smpl);
 660                 mutex_unlock(&indio_dev->mlock);
 661
 662                 if (ret < 0)
 663                         return ret;
 664
 665                 *val = (smpl >> chan->scan_type.shift) &
 666                         ((1 << (chan->scan_type.realbits)) - 1);
 667
 668                 if (!unipolar)
 669                         *val -= (1 << (chan->scan_type.realbits - 1));
 670
 671                 return IIO_VAL_INT;
 672
 673         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
 674                 *val = st->scale_avail[(st->conf >> 8) & 0x7][0];
 675                 *val2 = st->scale_avail[(st->conf >> 8) & 0x7][1];
 676
 677                 return IIO_VAL_INT_PLUS_NANO;
 678
 679         case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
 680                 switch (chan->type) {
 681                 case IIO_IN:
 682                         /* 1170mV / 2^23 * 6 */
 683                         scale_uv = (1170ULL * 100000000ULL * 6ULL)
 684                                 >> (chan->scan_type.realbits -
 685                                 (unipolar ? 0 : 1));
 686                         break;
 687                 case IIO_TEMP:
 688                         /* Always uses unity gain and internal ref */
 689                         scale_uv = (2500ULL * 100000000ULL)
 690                                 >> (chan->scan_type.realbits -
 691                                 (unipolar ? 0 : 1));
 692                         break;
 693                 default:
 694                         return -EINVAL;
 695                 }
 696
 697                 *val2 = do_div(scale_uv, 100000000) * 10;
 698                 *val =  scale_uv;
 699
 700                 return IIO_VAL_INT_PLUS_NANO;
 701         }
 702         return -EINVAL;
 703 }
 704
 705 static int ad7793_write_raw(struct iio_dev *indio_dev,
 706                                struct iio_chan_spec const *chan,
 707                                int val,
 708                                int val2,
 709                                long mask)
 710 {
 711         struct ad7793_state *st = iio_priv(indio_dev);
 712         int ret, i;
 713         unsigned int tmp;
 714
 715         mutex_lock(&indio_dev->mlock);
 716         if (iio_ring_enabled(indio_dev)) {
 717                 mutex_unlock(&indio_dev->mlock);
 718                 return -EBUSY;
 719         }
 720
 721         switch (mask) {
 722         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
 723                 ret = -EINVAL;
 724                 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
 725                         if (val2 == st->scale_avail[i][1]) {
 726                                 tmp = st->conf;
 727                                 st->conf &= ~AD7793_CONF_GAIN(-1);
 728                                 st->conf |= AD7793_CONF_GAIN(i);
 729
 730                                 if (tmp != st->conf) {
 731                                         ad7793_write_reg(st, AD7793_REG_CONF,
 732                                                          sizeof(st->conf),
 733                                                          st->conf);
 734                                         ad7793_calibrate_all(st);
 735                                 }
 736                                 ret = 0;
 737                         }
 738
 739         default:
 740                 ret = -EINVAL;
 741         }
 742
 743         mutex_unlock(&indio_dev->mlock);
 744         return ret;
 745 }
 746
 747 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
 748                                    struct iio_trigger *trig)
 749 {
 750         if (indio_dev->trig != trig)
 751                 return -EINVAL;
 752
 753         return 0;
 754 }
 755
 756 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
 757                                struct iio_chan_spec const *chan,
 758                                long mask)
 759 {
 760         return IIO_VAL_INT_PLUS_NANO;
 761 }
 762
 763 static const struct iio_info ad7793_info = {
 764         .read_raw = &ad7793_read_raw,
 765         .write_raw = &ad7793_write_raw,
 766         .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
 767         .attrs = &ad7793_attribute_group,
 768         .validate_trigger = ad7793_validate_trigger,
 769         .driver_module = THIS_MODULE,
 770 };
 771
 772 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
 773         [ID_AD7793] = {
 774                 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
 775                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 776                                     AD7793_CH_AIN1P_AIN1M,
 777                                     0, IIO_ST('s', 24, 32, 0), 0),
 778                 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
 779                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 780                                     AD7793_CH_AIN2P_AIN2M,
 781                                     1, IIO_ST('s', 24, 32, 0), 0),
 782                 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
 783                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 784                                     AD7793_CH_AIN3P_AIN3M,
 785                                     2, IIO_ST('s', 24, 32, 0), 0),
 786                 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
 787                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 788                                     AD7793_CH_AIN1M_AIN1M,
 789                                     3, IIO_ST('s', 24, 32, 0), 0),
 790                 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
 791                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
 792                                     AD7793_CH_TEMP,
 793                                     4, IIO_ST('s', 24, 32, 0), 0),
 794                 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
 795                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
 796                                     AD7793_CH_AVDD_MONITOR,
 797                                     5, IIO_ST('s', 24, 32, 0), 0),
 798                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
 799         },
 800         [ID_AD7792] = {
 801                 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
 802                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 803                                     AD7793_CH_AIN1P_AIN1M,
 804                                     0, IIO_ST('s', 16, 32, 0), 0),
 805                 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
 806                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 807                                     AD7793_CH_AIN2P_AIN2M,
 808                                     1, IIO_ST('s', 16, 32, 0), 0),
 809                 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
 810                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 811                                     AD7793_CH_AIN3P_AIN3M,
 812                                     2, IIO_ST('s', 16, 32, 0), 0),
 813                 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
 814                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
 815                                     AD7793_CH_AIN1M_AIN1M,
 816                                     3, IIO_ST('s', 16, 32, 0), 0),
 817                 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
 818                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
 819                                     AD7793_CH_TEMP,
 820                                     4, IIO_ST('s', 16, 32, 0), 0),
 821                 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
 822                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
 823                                     AD7793_CH_AVDD_MONITOR,
 824                                     5, IIO_ST('s', 16, 32, 0), 0),
 825                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
 826         },
 827 };
 828
 829 static int __devinit ad7793_probe(struct spi_device *spi)
 830 {
 831         struct ad7793_platform_data *pdata = spi->dev.platform_data;
 832         struct ad7793_state *st;
 833         struct iio_dev *indio_dev;
 834         int ret, i, voltage_uv = 0, regdone = 0;
 835
 836         if (!pdata) {
 837                 dev_err(&spi->dev, "no platform data?\n");
 838                 return -ENODEV;
 839         }
 840
 841         if (!spi->irq) {
 842                 dev_err(&spi->dev, "no IRQ?\n");
 843                 return -ENODEV;
 844         }
 845
 846         indio_dev = iio_allocate_device(sizeof(*st));
 847         if (indio_dev == NULL)
 848                 return -ENOMEM;
 849
 850         st = iio_priv(indio_dev);
 851
 852         st->reg = regulator_get(&spi->dev, "vcc");
 853         if (!IS_ERR(st->reg)) {
 854                 ret = regulator_enable(st->reg);
 855                 if (ret)
 856                         goto error_put_reg;
 857
 858                 voltage_uv = regulator_get_voltage(st->reg);
 859         }
 860
 861         st->chip_info =
 862                 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 863
 864         st->pdata = pdata;
 865
 866         if (pdata && pdata->vref_mv)
 867                 st->int_vref_mv = pdata->vref_mv;
 868         else if (voltage_uv)
 869                 st->int_vref_mv = voltage_uv / 1000;
 870         else
 871                 st->int_vref_mv = 2500; /* Build-in ref */
 872
 873         spi_set_drvdata(spi, indio_dev);
 874         st->spi = spi;
 875
 876         indio_dev->dev.parent = &spi->dev;
 877         indio_dev->name = spi_get_device_id(spi)->name;
 878         indio_dev->modes = INDIO_DIRECT_MODE;
 879         indio_dev->channels = st->chip_info->channel;
 880         indio_dev->available_scan_masks = st->available_scan_masks;
 881         indio_dev->num_channels = 7;
 882         indio_dev->info = &ad7793_info;
 883
 884         for (i = 0; i < indio_dev->num_channels; i++)
 885                 st->available_scan_masks[i] = (1 << i) | (1 <<
 886                         indio_dev->channels[indio_dev->num_channels - 1].
 887                         scan_index);
 888
 889         init_waitqueue_head(&st->wq_data_avail);
 890
 891         ret = ad7793_register_ring_funcs_and_init(indio_dev);
 892         if (ret)
 893                 goto error_disable_reg;
 894
 895         ret = iio_device_register(indio_dev);
 896         if (ret)
 897                 goto error_unreg_ring;
 898         regdone = 1;
 899
 900         ret = ad7793_probe_trigger(indio_dev);
 901         if (ret)
 902                 goto error_unreg_ring;
 903
 904         ret = iio_ring_buffer_register_ex(indio_dev->ring, 0,
 905                                           indio_dev->channels,
 906                                           indio_dev->num_channels);
 907         if (ret)
 908                 goto error_remove_trigger;
 909
 910         ret = ad7793_setup(st);
 911         if (ret)
 912                 goto error_uninitialize_ring;
 913
 914         return 0;
 915
 916 error_uninitialize_ring:
 917         iio_ring_buffer_unregister(indio_dev->ring);
 918 error_remove_trigger:
 919         ad7793_remove_trigger(indio_dev);
 920 error_unreg_ring:
 921         ad7793_ring_cleanup(indio_dev);
 922 error_disable_reg:
 923         if (!IS_ERR(st->reg))
 924                 regulator_disable(st->reg);
 925 error_put_reg:
 926         if (!IS_ERR(st->reg))
 927                 regulator_put(st->reg);
 928
 929         if (regdone)
 930                 iio_device_unregister(indio_dev);
 931         else
 932                 iio_free_device(indio_dev);
 933
 934         return ret;
 935 }
 936
 937 static int ad7793_remove(struct spi_device *spi)
 938 {
 939         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 940         struct ad7793_state *st = iio_priv(indio_dev);
 941
 942         iio_ring_buffer_unregister(indio_dev->ring);
 943         ad7793_remove_trigger(indio_dev);
 944         ad7793_ring_cleanup(indio_dev);
 945
 946         if (!IS_ERR(st->reg)) {
 947                 regulator_disable(st->reg);
 948                 regulator_put(st->reg);
 949         }
 950
 951         iio_device_unregister(indio_dev);
 952
 953         return 0;
 954 }
 955
 956 static const struct spi_device_id ad7793_id[] = {
 957         {"ad7792", ID_AD7792},
 958         {"ad7793", ID_AD7793},
 959         {}
 960 };
 961
 962 static struct spi_driver ad7793_driver = {
 963         .driver = {
 964                 .name   = "ad7793",
 965                 .bus    = &spi_bus_type,
 966                 .owner  = THIS_MODULE,
 967         },
 968         .probe          = ad7793_probe,
 969         .remove         = __devexit_p(ad7793_remove),
 970         .id_table       = ad7793_id,
 971 };
 972
 973 static int __init ad7793_init(void)
 974 {
 975         return spi_register_driver(&ad7793_driver);
 976 }
 977 module_init(ad7793_init);
 978
 979 static void __exit ad7793_exit(void)
 980 {
 981         spi_unregister_driver(&ad7793_driver);
 982 }
 983 module_exit(ad7793_exit);
 984
 985 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 986 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
 987 MODULE_LICENSE("GPL v2");