drivers/staging/gma500/psb_drv.c

   1 /**************************************************************************
   2  * Copyright (c) 2007-2011, Intel Corporation.
   3  * All Rights Reserved.
   4  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
   5  * All Rights Reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  **************************************************************************/
  21
  22 #include <drm/drmP.h>
  23 #include <drm/drm.h>
  24 #include "psb_drm.h"
  25 #include "psb_drv.h"
  26 #include "framebuffer.h"
  27 #include "psb_reg.h"
  28 #include "psb_intel_reg.h"
  29 #include "intel_bios.h"
  30 #include "mid_bios.h"
  31 #include "mdfld_dsi_dbi.h"
  32 #include <drm/drm_pciids.h>
  33 #include "power.h"
  34 #include <linux/cpu.h>
  35 #include <linux/notifier.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/pm_runtime.h>
  38 #include <linux/module.h>
  39 #include <acpi/video.h>
  40
  41 static int drm_psb_trap_pagefaults;
  42
  43 int drm_psb_no_fb;
  44
  45 static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  46
  47 MODULE_PARM_DESC(no_fb, "Disable FBdev");
  48 MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
  49 module_param_named(no_fb, drm_psb_no_fb, int, 0600);
  50 module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
  51
  52
  53 static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
  54         { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  55         { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  56 #if defined(CONFIG_DRM_PSB_MRST)
  57         { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  58         { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  59         { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  60         { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  61         { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  62         { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  63         { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  64         { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  65 #endif
  66 #if defined(CONFIG_DRM_PSB_MFLD)
  67         { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  68         { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  69         { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  70         { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  71         { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  72         { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  73         { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  74         { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  75 #endif
  76 #if defined(CONFIG_DRM_PSB_CDV)
  77         { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  78         { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  79         { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  80         { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  81         { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  82         { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  83         { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  84         { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  85 #endif
  86         { 0, 0, 0}
  87 };
  88 MODULE_DEVICE_TABLE(pci, pciidlist);
  89
  90 /*
  91  * Standard IOCTLs.
  92  */
  93
  94 #define DRM_IOCTL_PSB_SIZES     \
  95                 DRM_IOR(DRM_PSB_SIZES + DRM_COMMAND_BASE, \
  96                         struct drm_psb_sizes_arg)
  97 #define DRM_IOCTL_PSB_FUSE_REG  \
  98                 DRM_IOWR(DRM_PSB_FUSE_REG + DRM_COMMAND_BASE, uint32_t)
  99 #define DRM_IOCTL_PSB_DC_STATE  \
 100                 DRM_IOW(DRM_PSB_DC_STATE + DRM_COMMAND_BASE, \
 101                         struct drm_psb_dc_state_arg)
 102 #define DRM_IOCTL_PSB_ADB       \
 103                 DRM_IOWR(DRM_PSB_ADB + DRM_COMMAND_BASE, uint32_t)
 104 #define DRM_IOCTL_PSB_MODE_OPERATION    \
 105                 DRM_IOWR(DRM_PSB_MODE_OPERATION + DRM_COMMAND_BASE, \
 106                          struct drm_psb_mode_operation_arg)
 107 #define DRM_IOCTL_PSB_STOLEN_MEMORY     \
 108                 DRM_IOWR(DRM_PSB_STOLEN_MEMORY + DRM_COMMAND_BASE, \
 109                          struct drm_psb_stolen_memory_arg)
 110 #define DRM_IOCTL_PSB_REGISTER_RW       \
 111                 DRM_IOWR(DRM_PSB_REGISTER_RW + DRM_COMMAND_BASE, \
 112                          struct drm_psb_register_rw_arg)
 113 #define DRM_IOCTL_PSB_DPST      \
 114                 DRM_IOWR(DRM_PSB_DPST + DRM_COMMAND_BASE, \
 115                          uint32_t)
 116 #define DRM_IOCTL_PSB_GAMMA     \
 117                 DRM_IOWR(DRM_PSB_GAMMA + DRM_COMMAND_BASE, \
 118                          struct drm_psb_dpst_lut_arg)
 119 #define DRM_IOCTL_PSB_DPST_BL   \
 120                 DRM_IOWR(DRM_PSB_DPST_BL + DRM_COMMAND_BASE, \
 121                          uint32_t)
 122 #define DRM_IOCTL_PSB_GET_PIPE_FROM_CRTC_ID     \
 123                 DRM_IOWR(DRM_PSB_GET_PIPE_FROM_CRTC_ID + DRM_COMMAND_BASE, \
 124                          struct drm_psb_get_pipe_from_crtc_id_arg)
 125 #define DRM_IOCTL_PSB_GEM_CREATE        \
 126                 DRM_IOWR(DRM_PSB_GEM_CREATE + DRM_COMMAND_BASE, \
 127                          struct drm_psb_gem_create)
 128 #define DRM_IOCTL_PSB_2D_OP     \
 129                 DRM_IOW(DRM_PSB_2D_OP + DRM_COMMAND_BASE, \
 130                          struct drm_psb_2d_op)
 131 #define DRM_IOCTL_PSB_GEM_MMAP  \
 132                 DRM_IOWR(DRM_PSB_GEM_MMAP + DRM_COMMAND_BASE, \
 133                          struct drm_psb_gem_mmap)
 134
 135 static int psb_sizes_ioctl(struct drm_device *dev, void *data,
 136                            struct drm_file *file_priv);
 137 static int psb_dc_state_ioctl(struct drm_device *dev, void * data,
 138                               struct drm_file *file_priv);
 139 static int psb_adb_ioctl(struct drm_device *dev, void *data,
 140                          struct drm_file *file_priv);
 141 static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
 142                                     struct drm_file *file_priv);
 143 static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
 144                                    struct drm_file *file_priv);
 145 static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
 146                                  struct drm_file *file_priv);
 147 static int psb_dpst_ioctl(struct drm_device *dev, void *data,
 148                           struct drm_file *file_priv);
 149 static int psb_gamma_ioctl(struct drm_device *dev, void *data,
 150                            struct drm_file *file_priv);
 151 static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
 152                              struct drm_file *file_priv);
 153
 154 #define PSB_IOCTL_DEF(ioctl, func, flags) \
 155         [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
 156
 157 static struct drm_ioctl_desc psb_ioctls[] = {
 158         PSB_IOCTL_DEF(DRM_IOCTL_PSB_SIZES, psb_sizes_ioctl, DRM_AUTH),
 159         PSB_IOCTL_DEF(DRM_IOCTL_PSB_DC_STATE, psb_dc_state_ioctl, DRM_AUTH),
 160         PSB_IOCTL_DEF(DRM_IOCTL_PSB_ADB, psb_adb_ioctl, DRM_AUTH),
 161         PSB_IOCTL_DEF(DRM_IOCTL_PSB_MODE_OPERATION, psb_mode_operation_ioctl,
 162                       DRM_AUTH),
 163         PSB_IOCTL_DEF(DRM_IOCTL_PSB_STOLEN_MEMORY, psb_stolen_memory_ioctl,
 164                       DRM_AUTH),
 165         PSB_IOCTL_DEF(DRM_IOCTL_PSB_REGISTER_RW, psb_register_rw_ioctl,
 166                       DRM_AUTH),
 167         PSB_IOCTL_DEF(DRM_IOCTL_PSB_DPST, psb_dpst_ioctl, DRM_AUTH),
 168         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GAMMA, psb_gamma_ioctl, DRM_AUTH),
 169         PSB_IOCTL_DEF(DRM_IOCTL_PSB_DPST_BL, psb_dpst_bl_ioctl, DRM_AUTH),
 170         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GET_PIPE_FROM_CRTC_ID,
 171                                         psb_intel_get_pipe_from_crtc_id, 0),
 172         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GEM_CREATE, psb_gem_create_ioctl,
 173                                                 DRM_UNLOCKED | DRM_AUTH),
 174         PSB_IOCTL_DEF(DRM_IOCTL_PSB_2D_OP, psb_accel_ioctl,
 175                                                 DRM_UNLOCKED| DRM_AUTH),
 176         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GEM_MMAP, psb_gem_mmap_ioctl,
 177                                                 DRM_UNLOCKED | DRM_AUTH),
 178 };
 179
 180 static void psb_lastclose(struct drm_device *dev)
 181 {
 182         return;
 183 }
 184
 185 static void psb_do_takedown(struct drm_device *dev)
 186 {
 187 }
 188
 189 static int psb_do_init(struct drm_device *dev)
 190 {
 191         struct drm_psb_private *dev_priv = dev->dev_private;
 192         struct psb_gtt *pg = &dev_priv->gtt;
 193
 194         uint32_t stolen_gtt;
 195
 196         int ret = -ENOMEM;
 197
 198         if (pg->mmu_gatt_start & 0x0FFFFFFF) {
 199                 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
 200                 ret = -EINVAL;
 201                 goto out_err;
 202         }
 203
 204
 205         stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
 206         stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
 207         stolen_gtt =
 208             (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
 209
 210         dev_priv->gatt_free_offset = pg->mmu_gatt_start +
 211             (stolen_gtt << PAGE_SHIFT) * 1024;
 212
 213         if (1 || drm_debug) {
 214                 uint32_t core_id = PSB_RSGX32(PSB_CR_CORE_ID);
 215                 uint32_t core_rev = PSB_RSGX32(PSB_CR_CORE_REVISION);
 216                 DRM_INFO("SGX core id = 0x%08x\n", core_id);
 217                 DRM_INFO("SGX core rev major = 0x%02x, minor = 0x%02x\n",
 218                          (core_rev & _PSB_CC_REVISION_MAJOR_MASK) >>
 219                          _PSB_CC_REVISION_MAJOR_SHIFT,
 220                          (core_rev & _PSB_CC_REVISION_MINOR_MASK) >>
 221                          _PSB_CC_REVISION_MINOR_SHIFT);
 222                 DRM_INFO
 223                     ("SGX core rev maintenance = 0x%02x, designer = 0x%02x\n",
 224                      (core_rev & _PSB_CC_REVISION_MAINTENANCE_MASK) >>
 225                      _PSB_CC_REVISION_MAINTENANCE_SHIFT,
 226                      (core_rev & _PSB_CC_REVISION_DESIGNER_MASK) >>
 227                      _PSB_CC_REVISION_DESIGNER_SHIFT);
 228         }
 229
 230
 231         spin_lock_init(&dev_priv->irqmask_lock);
 232         spin_lock_init(&dev_priv->lock_2d);
 233
 234         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
 235         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
 236         PSB_RSGX32(PSB_CR_BIF_BANK1);
 237         PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
 238                                                         PSB_CR_BIF_CTRL);
 239         psb_spank(dev_priv);
 240
 241         /* mmu_gatt ?? */
 242         PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
 243         return 0;
 244 out_err:
 245         psb_do_takedown(dev);
 246         return ret;
 247 }
 248
 249 static int psb_driver_unload(struct drm_device *dev)
 250 {
 251         struct drm_psb_private *dev_priv = dev->dev_private;
 252
 253         /* Kill vblank etc here */
 254
 255         gma_backlight_exit(dev);
 256
 257         if (drm_psb_no_fb == 0)
 258                 psb_modeset_cleanup(dev);
 259
 260         if (dev_priv) {
 261                 psb_lid_timer_takedown(dev_priv);
 262                 gma_intel_opregion_exit(dev);
 263
 264                 if (dev_priv->ops->chip_teardown)
 265                         dev_priv->ops->chip_teardown(dev);
 266                 psb_do_takedown(dev);
 267
 268
 269                 if (dev_priv->pf_pd) {
 270                         psb_mmu_free_pagedir(dev_priv->pf_pd);
 271                         dev_priv->pf_pd = NULL;
 272                 }
 273                 if (dev_priv->mmu) {
 274                         struct psb_gtt *pg = &dev_priv->gtt;
 275
 276                         down_read(&pg->sem);
 277                         psb_mmu_remove_pfn_sequence(
 278                                 psb_mmu_get_default_pd
 279                                 (dev_priv->mmu),
 280                                 pg->mmu_gatt_start,
 281                                 dev_priv->vram_stolen_size >> PAGE_SHIFT);
 282                         up_read(&pg->sem);
 283                         psb_mmu_driver_takedown(dev_priv->mmu);
 284                         dev_priv->mmu = NULL;
 285                 }
 286                 psb_gtt_takedown(dev);
 287                 if (dev_priv->scratch_page) {
 288                         __free_page(dev_priv->scratch_page);
 289                         dev_priv->scratch_page = NULL;
 290                 }
 291                 if (dev_priv->vdc_reg) {
 292                         iounmap(dev_priv->vdc_reg);
 293                         dev_priv->vdc_reg = NULL;
 294                 }
 295                 if (dev_priv->sgx_reg) {
 296                         iounmap(dev_priv->sgx_reg);
 297                         dev_priv->sgx_reg = NULL;
 298                 }
 299
 300                 kfree(dev_priv);
 301                 dev->dev_private = NULL;
 302
 303                 /*destroy VBT data*/
 304                 psb_intel_destroy_bios(dev);
 305         }
 306
 307         gma_power_uninit(dev);
 308
 309         return 0;
 310 }
 311
 312
 313 static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
 314 {
 315         struct drm_psb_private *dev_priv;
 316         unsigned long resource_start;
 317         struct psb_gtt *pg;
 318         unsigned long irqflags;
 319         int ret = -ENOMEM;
 320         uint32_t tt_pages;
 321         struct drm_connector *connector;
 322         struct psb_intel_output *psb_intel_output;
 323
 324         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 325         if (dev_priv == NULL)
 326                 return -ENOMEM;
 327
 328         dev_priv->ops = (struct psb_ops *)chipset;
 329         dev_priv->dev = dev;
 330         dev->dev_private = (void *) dev_priv;
 331
 332         if (!IS_PSB(dev)) {
 333                 if (pci_enable_msi(dev->pdev))
 334                         dev_warn(dev->dev, "Enabling MSI failed!\n");
 335         }
 336
 337         dev_priv->num_pipe = dev_priv->ops->pipes;
 338
 339         resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
 340
 341         dev_priv->vdc_reg =
 342             ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
 343         if (!dev_priv->vdc_reg)
 344                 goto out_err;
 345
 346         dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
 347                                                         PSB_SGX_SIZE);
 348         if (!dev_priv->sgx_reg)
 349                 goto out_err;
 350
 351         ret = dev_priv->ops->chip_setup(dev);
 352         if (ret)
 353                 goto out_err;
 354
 355         /* Init OSPM support */
 356         gma_power_init(dev);
 357
 358         ret = -ENOMEM;
 359
 360         dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
 361         if (!dev_priv->scratch_page)
 362                 goto out_err;
 363
 364         set_pages_uc(dev_priv->scratch_page, 1);
 365
 366         ret = psb_gtt_init(dev, 0);
 367         if (ret)
 368                 goto out_err;
 369
 370         dev_priv->mmu = psb_mmu_driver_init((void *)0,
 371                                         drm_psb_trap_pagefaults, 0,
 372                                         dev_priv);
 373         if (!dev_priv->mmu)
 374                 goto out_err;
 375
 376         pg = &dev_priv->gtt;
 377
 378         tt_pages = (pg->gatt_pages < PSB_TT_PRIV0_PLIMIT) ?
 379                 (pg->gatt_pages) : PSB_TT_PRIV0_PLIMIT;
 380
 381
 382         dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
 383         if (!dev_priv->pf_pd)
 384                 goto out_err;
 385
 386         psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
 387         psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
 388
 389         ret = psb_do_init(dev);
 390         if (ret)
 391                 return ret;
 392
 393         PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
 394         PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
 395
 396 /*      igd_opregion_init(&dev_priv->opregion_dev); */
 397         acpi_video_register();
 398         if (dev_priv->lid_state)
 399                 psb_lid_timer_init(dev_priv);
 400
 401         ret = drm_vblank_init(dev, dev_priv->num_pipe);
 402         if (ret)
 403                 goto out_err;
 404
 405         /*
 406          * Install interrupt handlers prior to powering off SGX or else we will
 407          * crash.
 408          */
 409         dev_priv->vdc_irq_mask = 0;
 410         dev_priv->pipestat[0] = 0;
 411         dev_priv->pipestat[1] = 0;
 412         dev_priv->pipestat[2] = 0;
 413         spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
 414         PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
 415         PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
 416         PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
 417         spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
 418         if (IS_PSB(dev) && drm_core_check_feature(dev, DRIVER_MODESET))
 419                 drm_irq_install(dev);
 420
 421         dev->vblank_disable_allowed = 1;
 422
 423         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 424
 425         dev->driver->get_vblank_counter = psb_get_vblank_counter;
 426
 427 #if defined(CONFIG_DRM_PSB_MFLD)
 428         /* FIXME: this is not the right place for this stuff ! */
 429         mdfld_output_setup(dev);
 430 #endif
 431         if (drm_psb_no_fb == 0) {
 432                 psb_modeset_init(dev);
 433                 psb_fbdev_init(dev);
 434                 drm_kms_helper_poll_init(dev);
 435         }
 436
 437         /* Only add backlight support if we have LVDS output */
 438         list_for_each_entry(connector, &dev->mode_config.connector_list,
 439                             head) {
 440                 psb_intel_output = to_psb_intel_output(connector);
 441
 442                 switch (psb_intel_output->type) {
 443                 case INTEL_OUTPUT_LVDS:
 444                 case INTEL_OUTPUT_MIPI:
 445                         ret = gma_backlight_init(dev);
 446                         break;
 447                 }
 448         }
 449
 450         if (ret)
 451                 return ret;
 452
 453         /* Enable runtime pm at last */
 454         pm_runtime_set_active(&dev->pdev->dev);
 455         return 0;
 456 out_err:
 457         psb_driver_unload(dev);
 458         return ret;
 459 }
 460
 461 int psb_driver_device_is_agp(struct drm_device *dev)
 462 {
 463         return 0;
 464 }
 465
 466
 467 static int psb_sizes_ioctl(struct drm_device *dev, void *data,
 468                            struct drm_file *file_priv)
 469 {
 470         struct drm_psb_private *dev_priv = psb_priv(dev);
 471         struct drm_psb_sizes_arg *arg = data;
 472
 473         *arg = dev_priv->sizes;
 474         return 0;
 475 }
 476
 477 static int psb_dc_state_ioctl(struct drm_device *dev, void *data,
 478                                 struct drm_file *file_priv)
 479 {
 480         uint32_t flags;
 481         uint32_t obj_id;
 482         struct drm_mode_object *obj;
 483         struct drm_connector *connector;
 484         struct drm_crtc *crtc;
 485         struct drm_psb_dc_state_arg *arg = data;
 486
 487
 488         /* Double check MRST case */
 489         if (IS_MRST(dev) || IS_MFLD(dev))
 490                 return -EOPNOTSUPP;
 491
 492         flags = arg->flags;
 493         obj_id = arg->obj_id;
 494
 495         if (flags & PSB_DC_CRTC_MASK) {
 496                 obj = drm_mode_object_find(dev, obj_id,
 497                                 DRM_MODE_OBJECT_CRTC);
 498                 if (!obj) {
 499                         dev_dbg(dev->dev, "Invalid CRTC object.\n");
 500                         return -EINVAL;
 501                 }
 502
 503                 crtc = obj_to_crtc(obj);
 504
 505                 mutex_lock(&dev->mode_config.mutex);
 506                 if (drm_helper_crtc_in_use(crtc)) {
 507                         if (flags & PSB_DC_CRTC_SAVE)
 508                                 crtc->funcs->save(crtc);
 509                         else
 510                                 crtc->funcs->restore(crtc);
 511                 }
 512                 mutex_unlock(&dev->mode_config.mutex);
 513
 514                 return 0;
 515         } else if (flags & PSB_DC_OUTPUT_MASK) {
 516                 obj = drm_mode_object_find(dev, obj_id,
 517                                 DRM_MODE_OBJECT_CONNECTOR);
 518                 if (!obj) {
 519                         dev_dbg(dev->dev, "Invalid connector id.\n");
 520                         return -EINVAL;
 521                 }
 522
 523                 connector = obj_to_connector(obj);
 524                 if (flags & PSB_DC_OUTPUT_SAVE)
 525                         connector->funcs->save(connector);
 526                 else
 527                         connector->funcs->restore(connector);
 528
 529                 return 0;
 530         }
 531         return -EINVAL;
 532 }
 533
 534 static inline void get_brightness(struct backlight_device *bd)
 535 {
 536 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 537         if (bd) {
 538                 bd->props.brightness = bd->ops->get_brightness(bd);
 539                 backlight_update_status(bd);
 540         }
 541 #endif
 542 }
 543
 544 static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
 545                        struct drm_file *file_priv)
 546 {
 547         struct drm_psb_private *dev_priv = psb_priv(dev);
 548         uint32_t *arg = data;
 549
 550         dev_priv->blc_adj2 = *arg;
 551         get_brightness(dev_priv->backlight_device);
 552         return 0;
 553 }
 554
 555 static int psb_adb_ioctl(struct drm_device *dev, void *data,
 556                         struct drm_file *file_priv)
 557 {
 558         struct drm_psb_private *dev_priv = psb_priv(dev);
 559         uint32_t *arg = data;
 560
 561         dev_priv->blc_adj1 = *arg;
 562         get_brightness(dev_priv->backlight_device);
 563         return 0;
 564 }
 565
 566 /* return the current mode to the dpst module */
 567 static int psb_dpst_ioctl(struct drm_device *dev, void *data,
 568                           struct drm_file *file_priv)
 569 {
 570         struct drm_psb_private *dev_priv = psb_priv(dev);
 571         uint32_t *arg = data;
 572         uint32_t x;
 573         uint32_t y;
 574         uint32_t reg;
 575
 576         if (!gma_power_begin(dev, 0))
 577                 return -EIO;
 578
 579         reg = PSB_RVDC32(PIPEASRC);
 580
 581         gma_power_end(dev);
 582
 583         /* horizontal is the left 16 bits */
 584         x = reg >> 16;
 585         /* vertical is the right 16 bits */
 586         y = reg & 0x0000ffff;
 587
 588         /* the values are the image size minus one */
 589         x++;
 590         y++;
 591
 592         *arg = (x << 16) | y;
 593
 594         return 0;
 595 }
 596 static int psb_gamma_ioctl(struct drm_device *dev, void *data,
 597                            struct drm_file *file_priv)
 598 {
 599         struct drm_psb_dpst_lut_arg *lut_arg = data;
 600         struct drm_mode_object *obj;
 601         struct drm_crtc *crtc;
 602         struct drm_connector *connector;
 603         struct psb_intel_crtc *psb_intel_crtc;
 604         int i = 0;
 605         int32_t obj_id;
 606
 607         obj_id = lut_arg->output_id;
 608         obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_CONNECTOR);
 609         if (!obj) {
 610                 dev_dbg(dev->dev, "Invalid Connector object.\n");
 611                 return -EINVAL;
 612         }
 613
 614         connector = obj_to_connector(obj);
 615         crtc = connector->encoder->crtc;
 616         psb_intel_crtc = to_psb_intel_crtc(crtc);
 617
 618         for (i = 0; i < 256; i++)
 619                 psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
 620
 621         psb_intel_crtc_load_lut(crtc);
 622
 623         return 0;
 624 }
 625
 626 static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
 627                                 struct drm_file *file_priv)
 628 {
 629         uint32_t obj_id;
 630         uint16_t op;
 631         struct drm_mode_modeinfo *umode;
 632         struct drm_display_mode *mode = NULL;
 633         struct drm_psb_mode_operation_arg *arg;
 634         struct drm_mode_object *obj;
 635         struct drm_connector *connector;
 636         struct drm_framebuffer *drm_fb;
 637         struct psb_framebuffer *psb_fb;
 638         struct drm_connector_helper_funcs *connector_funcs;
 639         int ret = 0;
 640         int resp = MODE_OK;
 641         struct drm_psb_private *dev_priv = psb_priv(dev);
 642
 643         arg = (struct drm_psb_mode_operation_arg *)data;
 644         obj_id = arg->obj_id;
 645         op = arg->operation;
 646
 647         switch (op) {
 648         case PSB_MODE_OPERATION_SET_DC_BASE:
 649                 obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_FB);
 650                 if (!obj) {
 651                         dev_dbg(dev->dev, "Invalid FB id %d\n", obj_id);
 652                         return -EINVAL;
 653                 }
 654
 655                 drm_fb = obj_to_fb(obj);
 656                 psb_fb = to_psb_fb(drm_fb);
 657
 658                 if (gma_power_begin(dev, 0)) {
 659                         REG_WRITE(DSPASURF, psb_fb->gtt->offset);
 660                         REG_READ(DSPASURF);
 661                         gma_power_end(dev);
 662                 } else {
 663                         dev_priv->saveDSPASURF = psb_fb->gtt->offset;
 664                 }
 665
 666                 return 0;
 667         case PSB_MODE_OPERATION_MODE_VALID:
 668                 umode = &arg->mode;
 669
 670                 mutex_lock(&dev->mode_config.mutex);
 671
 672                 obj = drm_mode_object_find(dev, obj_id,
 673                                         DRM_MODE_OBJECT_CONNECTOR);
 674                 if (!obj) {
 675                         ret = -EINVAL;
 676                         goto mode_op_out;
 677                 }
 678
 679                 connector = obj_to_connector(obj);
 680
 681                 mode = drm_mode_create(dev);
 682                 if (!mode) {
 683                         ret = -ENOMEM;
 684                         goto mode_op_out;
 685                 }
 686
 687                 /* drm_crtc_convert_umode(mode, umode); */
 688                 {
 689                         mode->clock = umode->clock;
 690                         mode->hdisplay = umode->hdisplay;
 691                         mode->hsync_start = umode->hsync_start;
 692                         mode->hsync_end = umode->hsync_end;
 693                         mode->htotal = umode->htotal;
 694                         mode->hskew = umode->hskew;
 695                         mode->vdisplay = umode->vdisplay;
 696                         mode->vsync_start = umode->vsync_start;
 697                         mode->vsync_end = umode->vsync_end;
 698                         mode->vtotal = umode->vtotal;
 699                         mode->vscan = umode->vscan;
 700                         mode->vrefresh = umode->vrefresh;
 701                         mode->flags = umode->flags;
 702                         mode->type = umode->type;
 703                         strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN);
 704                         mode->name[DRM_DISPLAY_MODE_LEN-1] = 0;
 705                 }
 706
 707                 connector_funcs = (struct drm_connector_helper_funcs *)
 708                                    connector->helper_private;
 709
 710                 if (connector_funcs->mode_valid) {
 711                         resp = connector_funcs->mode_valid(connector, mode);
 712                         arg->data = (void *)resp;
 713                 }
 714
 715                 /*do some clean up work*/
 716                 if (mode)
 717                         drm_mode_destroy(dev, mode);
 718 mode_op_out:
 719                 mutex_unlock(&dev->mode_config.mutex);
 720                 return ret;
 721
 722         default:
 723                 dev_dbg(dev->dev, "Unsupported psb mode operation\n");
 724                 return -EOPNOTSUPP;
 725         }
 726
 727         return 0;
 728 }
 729
 730 static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
 731                                    struct drm_file *file_priv)
 732 {
 733         struct drm_psb_private *dev_priv = psb_priv(dev);
 734         struct drm_psb_stolen_memory_arg *arg = data;
 735
 736         arg->base = dev_priv->stolen_base;
 737         arg->size = dev_priv->vram_stolen_size;
 738
 739         return 0;
 740 }
 741
 742 /* FIXME: needs Medfield changes */
 743 static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
 744                                  struct drm_file *file_priv)
 745 {
 746         struct drm_psb_private *dev_priv = psb_priv(dev);
 747         struct drm_psb_register_rw_arg *arg = data;
 748         bool usage = arg->b_force_hw_on ? true : false;
 749
 750         if (arg->display_write_mask != 0) {
 751                 if (gma_power_begin(dev, usage)) {
 752                         if (arg->display_write_mask & REGRWBITS_PFIT_CONTROLS)
 753                                 PSB_WVDC32(arg->display.pfit_controls,
 754                                            PFIT_CONTROL);
 755                         if (arg->display_write_mask &
 756                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 757                                 PSB_WVDC32(arg->display.pfit_autoscale_ratios,
 758                                            PFIT_AUTO_RATIOS);
 759                         if (arg->display_write_mask &
 760                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 761                                 PSB_WVDC32(
 762                                    arg->display.pfit_programmed_scale_ratios,
 763                                    PFIT_PGM_RATIOS);
 764                         if (arg->display_write_mask & REGRWBITS_PIPEASRC)
 765                                 PSB_WVDC32(arg->display.pipeasrc,
 766                                            PIPEASRC);
 767                         if (arg->display_write_mask & REGRWBITS_PIPEBSRC)
 768                                 PSB_WVDC32(arg->display.pipebsrc,
 769                                            PIPEBSRC);
 770                         if (arg->display_write_mask & REGRWBITS_VTOTAL_A)
 771                                 PSB_WVDC32(arg->display.vtotal_a,
 772                                            VTOTAL_A);
 773                         if (arg->display_write_mask & REGRWBITS_VTOTAL_B)
 774                                 PSB_WVDC32(arg->display.vtotal_b,
 775                                            VTOTAL_B);
 776                         gma_power_end(dev);
 777                 } else {
 778                         if (arg->display_write_mask & REGRWBITS_PFIT_CONTROLS)
 779                                 dev_priv->savePFIT_CONTROL =
 780                                                 arg->display.pfit_controls;
 781                         if (arg->display_write_mask &
 782                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 783                                 dev_priv->savePFIT_AUTO_RATIOS =
 784                                         arg->display.pfit_autoscale_ratios;
 785                         if (arg->display_write_mask &
 786                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 787                                 dev_priv->savePFIT_PGM_RATIOS =
 788                                    arg->display.pfit_programmed_scale_ratios;
 789                         if (arg->display_write_mask & REGRWBITS_PIPEASRC)
 790                                 dev_priv->savePIPEASRC = arg->display.pipeasrc;
 791                         if (arg->display_write_mask & REGRWBITS_PIPEBSRC)
 792                                 dev_priv->savePIPEBSRC = arg->display.pipebsrc;
 793                         if (arg->display_write_mask & REGRWBITS_VTOTAL_A)
 794                                 dev_priv->saveVTOTAL_A = arg->display.vtotal_a;
 795                         if (arg->display_write_mask & REGRWBITS_VTOTAL_B)
 796                                 dev_priv->saveVTOTAL_B = arg->display.vtotal_b;
 797                 }
 798         }
 799
 800         if (arg->display_read_mask != 0) {
 801                 if (gma_power_begin(dev, usage)) {
 802                         if (arg->display_read_mask &
 803                             REGRWBITS_PFIT_CONTROLS)
 804                                 arg->display.pfit_controls =
 805                                                 PSB_RVDC32(PFIT_CONTROL);
 806                         if (arg->display_read_mask &
 807                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 808                                 arg->display.pfit_autoscale_ratios =
 809                                                 PSB_RVDC32(PFIT_AUTO_RATIOS);
 810                         if (arg->display_read_mask &
 811                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 812                                 arg->display.pfit_programmed_scale_ratios =
 813                                                 PSB_RVDC32(PFIT_PGM_RATIOS);
 814                         if (arg->display_read_mask & REGRWBITS_PIPEASRC)
 815                                 arg->display.pipeasrc = PSB_RVDC32(PIPEASRC);
 816                         if (arg->display_read_mask & REGRWBITS_PIPEBSRC)
 817                                 arg->display.pipebsrc = PSB_RVDC32(PIPEBSRC);
 818                         if (arg->display_read_mask & REGRWBITS_VTOTAL_A)
 819                                 arg->display.vtotal_a = PSB_RVDC32(VTOTAL_A);
 820                         if (arg->display_read_mask & REGRWBITS_VTOTAL_B)
 821                                 arg->display.vtotal_b = PSB_RVDC32(VTOTAL_B);
 822                         gma_power_end(dev);
 823                 } else {
 824                         if (arg->display_read_mask &
 825                             REGRWBITS_PFIT_CONTROLS)
 826                                 arg->display.pfit_controls =
 827                                                 dev_priv->savePFIT_CONTROL;
 828                         if (arg->display_read_mask &
 829                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 830                                 arg->display.pfit_autoscale_ratios =
 831                                                 dev_priv->savePFIT_AUTO_RATIOS;
 832                         if (arg->display_read_mask &
 833                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 834                                 arg->display.pfit_programmed_scale_ratios =
 835                                                 dev_priv->savePFIT_PGM_RATIOS;
 836                         if (arg->display_read_mask & REGRWBITS_PIPEASRC)
 837                                 arg->display.pipeasrc = dev_priv->savePIPEASRC;
 838                         if (arg->display_read_mask & REGRWBITS_PIPEBSRC)
 839                                 arg->display.pipebsrc = dev_priv->savePIPEBSRC;
 840                         if (arg->display_read_mask & REGRWBITS_VTOTAL_A)
 841                                 arg->display.vtotal_a = dev_priv->saveVTOTAL_A;
 842                         if (arg->display_read_mask & REGRWBITS_VTOTAL_B)
 843                                 arg->display.vtotal_b = dev_priv->saveVTOTAL_B;
 844                 }
 845         }
 846
 847         if (arg->overlay_write_mask != 0) {
 848                 if (gma_power_begin(dev, usage)) {
 849                         if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
 850                                 PSB_WVDC32(arg->overlay.OGAMC5, OV_OGAMC5);
 851                                 PSB_WVDC32(arg->overlay.OGAMC4, OV_OGAMC4);
 852                                 PSB_WVDC32(arg->overlay.OGAMC3, OV_OGAMC3);
 853                                 PSB_WVDC32(arg->overlay.OGAMC2, OV_OGAMC2);
 854                                 PSB_WVDC32(arg->overlay.OGAMC1, OV_OGAMC1);
 855                                 PSB_WVDC32(arg->overlay.OGAMC0, OV_OGAMC0);
 856                         }
 857                         if (arg->overlay_write_mask & OVC_REGRWBITS_OGAM_ALL) {
 858                                 PSB_WVDC32(arg->overlay.OGAMC5, OVC_OGAMC5);
 859                                 PSB_WVDC32(arg->overlay.OGAMC4, OVC_OGAMC4);
 860                                 PSB_WVDC32(arg->overlay.OGAMC3, OVC_OGAMC3);
 861                                 PSB_WVDC32(arg->overlay.OGAMC2, OVC_OGAMC2);
 862                                 PSB_WVDC32(arg->overlay.OGAMC1, OVC_OGAMC1);
 863                                 PSB_WVDC32(arg->overlay.OGAMC0, OVC_OGAMC0);
 864                         }
 865
 866                         if (arg->overlay_write_mask & OV_REGRWBITS_OVADD) {
 867                                 PSB_WVDC32(arg->overlay.OVADD, OV_OVADD);
 868
 869                                 if (arg->overlay.b_wait_vblank) {
 870                                         /* Wait for 20ms.*/
 871                                         unsigned long vblank_timeout = jiffies
 872                                                                 + HZ/50;
 873                                         uint32_t temp;
 874                                         while (time_before_eq(jiffies,
 875                                                         vblank_timeout)) {
 876                                                 temp = PSB_RVDC32(OV_DOVASTA);
 877                                                 if ((temp & (0x1 << 31)) != 0)
 878                                                         break;
 879                                                 cpu_relax();
 880                                         }
 881                                 }
 882                         }
 883                         if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD) {
 884                                 PSB_WVDC32(arg->overlay.OVADD, OVC_OVADD);
 885                                 if (arg->overlay.b_wait_vblank) {
 886                                         /* Wait for 20ms.*/
 887                                         unsigned long vblank_timeout =
 888                                                         jiffies + HZ/50;
 889                                         uint32_t temp;
 890                                         while (time_before_eq(jiffies,
 891                                                         vblank_timeout)) {
 892                                                 temp = PSB_RVDC32(OVC_DOVCSTA);
 893                                                 if ((temp & (0x1 << 31)) != 0)
 894                                                         break;
 895                                                 cpu_relax();
 896                                         }
 897                                 }
 898                         }
 899                         gma_power_end(dev);
 900                 } else {
 901                         if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
 902                                 dev_priv->saveOV_OGAMC5 = arg->overlay.OGAMC5;
 903                                 dev_priv->saveOV_OGAMC4 = arg->overlay.OGAMC4;
 904                                 dev_priv->saveOV_OGAMC3 = arg->overlay.OGAMC3;
 905                                 dev_priv->saveOV_OGAMC2 = arg->overlay.OGAMC2;
 906                                 dev_priv->saveOV_OGAMC1 = arg->overlay.OGAMC1;
 907                                 dev_priv->saveOV_OGAMC0 = arg->overlay.OGAMC0;
 908                         }
 909                         if (arg->overlay_write_mask & OVC_REGRWBITS_OGAM_ALL) {
 910                                 dev_priv->saveOVC_OGAMC5 = arg->overlay.OGAMC5;
 911                                 dev_priv->saveOVC_OGAMC4 = arg->overlay.OGAMC4;
 912                                 dev_priv->saveOVC_OGAMC3 = arg->overlay.OGAMC3;
 913                                 dev_priv->saveOVC_OGAMC2 = arg->overlay.OGAMC2;
 914                                 dev_priv->saveOVC_OGAMC1 = arg->overlay.OGAMC1;
 915                                 dev_priv->saveOVC_OGAMC0 = arg->overlay.OGAMC0;
 916                         }
 917                         if (arg->overlay_write_mask & OV_REGRWBITS_OVADD)
 918                                 dev_priv->saveOV_OVADD = arg->overlay.OVADD;
 919                         if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD)
 920                                 dev_priv->saveOVC_OVADD = arg->overlay.OVADD;
 921                 }
 922         }
 923
 924         if (arg->overlay_read_mask != 0) {
 925                 if (gma_power_begin(dev, usage)) {
 926                         if (arg->overlay_read_mask & OV_REGRWBITS_OGAM_ALL) {
 927                                 arg->overlay.OGAMC5 = PSB_RVDC32(OV_OGAMC5);
 928                                 arg->overlay.OGAMC4 = PSB_RVDC32(OV_OGAMC4);
 929                                 arg->overlay.OGAMC3 = PSB_RVDC32(OV_OGAMC3);
 930                                 arg->overlay.OGAMC2 = PSB_RVDC32(OV_OGAMC2);
 931                                 arg->overlay.OGAMC1 = PSB_RVDC32(OV_OGAMC1);
 932                                 arg->overlay.OGAMC0 = PSB_RVDC32(OV_OGAMC0);
 933                         }
 934                         if (arg->overlay_read_mask & OVC_REGRWBITS_OGAM_ALL) {
 935                                 arg->overlay.OGAMC5 = PSB_RVDC32(OVC_OGAMC5);
 936                                 arg->overlay.OGAMC4 = PSB_RVDC32(OVC_OGAMC4);
 937                                 arg->overlay.OGAMC3 = PSB_RVDC32(OVC_OGAMC3);
 938                                 arg->overlay.OGAMC2 = PSB_RVDC32(OVC_OGAMC2);
 939                                 arg->overlay.OGAMC1 = PSB_RVDC32(OVC_OGAMC1);
 940                                 arg->overlay.OGAMC0 = PSB_RVDC32(OVC_OGAMC0);
 941                         }
 942                         if (arg->overlay_read_mask & OV_REGRWBITS_OVADD)
 943                                 arg->overlay.OVADD = PSB_RVDC32(OV_OVADD);
 944                         if (arg->overlay_read_mask & OVC_REGRWBITS_OVADD)
 945                                 arg->overlay.OVADD = PSB_RVDC32(OVC_OVADD);
 946                         gma_power_end(dev);
 947                 } else {
 948                         if (arg->overlay_read_mask & OV_REGRWBITS_OGAM_ALL) {
 949                                 arg->overlay.OGAMC5 = dev_priv->saveOV_OGAMC5;
 950                                 arg->overlay.OGAMC4 = dev_priv->saveOV_OGAMC4;
 951                                 arg->overlay.OGAMC3 = dev_priv->saveOV_OGAMC3;
 952                                 arg->overlay.OGAMC2 = dev_priv->saveOV_OGAMC2;
 953                                 arg->overlay.OGAMC1 = dev_priv->saveOV_OGAMC1;
 954                                 arg->overlay.OGAMC0 = dev_priv->saveOV_OGAMC0;
 955                         }
 956                         if (arg->overlay_read_mask & OVC_REGRWBITS_OGAM_ALL) {
 957                                 arg->overlay.OGAMC5 = dev_priv->saveOVC_OGAMC5;
 958                                 arg->overlay.OGAMC4 = dev_priv->saveOVC_OGAMC4;
 959                                 arg->overlay.OGAMC3 = dev_priv->saveOVC_OGAMC3;
 960                                 arg->overlay.OGAMC2 = dev_priv->saveOVC_OGAMC2;
 961                                 arg->overlay.OGAMC1 = dev_priv->saveOVC_OGAMC1;
 962                                 arg->overlay.OGAMC0 = dev_priv->saveOVC_OGAMC0;
 963                         }
 964                         if (arg->overlay_read_mask & OV_REGRWBITS_OVADD)
 965                                 arg->overlay.OVADD = dev_priv->saveOV_OVADD;
 966                         if (arg->overlay_read_mask & OVC_REGRWBITS_OVADD)
 967                                 arg->overlay.OVADD = dev_priv->saveOVC_OVADD;
 968                 }
 969         }
 970
 971         if (arg->sprite_enable_mask != 0) {
 972                 if (gma_power_begin(dev, usage)) {
 973                         PSB_WVDC32(0x1F3E, DSPARB);
 974                         PSB_WVDC32(arg->sprite.dspa_control
 975                                         | PSB_RVDC32(DSPACNTR), DSPACNTR);
 976                         PSB_WVDC32(arg->sprite.dspa_key_value, DSPAKEYVAL);
 977                         PSB_WVDC32(arg->sprite.dspa_key_mask, DSPAKEYMASK);
 978                         PSB_WVDC32(PSB_RVDC32(DSPASURF), DSPASURF);
 979                         PSB_RVDC32(DSPASURF);
 980                         PSB_WVDC32(arg->sprite.dspc_control, DSPCCNTR);
 981                         PSB_WVDC32(arg->sprite.dspc_stride, DSPCSTRIDE);
 982                         PSB_WVDC32(arg->sprite.dspc_position, DSPCPOS);
 983                         PSB_WVDC32(arg->sprite.dspc_linear_offset, DSPCLINOFF);
 984                         PSB_WVDC32(arg->sprite.dspc_size, DSPCSIZE);
 985                         PSB_WVDC32(arg->sprite.dspc_surface, DSPCSURF);
 986                         PSB_RVDC32(DSPCSURF);
 987                         gma_power_end(dev);
 988                 }
 989         }
 990
 991         if (arg->sprite_disable_mask != 0) {
 992                 if (gma_power_begin(dev, usage)) {
 993                         PSB_WVDC32(0x3F3E, DSPARB);
 994                         PSB_WVDC32(0x0, DSPCCNTR);
 995                         PSB_WVDC32(arg->sprite.dspc_surface, DSPCSURF);
 996                         PSB_RVDC32(DSPCSURF);
 997                         gma_power_end(dev);
 998                 }
 999         }
1000
1001         if (arg->subpicture_enable_mask != 0) {
1002                 if (gma_power_begin(dev, usage)) {
1003                         uint32_t temp;
1004                         if (arg->subpicture_enable_mask & REGRWBITS_DSPACNTR) {
1005                                 temp =  PSB_RVDC32(DSPACNTR);
1006                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1007                                 temp &= ~DISPPLANE_BOTTOM;
1008                                 temp |= DISPPLANE_32BPP;
1009                                 PSB_WVDC32(temp, DSPACNTR);
1010
1011                                 temp =  PSB_RVDC32(DSPABASE);
1012                                 PSB_WVDC32(temp, DSPABASE);
1013                                 PSB_RVDC32(DSPABASE);
1014                                 temp =  PSB_RVDC32(DSPASURF);
1015                                 PSB_WVDC32(temp, DSPASURF);
1016                                 PSB_RVDC32(DSPASURF);
1017                         }
1018                         if (arg->subpicture_enable_mask & REGRWBITS_DSPBCNTR) {
1019                                 temp =  PSB_RVDC32(DSPBCNTR);
1020                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1021                                 temp &= ~DISPPLANE_BOTTOM;
1022                                 temp |= DISPPLANE_32BPP;
1023                                 PSB_WVDC32(temp, DSPBCNTR);
1024
1025                                 temp =  PSB_RVDC32(DSPBBASE);
1026                                 PSB_WVDC32(temp, DSPBBASE);
1027                                 PSB_RVDC32(DSPBBASE);
1028                                 temp =  PSB_RVDC32(DSPBSURF);
1029                                 PSB_WVDC32(temp, DSPBSURF);
1030                                 PSB_RVDC32(DSPBSURF);
1031                         }
1032                         if (arg->subpicture_enable_mask & REGRWBITS_DSPCCNTR) {
1033                                 temp =  PSB_RVDC32(DSPCCNTR);
1034                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1035                                 temp &= ~DISPPLANE_BOTTOM;
1036                                 temp |= DISPPLANE_32BPP;
1037                                 PSB_WVDC32(temp, DSPCCNTR);
1038
1039                                 temp =  PSB_RVDC32(DSPCBASE);
1040                                 PSB_WVDC32(temp, DSPCBASE);
1041                                 PSB_RVDC32(DSPCBASE);
1042                                 temp =  PSB_RVDC32(DSPCSURF);
1043                                 PSB_WVDC32(temp, DSPCSURF);
1044                                 PSB_RVDC32(DSPCSURF);
1045                         }
1046                         gma_power_end(dev);
1047                 }
1048         }
1049
1050         if (arg->subpicture_disable_mask != 0) {
1051                 if (gma_power_begin(dev, usage)) {
1052                         uint32_t temp;
1053                         if (arg->subpicture_disable_mask & REGRWBITS_DSPACNTR) {
1054                                 temp =  PSB_RVDC32(DSPACNTR);
1055                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1056                                 temp |= DISPPLANE_32BPP_NO_ALPHA;
1057                                 PSB_WVDC32(temp, DSPACNTR);
1058
1059                                 temp =  PSB_RVDC32(DSPABASE);
1060                                 PSB_WVDC32(temp, DSPABASE);
1061                                 PSB_RVDC32(DSPABASE);
1062                                 temp =  PSB_RVDC32(DSPASURF);
1063                                 PSB_WVDC32(temp, DSPASURF);
1064                                 PSB_RVDC32(DSPASURF);
1065                         }
1066                         if (arg->subpicture_disable_mask & REGRWBITS_DSPBCNTR) {
1067                                 temp =  PSB_RVDC32(DSPBCNTR);
1068                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1069                                 temp |= DISPPLANE_32BPP_NO_ALPHA;
1070                                 PSB_WVDC32(temp, DSPBCNTR);
1071
1072                                 temp =  PSB_RVDC32(DSPBBASE);
1073                                 PSB_WVDC32(temp, DSPBBASE);
1074                                 PSB_RVDC32(DSPBBASE);
1075                                 temp =  PSB_RVDC32(DSPBSURF);
1076                                 PSB_WVDC32(temp, DSPBSURF);
1077                                 PSB_RVDC32(DSPBSURF);
1078                         }
1079                         if (arg->subpicture_disable_mask & REGRWBITS_DSPCCNTR) {
1080                                 temp =  PSB_RVDC32(DSPCCNTR);
1081                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1082                                 temp |= DISPPLANE_32BPP_NO_ALPHA;
1083                                 PSB_WVDC32(temp, DSPCCNTR);
1084
1085                                 temp =  PSB_RVDC32(DSPCBASE);
1086                                 PSB_WVDC32(temp, DSPCBASE);
1087                                 PSB_RVDC32(DSPCBASE);
1088                                 temp =  PSB_RVDC32(DSPCSURF);
1089                                 PSB_WVDC32(temp, DSPCSURF);
1090                                 PSB_RVDC32(DSPCSURF);
1091                         }
1092                         gma_power_end(dev);
1093                 }
1094         }
1095
1096         return 0;
1097 }
1098
1099 static int psb_driver_open(struct drm_device *dev, struct drm_file *priv)
1100 {
1101         return 0;
1102 }
1103
1104 static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
1105 {
1106 }
1107
1108 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
1109                                unsigned long arg)
1110 {
1111         struct drm_file *file_priv = filp->private_data;
1112         struct drm_device *dev = file_priv->minor->dev;
1113         int ret;
1114
1115         pm_runtime_forbid(dev->dev);
1116         ret = drm_ioctl(filp, cmd, arg);
1117         pm_runtime_allow(dev->dev);
1118         return ret;
1119         /* FIXME: do we need to wrap the other side of this */
1120 }
1121
1122
1123 /* When a client dies:
1124  *    - Check for and clean up flipped page state
1125  */
1126 void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
1127 {
1128 }
1129
1130 static void psb_remove(struct pci_dev *pdev)
1131 {
1132         struct drm_device *dev = pci_get_drvdata(pdev);
1133         drm_put_dev(dev);
1134 }
1135
1136 static const struct dev_pm_ops psb_pm_ops = {
1137         .suspend = gma_power_suspend,
1138         .resume = gma_power_resume,
1139         .freeze = gma_power_suspend,
1140         .thaw = gma_power_resume,
1141         .poweroff = gma_power_suspend,
1142         .restore = gma_power_resume,
1143         .runtime_suspend = psb_runtime_suspend,
1144         .runtime_resume = psb_runtime_resume,
1145         .runtime_idle = psb_runtime_idle,
1146 };
1147
1148 static struct vm_operations_struct psb_gem_vm_ops = {
1149         .fault = psb_gem_fault,
1150         .open = drm_gem_vm_open,
1151         .close = drm_gem_vm_close,
1152 };
1153
1154 static struct drm_driver driver = {
1155         .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
1156                            DRIVER_IRQ_VBL | DRIVER_MODESET | DRIVER_GEM ,
1157         .load = psb_driver_load,
1158         .unload = psb_driver_unload,
1159
1160         .ioctls = psb_ioctls,
1161         .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
1162         .device_is_agp = psb_driver_device_is_agp,
1163         .irq_preinstall = psb_irq_preinstall,
1164         .irq_postinstall = psb_irq_postinstall,
1165         .irq_uninstall = psb_irq_uninstall,
1166         .irq_handler = psb_irq_handler,
1167         .enable_vblank = psb_enable_vblank,
1168         .disable_vblank = psb_disable_vblank,
1169         .get_vblank_counter = psb_get_vblank_counter,
1170         .lastclose = psb_lastclose,
1171         .open = psb_driver_open,
1172         .preclose = psb_driver_preclose,
1173         .postclose = psb_driver_close,
1174         .reclaim_buffers = drm_core_reclaim_buffers,
1175
1176         .gem_init_object = psb_gem_init_object,
1177         .gem_free_object = psb_gem_free_object,
1178         .gem_vm_ops = &psb_gem_vm_ops,
1179         .dumb_create = psb_gem_dumb_create,
1180         .dumb_map_offset = psb_gem_dumb_map_gtt,
1181         .dumb_destroy = psb_gem_dumb_destroy,
1182
1183         .fops = {
1184                  .owner = THIS_MODULE,
1185                  .open = drm_open,
1186                  .release = drm_release,
1187                  .unlocked_ioctl = psb_unlocked_ioctl,
1188 #ifdef CONFIG_COMPAT
1189                  .compat_ioctl = drm_compat_ioctl,
1190 #endif
1191                  .mmap = drm_gem_mmap,
1192                  .poll = drm_poll,
1193                  .fasync = drm_fasync,
1194                  .read = drm_read,
1195          },
1196         .name = DRIVER_NAME,
1197         .desc = DRIVER_DESC,
1198         .date = PSB_DRM_DRIVER_DATE,
1199         .major = PSB_DRM_DRIVER_MAJOR,
1200         .minor = PSB_DRM_DRIVER_MINOR,
1201         .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
1202 };
1203
1204 static struct pci_driver psb_pci_driver = {
1205         .name = DRIVER_NAME,
1206         .id_table = pciidlist,
1207         .probe = psb_probe,
1208         .remove = psb_remove,
1209         .driver.pm = &psb_pm_ops,
1210 };
1211
1212 static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1213 {
1214         return drm_get_pci_dev(pdev, ent, &driver);
1215 }
1216
1217 static int __init psb_init(void)
1218 {
1219         return drm_pci_init(&driver, &psb_pci_driver);
1220 }
1221
1222 static void __exit psb_exit(void)
1223 {
1224         drm_pci_exit(&driver, &psb_pci_driver);
1225 }
1226
1227 late_initcall(psb_init);
1228 module_exit(psb_exit);
1229
1230 MODULE_AUTHOR("Alan Cox <alan@linux.intel.com> and others");
1231 MODULE_DESCRIPTION(DRIVER_DESC);
1232 MODULE_LICENSE("GPL");