2 * cxd2099.c: Driver for the CXD2099AR Common Interface Controller
4 * Copyright (C) 2010 DigitalDevices UG
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 only, as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
22 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
25 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/init.h>
30 #include <linux/i2c.h>
31 #include <linux/wait.h>
32 #include <linux/delay.h>
33 #include <linux/mutex.h>
38 #define MAX_BUFFER_SIZE 248
41 struct dvb_ca_en50221 en;
43 struct i2c_adapter *i2c;
62 static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
65 u8 m[2] = {reg, data};
66 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
68 if (i2c_transfer(adapter, &msg, 1) != 1) {
69 printk(KERN_ERR "Failed to write to I2C register %02x@%02x!\n",
76 static int i2c_write(struct i2c_adapter *adapter, u8 adr,
79 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
81 if (i2c_transfer(adapter, &msg, 1) != 1) {
82 printk(KERN_ERR "Failed to write to I2C!\n");
88 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
91 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
92 .buf = ®, .len = 1 },
93 {.addr = adr, .flags = I2C_M_RD,
94 .buf = val, .len = 1 } };
96 if (i2c_transfer(adapter, msgs, 2) != 2) {
97 printk(KERN_ERR "error in i2c_read_reg\n");
103 static int i2c_read(struct i2c_adapter *adapter, u8 adr,
104 u8 reg, u8 *data, u8 n)
106 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
107 .buf = ®, .len = 1 },
108 {.addr = adr, .flags = I2C_M_RD,
109 .buf = data, .len = n } };
111 if (i2c_transfer(adapter, msgs, 2) != 2) {
112 printk(KERN_ERR "error in i2c_read\n");
118 static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n)
122 status = i2c_write_reg(ci->i2c, ci->adr, 0, adr);
124 ci->lastaddress = adr;
125 status = i2c_read(ci->i2c, ci->adr, 1, data, n);
130 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
132 return read_block(ci, reg, val, 1);
136 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
139 u8 addr[3] = { 2, address&0xff, address>>8 };
141 status = i2c_write(ci->i2c, ci->adr, addr, 3);
143 status = i2c_read(ci->i2c, ci->adr, 3, data, n);
147 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
150 u8 addr[3] = { 2, address&0xff, address>>8 };
152 status = i2c_write(ci->i2c, ci->adr, addr, 3);
155 memcpy(buf+1, data, n);
156 status = i2c_write(ci->i2c, ci->adr, buf, n+1);
161 static int read_io(struct cxd *ci, u16 address, u8 *val)
164 u8 addr[3] = { 2, address&0xff, address>>8 };
166 status = i2c_write(ci->i2c, ci->adr, addr, 3);
168 status = i2c_read(ci->i2c, ci->adr, 3, val, 1);
172 static int write_io(struct cxd *ci, u16 address, u8 val)
175 u8 addr[3] = { 2, address&0xff, address>>8 };
176 u8 buf[2] = { 3, val };
178 status = i2c_write(ci->i2c, ci->adr, addr, 3);
180 status = i2c_write(ci->i2c, ci->adr, buf, 2);
186 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
190 status = i2c_write_reg(ci->i2c, ci->adr, 0, reg);
191 if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
192 status = i2c_read_reg(ci->i2c, ci->adr, 1, &ci->regs[reg]);
193 ci->regs[reg] = (ci->regs[reg]&(~mask))|val;
195 ci->lastaddress = reg;
196 status = i2c_write_reg(ci->i2c, ci->adr, 1, ci->regs[reg]);
199 ci->regs[reg] &= 0x7f;
203 static int write_reg(struct cxd *ci, u8 reg, u8 val)
205 return write_regm(ci, reg, val, 0xff);
209 static int write_block(struct cxd *ci, u8 adr, u8 *data, int n)
214 status = i2c_write_reg(ci->i2c, ci->adr, 0, adr);
216 ci->lastaddress = adr;
217 memcpy(buf+1, data, n);
218 status = i2c_write(ci->i2c, ci->adr, buf, n+1);
224 static void set_mode(struct cxd *ci, int mode)
226 if (mode == ci->mode)
230 case 0x00: /* IO mem */
231 write_regm(ci, 0x06, 0x00, 0x07);
233 case 0x01: /* ATT mem */
234 write_regm(ci, 0x06, 0x02, 0x07);
242 static void cam_mode(struct cxd *ci, int mode)
244 if (mode == ci->cammode)
249 write_regm(ci, 0x20, 0x80, 0x80);
252 printk(KERN_INFO "enable cam buffer mode\n");
253 /* write_reg(ci, 0x0d, 0x00); */
254 /* write_reg(ci, 0x0e, 0x01); */
255 write_regm(ci, 0x08, 0x40, 0x40);
256 /* read_reg(ci, 0x12, &dummy); */
257 write_regm(ci, 0x08, 0x80, 0x80);
267 #define CHK_ERROR(s) if ((status = s)) break
269 static int init(struct cxd *ci)
273 mutex_lock(&ci->lock);
276 CHK_ERROR(write_reg(ci, 0x00, 0x00));
277 CHK_ERROR(write_reg(ci, 0x01, 0x00));
278 CHK_ERROR(write_reg(ci, 0x02, 0x10));
279 CHK_ERROR(write_reg(ci, 0x03, 0x00));
280 CHK_ERROR(write_reg(ci, 0x05, 0xFF));
281 CHK_ERROR(write_reg(ci, 0x06, 0x1F));
282 CHK_ERROR(write_reg(ci, 0x07, 0x1F));
283 CHK_ERROR(write_reg(ci, 0x08, 0x28));
284 CHK_ERROR(write_reg(ci, 0x14, 0x20));
286 CHK_ERROR(write_reg(ci, 0x09, 0x4D)); /* Input Mode C, BYPass Serial, TIVAL = low, MSB */
287 CHK_ERROR(write_reg(ci, 0x0A, 0xA7)); /* TOSTRT = 8, Mode B (gated clock), falling Edge, Serial, POL=HIGH, MSB */
290 CHK_ERROR(write_reg(ci, 0x0B, 0x33));
291 CHK_ERROR(write_reg(ci, 0x0C, 0x33));
293 CHK_ERROR(write_regm(ci, 0x14, 0x00, 0x0F));
294 CHK_ERROR(write_reg(ci, 0x15, ci->clk_reg_b));
295 CHK_ERROR(write_regm(ci, 0x16, 0x00, 0x0F));
296 CHK_ERROR(write_reg(ci, 0x17, ci->clk_reg_f));
298 CHK_ERROR(write_reg(ci, 0x20, 0x28)); /* Integer Divider, Falling Edge, Internal Sync, */
299 CHK_ERROR(write_reg(ci, 0x21, 0x00)); /* MCLKI = TICLK/8 */
300 CHK_ERROR(write_reg(ci, 0x22, 0x07)); /* MCLKI = TICLK/8 */
303 CHK_ERROR(write_regm(ci, 0x20, 0x80, 0x80)); /* Reset CAM state machine */
305 CHK_ERROR(write_regm(ci, 0x03, 0x02, 02)); /* Enable IREQA Interrupt */
306 CHK_ERROR(write_reg(ci, 0x01, 0x04)); /* Enable CD Interrupt */
307 CHK_ERROR(write_reg(ci, 0x00, 0x31)); /* Enable TS1,Hot Swap,Slot A */
308 CHK_ERROR(write_regm(ci, 0x09, 0x08, 0x08)); /* Put TS in bypass */
314 mutex_unlock(&ci->lock);
320 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
321 int slot, int address)
323 struct cxd *ci = ca->data;
325 mutex_lock(&ci->lock);
327 read_pccard(ci, address, &val, 1);
328 mutex_unlock(&ci->lock);
333 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
334 int address, u8 value)
336 struct cxd *ci = ca->data;
338 mutex_lock(&ci->lock);
340 write_pccard(ci, address, &value, 1);
341 mutex_unlock(&ci->lock);
345 static int read_cam_control(struct dvb_ca_en50221 *ca,
346 int slot, u8 address)
348 struct cxd *ci = ca->data;
351 mutex_lock(&ci->lock);
353 read_io(ci, address, &val);
354 mutex_unlock(&ci->lock);
358 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
359 u8 address, u8 value)
361 struct cxd *ci = ca->data;
363 mutex_lock(&ci->lock);
365 write_io(ci, address, value);
366 mutex_unlock(&ci->lock);
370 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
372 struct cxd *ci = ca->data;
374 mutex_lock(&ci->lock);
376 write_reg(ci, 0x00, 0x21);
377 write_reg(ci, 0x06, 0x1F);
378 write_reg(ci, 0x00, 0x31);
379 write_regm(ci, 0x20, 0x80, 0x80);
380 write_reg(ci, 0x03, 0x02);
385 for (i = 0; i < 100; i++) {
391 mutex_unlock(&ci->lock);
396 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
398 struct cxd *ci = ca->data;
400 printk(KERN_INFO "slot_shutdown\n");
401 mutex_lock(&ci->lock);
402 /* write_regm(ci, 0x09, 0x08, 0x08); */
403 write_regm(ci, 0x20, 0x80, 0x80);
404 write_regm(ci, 0x06, 0x07, 0x07);
406 mutex_unlock(&ci->lock);
407 return 0; /* shutdown(ci); */
410 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
412 struct cxd *ci = ca->data;
414 mutex_lock(&ci->lock);
415 write_regm(ci, 0x09, 0x00, 0x08);
420 mutex_unlock(&ci->lock);
425 static int campoll(struct cxd *ci)
429 read_reg(ci, 0x04, &istat);
432 write_reg(ci, 0x05, istat);
436 printk(KERN_INFO "DR\n");
439 printk(KERN_INFO "WC\n");
444 read_reg(ci, 0x01, &slotstat);
446 if (!ci->slot_stat) {
447 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
448 write_regm(ci, 0x03, 0x08, 0x08);
454 write_regm(ci, 0x03, 0x00, 0x08);
455 printk(KERN_INFO "NO CAM\n");
459 if (istat&8 && ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
461 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
462 printk(KERN_INFO "READY\n");
469 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
471 struct cxd *ci = ca->data;
474 mutex_lock(&ci->lock);
476 read_reg(ci, 0x01, &slotstat);
477 mutex_unlock(&ci->lock);
479 return ci->slot_stat;
483 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
485 struct cxd *ci = ca->data;
489 mutex_lock(&ci->lock);
491 mutex_unlock(&ci->lock);
493 printk(KERN_INFO "read_data\n");
497 mutex_lock(&ci->lock);
498 read_reg(ci, 0x0f, &msb);
499 read_reg(ci, 0x10, &lsb);
501 read_block(ci, 0x12, ebuf, len);
503 mutex_unlock(&ci->lock);
508 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
510 struct cxd *ci = ca->data;
512 mutex_lock(&ci->lock);
513 printk(KERN_INFO "write_data %d\n", ecount);
514 write_reg(ci, 0x0d, ecount>>8);
515 write_reg(ci, 0x0e, ecount&0xff);
516 write_block(ci, 0x11, ebuf, ecount);
517 mutex_unlock(&ci->lock);
522 static struct dvb_ca_en50221 en_templ = {
523 .read_attribute_mem = read_attribute_mem,
524 .write_attribute_mem = write_attribute_mem,
525 .read_cam_control = read_cam_control,
526 .write_cam_control = write_cam_control,
527 .slot_reset = slot_reset,
528 .slot_shutdown = slot_shutdown,
529 .slot_ts_enable = slot_ts_enable,
530 .poll_slot_status = poll_slot_status,
532 .read_data = read_data,
533 .write_data = write_data,
538 struct dvb_ca_en50221 *cxd2099_attach(u8 adr, void *priv,
539 struct i2c_adapter *i2c)
542 u32 bitrate = 62000000;
545 if (i2c_read_reg(i2c, adr, 0, &val) < 0) {
546 printk(KERN_ERR "No CXD2099 detected at %02x\n", adr);
550 ci = kmalloc(sizeof(struct cxd), GFP_KERNEL);
553 memset(ci, 0, sizeof(*ci));
555 mutex_init(&ci->lock);
558 ci->lastaddress = 0xff;
559 ci->clk_reg_b = 0x4a;
560 ci->clk_reg_f = 0x1b;
561 ci->bitrate = bitrate;
563 memcpy(&ci->en, &en_templ, sizeof(en_templ));
566 printk(KERN_INFO "Attached CXD2099AR at %02x\n", ci->adr);
569 EXPORT_SYMBOL(cxd2099_attach);
571 MODULE_DESCRIPTION("cxd2099");
572 MODULE_AUTHOR("Ralph Metzler <rjkm@metzlerbros.de>");
573 MODULE_LICENSE("GPL");