2 comedi/drivers/ni_atmio16d.c
3 Hardware driver for National Instruments AT-MIO16D board
4 Copyright (C) 2000 Chris R. Baugher <baugher@enteract.com>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 Description: National Instruments AT-MIO-16D
24 Author: Chris R. Baugher <baugher@enteract.com>
26 Devices: [National Instruments] AT-MIO-16 (atmio16), AT-MIO-16D (atmio16d)
29 * I must give credit here to Michal Dobes <dobes@tesnet.cz> who
30 * wrote the driver for Advantec's pcl812 boards. I used the interrupt
31 * handling code from his driver as an example for this one.
38 #include <linux/interrupt.h>
39 #include "../comedidev.h"
41 #include <linux/ioport.h>
45 /* Configuration and Status Registers */
46 #define COM_REG_1 0x00 /* wo 16 */
47 #define STAT_REG 0x00 /* ro 16 */
48 #define COM_REG_2 0x02 /* wo 16 */
49 /* Event Strobe Registers */
50 #define START_CONVERT_REG 0x08 /* wo 16 */
51 #define START_DAQ_REG 0x0A /* wo 16 */
52 #define AD_CLEAR_REG 0x0C /* wo 16 */
53 #define EXT_STROBE_REG 0x0E /* wo 16 */
54 /* Analog Output Registers */
55 #define DAC0_REG 0x10 /* wo 16 */
56 #define DAC1_REG 0x12 /* wo 16 */
57 #define INT2CLR_REG 0x14 /* wo 16 */
58 /* Analog Input Registers */
59 #define MUX_CNTR_REG 0x04 /* wo 16 */
60 #define MUX_GAIN_REG 0x06 /* wo 16 */
61 #define AD_FIFO_REG 0x16 /* ro 16 */
62 #define DMA_TC_INT_CLR_REG 0x16 /* wo 16 */
63 /* AM9513A Counter/Timer Registers */
64 #define AM9513A_DATA_REG 0x18 /* rw 16 */
65 #define AM9513A_COM_REG 0x1A /* wo 16 */
66 #define AM9513A_STAT_REG 0x1A /* ro 16 */
67 /* MIO-16 Digital I/O Registers */
68 #define MIO_16_DIG_IN_REG 0x1C /* ro 16 */
69 #define MIO_16_DIG_OUT_REG 0x1C /* wo 16 */
70 /* RTSI Switch Registers */
71 #define RTSI_SW_SHIFT_REG 0x1E /* wo 8 */
72 #define RTSI_SW_STROBE_REG 0x1F /* wo 8 */
73 /* DIO-24 Registers */
74 #define DIO_24_PORTA_REG 0x00 /* rw 8 */
75 #define DIO_24_PORTB_REG 0x01 /* rw 8 */
76 #define DIO_24_PORTC_REG 0x02 /* rw 8 */
77 #define DIO_24_CNFG_REG 0x03 /* wo 8 */
79 /* Command Register bits */
80 #define COMREG1_2SCADC 0x0001
81 #define COMREG1_1632CNT 0x0002
82 #define COMREG1_SCANEN 0x0008
83 #define COMREG1_DAQEN 0x0010
84 #define COMREG1_DMAEN 0x0020
85 #define COMREG1_CONVINTEN 0x0080
86 #define COMREG2_SCN2 0x0010
87 #define COMREG2_INTEN 0x0080
88 #define COMREG2_DOUTEN0 0x0100
89 #define COMREG2_DOUTEN1 0x0200
90 /* Status Register bits */
91 #define STAT_AD_OVERRUN 0x0100
92 #define STAT_AD_OVERFLOW 0x0200
93 #define STAT_AD_DAQPROG 0x0800
94 #define STAT_AD_CONVAVAIL 0x2000
95 #define STAT_AD_DAQSTOPINT 0x4000
96 /* AM9513A Counter/Timer defines */
97 #define CLOCK_1_MHZ 0x8B25
98 #define CLOCK_100_KHZ 0x8C25
99 #define CLOCK_10_KHZ 0x8D25
100 #define CLOCK_1_KHZ 0x8E25
101 #define CLOCK_100_HZ 0x8F25
102 /* Other miscellaneous defines */
103 #define ATMIO16D_SIZE 32 /* bus address range */
104 #define devpriv ((struct atmio16d_private *)dev->private)
105 #define ATMIO16D_TIMEOUT 10
107 struct atmio16_board_t {
113 static const struct atmio16_board_t atmio16_boards[] = {
124 #define n_atmio16_boards sizeof(atmio16_boards)/sizeof(atmio16_boards[0])
126 #define boardtype ((const struct atmio16_board_t *)dev->board_ptr)
128 /* function prototypes */
129 static int atmio16d_attach(struct comedi_device *dev, struct comedi_devconfig *it);
130 static int atmio16d_detach(struct comedi_device *dev);
131 static irqreturn_t atmio16d_interrupt(int irq, void *d);
132 static int atmio16d_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
133 struct comedi_cmd *cmd);
134 static int atmio16d_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
135 static int atmio16d_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
136 static void reset_counters(struct comedi_device *dev);
137 static void reset_atmio16d(struct comedi_device *dev);
139 /* main driver struct */
140 static struct comedi_driver driver_atmio16d = {
141 .driver_name = "atmio16",
142 .module = THIS_MODULE,
143 .attach = atmio16d_attach,
144 .detach = atmio16d_detach,
145 .board_name = &atmio16_boards[0].name,
146 .num_names = n_atmio16_boards,
147 .offset = sizeof(struct atmio16_board_t),
150 COMEDI_INITCLEANUP(driver_atmio16d);
153 static const struct comedi_lrange range_atmio16d_ai_10_bipolar = { 4, {
161 static const struct comedi_lrange range_atmio16d_ai_5_bipolar = { 4, {
169 static const struct comedi_lrange range_atmio16d_ai_unipolar = { 4, {
177 /* private data struct */
178 struct atmio16d_private {
179 enum { adc_diff, adc_singleended } adc_mux;
180 enum { adc_bipolar10, adc_bipolar5, adc_unipolar10 } adc_range;
181 enum { adc_2comp, adc_straight } adc_coding;
182 enum { dac_bipolar, dac_unipolar } dac0_range, dac1_range;
183 enum { dac_internal, dac_external } dac0_reference, dac1_reference;
184 enum { dac_2comp, dac_straight } dac0_coding, dac1_coding;
185 const struct comedi_lrange *ao_range_type_list[2];
186 unsigned int ao_readback[2];
187 unsigned int com_reg_1_state; /* current state of command register 1 */
188 unsigned int com_reg_2_state; /* current state of command register 2 */
191 static void reset_counters(struct comedi_device *dev)
194 outw(0xFFC2, dev->iobase + AM9513A_COM_REG);
195 outw(0xFF02, dev->iobase + AM9513A_COM_REG);
196 outw(0x4, dev->iobase + AM9513A_DATA_REG);
197 outw(0xFF0A, dev->iobase + AM9513A_COM_REG);
198 outw(0x3, dev->iobase + AM9513A_DATA_REG);
199 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
200 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
202 outw(0xFFC4, dev->iobase + AM9513A_COM_REG);
203 outw(0xFF03, dev->iobase + AM9513A_COM_REG);
204 outw(0x4, dev->iobase + AM9513A_DATA_REG);
205 outw(0xFF0B, dev->iobase + AM9513A_COM_REG);
206 outw(0x3, dev->iobase + AM9513A_DATA_REG);
207 outw(0xFF44, dev->iobase + AM9513A_COM_REG);
208 outw(0xFF44, dev->iobase + AM9513A_COM_REG);
210 outw(0xFFC8, dev->iobase + AM9513A_COM_REG);
211 outw(0xFF04, dev->iobase + AM9513A_COM_REG);
212 outw(0x4, dev->iobase + AM9513A_DATA_REG);
213 outw(0xFF0C, dev->iobase + AM9513A_COM_REG);
214 outw(0x3, dev->iobase + AM9513A_DATA_REG);
215 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
216 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
218 outw(0xFFD0, dev->iobase + AM9513A_COM_REG);
219 outw(0xFF05, dev->iobase + AM9513A_COM_REG);
220 outw(0x4, dev->iobase + AM9513A_DATA_REG);
221 outw(0xFF0D, dev->iobase + AM9513A_COM_REG);
222 outw(0x3, dev->iobase + AM9513A_DATA_REG);
223 outw(0xFF50, dev->iobase + AM9513A_COM_REG);
224 outw(0xFF50, dev->iobase + AM9513A_COM_REG);
226 outw(0, dev->iobase + AD_CLEAR_REG);
229 static void reset_atmio16d(struct comedi_device *dev)
233 /* now we need to initialize the board */
234 outw(0, dev->iobase + COM_REG_1);
235 outw(0, dev->iobase + COM_REG_2);
236 outw(0, dev->iobase + MUX_GAIN_REG);
237 /* init AM9513A timer */
238 outw(0xFFFF, dev->iobase + AM9513A_COM_REG);
239 outw(0xFFEF, dev->iobase + AM9513A_COM_REG);
240 outw(0xFF17, dev->iobase + AM9513A_COM_REG);
241 outw(0xF000, dev->iobase + AM9513A_DATA_REG);
242 for (i = 1; i <= 5; ++i) {
243 outw(0xFF00 + i, dev->iobase + AM9513A_COM_REG);
244 outw(0x0004, dev->iobase + AM9513A_DATA_REG);
245 outw(0xFF08 + i, dev->iobase + AM9513A_COM_REG);
246 outw(0x3, dev->iobase + AM9513A_DATA_REG);
248 outw(0xFF5F, dev->iobase + AM9513A_COM_REG);
249 /* timer init done */
250 outw(0, dev->iobase + AD_CLEAR_REG);
251 outw(0, dev->iobase + INT2CLR_REG);
252 /* select straight binary mode for Analog Input */
253 devpriv->com_reg_1_state |= 1;
254 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
255 devpriv->adc_coding = adc_straight;
256 /* zero the analog outputs */
257 outw(2048, dev->iobase + DAC0_REG);
258 outw(2048, dev->iobase + DAC1_REG);
261 static irqreturn_t atmio16d_interrupt(int irq, void *d)
263 struct comedi_device *dev = d;
264 struct comedi_subdevice *s = dev->subdevices + 0;
266 /* printk("atmio16d_interrupt!\n"); */
268 comedi_buf_put(s->async, inw(dev->iobase + AD_FIFO_REG));
270 comedi_event(dev, s);
274 static int atmio16d_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
275 struct comedi_cmd *cmd)
279 printk("atmio16d_ai_cmdtest\n");
281 /* make sure triggers are valid */
282 tmp = cmd->start_src;
283 cmd->start_src &= TRIG_NOW;
284 if (!cmd->start_src || tmp != cmd->start_src)
287 tmp = cmd->scan_begin_src;
288 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER;
289 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
292 tmp = cmd->convert_src;
293 cmd->convert_src &= TRIG_TIMER;
294 if (!cmd->convert_src || tmp != cmd->convert_src)
297 tmp = cmd->scan_end_src;
298 cmd->scan_end_src &= TRIG_COUNT;
299 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
303 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
304 if (!cmd->stop_src || tmp != cmd->stop_src)
310 /* step 2: make sure trigger sources are unique and mutually compatible */
311 /* note that mutual compatiblity is not an issue here */
312 if (cmd->scan_begin_src != TRIG_FOLLOW &&
313 cmd->scan_begin_src != TRIG_EXT &&
314 cmd->scan_begin_src != TRIG_TIMER)
316 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
322 /* step 3: make sure arguments are trivially compatible */
324 if (cmd->start_arg != 0) {
328 if (cmd->scan_begin_src == TRIG_FOLLOW) {
329 /* internal trigger */
330 if (cmd->scan_begin_arg != 0) {
331 cmd->scan_begin_arg = 0;
336 /* external trigger */
337 /* should be level/edge, hi/lo specification here */
338 if (cmd->scan_begin_arg != 0) {
339 cmd->scan_begin_arg = 0;
345 if (cmd->convert_arg < 10000) {
346 cmd->convert_arg = 10000;
350 if (cmd->convert_arg > SLOWEST_TIMER) {
351 cmd->convert_arg = SLOWEST_TIMER;
355 if (cmd->scan_end_arg != cmd->chanlist_len) {
356 cmd->scan_end_arg = cmd->chanlist_len;
359 if (cmd->stop_src == TRIG_COUNT) {
360 /* any count is allowed */
363 if (cmd->stop_arg != 0) {
375 static int atmio16d_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
377 struct comedi_cmd *cmd = &s->async->cmd;
378 unsigned int timer, base_clock;
379 unsigned int sample_count, tmp, chan, gain;
382 printk("atmio16d_ai_cmd\n");
384 /* This is slowly becoming a working command interface. *
385 * It is still uber-experimental */
388 s->async->cur_chan = 0;
390 /* check if scanning multiple channels */
391 if (cmd->chanlist_len < 2) {
392 devpriv->com_reg_1_state &= ~COMREG1_SCANEN;
393 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
395 devpriv->com_reg_1_state |= COMREG1_SCANEN;
396 devpriv->com_reg_2_state |= COMREG2_SCN2;
397 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
398 outw(devpriv->com_reg_2_state, dev->iobase + COM_REG_2);
401 /* Setup the Mux-Gain Counter */
402 for (i = 0; i < cmd->chanlist_len; ++i) {
403 chan = CR_CHAN(cmd->chanlist[i]);
404 gain = CR_RANGE(cmd->chanlist[i]);
405 outw(i, dev->iobase + MUX_CNTR_REG);
406 tmp = chan | (gain << 6);
407 if (i == cmd->scan_end_arg - 1)
408 tmp |= 0x0010; /* set LASTONE bit */
409 outw(tmp, dev->iobase + MUX_GAIN_REG);
412 /* Now program the sample interval timer */
413 /* Figure out which clock to use then get an
414 * appropriate timer value */
415 if (cmd->convert_arg < 65536000) {
416 base_clock = CLOCK_1_MHZ;
417 timer = cmd->convert_arg / 1000;
418 } else if (cmd->convert_arg < 655360000) {
419 base_clock = CLOCK_100_KHZ;
420 timer = cmd->convert_arg / 10000;
421 } else if (cmd->convert_arg <= 0xffffffff /* 6553600000 */) {
422 base_clock = CLOCK_10_KHZ;
423 timer = cmd->convert_arg / 100000;
424 } else if (cmd->convert_arg <= 0xffffffff /* 65536000000 */) {
425 base_clock = CLOCK_1_KHZ;
426 timer = cmd->convert_arg / 1000000;
428 outw(0xFF03, dev->iobase + AM9513A_COM_REG);
429 outw(base_clock, dev->iobase + AM9513A_DATA_REG);
430 outw(0xFF0B, dev->iobase + AM9513A_COM_REG);
431 outw(0x2, dev->iobase + AM9513A_DATA_REG);
432 outw(0xFF44, dev->iobase + AM9513A_COM_REG);
433 outw(0xFFF3, dev->iobase + AM9513A_COM_REG);
434 outw(timer, dev->iobase + AM9513A_DATA_REG);
435 outw(0xFF24, dev->iobase + AM9513A_COM_REG);
437 /* Now figure out how many samples to get */
438 /* and program the sample counter */
439 sample_count = cmd->stop_arg * cmd->scan_end_arg;
440 outw(0xFF04, dev->iobase + AM9513A_COM_REG);
441 outw(0x1025, dev->iobase + AM9513A_DATA_REG);
442 outw(0xFF0C, dev->iobase + AM9513A_COM_REG);
443 if (sample_count < 65536) {
444 /* use only Counter 4 */
445 outw(sample_count, dev->iobase + AM9513A_DATA_REG);
446 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
447 outw(0xFFF4, dev->iobase + AM9513A_COM_REG);
448 outw(0xFF28, dev->iobase + AM9513A_COM_REG);
449 devpriv->com_reg_1_state &= ~COMREG1_1632CNT;
450 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
452 /* Counter 4 and 5 are needed */
454 tmp = sample_count & 0xFFFF;
456 outw(tmp - 1, dev->iobase + AM9513A_DATA_REG);
458 outw(0xFFFF, dev->iobase + AM9513A_DATA_REG);
460 outw(0xFF48, dev->iobase + AM9513A_COM_REG);
461 outw(0, dev->iobase + AM9513A_DATA_REG);
462 outw(0xFF28, dev->iobase + AM9513A_COM_REG);
463 outw(0xFF05, dev->iobase + AM9513A_COM_REG);
464 outw(0x25, dev->iobase + AM9513A_DATA_REG);
465 outw(0xFF0D, dev->iobase + AM9513A_COM_REG);
466 tmp = sample_count & 0xFFFF;
467 if ((tmp == 0) || (tmp == 1)) {
468 outw((sample_count >> 16) & 0xFFFF,
469 dev->iobase + AM9513A_DATA_REG);
471 outw(((sample_count >> 16) & 0xFFFF) + 1,
472 dev->iobase + AM9513A_DATA_REG);
474 outw(0xFF70, dev->iobase + AM9513A_COM_REG);
475 devpriv->com_reg_1_state |= COMREG1_1632CNT;
476 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
479 /* Program the scan interval timer ONLY IF SCANNING IS ENABLED */
480 /* Figure out which clock to use then get an
481 * appropriate timer value */
482 if (cmd->chanlist_len > 1) {
483 if (cmd->scan_begin_arg < 65536000) {
484 base_clock = CLOCK_1_MHZ;
485 timer = cmd->scan_begin_arg / 1000;
486 } else if (cmd->scan_begin_arg < 655360000) {
487 base_clock = CLOCK_100_KHZ;
488 timer = cmd->scan_begin_arg / 10000;
489 } else if (cmd->scan_begin_arg < 0xffffffff /* 6553600000 */) {
490 base_clock = CLOCK_10_KHZ;
491 timer = cmd->scan_begin_arg / 100000;
492 } else if (cmd->scan_begin_arg < 0xffffffff /* 65536000000 */) {
493 base_clock = CLOCK_1_KHZ;
494 timer = cmd->scan_begin_arg / 1000000;
496 outw(0xFF02, dev->iobase + AM9513A_COM_REG);
497 outw(base_clock, dev->iobase + AM9513A_DATA_REG);
498 outw(0xFF0A, dev->iobase + AM9513A_COM_REG);
499 outw(0x2, dev->iobase + AM9513A_DATA_REG);
500 outw(0xFF42, dev->iobase + AM9513A_COM_REG);
501 outw(0xFFF2, dev->iobase + AM9513A_COM_REG);
502 outw(timer, dev->iobase + AM9513A_DATA_REG);
503 outw(0xFF22, dev->iobase + AM9513A_COM_REG);
506 /* Clear the A/D FIFO and reset the MUX counter */
507 outw(0, dev->iobase + AD_CLEAR_REG);
508 outw(0, dev->iobase + MUX_CNTR_REG);
509 outw(0, dev->iobase + INT2CLR_REG);
510 /* enable this acquisition operation */
511 devpriv->com_reg_1_state |= COMREG1_DAQEN;
512 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
513 /* enable interrupts for conversion completion */
514 devpriv->com_reg_1_state |= COMREG1_CONVINTEN;
515 devpriv->com_reg_2_state |= COMREG2_INTEN;
516 outw(devpriv->com_reg_1_state, dev->iobase + COM_REG_1);
517 outw(devpriv->com_reg_2_state, dev->iobase + COM_REG_2);
518 /* apply a trigger. this starts the counters! */
519 outw(0, dev->iobase + START_DAQ_REG);
524 /* This will cancel a running acquisition operation */
525 static int atmio16d_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
532 /* Mode 0 is used to get a single conversion on demand */
533 static int atmio16d_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
534 struct comedi_insn *insn, unsigned int *data)
542 printk("atmio16d_ai_insn_read\n");
544 chan = CR_CHAN(insn->chanspec);
545 gain = CR_RANGE(insn->chanspec);
547 /* reset the Analog input circuitry */
548 /* outw( 0, dev->iobase+AD_CLEAR_REG ); */
549 /* reset the Analog Input MUX Counter to 0 */
550 /* outw( 0, dev->iobase+MUX_CNTR_REG ); */
552 /* set the Input MUX gain */
553 outw(chan | (gain << 6), dev->iobase + MUX_GAIN_REG);
555 for (i = 0; i < insn->n; i++) {
556 /* start the conversion */
557 outw(0, dev->iobase + START_CONVERT_REG);
558 /* wait for it to finish */
559 for (t = 0; t < ATMIO16D_TIMEOUT; t++) {
560 /* check conversion status */
561 status = inw(dev->iobase + STAT_REG);
563 printk("status=%x\n", status);
565 if (status & STAT_AD_CONVAVAIL) {
566 /* read the data now */
567 data[i] = inw(dev->iobase + AD_FIFO_REG);
568 /* change to two's complement if need be */
569 if (devpriv->adc_coding == adc_2comp) {
574 if (status & STAT_AD_OVERFLOW) {
575 printk("atmio16d: a/d FIFO overflow\n");
576 outw(0, dev->iobase + AD_CLEAR_REG);
581 /* end waiting, now check if it timed out */
582 if (t == ATMIO16D_TIMEOUT) {
583 printk("atmio16d: timeout\n");
592 static int atmio16d_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
593 struct comedi_insn *insn, unsigned int *data)
597 printk("atmio16d_ao_insn_read\n");
600 for (i = 0; i < insn->n; i++) {
601 data[i] = devpriv->ao_readback[CR_CHAN(insn->chanspec)];
607 static int atmio16d_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s,
608 struct comedi_insn *insn, unsigned int *data)
614 printk("atmio16d_ao_insn_write\n");
617 chan = CR_CHAN(insn->chanspec);
619 for (i = 0; i < insn->n; i++) {
623 if (devpriv->dac0_coding == dac_2comp) {
626 outw(d, dev->iobase + DAC0_REG);
629 if (devpriv->dac1_coding == dac_2comp) {
632 outw(d, dev->iobase + DAC1_REG);
637 devpriv->ao_readback[chan] = data[i];
642 static int atmio16d_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s,
643 struct comedi_insn *insn, unsigned int *data)
649 s->state &= ~data[0];
650 s->state |= (data[0] | data[1]);
651 outw(s->state, dev->iobase + MIO_16_DIG_OUT_REG);
653 data[1] = inw(dev->iobase + MIO_16_DIG_IN_REG);
658 static int atmio16d_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
659 struct comedi_insn *insn, unsigned int *data)
664 for (i = 0; i < insn->n; i++) {
665 mask = (CR_CHAN(insn->chanspec) < 4) ? 0x0f : 0xf0;
670 devpriv->com_reg_2_state &= ~(COMREG2_DOUTEN0 | COMREG2_DOUTEN1);
671 if (s->io_bits & 0x0f)
672 devpriv->com_reg_2_state |= COMREG2_DOUTEN0;
673 if (s->io_bits & 0xf0)
674 devpriv->com_reg_2_state |= COMREG2_DOUTEN1;
675 outw(devpriv->com_reg_2_state, dev->iobase + COM_REG_2);
681 options[0] - I/O port
684 N == irq N {3,4,5,6,7,9,10,11,12,14,15}
687 N == irq N {3,4,5,6,7,9}
688 options[3] - DMA1 channel
691 options[4] - DMA2 channel
696 0=differential, 1=single
697 options[6] - a/d range
698 0=bipolar10, 1=bipolar5, 2=unipolar10
700 options[7] - dac0 range
701 0=bipolar, 1=unipolar
702 options[8] - dac0 reference
703 0=internal, 1=external
704 options[9] - dac0 coding
705 0=2's comp, 1=straight binary
707 options[10] - dac1 range
708 options[11] - dac1 reference
709 options[12] - dac1 coding
712 static int atmio16d_attach(struct comedi_device *dev, struct comedi_devconfig *it)
715 unsigned long iobase;
718 struct comedi_subdevice *s;
720 /* make sure the address range is free and allocate it */
721 iobase = it->options[0];
722 printk("comedi%d: atmio16d: 0x%04lx ", dev->minor, iobase);
723 if (!request_region(iobase, ATMIO16D_SIZE, "ni_atmio16d")) {
724 printk("I/O port conflict\n");
727 dev->iobase = iobase;
730 dev->board_name = boardtype->name;
732 ret = alloc_subdevices(dev, 4);
736 ret = alloc_private(dev, sizeof(struct atmio16d_private));
740 /* reset the atmio16d hardware */
743 /* check if our interrupt is available and get it */
744 irq = it->options[1];
747 ret = request_irq(irq, atmio16d_interrupt, 0, "atmio16d", dev);
749 printk("failed to allocate irq %u\n", irq);
753 printk("( irq = %u )\n", irq);
755 printk("( no irq )");
758 /* set device options */
759 devpriv->adc_mux = it->options[5];
760 devpriv->adc_range = it->options[6];
762 devpriv->dac0_range = it->options[7];
763 devpriv->dac0_reference = it->options[8];
764 devpriv->dac0_coding = it->options[9];
765 devpriv->dac1_range = it->options[10];
766 devpriv->dac1_reference = it->options[11];
767 devpriv->dac1_coding = it->options[12];
769 /* setup sub-devices */
770 s = dev->subdevices + 0;
771 dev->read_subdev = s;
773 s->type = COMEDI_SUBD_AI;
774 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_CMD_READ;
775 s->n_chan = (devpriv->adc_mux ? 16 : 8);
776 s->len_chanlist = 16;
777 s->insn_read = atmio16d_ai_insn_read;
778 s->do_cmdtest = atmio16d_ai_cmdtest;
779 s->do_cmd = atmio16d_ai_cmd;
780 s->cancel = atmio16d_ai_cancel;
781 s->maxdata = 0xfff; /* 4095 decimal */
782 switch (devpriv->adc_range) {
784 s->range_table = &range_atmio16d_ai_10_bipolar;
787 s->range_table = &range_atmio16d_ai_5_bipolar;
790 s->range_table = &range_atmio16d_ai_unipolar;
796 s->type = COMEDI_SUBD_AO;
797 s->subdev_flags = SDF_WRITABLE;
799 s->insn_read = atmio16d_ao_insn_read;
800 s->insn_write = atmio16d_ao_insn_write;
801 s->maxdata = 0xfff; /* 4095 decimal */
802 s->range_table_list = devpriv->ao_range_type_list;
803 switch (devpriv->dac0_range) {
805 devpriv->ao_range_type_list[0] = &range_bipolar10;
808 devpriv->ao_range_type_list[0] = &range_unipolar10;
811 switch (devpriv->dac1_range) {
813 devpriv->ao_range_type_list[1] = &range_bipolar10;
816 devpriv->ao_range_type_list[1] = &range_unipolar10;
822 s->type = COMEDI_SUBD_DIO;
823 s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
825 s->insn_bits = atmio16d_dio_insn_bits;
826 s->insn_config = atmio16d_dio_insn_config;
828 s->range_table = &range_digital;
832 if (boardtype->has_8255) {
833 subdev_8255_init(dev, s, NULL, dev->iobase);
835 s->type = COMEDI_SUBD_UNUSED;
838 /* don't yet know how to deal with counter/timers */
842 s->type = COMEDI_SUBD_TIMER;
851 static int atmio16d_detach(struct comedi_device *dev)
853 printk("comedi%d: atmio16d: remove\n", dev->minor);
855 if (dev->subdevices && boardtype->has_8255)
856 subdev_8255_cleanup(dev, dev->subdevices + 3);
859 free_irq(dev->irq, dev);
864 release_region(dev->iobase, ATMIO16D_SIZE);