2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 #include <linux/kernel.h>
17 #include <linux/string.h>
26 #include <bcmendian.h>
30 #include <bcmsrom_tbl.h>
42 #include <sbsdpcmdev.h>
45 #include <proto/ethernet.h> /* for sprom content groking */
47 #define BS_ERROR(args)
49 #define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \
50 (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \
51 ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \
52 ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET))
55 #define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */
56 #define WRITE_WORD_DELAY 20 /* 20 ms between each word write */
59 typedef struct varbuf {
60 char *base; /* pointer to buffer base */
61 char *buf; /* pointer to current position */
62 unsigned int size; /* current (residual) size in bytes */
67 #define SROM_CIS_SINGLE 1
69 static int initvars_srom_si(si_t *sih, osl_t *osh, void *curmap, char **vars,
71 static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off,
73 static int initvars_srom_pci(si_t *sih, void *curmap, char **vars,
75 static int initvars_flash_si(si_t *sih, char **vars, uint *count);
77 static int initvars_cis_sdio(osl_t *osh, char **vars, uint *count);
78 static int sprom_cmd_sdio(osl_t *osh, u8 cmd);
79 static int sprom_read_sdio(osl_t *osh, u16 addr, u16 *data);
81 static int sprom_read_pci(osl_t *osh, si_t *sih, u16 *sprom, uint wordoff,
82 u16 *buf, uint nwords, bool check_crc);
83 #if defined(BCMNVRAMR)
84 static int otp_read_pci(osl_t *osh, si_t *sih, u16 *buf, uint bufsz);
86 static u16 srom_cc_cmd(si_t *sih, osl_t *osh, void *ccregs, u32 cmd,
87 uint wordoff, u16 data);
89 static int initvars_table(osl_t *osh, char *start, char *end, char **vars,
91 static int initvars_flash(si_t *sih, osl_t *osh, char **vp, uint len);
93 /* Initialization of varbuf structure */
94 static void varbuf_init(varbuf_t *b, char *buf, uint size)
97 b->base = b->buf = buf;
100 /* append a null terminated var=value string */
101 static int varbuf_append(varbuf_t *b, const char *fmt, ...)
112 r = vsnprintf(b->buf, b->size, fmt, ap);
115 /* C99 snprintf behavior returns r >= size on overflow,
116 * others return -1 on overflow.
117 * All return -1 on format error.
118 * We need to leave room for 2 null terminations, one for the current var
119 * string, and one for final null of the var table. So check that the
120 * strlen written, r, leaves room for 2 chars.
122 if ((r == -1) || (r > (int)(b->size - 2))) {
127 /* Remove any earlier occurrence of the same variable */
128 s = strchr(b->buf, '=');
130 len = (size_t) (s - b->buf);
131 for (s = b->base; s < b->buf;) {
132 if ((bcmp(s, b->buf, len) == 0) && s[len] == '=') {
134 memmove(s, (s + len),
135 ((b->buf + r + 1) - (s + len)));
137 b->size += (unsigned int)len;
146 /* skip over this string's null termination */
155 * Initialize local vars from the right source for this platform.
156 * Return 0 on success, nonzero on error.
158 int srom_var_init(si_t *sih, uint bustype, void *curmap, osl_t *osh,
159 char **vars, uint *count)
165 ASSERT(bustype == BUSTYPE(bustype));
166 if (vars == NULL || count == NULL)
172 switch (BUSTYPE(bustype)) {
175 return initvars_srom_si(sih, osh, curmap, vars, count);
178 ASSERT(curmap != NULL);
182 return initvars_srom_pci(sih, curmap, vars, count);
186 return initvars_cis_sdio(osh, vars, count);
195 /* support only 16-bit word read from srom */
197 srom_read(si_t *sih, uint bustype, void *curmap, osl_t *osh,
198 uint byteoff, uint nbytes, u16 *buf, bool check_crc)
205 ASSERT(bustype == BUSTYPE(bustype));
207 /* check input - 16-bit access only */
208 if (byteoff & 1 || nbytes & 1 || (byteoff + nbytes) > SROM_MAX)
214 if (BUSTYPE(bustype) == PCI_BUS) {
218 if (si_is_sprom_available(sih)) {
221 srom = (u16 *) SROM_OFFSET(sih);
226 (osh, sih, srom, off, buf, nw, check_crc))
229 #if defined(BCMNVRAMR)
231 if (otp_read_pci(osh, sih, buf, SROM_MAX))
236 } else if (BUSTYPE(bustype) == SDIO_BUS) {
239 for (i = 0; i < nw; i++) {
241 (osh, (u16) (off + i), (u16 *) (buf + i)))
245 } else if (BUSTYPE(bustype) == SI_BUS) {
254 static const char vstr_manf[] = "manf=%s";
255 static const char vstr_productname[] = "productname=%s";
256 static const char vstr_manfid[] = "manfid=0x%x";
257 static const char vstr_prodid[] = "prodid=0x%x";
259 static const char vstr_sdmaxspeed[] = "sdmaxspeed=%d";
260 static const char vstr_sdmaxblk[][13] = {
261 "sdmaxblk0=%d", "sdmaxblk1=%d", "sdmaxblk2=%d"};
263 static const char vstr_regwindowsz[] = "regwindowsz=%d";
264 static const char vstr_sromrev[] = "sromrev=%d";
265 static const char vstr_chiprev[] = "chiprev=%d";
266 static const char vstr_subvendid[] = "subvendid=0x%x";
267 static const char vstr_subdevid[] = "subdevid=0x%x";
268 static const char vstr_boardrev[] = "boardrev=0x%x";
269 static const char vstr_aa2g[] = "aa2g=0x%x";
270 static const char vstr_aa5g[] = "aa5g=0x%x";
271 static const char vstr_ag[] = "ag%d=0x%x";
272 static const char vstr_cc[] = "cc=%d";
273 static const char vstr_opo[] = "opo=%d";
274 static const char vstr_pa0b[][9] = {
275 "pa0b0=%d", "pa0b1=%d", "pa0b2=%d"};
277 static const char vstr_pa0itssit[] = "pa0itssit=%d";
278 static const char vstr_pa0maxpwr[] = "pa0maxpwr=%d";
279 static const char vstr_pa1b[][9] = {
280 "pa1b0=%d", "pa1b1=%d", "pa1b2=%d"};
282 static const char vstr_pa1lob[][11] = {
283 "pa1lob0=%d", "pa1lob1=%d", "pa1lob2=%d"};
285 static const char vstr_pa1hib[][11] = {
286 "pa1hib0=%d", "pa1hib1=%d", "pa1hib2=%d"};
288 static const char vstr_pa1itssit[] = "pa1itssit=%d";
289 static const char vstr_pa1maxpwr[] = "pa1maxpwr=%d";
290 static const char vstr_pa1lomaxpwr[] = "pa1lomaxpwr=%d";
291 static const char vstr_pa1himaxpwr[] = "pa1himaxpwr=%d";
292 static const char vstr_oem[] =
293 "oem=%02x%02x%02x%02x%02x%02x%02x%02x";
294 static const char vstr_boardflags[] = "boardflags=0x%x";
295 static const char vstr_boardflags2[] = "boardflags2=0x%x";
296 static const char vstr_ledbh[] = "ledbh%d=0x%x";
297 static const char vstr_noccode[] = "ccode=0x0";
298 static const char vstr_ccode[] = "ccode=%c%c";
299 static const char vstr_cctl[] = "cctl=0x%x";
300 static const char vstr_cckpo[] = "cckpo=0x%x";
301 static const char vstr_ofdmpo[] = "ofdmpo=0x%x";
302 static const char vstr_rdlid[] = "rdlid=0x%x";
303 static const char vstr_rdlrndis[] = "rdlrndis=%d";
304 static const char vstr_rdlrwu[] = "rdlrwu=%d";
305 static const char vstr_usbfs[] = "usbfs=%d";
306 static const char vstr_wpsgpio[] = "wpsgpio=%d";
307 static const char vstr_wpsled[] = "wpsled=%d";
308 static const char vstr_rdlsn[] = "rdlsn=%d";
309 static const char vstr_rssismf2g[] = "rssismf2g=%d";
310 static const char vstr_rssismc2g[] = "rssismc2g=%d";
311 static const char vstr_rssisav2g[] = "rssisav2g=%d";
312 static const char vstr_bxa2g[] = "bxa2g=%d";
313 static const char vstr_rssismf5g[] = "rssismf5g=%d";
314 static const char vstr_rssismc5g[] = "rssismc5g=%d";
315 static const char vstr_rssisav5g[] = "rssisav5g=%d";
316 static const char vstr_bxa5g[] = "bxa5g=%d";
317 static const char vstr_tri2g[] = "tri2g=%d";
318 static const char vstr_tri5gl[] = "tri5gl=%d";
319 static const char vstr_tri5g[] = "tri5g=%d";
320 static const char vstr_tri5gh[] = "tri5gh=%d";
321 static const char vstr_rxpo2g[] = "rxpo2g=%d";
322 static const char vstr_rxpo5g[] = "rxpo5g=%d";
323 static const char vstr_boardtype[] = "boardtype=0x%x";
324 static const char vstr_leddc[] = "leddc=0x%04x";
325 static const char vstr_vendid[] = "vendid=0x%x";
326 static const char vstr_devid[] = "devid=0x%x";
327 static const char vstr_xtalfreq[] = "xtalfreq=%d";
328 static const char vstr_txchain[] = "txchain=0x%x";
329 static const char vstr_rxchain[] = "rxchain=0x%x";
330 static const char vstr_antswitch[] = "antswitch=0x%x";
331 static const char vstr_regrev[] = "regrev=0x%x";
332 static const char vstr_antswctl2g[] = "antswctl2g=0x%x";
333 static const char vstr_triso2g[] = "triso2g=0x%x";
334 static const char vstr_pdetrange2g[] = "pdetrange2g=0x%x";
335 static const char vstr_extpagain2g[] = "extpagain2g=0x%x";
336 static const char vstr_tssipos2g[] = "tssipos2g=0x%x";
337 static const char vstr_antswctl5g[] = "antswctl5g=0x%x";
338 static const char vstr_triso5g[] = "triso5g=0x%x";
339 static const char vstr_pdetrange5g[] = "pdetrange5g=0x%x";
340 static const char vstr_extpagain5g[] = "extpagain5g=0x%x";
341 static const char vstr_tssipos5g[] = "tssipos5g=0x%x";
342 static const char vstr_maxp2ga0[] = "maxp2ga0=0x%x";
343 static const char vstr_itt2ga0[] = "itt2ga0=0x%x";
344 static const char vstr_pa[] = "pa%dgw%da%d=0x%x";
345 static const char vstr_pahl[] = "pa%dg%cw%da%d=0x%x";
346 static const char vstr_maxp5ga0[] = "maxp5ga0=0x%x";
347 static const char vstr_itt5ga0[] = "itt5ga0=0x%x";
348 static const char vstr_maxp5gha0[] = "maxp5gha0=0x%x";
349 static const char vstr_maxp5gla0[] = "maxp5gla0=0x%x";
350 static const char vstr_maxp2ga1[] = "maxp2ga1=0x%x";
351 static const char vstr_itt2ga1[] = "itt2ga1=0x%x";
352 static const char vstr_maxp5ga1[] = "maxp5ga1=0x%x";
353 static const char vstr_itt5ga1[] = "itt5ga1=0x%x";
354 static const char vstr_maxp5gha1[] = "maxp5gha1=0x%x";
355 static const char vstr_maxp5gla1[] = "maxp5gla1=0x%x";
356 static const char vstr_cck2gpo[] = "cck2gpo=0x%x";
357 static const char vstr_ofdm2gpo[] = "ofdm2gpo=0x%x";
358 static const char vstr_ofdm5gpo[] = "ofdm5gpo=0x%x";
359 static const char vstr_ofdm5glpo[] = "ofdm5glpo=0x%x";
360 static const char vstr_ofdm5ghpo[] = "ofdm5ghpo=0x%x";
361 static const char vstr_cddpo[] = "cddpo=0x%x";
362 static const char vstr_stbcpo[] = "stbcpo=0x%x";
363 static const char vstr_bw40po[] = "bw40po=0x%x";
364 static const char vstr_bwduppo[] = "bwduppo=0x%x";
365 static const char vstr_mcspo[] = "mcs%dgpo%d=0x%x";
366 static const char vstr_mcspohl[] = "mcs%dg%cpo%d=0x%x";
367 static const char vstr_custom[] = "customvar%d=0x%x";
368 static const char vstr_cckdigfilttype[] = "cckdigfilttype=%d";
369 static const char vstr_boardnum[] = "boardnum=%d";
370 static const char vstr_macaddr[] = "macaddr=%s";
371 static const char vstr_usbepnum[] = "usbepnum=0x%x";
372 static const char vstr_end[] = "END\0";
376 /* For dongle HW, accept partial calibration parameters */
377 #define BCMDONGLECASE(n)
379 int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count)
384 u8 *cis, tup, tlen, sromrev = 1;
386 bool ag_init = false;
394 ASSERT(vars != NULL);
395 ASSERT(count != NULL);
399 base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
400 ASSERT(base != NULL);
404 varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
405 bzero(base, MAXSZ_NVRAM_VARS);
407 for (cisnum = 0; cisnum < ciscnt; cisnum++) {
415 if (tup == CISTPL_NULL || tup == CISTPL_END)
420 if (cis[i] == CISTPL_NULL
421 || cis[i] == CISTPL_END) {
426 tup = CISTPL_BRCM_HNBU;
430 if ((i + tlen) >= CIS_SIZE)
435 /* assume the strings are good if the version field checks out */
436 if (((cis[i + 1] << 8) + cis[i]) >= 0x0008) {
437 varbuf_append(&b, vstr_manf,
439 varbuf_append(&b, vstr_productname,
448 varbuf_append(&b, vstr_manfid,
449 (cis[i + 1] << 8) + cis[i]);
450 varbuf_append(&b, vstr_prodid,
451 (cis[i + 3] << 8) + cis[i + 2]);
460 case CISTPL_FID_SDIO:
464 static int base[] = {
465 -1, 10, 12, 13, 15, 20,
467 35, 40, 45, 50, 55, 60,
470 static int mult[] = {
471 10, 100, 1000, 10000,
474 ASSERT((mult[spd & 0x7] != -1)
477 [(spd >> 3) & 0x0f]));
487 } else if (cis[i] == 1) {
498 /* set macaddr if HNBU_MACADDR not seen yet */
501 && !(ETHER_ISNULLADDR(&cis[i + 2]))
502 && !(ETHER_ISMULTI(&cis[i + 2]))) {
505 snprintf(eabuf, sizeof(eabuf),
508 /* set boardnum if HNBU_BOARDNUM not seen yet */
519 varbuf_append(&b, vstr_regwindowsz,
520 (cis[i + 7] << 8) | cis[i + 6]);
523 case CISTPL_BRCM_HNBU:
526 sromrev = cis[i + 1];
527 varbuf_append(&b, vstr_sromrev,
532 varbuf_append(&b, vstr_xtalfreq,
540 varbuf_append(&b, vstr_vendid,
543 varbuf_append(&b, vstr_devid,
547 varbuf_append(&b, vstr_chiprev,
558 varbuf_append(&b, vstr_subdevid,
561 /* subdevid doubles for boardtype */
571 (cis[i + 2] << 8) + cis[i + 1];
579 /* retrieve the patch pairs
580 * from tlen/6; where 6 is
581 * sizeof(patch addr(2)) +
582 * sizeof(patch data(4)).
584 patch_pair = tlen / 6;
586 for (j = 0; j < patch_pair; j++) {
641 varbuf_append(&b, vstr_boardrev,
644 varbuf_append(&b, vstr_boardrev,
649 case HNBU_BOARDFLAGS:
650 w32 = (cis[i + 2] << 8) + cis[i + 1];
653 ((cis[i + 4] << 24) +
655 varbuf_append(&b, vstr_boardflags, w32);
659 (cis[i + 6] << 8) + cis[i +
674 varbuf_append(&b, vstr_usbfs,
679 varbuf_append(&b, vstr_boardtype,
686 * what follows is a nonstandard HNBU CIS
687 * that lacks CISTPL_BRCM_HNBU tags
689 * skip 0xff (end of standard CIS)
693 standard_cis = false;
697 varbuf_append(&b, vstr_usbepnum,
698 (cis[i + 2] << 8) | cis[i
704 varbuf_append(&b, vstr_aa2g,
707 varbuf_append(&b, vstr_aa5g,
712 varbuf_append(&b, vstr_ag, 0,
715 varbuf_append(&b, vstr_ag, 1,
718 varbuf_append(&b, vstr_ag, 2,
721 varbuf_append(&b, vstr_ag, 3,
727 varbuf_append(&b, vstr_aa5g,
729 varbuf_append(&b, vstr_ag, 1,
734 ASSERT(sromrev == 1);
735 varbuf_append(&b, vstr_cc, cis[i + 1]);
741 ASSERT(sromrev == 1);
747 ASSERT(sromrev >= 2);
748 varbuf_append(&b, vstr_opo,
762 for (j = 0; j < 3; j++) {
787 ASSERT((sromrev == 2)
807 for (j = 0; j < 3; j++) {
822 for (j = 3; j < 6; j++) {
837 for (j = 6; j < 9; j++) {
854 ASSERT((tlen == 19) ||
862 ASSERT(sromrev == 1);
863 varbuf_append(&b, vstr_oem,
864 cis[i + 1], cis[i + 2],
865 cis[i + 3], cis[i + 4],
866 cis[i + 5], cis[i + 6],
867 cis[i + 7], cis[i + 8]);
871 for (j = 1; j <= 4; j++) {
872 if (cis[i + j] != 0xff) {
884 if ((cis[i + 1] == 0)
885 || (cis[i + 2] == 0))
886 varbuf_append(&b, vstr_noccode);
888 varbuf_append(&b, vstr_ccode,
891 varbuf_append(&b, vstr_cctl,
897 varbuf_append(&b, vstr_cckpo,
898 (cis[i + 2] << 8) | cis[i
905 varbuf_append(&b, vstr_ofdmpo,
913 varbuf_append(&b, vstr_wpsgpio,
916 varbuf_append(&b, vstr_wpsled,
920 case HNBU_RSSISMBXA2G:
921 ASSERT(sromrev == 3);
922 varbuf_append(&b, vstr_rssismf2g,
924 varbuf_append(&b, vstr_rssismc2g,
925 (cis[i + 1] >> 4) & 0xf);
926 varbuf_append(&b, vstr_rssisav2g,
928 varbuf_append(&b, vstr_bxa2g,
929 (cis[i + 2] >> 3) & 0x3);
932 case HNBU_RSSISMBXA5G:
933 ASSERT(sromrev == 3);
934 varbuf_append(&b, vstr_rssismf5g,
936 varbuf_append(&b, vstr_rssismc5g,
937 (cis[i + 1] >> 4) & 0xf);
938 varbuf_append(&b, vstr_rssisav5g,
940 varbuf_append(&b, vstr_bxa5g,
941 (cis[i + 2] >> 3) & 0x3);
945 ASSERT(sromrev == 3);
946 varbuf_append(&b, vstr_tri2g,
951 ASSERT(sromrev == 3);
952 varbuf_append(&b, vstr_tri5gl,
954 varbuf_append(&b, vstr_tri5g,
956 varbuf_append(&b, vstr_tri5gh,
961 ASSERT(sromrev == 3);
962 varbuf_append(&b, vstr_rxpo2g,
967 ASSERT(sromrev == 3);
968 varbuf_append(&b, vstr_rxpo5g,
973 if (!(ETHER_ISNULLADDR(&cis[i + 1])) &&
974 !(ETHER_ISMULTI(&cis[i + 1]))) {
975 snprintf(eabuf, sizeof(eabuf),
978 /* set boardnum if HNBU_BOARDNUM not seen yet */
987 /* CIS leddc only has 16bits, convert it to 32bits */
988 w32 = ((cis[i + 2] << 24) | /* oncount */
989 (cis[i + 1] << 8)); /* offcount */
990 varbuf_append(&b, vstr_leddc, w32);
993 case HNBU_CHAINSWITCH:
994 varbuf_append(&b, vstr_txchain,
996 varbuf_append(&b, vstr_rxchain,
998 varbuf_append(&b, vstr_antswitch,
1004 varbuf_append(&b, vstr_regrev,
1010 (cis[i + 2] << 8) + cis[i +
1015 SROM8_FEM_ANTSWLUT_MASK)
1017 SROM8_FEM_ANTSWLUT_SHIFT);
1018 varbuf_append(&b, vstr_triso2g,
1020 SROM8_FEM_TR_ISO_MASK)
1022 SROM8_FEM_TR_ISO_SHIFT);
1026 SROM8_FEM_PDET_RANGE_MASK)
1028 SROM8_FEM_PDET_RANGE_SHIFT);
1032 SROM8_FEM_EXTPA_GAIN_MASK)
1034 SROM8_FEM_EXTPA_GAIN_SHIFT);
1038 SROM8_FEM_TSSIPOS_MASK)
1040 SROM8_FEM_TSSIPOS_SHIFT);
1045 (cis[i + 4] << 8) + cis[i +
1050 SROM8_FEM_ANTSWLUT_MASK)
1052 SROM8_FEM_ANTSWLUT_SHIFT);
1053 varbuf_append(&b, vstr_triso5g,
1055 SROM8_FEM_TR_ISO_MASK)
1057 SROM8_FEM_TR_ISO_SHIFT);
1061 SROM8_FEM_PDET_RANGE_MASK)
1063 SROM8_FEM_PDET_RANGE_SHIFT);
1067 SROM8_FEM_EXTPA_GAIN_MASK)
1069 SROM8_FEM_EXTPA_GAIN_SHIFT);
1073 SROM8_FEM_TSSIPOS_MASK)
1075 SROM8_FEM_TSSIPOS_SHIFT);
1079 case HNBU_PAPARMS_C0:
1080 varbuf_append(&b, vstr_maxp2ga0,
1082 varbuf_append(&b, vstr_itt2ga0,
1084 varbuf_append(&b, vstr_pa, 2, 0, 0,
1087 varbuf_append(&b, vstr_pa, 2, 1, 0,
1090 varbuf_append(&b, vstr_pa, 2, 2, 0,
1096 varbuf_append(&b, vstr_maxp5ga0,
1098 varbuf_append(&b, vstr_itt5ga0,
1100 varbuf_append(&b, vstr_maxp5gha0,
1102 varbuf_append(&b, vstr_maxp5gla0,
1104 varbuf_append(&b, vstr_pa, 5, 0, 0,
1105 (cis[i + 14] << 8) +
1107 varbuf_append(&b, vstr_pa, 5, 1, 0,
1108 (cis[i + 16] << 8) +
1110 varbuf_append(&b, vstr_pa, 5, 2, 0,
1111 (cis[i + 18] << 8) +
1113 varbuf_append(&b, vstr_pahl, 5, 'l', 0,
1115 (cis[i + 20] << 8) +
1117 varbuf_append(&b, vstr_pahl, 5, 'l', 1,
1119 (cis[i + 22] << 8) +
1121 varbuf_append(&b, vstr_pahl, 5, 'l', 2,
1123 (cis[i + 24] << 8) +
1125 varbuf_append(&b, vstr_pahl, 5, 'h', 0,
1127 (cis[i + 26] << 8) +
1129 varbuf_append(&b, vstr_pahl, 5, 'h', 1,
1131 (cis[i + 28] << 8) +
1133 varbuf_append(&b, vstr_pahl, 5, 'h', 2,
1135 (cis[i + 30] << 8) +
1139 case HNBU_PAPARMS_C1:
1140 varbuf_append(&b, vstr_maxp2ga1,
1142 varbuf_append(&b, vstr_itt2ga1,
1144 varbuf_append(&b, vstr_pa, 2, 0, 1,
1147 varbuf_append(&b, vstr_pa, 2, 1, 1,
1150 varbuf_append(&b, vstr_pa, 2, 2, 1,
1156 varbuf_append(&b, vstr_maxp5ga1,
1158 varbuf_append(&b, vstr_itt5ga1,
1160 varbuf_append(&b, vstr_maxp5gha1,
1162 varbuf_append(&b, vstr_maxp5gla1,
1164 varbuf_append(&b, vstr_pa, 5, 0, 1,
1165 (cis[i + 14] << 8) +
1167 varbuf_append(&b, vstr_pa, 5, 1, 1,
1168 (cis[i + 16] << 8) +
1170 varbuf_append(&b, vstr_pa, 5, 2, 1,
1171 (cis[i + 18] << 8) +
1173 varbuf_append(&b, vstr_pahl, 5, 'l', 0,
1175 (cis[i + 20] << 8) +
1177 varbuf_append(&b, vstr_pahl, 5, 'l', 1,
1179 (cis[i + 22] << 8) +
1181 varbuf_append(&b, vstr_pahl, 5, 'l', 2,
1183 (cis[i + 24] << 8) +
1185 varbuf_append(&b, vstr_pahl, 5, 'h', 0,
1187 (cis[i + 26] << 8) +
1189 varbuf_append(&b, vstr_pahl, 5, 'h', 1,
1191 (cis[i + 28] << 8) +
1193 varbuf_append(&b, vstr_pahl, 5, 'h', 2,
1195 (cis[i + 30] << 8) +
1199 case HNBU_PO_CCKOFDM:
1200 varbuf_append(&b, vstr_cck2gpo,
1203 varbuf_append(&b, vstr_ofdm2gpo,
1204 (cis[i + 6] << 24) +
1205 (cis[i + 5] << 16) +
1211 varbuf_append(&b, vstr_ofdm5gpo,
1212 (cis[i + 10] << 24) +
1213 (cis[i + 9] << 16) +
1216 varbuf_append(&b, vstr_ofdm5glpo,
1217 (cis[i + 14] << 24) +
1218 (cis[i + 13] << 16) +
1219 (cis[i + 12] << 8) +
1221 varbuf_append(&b, vstr_ofdm5ghpo,
1222 (cis[i + 18] << 24) +
1223 (cis[i + 17] << 16) +
1224 (cis[i + 16] << 8) +
1229 for (j = 0; j <= (tlen / 2); j++) {
1230 varbuf_append(&b, vstr_mcspo, 2,
1240 case HNBU_PO_MCS5GM:
1241 for (j = 0; j <= (tlen / 2); j++) {
1242 varbuf_append(&b, vstr_mcspo, 5,
1252 case HNBU_PO_MCS5GLH:
1253 for (j = 0; j <= (tlen / 4); j++) {
1254 varbuf_append(&b, vstr_mcspohl,
1263 for (j = 0; j <= (tlen / 4); j++) {
1264 varbuf_append(&b, vstr_mcspohl,
1279 varbuf_append(&b, vstr_cddpo,
1285 varbuf_append(&b, vstr_stbcpo,
1291 varbuf_append(&b, vstr_bw40po,
1296 case HNBU_PO_40MDUP:
1297 varbuf_append(&b, vstr_bwduppo,
1303 varbuf_append(&b, vstr_ofdm5gpo,
1304 (cis[i + 4] << 24) +
1305 (cis[i + 3] << 16) +
1308 varbuf_append(&b, vstr_ofdm5glpo,
1309 (cis[i + 8] << 24) +
1310 (cis[i + 7] << 16) +
1313 varbuf_append(&b, vstr_ofdm5ghpo,
1314 (cis[i + 12] << 24) +
1315 (cis[i + 11] << 16) +
1316 (cis[i + 10] << 8) +
1321 varbuf_append(&b, vstr_custom, 1,
1322 ((cis[i + 4] << 24) +
1323 (cis[i + 3] << 16) +
1328 #if defined(BCMSDIO)
1329 case HNBU_SROM3SWRGN:
1332 u8 srev = cis[i + 1 + 70];
1334 /* make tuple value 16-bit aligned and parse it */
1335 bcopy(&cis[i + 1], srom,
1337 _initvars_srom_pci(srev, srom,
1340 /* 2.4G antenna gain is included in SROM */
1342 /* Ethernet MAC address is included in SROM */
1346 /* create extra variables */
1348 varbuf_append(&b, vstr_vendid,
1354 varbuf_append(&b, vstr_devid,
1360 varbuf_append(&b, vstr_xtalfreq,
1366 #endif /* defined(BCMSDIO) */
1368 case HNBU_CCKFILTTYPE:
1369 varbuf_append(&b, vstr_cckdigfilttype,
1377 } while (tup != CISTPL_END);
1380 if (boardnum != -1) {
1381 varbuf_append(&b, vstr_boardnum, boardnum);
1385 varbuf_append(&b, vstr_macaddr, eabuf);
1388 /* if there is no antenna gain field, set default */
1389 if (getvar(NULL, "ag0") == NULL && ag_init == false) {
1390 varbuf_append(&b, vstr_ag, 0, 0xff);
1393 /* final nullbyte terminator */
1394 ASSERT(b.size >= 1);
1397 ASSERT(b.buf - base <= MAXSZ_NVRAM_VARS);
1398 err = initvars_table(osh, base, b.buf, vars, count);
1404 /* In chips with chipcommon rev 32 and later, the srom is in chipcommon,
1405 * not in the bus cores.
1408 srom_cc_cmd(si_t *sih, osl_t *osh, void *ccregs, u32 cmd, uint wordoff,
1411 chipcregs_t *cc = (chipcregs_t *) ccregs;
1412 uint wait_cnt = 1000;
1414 if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) {
1415 W_REG(osh, &cc->sromaddress, wordoff * 2);
1416 if (cmd == SRC_OP_WRITE)
1417 W_REG(osh, &cc->sromdata, data);
1420 W_REG(osh, &cc->sromcontrol, SRC_START | cmd);
1422 while (wait_cnt--) {
1423 if ((R_REG(osh, &cc->sromcontrol) & SRC_BUSY) == 0)
1428 BS_ERROR(("%s: Command 0x%x timed out\n", __func__, cmd));
1431 if (cmd == SRC_OP_READ)
1432 return (u16) R_REG(osh, &cc->sromdata);
1438 * Read in and validate sprom.
1439 * Return 0 on success, nonzero on error.
1442 sprom_read_pci(osl_t *osh, si_t *sih, u16 *sprom, uint wordoff,
1443 u16 *buf, uint nwords, bool check_crc)
1447 void *ccregs = NULL;
1449 /* read the sprom */
1450 for (i = 0; i < nwords; i++) {
1452 if (sih->ccrev > 31 && ISSIM_ENAB(sih)) {
1453 /* use indirect since direct is too slow on QT */
1454 if ((sih->cccaps & CC_CAP_SROM) == 0)
1457 ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
1459 srom_cc_cmd(sih, osh, ccregs, SRC_OP_READ,
1463 if (ISSIM_ENAB(sih))
1464 buf[i] = R_REG(osh, &sprom[wordoff + i]);
1466 buf[i] = R_REG(osh, &sprom[wordoff + i]);
1471 /* bypass crc checking for simulation to allow srom hack */
1472 if (ISSIM_ENAB(sih))
1477 if (buf[0] == 0xffff) {
1478 /* The hardware thinks that an srom that starts with 0xffff
1479 * is blank, regardless of the rest of the content, so declare
1482 BS_ERROR(("%s: buf[0] = 0x%x, returning bad-crc\n",
1487 /* fixup the endianness so crc8 will pass */
1488 htol16_buf(buf, nwords * 2);
1489 if (hndcrc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) !=
1491 /* DBG only pci always read srom4 first, then srom8/9 */
1492 /* BS_ERROR(("%s: bad crc\n", __func__)); */
1495 /* now correct the endianness of the byte array */
1496 ltoh16_buf(buf, nwords * 2);
1501 #if defined(BCMNVRAMR)
1502 static int otp_read_pci(osl_t *osh, si_t *sih, u16 *buf, uint bufsz)
1505 uint sz = OTP_SZ_MAX / 2; /* size in words */
1508 ASSERT(bufsz <= OTP_SZ_MAX);
1510 otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC);
1515 err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz);
1517 bcopy(otp, buf, bufsz);
1523 if (buf[0] == 0xffff) {
1524 /* The hardware thinks that an srom that starts with 0xffff
1525 * is blank, regardless of the rest of the content, so declare
1528 BS_ERROR(("%s: buf[0] = 0x%x, returning bad-crc\n", __func__,
1533 /* fixup the endianness so crc8 will pass */
1534 htol16_buf(buf, bufsz);
1535 if (hndcrc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) !=
1537 BS_ERROR(("%s: bad crc\n", __func__));
1540 /* now correct the endianness of the byte array */
1541 ltoh16_buf(buf, bufsz);
1545 #endif /* defined(BCMNVRAMR) */
1547 * Create variable table from memory.
1548 * Return 0 on success, nonzero on error.
1550 static int initvars_table(osl_t *osh, char *start, char *end, char **vars,
1553 int c = (int)(end - start);
1555 /* do it only when there is more than just the null string */
1557 char *vp = kmalloc(c, GFP_ATOMIC);
1561 bcopy(start, vp, c);
1573 * Find variables with <devpath> from flash. 'base' points to the beginning
1574 * of the table upon enter and to the end of the table upon exit when success.
1575 * Return 0 on success, nonzero on error.
1577 static int initvars_flash(si_t *sih, osl_t *osh, char **base, uint len)
1583 uint l, dl, copy_len;
1584 char devpath[SI_DEVPATH_BUFSZ];
1586 /* allocate memory and read in flash */
1587 flash = kmalloc(NVRAM_SPACE, GFP_ATOMIC);
1590 err = nvram_getall(flash, NVRAM_SPACE);
1594 si_devpath(sih, devpath, sizeof(devpath));
1596 /* grab vars with the <devpath> prefix in name */
1597 dl = strlen(devpath);
1598 for (s = flash; s && *s; s += l + 1) {
1601 /* skip non-matching variable */
1602 if (strncmp(s, devpath, dl))
1605 /* is there enough room to copy? */
1606 copy_len = l - dl + 1;
1607 if (len < copy_len) {
1608 err = BCME_BUFTOOSHORT;
1612 /* no prefix, just the name=value */
1613 strncpy(vp, &s[dl], copy_len);
1618 /* add null string as terminator */
1620 err = BCME_BUFTOOSHORT;
1632 * Initialize nonvolatile variable table from flash.
1633 * Return 0 on success, nonzero on error.
1635 static int initvars_flash_si(si_t *sih, char **vars, uint *count)
1637 osl_t *osh = si_osh(sih);
1641 ASSERT(vars != NULL);
1642 ASSERT(count != NULL);
1644 base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
1649 err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS);
1651 err = initvars_table(osh, base, vp, vars, count);
1658 /* Parse SROM and create name=value pairs. 'srom' points to
1659 * the SROM word array. 'off' specifies the offset of the
1660 * first word 'srom' points to, which should be either 0 or
1661 * SROM3_SWRG_OFF (full SROM or software region).
1664 static uint mask_shift(u16 mask)
1667 for (i = 0; i < (sizeof(mask) << 3); i++) {
1668 if (mask & (1 << i))
1675 static uint mask_width(u16 mask)
1678 for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) {
1679 if (mask & (1 << i))
1680 return (uint) (i - mask_shift(mask) + 1);
1687 static bool mask_valid(u16 mask)
1689 uint shift = mask_shift(mask);
1690 uint width = mask_width(mask);
1691 return mask == ((~0 << shift) & ~(~0 << (shift + width)));
1695 static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b)
1699 const sromvar_t *srv;
1702 u32 sr = (1 << sromrev);
1704 varbuf_append(b, "sromrev=%d", sromrev);
1706 for (srv = pci_sromvars; srv->name != NULL; srv++) {
1709 if ((srv->revmask & sr) == 0)
1718 /* This entry is for mfgc only. Don't generate param for it, */
1719 if (flags & SRFL_NOVAR)
1722 if (flags & SRFL_ETHADDR) {
1723 struct ether_addr ea;
1725 ea.octet[0] = (srom[srv->off - off] >> 8) & 0xff;
1726 ea.octet[1] = srom[srv->off - off] & 0xff;
1727 ea.octet[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
1728 ea.octet[3] = srom[srv->off + 1 - off] & 0xff;
1729 ea.octet[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
1730 ea.octet[5] = srom[srv->off + 2 - off] & 0xff;
1732 varbuf_append(b, "%s=%pM", name, ea.octet);
1734 ASSERT(mask_valid(srv->mask));
1735 ASSERT(mask_width(srv->mask));
1737 w = srom[srv->off - off];
1738 val = (w & srv->mask) >> mask_shift(srv->mask);
1739 width = mask_width(srv->mask);
1741 while (srv->flags & SRFL_MORE) {
1743 ASSERT(srv->name != NULL);
1745 if (srv->off == 0 || srv->off < off)
1748 ASSERT(mask_valid(srv->mask));
1749 ASSERT(mask_width(srv->mask));
1751 w = srom[srv->off - off];
1753 ((w & srv->mask) >> mask_shift(srv->
1756 width += mask_width(srv->mask);
1759 if ((flags & SRFL_NOFFS)
1760 && ((int)val == (1 << width) - 1))
1763 if (flags & SRFL_CCODE) {
1765 varbuf_append(b, "ccode=");
1767 varbuf_append(b, "ccode=%c%c",
1768 (val >> 8), (val & 0xff));
1770 /* LED Powersave duty cycle has to be scaled:
1771 *(oncount >> 24) (offcount >> 8)
1773 else if (flags & SRFL_LEDDC) {
1774 u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */
1775 (((val & 0xff)) << 8); /* offcount */
1776 varbuf_append(b, "leddc=%d", w32);
1777 } else if (flags & SRFL_PRHEX)
1778 varbuf_append(b, "%s=0x%x", name, val);
1779 else if ((flags & SRFL_PRSIGN)
1780 && (val & (1 << (width - 1))))
1781 varbuf_append(b, "%s=%d", name,
1782 (int)(val | (~0 << width)));
1784 varbuf_append(b, "%s=%u", name, val);
1789 /* Do per-path variables */
1794 psz = SROM8_PATH1 - SROM8_PATH0;
1797 psz = SROM4_PATH1 - SROM4_PATH0;
1800 for (p = 0; p < MAX_PATH_SROM; p++) {
1801 for (srv = perpath_pci_sromvars; srv->name != NULL;
1803 if ((srv->revmask & sr) == 0)
1806 if (pb + srv->off < off)
1809 /* This entry is for mfgc only. Don't generate param for it, */
1810 if (srv->flags & SRFL_NOVAR)
1813 w = srom[pb + srv->off - off];
1815 ASSERT(mask_valid(srv->mask));
1816 val = (w & srv->mask) >> mask_shift(srv->mask);
1817 width = mask_width(srv->mask);
1819 /* Cheating: no per-path var is more than 1 word */
1821 if ((srv->flags & SRFL_NOFFS)
1822 && ((int)val == (1 << width) - 1))
1825 if (srv->flags & SRFL_PRHEX)
1826 varbuf_append(b, "%s%d=0x%x", srv->name,
1829 varbuf_append(b, "%s%d=%d", srv->name,
1838 * Initialize nonvolatile variable table from sprom.
1839 * Return 0 on success, nonzero on error.
1841 static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
1843 u16 *srom, *sromwindow;
1847 char *vp, *base = NULL;
1848 osl_t *osh = si_osh(sih);
1853 * Apply CRC over SROM content regardless SROM is present or not,
1854 * and use variable <devpath>sromrev's existance in flash to decide
1855 * if we should return an error when CRC fails or read SROM variables
1858 srom = kmalloc(SROM_MAX, GFP_ATOMIC);
1859 ASSERT(srom != NULL);
1863 sromwindow = (u16 *) SROM_OFFSET(sih);
1864 if (si_is_sprom_available(sih)) {
1866 sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS,
1869 if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
1870 (((sih->buscoretype == PCIE_CORE_ID)
1871 && (sih->buscorerev >= 6))
1872 || ((sih->buscoretype == PCI_CORE_ID)
1873 && (sih->buscorerev >= 0xe)))) {
1874 /* sromrev >= 4, read more */
1876 sprom_read_pci(osh, sih, sromwindow, 0, srom,
1878 sromrev = srom[SROM4_CRCREV] & 0xff;
1880 BS_ERROR(("%s: srom %d, bad crc\n", __func__,
1883 } else if (err == 0) {
1884 /* srom is good and is rev < 4 */
1885 /* top word of sprom contains version and crc8 */
1886 sromrev = srom[SROM_CRCREV] & 0xff;
1887 /* bcm4401 sroms misprogrammed */
1888 if (sromrev == 0x10)
1892 #if defined(BCMNVRAMR)
1893 /* Use OTP if SPROM not available */
1894 else if ((err = otp_read_pci(osh, sih, srom, SROM_MAX)) == 0) {
1895 /* OTP only contain SROM rev8/rev9 for now */
1896 sromrev = srom[SROM4_CRCREV] & 0xff;
1901 BS_ERROR(("Neither SPROM nor OTP has valid image\n"));
1904 /* We want internal/wltest driver to come up with default sromvars so we can
1905 * program a blank SPROM/OTP.
1912 value = si_getdevpathvar(sih, "sromrev");
1914 sromrev = (u8) simple_strtoul(value, NULL, 0);
1919 BS_ERROR(("%s, SROM CRC Error\n", __func__));
1921 value = si_getnvramflvar(sih, "sromrev");
1934 /* Bitmask for the sromrev */
1937 /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */
1938 if ((sr & 0x33e) == 0) {
1943 ASSERT(vars != NULL);
1944 ASSERT(count != NULL);
1946 base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
1953 /* read variables from flash */
1955 err = initvars_flash(sih, osh, &vp, MAXSZ_NVRAM_VARS);
1961 varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
1963 /* parse SROM into name=value pairs. */
1964 _initvars_srom_pci(sromrev, srom, 0, &b);
1966 /* final nullbyte terminator */
1967 ASSERT(b.size >= 1);
1971 ASSERT((vp - base) <= MAXSZ_NVRAM_VARS);
1974 err = initvars_table(osh, base, vp, vars, count);
1986 * Read the SDIO cis and call parsecis to initialize the vars.
1987 * Return 0 on success, nonzero on error.
1989 static int initvars_cis_sdio(osl_t *osh, char **vars, uint *count)
1991 u8 *cis[SBSDIO_NUM_FUNCTION + 1];
1995 numfn = bcmsdh_query_iofnum(NULL);
1996 ASSERT(numfn <= SDIOD_MAX_IOFUNCS);
1998 for (fn = 0; fn <= numfn; fn++) {
1999 cis[fn] = kzalloc(SBSDIO_CIS_SIZE_LIMIT, GFP_ATOMIC);
2000 if (cis[fn] == NULL) {
2005 if (bcmsdh_cis_read(NULL, fn, cis[fn], SBSDIO_CIS_SIZE_LIMIT) !=
2014 rc = srom_parsecis(osh, cis, fn, vars, count);
2022 /* set SDIO sprom command register */
2023 static int sprom_cmd_sdio(osl_t *osh, u8 cmd)
2026 uint wait_cnt = 1000;
2028 /* write sprom command register */
2029 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_CS, cmd, NULL);
2032 while (wait_cnt--) {
2034 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_CS, NULL);
2035 if (status & SBSDIO_SPROM_DONE)
2042 /* read a word from the SDIO srom */
2043 static int sprom_read_sdio(osl_t *osh, u16 addr, u16 *data)
2045 u8 addr_l, addr_h, data_l, data_h;
2047 addr_l = (u8) ((addr * 2) & 0xff);
2048 addr_h = (u8) (((addr * 2) >> 8) & 0xff);
2051 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_ADDR_HIGH, addr_h,
2053 bcmsdh_cfg_write(NULL, SDIO_FUNC_1, SBSDIO_SPROM_ADDR_LOW, addr_l,
2057 if (sprom_cmd_sdio(osh, SBSDIO_SPROM_READ))
2062 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_DATA_HIGH, NULL);
2064 bcmsdh_cfg_read(NULL, SDIO_FUNC_1, SBSDIO_SPROM_DATA_LOW, NULL);
2066 *data = (data_h << 8) | data_l;
2069 #endif /* BCMSDIO */
2071 static int initvars_srom_si(si_t *sih, osl_t *osh, void *curmap, char **vars,
2074 /* Search flash nvram section for srom variables */
2075 return initvars_flash_si(sih, vars, varsz);