2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef _wlc_phy_int_h_
18 #define _wlc_phy_int_h_
20 #include <linux/kernel.h>
24 #include <bcmsrom_fmt.h>
25 #include <wlc_phy_hal.h>
27 #define PHYHAL_ERROR 0x0001
28 #define PHYHAL_TRACE 0x0002
29 #define PHYHAL_INFORM 0x0004
31 extern u32 phyhal_msg_level;
33 #define PHY_INFORM_ON() (phyhal_msg_level & PHYHAL_INFORM)
34 #define PHY_THERMAL_ON() (phyhal_msg_level & PHYHAL_THERMAL)
35 #define PHY_CAL_ON() (phyhal_msg_level & PHYHAL_CAL)
38 #define BOARDTYPE(_type) BOARD_TYPE
40 #define BOARDTYPE(_type) _type
43 #define LCNXN_BASEREV 16
46 typedef struct phy_info phy_info_t;
47 typedef void (*initfn_t) (phy_info_t *);
48 typedef void (*chansetfn_t) (phy_info_t *, chanspec_t);
49 typedef int (*longtrnfn_t) (phy_info_t *, int);
50 typedef void (*txiqccgetfn_t) (phy_info_t *, u16 *, u16 *);
51 typedef void (*txiqccsetfn_t) (phy_info_t *, u16, u16);
52 typedef u16(*txloccgetfn_t) (phy_info_t *);
53 typedef void (*radioloftgetfn_t) (phy_info_t *, u8 *, u8 *, u8 *,
55 typedef s32(*rxsigpwrfn_t) (phy_info_t *, s32);
56 typedef void (*detachfn_t) (phy_info_t *);
60 #define ISNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_N)
61 #define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN)
63 #define ISPHY_11N_CAP(pi) (ISNPHY(pi) || ISLCNPHY(pi))
65 #define IS20MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_20)
66 #define IS40MHZ(pi) ((pi)->bw == WL_CHANSPEC_BW_40)
68 #define PHY_GET_RFATTN(rfgain) ((rfgain) & 0x0f)
69 #define PHY_GET_PADMIX(rfgain) (((rfgain) & 0x10) >> 4)
70 #define PHY_GET_RFGAINID(rfattn, padmix, width) ((rfattn) + ((padmix)*(width)))
71 #define PHY_SAT(x, n) ((x) > ((1<<((n)-1))-1) ? ((1<<((n)-1))-1) : \
72 ((x) < -(1<<((n)-1)) ? -(1<<((n)-1)) : (x)))
73 #define PHY_SHIFT_ROUND(x, n) ((x) >= 0 ? ((x)+(1<<((n)-1)))>>(n) : (x)>>(n))
74 #define PHY_HW_ROUND(x, s) ((x >> s) + ((x >> (s-1)) & (s != 0)))
79 #define A_HIGH_CHANS 2
83 #define FIRST_REF5_CHANNUM 149
84 #define LAST_REF5_CHANNUM 165
85 #define FIRST_5G_CHAN 14
86 #define LAST_5G_CHAN 50
87 #define FIRST_MID_5G_CHAN 14
88 #define LAST_MID_5G_CHAN 35
89 #define FIRST_HIGH_5G_CHAN 36
90 #define LAST_HIGH_5G_CHAN 41
91 #define FIRST_LOW_5G_CHAN 42
92 #define LAST_LOW_5G_CHAN 50
94 #define BASE_LOW_5G_CHAN 4900
95 #define BASE_MID_5G_CHAN 5100
96 #define BASE_HIGH_5G_CHAN 5500
98 #define CHAN5G_FREQ(chan) (5000 + chan*5)
99 #define CHAN2G_FREQ(chan) (2407 + chan*5)
101 #define TXP_FIRST_CCK 0
102 #define TXP_LAST_CCK 3
103 #define TXP_FIRST_OFDM 4
104 #define TXP_LAST_OFDM 11
105 #define TXP_FIRST_OFDM_20_CDD 12
106 #define TXP_LAST_OFDM_20_CDD 19
107 #define TXP_FIRST_MCS_20_SISO 20
108 #define TXP_LAST_MCS_20_SISO 27
109 #define TXP_FIRST_MCS_20_CDD 28
110 #define TXP_LAST_MCS_20_CDD 35
111 #define TXP_FIRST_MCS_20_STBC 36
112 #define TXP_LAST_MCS_20_STBC 43
113 #define TXP_FIRST_MCS_20_SDM 44
114 #define TXP_LAST_MCS_20_SDM 51
115 #define TXP_FIRST_OFDM_40_SISO 52
116 #define TXP_LAST_OFDM_40_SISO 59
117 #define TXP_FIRST_OFDM_40_CDD 60
118 #define TXP_LAST_OFDM_40_CDD 67
119 #define TXP_FIRST_MCS_40_SISO 68
120 #define TXP_LAST_MCS_40_SISO 75
121 #define TXP_FIRST_MCS_40_CDD 76
122 #define TXP_LAST_MCS_40_CDD 83
123 #define TXP_FIRST_MCS_40_STBC 84
124 #define TXP_LAST_MCS_40_STBC 91
125 #define TXP_FIRST_MCS_40_SDM 92
126 #define TXP_LAST_MCS_40_SDM 99
127 #define TXP_MCS_32 100
128 #define TXP_NUM_RATES 101
129 #define ADJ_PWR_TBL_LEN 84
131 #define TXP_FIRST_SISO_MCS_20 20
132 #define TXP_LAST_SISO_MCS_20 27
134 #define PHY_CORE_NUM_1 1
135 #define PHY_CORE_NUM_2 2
136 #define PHY_CORE_NUM_3 3
137 #define PHY_CORE_NUM_4 4
138 #define PHY_CORE_MAX PHY_CORE_NUM_4
144 #define MA_WINDOW_SZ 8
146 #define PHY_NOISE_SAMPLE_MON 1
147 #define PHY_NOISE_SAMPLE_EXTERNAL 2
148 #define PHY_NOISE_WINDOW_SZ 16
149 #define PHY_NOISE_GLITCH_INIT_MA 10
150 #define PHY_NOISE_GLITCH_INIT_MA_BADPlCP 10
151 #define PHY_NOISE_STATE_MON 0x1
152 #define PHY_NOISE_STATE_EXTERNAL 0x2
153 #define PHY_NOISE_SAMPLE_LOG_NUM_NPHY 10
154 #define PHY_NOISE_SAMPLE_LOG_NUM_UCODE 9
156 #define PHY_NOISE_OFFSETFACT_4322 (-103)
157 #define PHY_NOISE_MA_WINDOW_SZ 2
159 #define PHY_RSSI_TABLE_SIZE 64
160 #define RSSI_ANT_MERGE_MAX 0
161 #define RSSI_ANT_MERGE_MIN 1
162 #define RSSI_ANT_MERGE_AVG 2
164 #define PHY_TSSI_TABLE_SIZE 64
165 #define APHY_TSSI_TABLE_SIZE 256
166 #define TX_GAIN_TABLE_LENGTH 64
167 #define DEFAULT_11A_TXP_IDX 24
168 #define NUM_TSSI_FRAMES 4
169 #define NULL_TSSI 0x7f
170 #define NULL_TSSI_W 0x7f7f
172 #define PHY_PAPD_EPS_TBL_SIZE_LCNPHY 64
174 #define LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL 9
176 #define PHY_TXPWR_MIN 10
177 #define PHY_TXPWR_MIN_NPHY 8
178 #define RADIOPWR_OVERRIDE_DEF (-1)
180 #define PWRTBL_NUM_COEFF 3
182 #define SPURAVOID_DISABLE 0
183 #define SPURAVOID_AUTO 1
184 #define SPURAVOID_FORCEON 2
185 #define SPURAVOID_FORCEON2 3
187 #define PHY_SW_TIMER_FAST 15
188 #define PHY_SW_TIMER_SLOW 60
189 #define PHY_SW_TIMER_GLACIAL 120
191 #define PHY_PERICAL_AUTO 0
192 #define PHY_PERICAL_FULL 1
193 #define PHY_PERICAL_PARTIAL 2
195 #define PHY_PERICAL_NODELAY 0
196 #define PHY_PERICAL_INIT_DELAY 5
197 #define PHY_PERICAL_ASSOC_DELAY 5
198 #define PHY_PERICAL_WDOG_DELAY 5
200 #define MPHASE_TXCAL_NUMCMDS 2
201 #define PHY_PERICAL_MPHASE_PENDING(pi) (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE)
204 MPHASE_CAL_STATE_IDLE = 0,
205 MPHASE_CAL_STATE_INIT = 1,
206 MPHASE_CAL_STATE_TXPHASE0,
207 MPHASE_CAL_STATE_TXPHASE1,
208 MPHASE_CAL_STATE_TXPHASE2,
209 MPHASE_CAL_STATE_TXPHASE3,
210 MPHASE_CAL_STATE_TXPHASE4,
211 MPHASE_CAL_STATE_TXPHASE5,
212 MPHASE_CAL_STATE_PAPDCAL,
213 MPHASE_CAL_STATE_RXCAL,
214 MPHASE_CAL_STATE_RSSICAL,
215 MPHASE_CAL_STATE_IDLETSSI
229 #define RDR_TIER_SIZE 64
230 #define RDR_LIST_SIZE (512/3)
231 #define RDR_EPOCH_SIZE 40
232 #define RDR_NANTENNAS 2
233 #define RDR_NTIER_SIZE RDR_LIST_SIZE
234 #define RDR_LP_BUFFER_SIZE 64
235 #define LP_LEN_HIS_SIZE 10
237 #define STATIC_NUM_RF 32
238 #define STATIC_NUM_BB 9
240 #define BB_MULT_MASK 0x0000ffff
241 #define BB_MULT_VALID_MASK 0x80000000
243 #define CORDIC_AG 39797
245 #define FIXED(X) ((s32)((X) << 16))
246 #define FLOAT(X) (((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1))
248 #define PHY_CHAIN_TX_DISABLE_TEMP 115
249 #define PHY_HYSTERESIS_DELTATEMP 5
251 #define PHY_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8))
253 #define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \
254 mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \
255 (value) << phy_type##_##reg_name##_##field##_##SHIFT);
256 #define READ_PHY_REG(pi, phy_type, reg_name, field) \
257 ((read_phy_reg(pi, phy_type##_##reg_name) & phy_type##_##reg_name##_##field##_##MASK)\
258 >> phy_type##_##reg_name##_##field##_##SHIFT)
260 #define VALID_PHYTYPE(phytype) (((uint)phytype == PHY_TYPE_N) || \
261 ((uint)phytype == PHY_TYPE_LCN))
263 #define VALID_N_RADIO(radioid) ((radioid == BCM2055_ID) || (radioid == BCM2056_ID) || \
264 (radioid == BCM2057_ID))
265 #define VALID_LCN_RADIO(radioid) (radioid == BCM2064_ID)
267 #define VALID_RADIO(pi, radioid) (\
268 (ISNPHY(pi) ? VALID_N_RADIO(radioid) : false) || \
269 (ISLCNPHY(pi) ? VALID_LCN_RADIO(radioid) : false))
271 #define SCAN_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN))
272 #define RM_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_RM))
273 #define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT))
274 #define ASSOC_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC))
275 #define SCAN_RM_IN_PROGRESS(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM))
276 #define PHY_MUTED(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE))
277 #define PUB_NOT_ASSOC(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC))
279 #if defined(EXT_CBALL)
280 #define NORADIO_ENAB(pub) ((pub).radioid == NORADIO_ID)
282 #define NORADIO_ENAB(pub) 0
285 #define PHY_LTRN_LIST_LEN 64
286 extern u16 ltrn_list[PHY_LTRN_LIST_LEN];
288 typedef struct _phy_table_info {
294 typedef struct phytbl_info {
303 u8 curr_home_channel;
304 u16 crsminpwrthld_40_stored;
305 u16 crsminpwrthld_20L_stored;
306 u16 crsminpwrthld_20U_stored;
307 u16 init_gain_code_core1_stored;
308 u16 init_gain_code_core2_stored;
309 u16 init_gain_codeb_core1_stored;
310 u16 init_gain_codeb_core2_stored;
311 u16 init_gain_table_stored[4];
313 u16 clip1_hi_gain_code_core1_stored;
314 u16 clip1_hi_gain_code_core2_stored;
315 u16 clip1_hi_gain_codeb_core1_stored;
316 u16 clip1_hi_gain_codeb_core2_stored;
317 u16 nb_clip_thresh_core1_stored;
318 u16 nb_clip_thresh_core2_stored;
319 u16 init_ofdmlna2gainchange_stored[4];
320 u16 init_ccklna2gainchange_stored[4];
321 u16 clip1_lo_gain_code_core1_stored;
322 u16 clip1_lo_gain_code_core2_stored;
323 u16 clip1_lo_gain_codeb_core1_stored;
324 u16 clip1_lo_gain_codeb_core2_stored;
325 u16 w1_clip_thresh_core1_stored;
326 u16 w1_clip_thresh_core2_stored;
327 u16 radio_2056_core1_rssi_gain_stored;
328 u16 radio_2056_core2_rssi_gain_stored;
329 u16 energy_drop_timeout_len_stored;
331 u16 ed_crs40_assertthld0_stored;
332 u16 ed_crs40_assertthld1_stored;
333 u16 ed_crs40_deassertthld0_stored;
334 u16 ed_crs40_deassertthld1_stored;
335 u16 ed_crs20L_assertthld0_stored;
336 u16 ed_crs20L_assertthld1_stored;
337 u16 ed_crs20L_deassertthld0_stored;
338 u16 ed_crs20L_deassertthld1_stored;
339 u16 ed_crs20U_assertthld0_stored;
340 u16 ed_crs20U_assertthld1_stored;
341 u16 ed_crs20U_deassertthld0_stored;
342 u16 ed_crs20U_deassertthld1_stored;
345 u16 badplcp_ma_previous;
346 u16 badplcp_ma_total;
347 u16 badplcp_ma_list[MA_WINDOW_SZ];
348 int badplcp_ma_index;
350 s16 bphy_pre_badplcp_cnt;
354 u16 init_gainb_core1;
355 u16 init_gainb_core2;
356 u16 init_gain_rfseq[4];
364 u16 radio_2057_core1_rssi_wb1a_gc_stored;
365 u16 radio_2057_core2_rssi_wb1a_gc_stored;
366 u16 radio_2057_core1_rssi_wb1g_gc_stored;
367 u16 radio_2057_core2_rssi_wb1g_gc_stored;
368 u16 radio_2057_core1_rssi_wb2_gc_stored;
369 u16 radio_2057_core2_rssi_wb2_gc_stored;
370 u16 radio_2057_core1_rssi_nb_gc_stored;
371 u16 radio_2057_core2_rssi_nb_gc_stored;
373 } interference_info_t;
385 u16 div_search_gn_change;
393 u16 clip_pwdn_thresh;
394 u16 clip_n1p1_thresh;
395 u16 clip_n1_pwdn_thresh;
399 u16 clip_p1_p2_thresh;
406 u16 div_srch_gn_back;
411 typedef struct _lo_complex_t {
414 } lo_complex_abgphy_info_t;
416 typedef struct _nphy_iq_comp {
423 typedef struct _nphy_txpwrindex {
426 s8 index_internal_save;
438 u16 txcal_coeffs_2G[8];
439 u16 txcal_radio_regs_2G[8];
440 nphy_iq_comp_t rxcal_coeffs_2G;
442 u16 txcal_coeffs_5G[8];
443 u16 txcal_radio_regs_5G[8];
444 nphy_iq_comp_t rxcal_coeffs_5G;
447 typedef struct _nphy_pwrctrl {
476 typedef struct _nphy_txgains {
484 #define PHY_NOISEVAR_BUFSIZE 10
486 typedef struct _nphy_noisevar_buf {
488 int tone_id[PHY_NOISEVAR_BUFSIZE];
489 u32 noise_vars[PHY_NOISEVAR_BUFSIZE];
490 u32 min_noise_vars[PHY_NOISEVAR_BUFSIZE];
491 } phy_noisevar_buf_t;
494 u16 rssical_radio_regs_2G[2];
495 u16 rssical_phyregs_2G[12];
497 u16 rssical_radio_regs_5G[2];
498 u16 rssical_phyregs_5G[12];
511 u16 txiqlocal_bestcoeffs[11];
512 u16 txiqlocal_bestcoeffs_valid;
514 u32 papd_eps_tbl[PHY_PAPD_EPS_TBL_SIZE_LCNPHY];
521 u16 sslpnCalibClkEnCtrl;
523 u16 rxiqcal_coeff_a0;
524 u16 rxiqcal_coeff_b0;
525 } lcnphy_cal_results_t;
528 struct phy_info *phy_head;
555 s8 phy_noise_window[MA_WINDOW_SZ];
556 uint phy_noise_index;
578 struct phy_info_nphy;
579 typedef struct phy_info_nphy phy_info_nphy_t;
581 struct phy_info_lcnphy;
582 typedef struct phy_info_lcnphy phy_info_lcnphy_t;
584 struct phy_func_ptr {
588 initfn_t txpwrrecalc;
590 txiqccgetfn_t txiqccget;
591 txiqccsetfn_t txiqccset;
592 txloccgetfn_t txloccget;
593 radioloftgetfn_t radioloftget;
595 rxsigpwrfn_t rxsigpwr;
598 typedef struct phy_func_ptr phy_func_ptr_t;
603 phy_func_ptr_t pi_fptr;
607 phy_info_lcnphy_t *pi_lcnphy;
609 bool user_txpwr_at_rfport;
612 struct phy_info *next;
618 bool ofdm_rateset_war;
619 bool bf_preempt_4306;
620 chanspec_t radio_chanspec;
626 bool init_in_progress;
630 bool watchdog_override;
633 int phynoise_chan_watchdog;
634 bool phynoise_polling;
638 s16 txpa_2g[PWRTBL_NUM_COEFF];
639 s16 txpa_2g_low_temp[PWRTBL_NUM_COEFF];
640 s16 txpa_2g_high_temp[PWRTBL_NUM_COEFF];
641 s16 txpa_5g_low[PWRTBL_NUM_COEFF];
642 s16 txpa_5g_mid[PWRTBL_NUM_COEFF];
643 s16 txpa_5g_hi[PWRTBL_NUM_COEFF];
646 u8 tx_srom_max_5g_low;
647 u8 tx_srom_max_5g_mid;
648 u8 tx_srom_max_5g_hi;
649 u8 tx_srom_max_rate_2g[TXP_NUM_RATES];
650 u8 tx_srom_max_rate_5g_low[TXP_NUM_RATES];
651 u8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES];
652 u8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES];
653 u8 tx_user_target[TXP_NUM_RATES];
654 s8 tx_power_offset[TXP_NUM_RATES];
655 u8 tx_power_target[TXP_NUM_RATES];
657 srom_fem_t srom_fem2g;
658 srom_fem_t srom_fem5g;
661 u8 tx_power_max_rate_ind;
670 s8 n_preamble_override;
674 s8 idle_tssi[CH_5G_GROUP];
678 u8 txpwr_limit[TXP_NUM_RATES];
679 u8 txpwr_env_limit[TXP_NUM_RATES];
680 u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN];
682 bool channel_14_wide_filter;
685 bool txpwridx_override_aphy;
686 s16 radiopwr_override;
690 bool edcrs_threshold_lock;
695 s16 ofdm_analog_filt_bw_override;
696 s16 cck_analog_filt_bw_override;
697 s16 ofdm_rccal_override;
698 s16 cck_rccal_override;
701 uint interference_mode_crs_time;
703 bool interference_mode_crs;
705 u32 phy_tx_tone_freq;
708 bool phy_fixed_noise;
711 s8 carrier_suppr_disable;
718 s16 phy_txcore_disable_temp;
719 s16 phy_txcore_enable_temp;
720 s8 phy_tempsense_offset;
721 bool phy_txcore_heatedup;
729 lo_complex_abgphy_info_t gphy_locomp_iq[STATIC_NUM_RF][STATIC_NUM_BB];
730 s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB];
731 u16 gain_table[TX_GAIN_TABLE_LENGTH];
733 s16 max_lpback_gain_hdB;
734 s16 trsw_rx_gain_hdB;
738 int nrssi_table_delta;
739 int nrssi_slope_scale;
740 int nrssi_slope_offset;
747 u8 a_band_high_disable;
750 u16 global_tx_bb_dc_bias_loft;
770 u16 freqtrack_saved_regs[2];
771 int cur_interference_mode;
772 bool hwpwrctrl_capable;
773 bool temppwrctrl_capable;
782 bool nphy_tableloaded;
784 u32 nphy_bb_mult_save;
785 u16 nphy_txiqlocal_bestc[11];
786 bool nphy_txiqlocal_coeffsvalid;
787 phy_txpwrindex_t nphy_txpwrindex[PHY_CORE_NUM_2];
788 phy_pwrctrl_t nphy_pwrctrl_info[PHY_CORE_NUM_2];
814 u32 nphy_rxcalparams;
817 bool phy_isspuravoid;
823 s16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ];
826 u8 nphy_txpid2g[PHY_CORE_NUM_2];
827 u8 nphy_txpid5g[PHY_CORE_NUM_2];
828 u8 nphy_txpid5gl[PHY_CORE_NUM_2];
829 u8 nphy_txpid5gh[PHY_CORE_NUM_2];
831 bool nphy_gain_boost;
832 bool nphy_elna_gain_config;
834 u16 old_bphy_testcontrol;
840 uint nphy_perical_last;
841 u8 cal_type_override;
842 u8 mphase_cal_phase_id;
843 u8 mphase_txcal_cmdidx;
844 u8 mphase_txcal_numcmds;
845 u16 mphase_txcal_bestcoeffs[11];
846 chanspec_t nphy_txiqlocal_chanspec;
847 chanspec_t nphy_iqcal_chanspec_2G;
848 chanspec_t nphy_iqcal_chanspec_5G;
849 chanspec_t nphy_rssical_chanspec_2G;
850 chanspec_t nphy_rssical_chanspec_5G;
851 struct wlapi_timer *phycal_timer;
852 bool use_int_tx_iqlo_cal_nphy;
853 bool internal_tx_iqlo_cal_tapoff_intpa_nphy;
854 s16 nphy_lastcal_temp;
856 txiqcal_cache_t calibration_cache;
857 rssical_cache_t rssical_cache;
859 u8 nphy_txpwr_idx[2];
860 u8 nphy_papd_cal_type;
861 uint nphy_papd_last_cal;
862 u16 nphy_papd_tx_gain_at_last_cal[2];
863 u8 nphy_papd_cal_gain_index[2];
864 s16 nphy_papd_epsilon_offset[2];
865 bool nphy_papd_recal_enable;
866 u32 nphy_papd_recal_counter;
867 bool nphy_force_papd_cal;
872 u16 classifier_state;
874 uint nphy_deaf_count;
878 u16 rfctrlIntc1_save;
879 u16 rfctrlIntc2_save;
880 bool first_cal_after_assoc;
881 u16 tx_rx_cal_radio_saveregs[22];
882 u16 tx_rx_cal_phy_saveregs[15];
884 u8 nphy_cal_orig_pwr_idx[2];
885 u8 nphy_txcal_pwr_idx[2];
886 u8 nphy_rxcal_pwr_idx[2];
887 u16 nphy_cal_orig_tx_gain[2];
888 nphy_txgains_t nphy_cal_target_gain;
889 u16 nphy_txcal_bbmult;
892 u16 nphy_saved_bbconf;
894 bool nphy_gband_spurwar_en;
895 bool nphy_gband_spurwar2_en;
896 bool nphy_aband_spurwar_en;
897 u16 nphy_rccal_value;
898 u16 nphy_crsminpwr[3];
899 phy_noisevar_buf_t nphy_saved_noisevars;
900 bool nphy_anarxlpf_adjusted;
901 bool nphy_crsminpwr_adjusted;
902 bool nphy_noisevars_adjusted;
904 bool nphy_rxcal_active;
905 u16 radar_percal_mask;
906 bool dfs_lp_buffer_nphy;
908 u16 nphy_fineclockgatecontrol;
915 s16 noise_crsminpwr_index;
918 u16 init_gainb_core1;
919 u16 init_gainb_core2;
920 u8 aci_noise_curr_channel;
921 u16 init_gain_rfseq[4];
925 bool nphy_sample_play_lpf_bw_ctl_ovr;
932 uint tbl_save_offset;
935 s8 txpwrindex[PHY_CORE_MAX];
944 typedef struct _cs32 {
949 typedef struct radio_regs {
957 typedef struct radio_20xx_regs {
963 typedef struct lcnphy_radio_regs {
969 } lcnphy_radio_regs_t;
971 extern lcnphy_radio_regs_t lcnphy_radio_regs_2064[];
972 extern lcnphy_radio_regs_t lcnphy_radio_regs_2066[];
973 extern radio_regs_t regs_2055[], regs_SYN_2056[], regs_TX_2056[],
975 extern radio_regs_t regs_SYN_2056_A1[], regs_TX_2056_A1[], regs_RX_2056_A1[];
976 extern radio_regs_t regs_SYN_2056_rev5[], regs_TX_2056_rev5[],
978 extern radio_regs_t regs_SYN_2056_rev6[], regs_TX_2056_rev6[],
980 extern radio_regs_t regs_SYN_2056_rev7[], regs_TX_2056_rev7[],
982 extern radio_regs_t regs_SYN_2056_rev8[], regs_TX_2056_rev8[],
984 extern radio_20xx_regs_t regs_2057_rev4[], regs_2057_rev5[], regs_2057_rev5v1[];
985 extern radio_20xx_regs_t regs_2057_rev7[], regs_2057_rev8[];
987 extern char *phy_getvar(phy_info_t *pi, const char *name);
988 extern int phy_getintvar(phy_info_t *pi, const char *name);
989 #define PHY_GETVAR(pi, name) phy_getvar(pi, name)
990 #define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name)
992 extern u16 read_phy_reg(phy_info_t *pi, u16 addr);
993 extern void write_phy_reg(phy_info_t *pi, u16 addr, u16 val);
994 extern void and_phy_reg(phy_info_t *pi, u16 addr, u16 val);
995 extern void or_phy_reg(phy_info_t *pi, u16 addr, u16 val);
996 extern void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val);
998 extern u16 read_radio_reg(phy_info_t *pi, u16 addr);
999 extern void or_radio_reg(phy_info_t *pi, u16 addr, u16 val);
1000 extern void and_radio_reg(phy_info_t *pi, u16 addr, u16 val);
1001 extern void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask,
1003 extern void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask);
1005 extern void write_radio_reg(phy_info_t *pi, u16 addr, u16 val);
1007 extern void wlc_phyreg_enter(wlc_phy_t *pih);
1008 extern void wlc_phyreg_exit(wlc_phy_t *pih);
1009 extern void wlc_radioreg_enter(wlc_phy_t *pih);
1010 extern void wlc_radioreg_exit(wlc_phy_t *pih);
1012 extern void wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info,
1013 u16 tblAddr, u16 tblDataHi,
1015 extern void wlc_phy_write_table(phy_info_t *pi,
1016 const phytbl_info_t *ptbl_info, u16 tblAddr,
1017 u16 tblDataHi, u16 tblDatalo);
1018 extern void wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset,
1019 u16 tblAddr, u16 tblDataHi,
1021 extern void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val);
1023 extern void write_phy_channel_reg(phy_info_t *pi, uint val);
1024 extern void wlc_phy_txpower_update_shm(phy_info_t *pi);
1026 extern void wlc_phy_cordic(fixed theta, cs32 *val);
1027 extern u8 wlc_phy_nbits(s32 value);
1028 extern u32 wlc_phy_sqrt_int(u32 value);
1029 extern void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_dB, u8 core);
1031 extern uint wlc_phy_init_radio_regs_allbands(phy_info_t *pi,
1032 radio_20xx_regs_t *radioregs);
1033 extern uint wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs,
1036 extern void wlc_phy_txpower_ipa_upd(phy_info_t *pi);
1038 extern void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on);
1039 extern void wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real,
1042 extern void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi);
1043 extern void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi);
1045 extern bool wlc_phy_attach_nphy(phy_info_t *pi);
1046 extern bool wlc_phy_attach_lcnphy(phy_info_t *pi);
1048 extern void wlc_phy_detach_lcnphy(phy_info_t *pi);
1050 extern void wlc_phy_init_nphy(phy_info_t *pi);
1051 extern void wlc_phy_init_lcnphy(phy_info_t *pi);
1053 extern void wlc_phy_cal_init_nphy(phy_info_t *pi);
1054 extern void wlc_phy_cal_init_lcnphy(phy_info_t *pi);
1056 extern void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec);
1057 extern void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec);
1058 extern void wlc_phy_chanspec_set_fixup_lcnphy(phy_info_t *pi,
1059 chanspec_t chanspec);
1060 extern int wlc_phy_channel2freq(uint channel);
1061 extern int wlc_phy_chanspec_freq2bandrange_lpssn(uint);
1062 extern int wlc_phy_chanspec_bandrange_get(phy_info_t *, chanspec_t);
1064 extern void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode);
1065 extern s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi);
1067 extern void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi);
1068 extern void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi);
1069 extern void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi);
1071 extern void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index);
1072 extern void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable);
1073 extern void wlc_lcnphy_stop_tx_tone(phy_info_t *pi);
1074 extern void wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz,
1075 u16 max_val, bool iqcalmode);
1077 extern void wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan,
1078 u8 *max_pwr, u8 rate_id);
1079 extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start,
1081 u8 rate_ofdm_start);
1082 extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power,
1087 extern u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode);
1088 extern s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode);
1089 extern s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode);
1090 extern s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode);
1091 extern void wlc_phy_carrier_suppress_lcnphy(phy_info_t *pi);
1092 extern void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel);
1093 extern void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode);
1094 extern void wlc_2064_vco_cal(phy_info_t *pi);
1096 extern void wlc_phy_txpower_recalc_target(phy_info_t *pi);
1097 extern u32 wlc_phy_qdiv_roundup(u32 dividend, u32 divisor,
1100 #define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18
1101 #define LCNPHY_TX_POWER_TABLE_SIZE 128
1102 #define LCNPHY_MAX_TX_POWER_INDEX (LCNPHY_TX_POWER_TABLE_SIZE - 1)
1103 #define LCNPHY_TBL_ID_TXPWRCTL 0x07
1104 #define LCNPHY_TX_PWR_CTRL_OFF 0
1105 #define LCNPHY_TX_PWR_CTRL_SW (0x1 << 15)
1106 #define LCNPHY_TX_PWR_CTRL_HW ((0x1 << 15) | \
1110 #define LCNPHY_TX_PWR_CTRL_TEMPBASED 0xE001
1112 extern void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti);
1113 extern void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti);
1114 extern void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b);
1115 extern void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq);
1116 extern void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b);
1117 extern u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi);
1118 extern void wlc_lcnphy_get_radio_loft(phy_info_t *pi, u8 *ei0,
1119 u8 *eq0, u8 *fi0, u8 *fq0);
1120 extern void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode);
1121 extern void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode);
1122 extern bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi);
1123 extern void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi);
1124 extern s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1);
1125 extern void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr,
1127 extern void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi);
1129 extern s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index);
1131 #define NPHY_MAX_HPVGA1_INDEX 10
1132 #define NPHY_DEF_HPVGA1_INDEXLIMIT 7
1134 typedef struct _phy_iq_est {
1140 extern void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable);
1141 extern void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode);
1143 #define wlc_phy_write_table_nphy(pi, pti) wlc_phy_write_table(pi, pti, 0x72, \
1145 #define wlc_phy_read_table_nphy(pi, pti) wlc_phy_read_table(pi, pti, 0x72, \
1147 #define wlc_nphy_table_addr(pi, id, off) wlc_phy_table_addr((pi), (id), (off), \
1149 #define wlc_nphy_table_data_write(pi, w, v) wlc_phy_table_data_write((pi), (w), (v))
1151 extern void wlc_phy_table_read_nphy(phy_info_t *pi, u32, u32 l, u32 o,
1153 extern void wlc_phy_table_write_nphy(phy_info_t *pi, u32, u32, u32,
1156 #define PHY_IPA(pi) \
1157 ((pi->ipa2g_on && CHSPEC_IS2G(pi->radio_chanspec)) || \
1158 (pi->ipa5g_on && CHSPEC_IS5G(pi->radio_chanspec)))
1160 #define WLC_PHY_WAR_PR51571(pi) \
1161 if ((BUSTYPE((pi)->sh->bustype) == PCI_BUS) && NREV_LT((pi)->pubpi.phy_rev, 3)) \
1162 (void)R_REG((pi)->sh->osh, &(pi)->regs->maccontrol)
1164 extern void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype);
1165 extern void wlc_phy_aci_reset_nphy(phy_info_t *pi);
1166 extern void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en);
1168 extern u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint chan);
1169 extern void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on);
1171 extern void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi);
1173 extern void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd);
1174 extern s16 wlc_phy_tempsense_nphy(phy_info_t *pi);
1176 extern u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val);
1178 extern void wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est,
1179 u16 num_samps, u8 wait_time,
1182 extern void wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write,
1183 nphy_iq_comp_t *comp);
1184 extern void wlc_phy_aci_and_noise_reduction_nphy(phy_info_t *pi);
1186 extern void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask);
1187 extern u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih);
1189 extern void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type);
1190 extern void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi);
1191 extern void wlc_phy_txpwr_apply_nphy(phy_info_t *pi);
1192 extern void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi);
1193 extern u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi);
1195 extern nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi);
1196 extern int wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain,
1198 extern int wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain,
1200 extern void wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask,
1201 s8 txpwrindex, bool res);
1202 extern void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core, u8 rssi_type);
1203 extern int wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type,
1204 s32 *rssi_buf, u8 nsamps);
1205 extern void wlc_phy_rssi_cal_nphy(phy_info_t *pi);
1206 extern int wlc_phy_aci_scan_nphy(phy_info_t *pi);
1207 extern void wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower,
1209 extern int wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val,
1211 extern void wlc_phy_stopplayback_nphy(phy_info_t *pi);
1212 extern void wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf,
1214 extern void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi);
1216 extern int wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh);
1218 #define NPHY_TESTPATTERN_BPHY_EVM 0
1219 #define NPHY_TESTPATTERN_BPHY_RFCS 1
1221 extern void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs);
1223 void wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset,
1225 extern s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi,
1226 chanspec_t chanspec);
1228 extern bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pih);
1229 #endif /* _wlc_phy_int_h_ */