drivers/ssb/main.c

   1 /*
   2  * Sonics Silicon Backplane
   3  * Subsystem core
   4  *
   5  * Copyright 2005, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include "ssb_private.h"
  12
  13 #include <linux/delay.h>
  14 #include <linux/io.h>
  15 #include <linux/module.h>
  16 #include <linux/ssb/ssb.h>
  17 #include <linux/ssb/ssb_regs.h>
  18 #include <linux/ssb/ssb_driver_gige.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/pci.h>
  21 #include <linux/mmc/sdio_func.h>
  22 #include <linux/slab.h>
  23
  24 #include <pcmcia/cistpl.h>
  25 #include <pcmcia/ds.h>
  26
  27
  28 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
  29 MODULE_LICENSE("GPL");
  30
  31
  32 /* Temporary list of yet-to-be-attached buses */
  33 static LIST_HEAD(attach_queue);
  34 /* List if running buses */
  35 static LIST_HEAD(buses);
  36 /* Software ID counter */
  37 static unsigned int next_busnumber;
  38 /* buses_mutes locks the two buslists and the next_busnumber.
  39  * Don't lock this directly, but use ssb_buses_[un]lock() below. */
  40 static DEFINE_MUTEX(buses_mutex);
  41
  42 /* There are differences in the codeflow, if the bus is
  43  * initialized from early boot, as various needed services
  44  * are not available early. This is a mechanism to delay
  45  * these initializations to after early boot has finished.
  46  * It's also used to avoid mutex locking, as that's not
  47  * available and needed early. */
  48 static bool ssb_is_early_boot = 1;
  49
  50 static void ssb_buses_lock(void);
  51 static void ssb_buses_unlock(void);
  52
  53
  54 #ifdef CONFIG_SSB_PCIHOST
  55 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
  56 {
  57         struct ssb_bus *bus;
  58
  59         ssb_buses_lock();
  60         list_for_each_entry(bus, &buses, list) {
  61                 if (bus->bustype == SSB_BUSTYPE_PCI &&
  62                     bus->host_pci == pdev)
  63                         goto found;
  64         }
  65         bus = NULL;
  66 found:
  67         ssb_buses_unlock();
  68
  69         return bus;
  70 }
  71 #endif /* CONFIG_SSB_PCIHOST */
  72
  73 #ifdef CONFIG_SSB_PCMCIAHOST
  74 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
  75 {
  76         struct ssb_bus *bus;
  77
  78         ssb_buses_lock();
  79         list_for_each_entry(bus, &buses, list) {
  80                 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
  81                     bus->host_pcmcia == pdev)
  82                         goto found;
  83         }
  84         bus = NULL;
  85 found:
  86         ssb_buses_unlock();
  87
  88         return bus;
  89 }
  90 #endif /* CONFIG_SSB_PCMCIAHOST */
  91
  92 #ifdef CONFIG_SSB_SDIOHOST
  93 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
  94 {
  95         struct ssb_bus *bus;
  96
  97         ssb_buses_lock();
  98         list_for_each_entry(bus, &buses, list) {
  99                 if (bus->bustype == SSB_BUSTYPE_SDIO &&
 100                     bus->host_sdio == func)
 101                         goto found;
 102         }
 103         bus = NULL;
 104 found:
 105         ssb_buses_unlock();
 106
 107         return bus;
 108 }
 109 #endif /* CONFIG_SSB_SDIOHOST */
 110
 111 int ssb_for_each_bus_call(unsigned long data,
 112                           int (*func)(struct ssb_bus *bus, unsigned long data))
 113 {
 114         struct ssb_bus *bus;
 115         int res;
 116
 117         ssb_buses_lock();
 118         list_for_each_entry(bus, &buses, list) {
 119                 res = func(bus, data);
 120                 if (res >= 0) {
 121                         ssb_buses_unlock();
 122                         return res;
 123                 }
 124         }
 125         ssb_buses_unlock();
 126
 127         return -ENODEV;
 128 }
 129
 130 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
 131 {
 132         if (dev)
 133                 get_device(dev->dev);
 134         return dev;
 135 }
 136
 137 static void ssb_device_put(struct ssb_device *dev)
 138 {
 139         if (dev)
 140                 put_device(dev->dev);
 141 }
 142
 143 static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv)
 144 {
 145         if (drv)
 146                 get_driver(&drv->drv);
 147         return drv;
 148 }
 149
 150 static inline void ssb_driver_put(struct ssb_driver *drv)
 151 {
 152         if (drv)
 153                 put_driver(&drv->drv);
 154 }
 155
 156 static int ssb_device_resume(struct device *dev)
 157 {
 158         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 159         struct ssb_driver *ssb_drv;
 160         int err = 0;
 161
 162         if (dev->driver) {
 163                 ssb_drv = drv_to_ssb_drv(dev->driver);
 164                 if (ssb_drv && ssb_drv->resume)
 165                         err = ssb_drv->resume(ssb_dev);
 166                 if (err)
 167                         goto out;
 168         }
 169 out:
 170         return err;
 171 }
 172
 173 static int ssb_device_suspend(struct device *dev, pm_message_t state)
 174 {
 175         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 176         struct ssb_driver *ssb_drv;
 177         int err = 0;
 178
 179         if (dev->driver) {
 180                 ssb_drv = drv_to_ssb_drv(dev->driver);
 181                 if (ssb_drv && ssb_drv->suspend)
 182                         err = ssb_drv->suspend(ssb_dev, state);
 183                 if (err)
 184                         goto out;
 185         }
 186 out:
 187         return err;
 188 }
 189
 190 int ssb_bus_resume(struct ssb_bus *bus)
 191 {
 192         int err;
 193
 194         /* Reset HW state information in memory, so that HW is
 195          * completely reinitialized. */
 196         bus->mapped_device = NULL;
 197 #ifdef CONFIG_SSB_DRIVER_PCICORE
 198         bus->pcicore.setup_done = 0;
 199 #endif
 200
 201         err = ssb_bus_powerup(bus, 0);
 202         if (err)
 203                 return err;
 204         err = ssb_pcmcia_hardware_setup(bus);
 205         if (err) {
 206                 ssb_bus_may_powerdown(bus);
 207                 return err;
 208         }
 209         ssb_chipco_resume(&bus->chipco);
 210         ssb_bus_may_powerdown(bus);
 211
 212         return 0;
 213 }
 214 EXPORT_SYMBOL(ssb_bus_resume);
 215
 216 int ssb_bus_suspend(struct ssb_bus *bus)
 217 {
 218         ssb_chipco_suspend(&bus->chipco);
 219         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 220
 221         return 0;
 222 }
 223 EXPORT_SYMBOL(ssb_bus_suspend);
 224
 225 #ifdef CONFIG_SSB_SPROM
 226 /** ssb_devices_freeze - Freeze all devices on the bus.
 227  *
 228  * After freezing no device driver will be handling a device
 229  * on this bus anymore. ssb_devices_thaw() must be called after
 230  * a successful freeze to reactivate the devices.
 231  *
 232  * @bus: The bus.
 233  * @ctx: Context structure. Pass this to ssb_devices_thaw().
 234  */
 235 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
 236 {
 237         struct ssb_device *sdev;
 238         struct ssb_driver *sdrv;
 239         unsigned int i;
 240
 241         memset(ctx, 0, sizeof(*ctx));
 242         ctx->bus = bus;
 243         SSB_WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
 244
 245         for (i = 0; i < bus->nr_devices; i++) {
 246                 sdev = ssb_device_get(&bus->devices[i]);
 247
 248                 if (!sdev->dev || !sdev->dev->driver ||
 249                     !device_is_registered(sdev->dev)) {
 250                         ssb_device_put(sdev);
 251                         continue;
 252                 }
 253                 sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver));
 254                 if (!sdrv || SSB_WARN_ON(!sdrv->remove)) {
 255                         ssb_device_put(sdev);
 256                         continue;
 257                 }
 258                 sdrv->remove(sdev);
 259                 ctx->device_frozen[i] = 1;
 260         }
 261
 262         return 0;
 263 }
 264
 265 /** ssb_devices_thaw - Unfreeze all devices on the bus.
 266  *
 267  * This will re-attach the device drivers and re-init the devices.
 268  *
 269  * @ctx: The context structure from ssb_devices_freeze()
 270  */
 271 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
 272 {
 273         struct ssb_bus *bus = ctx->bus;
 274         struct ssb_device *sdev;
 275         struct ssb_driver *sdrv;
 276         unsigned int i;
 277         int err, result = 0;
 278
 279         for (i = 0; i < bus->nr_devices; i++) {
 280                 if (!ctx->device_frozen[i])
 281                         continue;
 282                 sdev = &bus->devices[i];
 283
 284                 if (SSB_WARN_ON(!sdev->dev || !sdev->dev->driver))
 285                         continue;
 286                 sdrv = drv_to_ssb_drv(sdev->dev->driver);
 287                 if (SSB_WARN_ON(!sdrv || !sdrv->probe))
 288                         continue;
 289
 290                 err = sdrv->probe(sdev, &sdev->id);
 291                 if (err) {
 292                         ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
 293                                    dev_name(sdev->dev));
 294                         result = err;
 295                 }
 296                 ssb_driver_put(sdrv);
 297                 ssb_device_put(sdev);
 298         }
 299
 300         return result;
 301 }
 302 #endif /* CONFIG_SSB_SPROM */
 303
 304 static void ssb_device_shutdown(struct device *dev)
 305 {
 306         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 307         struct ssb_driver *ssb_drv;
 308
 309         if (!dev->driver)
 310                 return;
 311         ssb_drv = drv_to_ssb_drv(dev->driver);
 312         if (ssb_drv && ssb_drv->shutdown)
 313                 ssb_drv->shutdown(ssb_dev);
 314 }
 315
 316 static int ssb_device_remove(struct device *dev)
 317 {
 318         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 319         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 320
 321         if (ssb_drv && ssb_drv->remove)
 322                 ssb_drv->remove(ssb_dev);
 323         ssb_device_put(ssb_dev);
 324
 325         return 0;
 326 }
 327
 328 static int ssb_device_probe(struct device *dev)
 329 {
 330         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 331         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 332         int err = 0;
 333
 334         ssb_device_get(ssb_dev);
 335         if (ssb_drv && ssb_drv->probe)
 336                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
 337         if (err)
 338                 ssb_device_put(ssb_dev);
 339
 340         return err;
 341 }
 342
 343 static int ssb_match_devid(const struct ssb_device_id *tabid,
 344                            const struct ssb_device_id *devid)
 345 {
 346         if ((tabid->vendor != devid->vendor) &&
 347             tabid->vendor != SSB_ANY_VENDOR)
 348                 return 0;
 349         if ((tabid->coreid != devid->coreid) &&
 350             tabid->coreid != SSB_ANY_ID)
 351                 return 0;
 352         if ((tabid->revision != devid->revision) &&
 353             tabid->revision != SSB_ANY_REV)
 354                 return 0;
 355         return 1;
 356 }
 357
 358 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
 359 {
 360         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 361         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
 362         const struct ssb_device_id *id;
 363
 364         for (id = ssb_drv->id_table;
 365              id->vendor || id->coreid || id->revision;
 366              id++) {
 367                 if (ssb_match_devid(id, &ssb_dev->id))
 368                         return 1; /* found */
 369         }
 370
 371         return 0;
 372 }
 373
 374 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
 375 {
 376         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 377
 378         if (!dev)
 379                 return -ENODEV;
 380
 381         return add_uevent_var(env,
 382                              "MODALIAS=ssb:v%04Xid%04Xrev%02X",
 383                              ssb_dev->id.vendor, ssb_dev->id.coreid,
 384                              ssb_dev->id.revision);
 385 }
 386
 387 #define ssb_config_attr(attrib, field, format_string) \
 388 static ssize_t \
 389 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
 390 { \
 391         return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
 392 }
 393
 394 ssb_config_attr(core_num, core_index, "%u\n")
 395 ssb_config_attr(coreid, id.coreid, "0x%04x\n")
 396 ssb_config_attr(vendor, id.vendor, "0x%04x\n")
 397 ssb_config_attr(revision, id.revision, "%u\n")
 398 ssb_config_attr(irq, irq, "%u\n")
 399 static ssize_t
 400 name_show(struct device *dev, struct device_attribute *attr, char *buf)
 401 {
 402         return sprintf(buf, "%s\n",
 403                        ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
 404 }
 405
 406 static struct device_attribute ssb_device_attrs[] = {
 407         __ATTR_RO(name),
 408         __ATTR_RO(core_num),
 409         __ATTR_RO(coreid),
 410         __ATTR_RO(vendor),
 411         __ATTR_RO(revision),
 412         __ATTR_RO(irq),
 413         __ATTR_NULL,
 414 };
 415
 416 static struct bus_type ssb_bustype = {
 417         .name           = "ssb",
 418         .match          = ssb_bus_match,
 419         .probe          = ssb_device_probe,
 420         .remove         = ssb_device_remove,
 421         .shutdown       = ssb_device_shutdown,
 422         .suspend        = ssb_device_suspend,
 423         .resume         = ssb_device_resume,
 424         .uevent         = ssb_device_uevent,
 425         .dev_attrs      = ssb_device_attrs,
 426 };
 427
 428 static void ssb_buses_lock(void)
 429 {
 430         /* See the comment at the ssb_is_early_boot definition */
 431         if (!ssb_is_early_boot)
 432                 mutex_lock(&buses_mutex);
 433 }
 434
 435 static void ssb_buses_unlock(void)
 436 {
 437         /* See the comment at the ssb_is_early_boot definition */
 438         if (!ssb_is_early_boot)
 439                 mutex_unlock(&buses_mutex);
 440 }
 441
 442 static void ssb_devices_unregister(struct ssb_bus *bus)
 443 {
 444         struct ssb_device *sdev;
 445         int i;
 446
 447         for (i = bus->nr_devices - 1; i >= 0; i--) {
 448                 sdev = &(bus->devices[i]);
 449                 if (sdev->dev)
 450                         device_unregister(sdev->dev);
 451         }
 452 }
 453
 454 void ssb_bus_unregister(struct ssb_bus *bus)
 455 {
 456         ssb_buses_lock();
 457         ssb_devices_unregister(bus);
 458         list_del(&bus->list);
 459         ssb_buses_unlock();
 460
 461         ssb_pcmcia_exit(bus);
 462         ssb_pci_exit(bus);
 463         ssb_iounmap(bus);
 464 }
 465 EXPORT_SYMBOL(ssb_bus_unregister);
 466
 467 static void ssb_release_dev(struct device *dev)
 468 {
 469         struct __ssb_dev_wrapper *devwrap;
 470
 471         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 472         kfree(devwrap);
 473 }
 474
 475 static int ssb_devices_register(struct ssb_bus *bus)
 476 {
 477         struct ssb_device *sdev;
 478         struct device *dev;
 479         struct __ssb_dev_wrapper *devwrap;
 480         int i, err = 0;
 481         int dev_idx = 0;
 482
 483         for (i = 0; i < bus->nr_devices; i++) {
 484                 sdev = &(bus->devices[i]);
 485
 486                 /* We don't register SSB-system devices to the kernel,
 487                  * as the drivers for them are built into SSB. */
 488                 switch (sdev->id.coreid) {
 489                 case SSB_DEV_CHIPCOMMON:
 490                 case SSB_DEV_PCI:
 491                 case SSB_DEV_PCIE:
 492                 case SSB_DEV_PCMCIA:
 493                 case SSB_DEV_MIPS:
 494                 case SSB_DEV_MIPS_3302:
 495                 case SSB_DEV_EXTIF:
 496                         continue;
 497                 }
 498
 499                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 500                 if (!devwrap) {
 501                         ssb_printk(KERN_ERR PFX
 502                                    "Could not allocate device\n");
 503                         err = -ENOMEM;
 504                         goto error;
 505                 }
 506                 dev = &devwrap->dev;
 507                 devwrap->sdev = sdev;
 508
 509                 dev->release = ssb_release_dev;
 510                 dev->bus = &ssb_bustype;
 511                 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
 512
 513                 switch (bus->bustype) {
 514                 case SSB_BUSTYPE_PCI:
 515 #ifdef CONFIG_SSB_PCIHOST
 516                         sdev->irq = bus->host_pci->irq;
 517                         dev->parent = &bus->host_pci->dev;
 518                         sdev->dma_dev = dev->parent;
 519 #endif
 520                         break;
 521                 case SSB_BUSTYPE_PCMCIA:
 522 #ifdef CONFIG_SSB_PCMCIAHOST
 523                         sdev->irq = bus->host_pcmcia->irq;
 524                         dev->parent = &bus->host_pcmcia->dev;
 525 #endif
 526                         break;
 527                 case SSB_BUSTYPE_SDIO:
 528 #ifdef CONFIG_SSB_SDIOHOST
 529                         dev->parent = &bus->host_sdio->dev;
 530 #endif
 531                         break;
 532                 case SSB_BUSTYPE_SSB:
 533                         dev->dma_mask = &dev->coherent_dma_mask;
 534                         sdev->dma_dev = dev;
 535                         break;
 536                 }
 537
 538                 sdev->dev = dev;
 539                 err = device_register(dev);
 540                 if (err) {
 541                         ssb_printk(KERN_ERR PFX
 542                                    "Could not register %s\n",
 543                                    dev_name(dev));
 544                         /* Set dev to NULL to not unregister
 545                          * dev on error unwinding. */
 546                         sdev->dev = NULL;
 547                         kfree(devwrap);
 548                         goto error;
 549                 }
 550                 dev_idx++;
 551         }
 552
 553         return 0;
 554 error:
 555         /* Unwind the already registered devices. */
 556         ssb_devices_unregister(bus);
 557         return err;
 558 }
 559
 560 /* Needs ssb_buses_lock() */
 561 static int __devinit ssb_attach_queued_buses(void)
 562 {
 563         struct ssb_bus *bus, *n;
 564         int err = 0;
 565         int drop_them_all = 0;
 566
 567         list_for_each_entry_safe(bus, n, &attach_queue, list) {
 568                 if (drop_them_all) {
 569                         list_del(&bus->list);
 570                         continue;
 571                 }
 572                 /* Can't init the PCIcore in ssb_bus_register(), as that
 573                  * is too early in boot for embedded systems
 574                  * (no udelay() available). So do it here in attach stage.
 575                  */
 576                 err = ssb_bus_powerup(bus, 0);
 577                 if (err)
 578                         goto error;
 579                 ssb_pcicore_init(&bus->pcicore);
 580                 ssb_bus_may_powerdown(bus);
 581
 582                 err = ssb_devices_register(bus);
 583 error:
 584                 if (err) {
 585                         drop_them_all = 1;
 586                         list_del(&bus->list);
 587                         continue;
 588                 }
 589                 list_move_tail(&bus->list, &buses);
 590         }
 591
 592         return err;
 593 }
 594
 595 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
 596 {
 597         struct ssb_bus *bus = dev->bus;
 598
 599         offset += dev->core_index * SSB_CORE_SIZE;
 600         return readb(bus->mmio + offset);
 601 }
 602
 603 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
 604 {
 605         struct ssb_bus *bus = dev->bus;
 606
 607         offset += dev->core_index * SSB_CORE_SIZE;
 608         return readw(bus->mmio + offset);
 609 }
 610
 611 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
 612 {
 613         struct ssb_bus *bus = dev->bus;
 614
 615         offset += dev->core_index * SSB_CORE_SIZE;
 616         return readl(bus->mmio + offset);
 617 }
 618
 619 #ifdef CONFIG_SSB_BLOCKIO
 620 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
 621                                size_t count, u16 offset, u8 reg_width)
 622 {
 623         struct ssb_bus *bus = dev->bus;
 624         void __iomem *addr;
 625
 626         offset += dev->core_index * SSB_CORE_SIZE;
 627         addr = bus->mmio + offset;
 628
 629         switch (reg_width) {
 630         case sizeof(u8): {
 631                 u8 *buf = buffer;
 632
 633                 while (count) {
 634                         *buf = __raw_readb(addr);
 635                         buf++;
 636                         count--;
 637                 }
 638                 break;
 639         }
 640         case sizeof(u16): {
 641                 __le16 *buf = buffer;
 642
 643                 SSB_WARN_ON(count & 1);
 644                 while (count) {
 645                         *buf = (__force __le16)__raw_readw(addr);
 646                         buf++;
 647                         count -= 2;
 648                 }
 649                 break;
 650         }
 651         case sizeof(u32): {
 652                 __le32 *buf = buffer;
 653
 654                 SSB_WARN_ON(count & 3);
 655                 while (count) {
 656                         *buf = (__force __le32)__raw_readl(addr);
 657                         buf++;
 658                         count -= 4;
 659                 }
 660                 break;
 661         }
 662         default:
 663                 SSB_WARN_ON(1);
 664         }
 665 }
 666 #endif /* CONFIG_SSB_BLOCKIO */
 667
 668 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 669 {
 670         struct ssb_bus *bus = dev->bus;
 671
 672         offset += dev->core_index * SSB_CORE_SIZE;
 673         writeb(value, bus->mmio + offset);
 674 }
 675
 676 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 677 {
 678         struct ssb_bus *bus = dev->bus;
 679
 680         offset += dev->core_index * SSB_CORE_SIZE;
 681         writew(value, bus->mmio + offset);
 682 }
 683
 684 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 685 {
 686         struct ssb_bus *bus = dev->bus;
 687
 688         offset += dev->core_index * SSB_CORE_SIZE;
 689         writel(value, bus->mmio + offset);
 690 }
 691
 692 #ifdef CONFIG_SSB_BLOCKIO
 693 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
 694                                 size_t count, u16 offset, u8 reg_width)
 695 {
 696         struct ssb_bus *bus = dev->bus;
 697         void __iomem *addr;
 698
 699         offset += dev->core_index * SSB_CORE_SIZE;
 700         addr = bus->mmio + offset;
 701
 702         switch (reg_width) {
 703         case sizeof(u8): {
 704                 const u8 *buf = buffer;
 705
 706                 while (count) {
 707                         __raw_writeb(*buf, addr);
 708                         buf++;
 709                         count--;
 710                 }
 711                 break;
 712         }
 713         case sizeof(u16): {
 714                 const __le16 *buf = buffer;
 715
 716                 SSB_WARN_ON(count & 1);
 717                 while (count) {
 718                         __raw_writew((__force u16)(*buf), addr);
 719                         buf++;
 720                         count -= 2;
 721                 }
 722                 break;
 723         }
 724         case sizeof(u32): {
 725                 const __le32 *buf = buffer;
 726
 727                 SSB_WARN_ON(count & 3);
 728                 while (count) {
 729                         __raw_writel((__force u32)(*buf), addr);
 730                         buf++;
 731                         count -= 4;
 732                 }
 733                 break;
 734         }
 735         default:
 736                 SSB_WARN_ON(1);
 737         }
 738 }
 739 #endif /* CONFIG_SSB_BLOCKIO */
 740
 741 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
 742 static const struct ssb_bus_ops ssb_ssb_ops = {
 743         .read8          = ssb_ssb_read8,
 744         .read16         = ssb_ssb_read16,
 745         .read32         = ssb_ssb_read32,
 746         .write8         = ssb_ssb_write8,
 747         .write16        = ssb_ssb_write16,
 748         .write32        = ssb_ssb_write32,
 749 #ifdef CONFIG_SSB_BLOCKIO
 750         .block_read     = ssb_ssb_block_read,
 751         .block_write    = ssb_ssb_block_write,
 752 #endif
 753 };
 754
 755 static int ssb_fetch_invariants(struct ssb_bus *bus,
 756                                 ssb_invariants_func_t get_invariants)
 757 {
 758         struct ssb_init_invariants iv;
 759         int err;
 760
 761         memset(&iv, 0, sizeof(iv));
 762         err = get_invariants(bus, &iv);
 763         if (err)
 764                 goto out;
 765         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
 766         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
 767         bus->has_cardbus_slot = iv.has_cardbus_slot;
 768 out:
 769         return err;
 770 }
 771
 772 static int __devinit ssb_bus_register(struct ssb_bus *bus,
 773                                       ssb_invariants_func_t get_invariants,
 774                                       unsigned long baseaddr)
 775 {
 776         int err;
 777
 778         spin_lock_init(&bus->bar_lock);
 779         INIT_LIST_HEAD(&bus->list);
 780 #ifdef CONFIG_SSB_EMBEDDED
 781         spin_lock_init(&bus->gpio_lock);
 782 #endif
 783
 784         /* Powerup the bus */
 785         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
 786         if (err)
 787                 goto out;
 788
 789         /* Init SDIO-host device (if any), before the scan */
 790         err = ssb_sdio_init(bus);
 791         if (err)
 792                 goto err_disable_xtal;
 793
 794         ssb_buses_lock();
 795         bus->busnumber = next_busnumber;
 796         /* Scan for devices (cores) */
 797         err = ssb_bus_scan(bus, baseaddr);
 798         if (err)
 799                 goto err_sdio_exit;
 800
 801         /* Init PCI-host device (if any) */
 802         err = ssb_pci_init(bus);
 803         if (err)
 804                 goto err_unmap;
 805         /* Init PCMCIA-host device (if any) */
 806         err = ssb_pcmcia_init(bus);
 807         if (err)
 808                 goto err_pci_exit;
 809
 810         /* Initialize basic system devices (if available) */
 811         err = ssb_bus_powerup(bus, 0);
 812         if (err)
 813                 goto err_pcmcia_exit;
 814         ssb_chipcommon_init(&bus->chipco);
 815         ssb_mipscore_init(&bus->mipscore);
 816         err = ssb_fetch_invariants(bus, get_invariants);
 817         if (err) {
 818                 ssb_bus_may_powerdown(bus);
 819                 goto err_pcmcia_exit;
 820         }
 821         ssb_bus_may_powerdown(bus);
 822
 823         /* Queue it for attach.
 824          * See the comment at the ssb_is_early_boot definition. */
 825         list_add_tail(&bus->list, &attach_queue);
 826         if (!ssb_is_early_boot) {
 827                 /* This is not early boot, so we must attach the bus now */
 828                 err = ssb_attach_queued_buses();
 829                 if (err)
 830                         goto err_dequeue;
 831         }
 832         next_busnumber++;
 833         ssb_buses_unlock();
 834
 835 out:
 836         return err;
 837
 838 err_dequeue:
 839         list_del(&bus->list);
 840 err_pcmcia_exit:
 841         ssb_pcmcia_exit(bus);
 842 err_pci_exit:
 843         ssb_pci_exit(bus);
 844 err_unmap:
 845         ssb_iounmap(bus);
 846 err_sdio_exit:
 847         ssb_sdio_exit(bus);
 848 err_disable_xtal:
 849         ssb_buses_unlock();
 850         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 851         return err;
 852 }
 853
 854 #ifdef CONFIG_SSB_PCIHOST
 855 int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
 856                                       struct pci_dev *host_pci)
 857 {
 858         int err;
 859
 860         bus->bustype = SSB_BUSTYPE_PCI;
 861         bus->host_pci = host_pci;
 862         bus->ops = &ssb_pci_ops;
 863
 864         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 865         if (!err) {
 866                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 867                            "PCI device %s\n", dev_name(&host_pci->dev));
 868         } else {
 869                 ssb_printk(KERN_ERR PFX "Failed to register PCI version"
 870                            " of SSB with error %d\n", err);
 871         }
 872
 873         return err;
 874 }
 875 EXPORT_SYMBOL(ssb_bus_pcibus_register);
 876 #endif /* CONFIG_SSB_PCIHOST */
 877
 878 #ifdef CONFIG_SSB_PCMCIAHOST
 879 int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 880                                          struct pcmcia_device *pcmcia_dev,
 881                                          unsigned long baseaddr)
 882 {
 883         int err;
 884
 885         bus->bustype = SSB_BUSTYPE_PCMCIA;
 886         bus->host_pcmcia = pcmcia_dev;
 887         bus->ops = &ssb_pcmcia_ops;
 888
 889         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 890         if (!err) {
 891                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 892                            "PCMCIA device %s\n", pcmcia_dev->devname);
 893         }
 894
 895         return err;
 896 }
 897 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
 898 #endif /* CONFIG_SSB_PCMCIAHOST */
 899
 900 #ifdef CONFIG_SSB_SDIOHOST
 901 int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
 902                                        struct sdio_func *func,
 903                                        unsigned int quirks)
 904 {
 905         int err;
 906
 907         bus->bustype = SSB_BUSTYPE_SDIO;
 908         bus->host_sdio = func;
 909         bus->ops = &ssb_sdio_ops;
 910         bus->quirks = quirks;
 911
 912         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
 913         if (!err) {
 914                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 915                            "SDIO device %s\n", sdio_func_id(func));
 916         }
 917
 918         return err;
 919 }
 920 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
 921 #endif /* CONFIG_SSB_PCMCIAHOST */
 922
 923 int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
 924                                       unsigned long baseaddr,
 925                                       ssb_invariants_func_t get_invariants)
 926 {
 927         int err;
 928
 929         bus->bustype = SSB_BUSTYPE_SSB;
 930         bus->ops = &ssb_ssb_ops;
 931
 932         err = ssb_bus_register(bus, get_invariants, baseaddr);
 933         if (!err) {
 934                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 935                            "address 0x%08lX\n", baseaddr);
 936         }
 937
 938         return err;
 939 }
 940
 941 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
 942 {
 943         drv->drv.name = drv->name;
 944         drv->drv.bus = &ssb_bustype;
 945         drv->drv.owner = owner;
 946
 947         return driver_register(&drv->drv);
 948 }
 949 EXPORT_SYMBOL(__ssb_driver_register);
 950
 951 void ssb_driver_unregister(struct ssb_driver *drv)
 952 {
 953         driver_unregister(&drv->drv);
 954 }
 955 EXPORT_SYMBOL(ssb_driver_unregister);
 956
 957 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
 958 {
 959         struct ssb_bus *bus = dev->bus;
 960         struct ssb_device *ent;
 961         int i;
 962
 963         for (i = 0; i < bus->nr_devices; i++) {
 964                 ent = &(bus->devices[i]);
 965                 if (ent->id.vendor != dev->id.vendor)
 966                         continue;
 967                 if (ent->id.coreid != dev->id.coreid)
 968                         continue;
 969
 970                 ent->devtypedata = data;
 971         }
 972 }
 973 EXPORT_SYMBOL(ssb_set_devtypedata);
 974
 975 static u32 clkfactor_f6_resolve(u32 v)
 976 {
 977         /* map the magic values */
 978         switch (v) {
 979         case SSB_CHIPCO_CLK_F6_2:
 980                 return 2;
 981         case SSB_CHIPCO_CLK_F6_3:
 982                 return 3;
 983         case SSB_CHIPCO_CLK_F6_4:
 984                 return 4;
 985         case SSB_CHIPCO_CLK_F6_5:
 986                 return 5;
 987         case SSB_CHIPCO_CLK_F6_6:
 988                 return 6;
 989         case SSB_CHIPCO_CLK_F6_7:
 990                 return 7;
 991         }
 992         return 0;
 993 }
 994
 995 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
 996 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
 997 {
 998         u32 n1, n2, clock, m1, m2, m3, mc;
 999
1000         n1 = (n & SSB_CHIPCO_CLK_N1);
1001         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
1002
1003         switch (plltype) {
1004         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
1005                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
1006                         return SSB_CHIPCO_CLK_T6_M1;
1007                 return SSB_CHIPCO_CLK_T6_M0;
1008         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1009         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1010         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1011         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1012                 n1 = clkfactor_f6_resolve(n1);
1013                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
1014                 break;
1015         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
1016                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
1017                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
1018                 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
1019                 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
1020                 break;
1021         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
1022                 return 100000000;
1023         default:
1024                 SSB_WARN_ON(1);
1025         }
1026
1027         switch (plltype) {
1028         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1029         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1030                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
1031                 break;
1032         default:
1033                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
1034         }
1035         if (!clock)
1036                 return 0;
1037
1038         m1 = (m & SSB_CHIPCO_CLK_M1);
1039         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
1040         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
1041         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
1042
1043         switch (plltype) {
1044         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1045         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1046         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1047         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1048                 m1 = clkfactor_f6_resolve(m1);
1049                 if ((plltype == SSB_PLLTYPE_1) ||
1050                     (plltype == SSB_PLLTYPE_3))
1051                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
1052                 else
1053                         m2 = clkfactor_f6_resolve(m2);
1054                 m3 = clkfactor_f6_resolve(m3);
1055
1056                 switch (mc) {
1057                 case SSB_CHIPCO_CLK_MC_BYPASS:
1058                         return clock;
1059                 case SSB_CHIPCO_CLK_MC_M1:
1060                         return (clock / m1);
1061                 case SSB_CHIPCO_CLK_MC_M1M2:
1062                         return (clock / (m1 * m2));
1063                 case SSB_CHIPCO_CLK_MC_M1M2M3:
1064                         return (clock / (m1 * m2 * m3));
1065                 case SSB_CHIPCO_CLK_MC_M1M3:
1066                         return (clock / (m1 * m3));
1067                 }
1068                 return 0;
1069         case SSB_PLLTYPE_2:
1070                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
1071                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
1072                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
1073                 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
1074                 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
1075                 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
1076
1077                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
1078                         clock /= m1;
1079                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
1080                         clock /= m2;
1081                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
1082                         clock /= m3;
1083                 return clock;
1084         default:
1085                 SSB_WARN_ON(1);
1086         }
1087         return 0;
1088 }
1089
1090 /* Get the current speed the backplane is running at */
1091 u32 ssb_clockspeed(struct ssb_bus *bus)
1092 {
1093         u32 rate;
1094         u32 plltype;
1095         u32 clkctl_n, clkctl_m;
1096
1097         if (ssb_extif_available(&bus->extif))
1098                 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1099                                            &clkctl_n, &clkctl_m);
1100         else if (bus->chipco.dev)
1101                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1102                                             &clkctl_n, &clkctl_m);
1103         else
1104                 return 0;
1105
1106         if (bus->chip_id == 0x5365) {
1107                 rate = 100000000;
1108         } else {
1109                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1110                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1111                         rate /= 2;
1112         }
1113
1114         return rate;
1115 }
1116 EXPORT_SYMBOL(ssb_clockspeed);
1117
1118 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1119 {
1120         u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1121
1122         /* The REJECT bit seems to be different for Backplane rev 2.3 */
1123         switch (rev) {
1124         case SSB_IDLOW_SSBREV_22:
1125         case SSB_IDLOW_SSBREV_24:
1126         case SSB_IDLOW_SSBREV_26:
1127                 return SSB_TMSLOW_REJECT;
1128         case SSB_IDLOW_SSBREV_23:
1129                 return SSB_TMSLOW_REJECT_23;
1130         case SSB_IDLOW_SSBREV_25:     /* TODO - find the proper REJECT bit */
1131         case SSB_IDLOW_SSBREV_27:     /* same here */
1132                 return SSB_TMSLOW_REJECT;       /* this is a guess */
1133         default:
1134                 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1135                 WARN_ON(1);
1136         }
1137         return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1138 }
1139
1140 int ssb_device_is_enabled(struct ssb_device *dev)
1141 {
1142         u32 val;
1143         u32 reject;
1144
1145         reject = ssb_tmslow_reject_bitmask(dev);
1146         val = ssb_read32(dev, SSB_TMSLOW);
1147         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1148
1149         return (val == SSB_TMSLOW_CLOCK);
1150 }
1151 EXPORT_SYMBOL(ssb_device_is_enabled);
1152
1153 static void ssb_flush_tmslow(struct ssb_device *dev)
1154 {
1155         /* Make _really_ sure the device has finished the TMSLOW
1156          * register write transaction, as we risk running into
1157          * a machine check exception otherwise.
1158          * Do this by reading the register back to commit the
1159          * PCI write and delay an additional usec for the device
1160          * to react to the change. */
1161         ssb_read32(dev, SSB_TMSLOW);
1162         udelay(1);
1163 }
1164
1165 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1166 {
1167         u32 val;
1168
1169         ssb_device_disable(dev, core_specific_flags);
1170         ssb_write32(dev, SSB_TMSLOW,
1171                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1172                     SSB_TMSLOW_FGC | core_specific_flags);
1173         ssb_flush_tmslow(dev);
1174
1175         /* Clear SERR if set. This is a hw bug workaround. */
1176         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1177                 ssb_write32(dev, SSB_TMSHIGH, 0);
1178
1179         val = ssb_read32(dev, SSB_IMSTATE);
1180         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1181                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1182                 ssb_write32(dev, SSB_IMSTATE, val);
1183         }
1184
1185         ssb_write32(dev, SSB_TMSLOW,
1186                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1187                     core_specific_flags);
1188         ssb_flush_tmslow(dev);
1189
1190         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1191                     core_specific_flags);
1192         ssb_flush_tmslow(dev);
1193 }
1194 EXPORT_SYMBOL(ssb_device_enable);
1195
1196 /* Wait for bitmask in a register to get set or cleared.
1197  * timeout is in units of ten-microseconds */
1198 static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1199                          int timeout, int set)
1200 {
1201         int i;
1202         u32 val;
1203
1204         for (i = 0; i < timeout; i++) {
1205                 val = ssb_read32(dev, reg);
1206                 if (set) {
1207                         if ((val & bitmask) == bitmask)
1208                                 return 0;
1209                 } else {
1210                         if (!(val & bitmask))
1211                                 return 0;
1212                 }
1213                 udelay(10);
1214         }
1215         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1216                             "register %04X to %s.\n",
1217                bitmask, reg, (set ? "set" : "clear"));
1218
1219         return -ETIMEDOUT;
1220 }
1221
1222 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1223 {
1224         u32 reject, val;
1225
1226         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1227                 return;
1228
1229         reject = ssb_tmslow_reject_bitmask(dev);
1230
1231         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1232                 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1233                 ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1234                 ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1235
1236                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1237                         val = ssb_read32(dev, SSB_IMSTATE);
1238                         val |= SSB_IMSTATE_REJECT;
1239                         ssb_write32(dev, SSB_IMSTATE, val);
1240                         ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1241                                       0);
1242                 }
1243
1244                 ssb_write32(dev, SSB_TMSLOW,
1245                         SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1246                         reject | SSB_TMSLOW_RESET |
1247                         core_specific_flags);
1248                 ssb_flush_tmslow(dev);
1249
1250                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1251                         val = ssb_read32(dev, SSB_IMSTATE);
1252                         val &= ~SSB_IMSTATE_REJECT;
1253                         ssb_write32(dev, SSB_IMSTATE, val);
1254                 }
1255         }
1256
1257         ssb_write32(dev, SSB_TMSLOW,
1258                     reject | SSB_TMSLOW_RESET |
1259                     core_specific_flags);
1260         ssb_flush_tmslow(dev);
1261 }
1262 EXPORT_SYMBOL(ssb_device_disable);
1263
1264 /* Some chipsets need routing known for PCIe and 64-bit DMA */
1265 static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
1266 {
1267         u16 chip_id = dev->bus->chip_id;
1268
1269         if (dev->id.coreid == SSB_DEV_80211) {
1270                 return (chip_id == 0x4322 || chip_id == 43221 ||
1271                         chip_id == 43231 || chip_id == 43222);
1272         }
1273
1274         return 0;
1275 }
1276
1277 u32 ssb_dma_translation(struct ssb_device *dev)
1278 {
1279         switch (dev->bus->bustype) {
1280         case SSB_BUSTYPE_SSB:
1281                 return 0;
1282         case SSB_BUSTYPE_PCI:
1283                 if (pci_is_pcie(dev->bus->host_pci) &&
1284                     ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
1285                         return SSB_PCIE_DMA_H32;
1286                 } else {
1287                         if (ssb_dma_translation_special_bit(dev))
1288                                 return SSB_PCIE_DMA_H32;
1289                         else
1290                                 return SSB_PCI_DMA;
1291                 }
1292         default:
1293                 __ssb_dma_not_implemented(dev);
1294         }
1295         return 0;
1296 }
1297 EXPORT_SYMBOL(ssb_dma_translation);
1298
1299 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1300 {
1301         struct ssb_chipcommon *cc;
1302         int err = 0;
1303
1304         /* On buses where more than one core may be working
1305          * at a time, we must not powerdown stuff if there are
1306          * still cores that may want to run. */
1307         if (bus->bustype == SSB_BUSTYPE_SSB)
1308                 goto out;
1309
1310         cc = &bus->chipco;
1311
1312         if (!cc->dev)
1313                 goto out;
1314         if (cc->dev->id.revision < 5)
1315                 goto out;
1316
1317         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1318         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1319         if (err)
1320                 goto error;
1321 out:
1322 #ifdef CONFIG_SSB_DEBUG
1323         bus->powered_up = 0;
1324 #endif
1325         return err;
1326 error:
1327         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1328         goto out;
1329 }
1330 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1331
1332 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1333 {
1334         int err;
1335         enum ssb_clkmode mode;
1336
1337         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1338         if (err)
1339                 goto error;
1340
1341 #ifdef CONFIG_SSB_DEBUG
1342         bus->powered_up = 1;
1343 #endif
1344
1345         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1346         ssb_chipco_set_clockmode(&bus->chipco, mode);
1347
1348         return 0;
1349 error:
1350         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1351         return err;
1352 }
1353 EXPORT_SYMBOL(ssb_bus_powerup);
1354
1355 static void ssb_broadcast_value(struct ssb_device *dev,
1356                                 u32 address, u32 data)
1357 {
1358 #ifdef CONFIG_SSB_DRIVER_PCICORE
1359         /* This is used for both, PCI and ChipCommon core, so be careful. */
1360         BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1361         BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1362 #endif
1363
1364         ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1365         ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1366         ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1367         ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1368 }
1369
1370 void ssb_commit_settings(struct ssb_bus *bus)
1371 {
1372         struct ssb_device *dev;
1373
1374 #ifdef CONFIG_SSB_DRIVER_PCICORE
1375         dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1376 #else
1377         dev = bus->chipco.dev;
1378 #endif
1379         if (WARN_ON(!dev))
1380                 return;
1381         /* This forces an update of the cached registers. */
1382         ssb_broadcast_value(dev, 0xFD8, 0);
1383 }
1384 EXPORT_SYMBOL(ssb_commit_settings);
1385
1386 u32 ssb_admatch_base(u32 adm)
1387 {
1388         u32 base = 0;
1389
1390         switch (adm & SSB_ADM_TYPE) {
1391         case SSB_ADM_TYPE0:
1392                 base = (adm & SSB_ADM_BASE0);
1393                 break;
1394         case SSB_ADM_TYPE1:
1395                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1396                 base = (adm & SSB_ADM_BASE1);
1397                 break;
1398         case SSB_ADM_TYPE2:
1399                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1400                 base = (adm & SSB_ADM_BASE2);
1401                 break;
1402         default:
1403                 SSB_WARN_ON(1);
1404         }
1405
1406         return base;
1407 }
1408 EXPORT_SYMBOL(ssb_admatch_base);
1409
1410 u32 ssb_admatch_size(u32 adm)
1411 {
1412         u32 size = 0;
1413
1414         switch (adm & SSB_ADM_TYPE) {
1415         case SSB_ADM_TYPE0:
1416                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1417                 break;
1418         case SSB_ADM_TYPE1:
1419                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1420                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1421                 break;
1422         case SSB_ADM_TYPE2:
1423                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1424                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1425                 break;
1426         default:
1427                 SSB_WARN_ON(1);
1428         }
1429         size = (1 << (size + 1));
1430
1431         return size;
1432 }
1433 EXPORT_SYMBOL(ssb_admatch_size);
1434
1435 static int __init ssb_modinit(void)
1436 {
1437         int err;
1438
1439         /* See the comment at the ssb_is_early_boot definition */
1440         ssb_is_early_boot = 0;
1441         err = bus_register(&ssb_bustype);
1442         if (err)
1443                 return err;
1444
1445         /* Maybe we already registered some buses at early boot.
1446          * Check for this and attach them
1447          */
1448         ssb_buses_lock();
1449         err = ssb_attach_queued_buses();
1450         ssb_buses_unlock();
1451         if (err) {
1452                 bus_unregister(&ssb_bustype);
1453                 goto out;
1454         }
1455
1456         err = b43_pci_ssb_bridge_init();
1457         if (err) {
1458                 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1459                            "initialization failed\n");
1460                 /* don't fail SSB init because of this */
1461                 err = 0;
1462         }
1463         err = ssb_gige_init();
1464         if (err) {
1465                 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1466                            "driver initialization failed\n");
1467                 /* don't fail SSB init because of this */
1468                 err = 0;
1469         }
1470 out:
1471         return err;
1472 }
1473 /* ssb must be initialized after PCI but before the ssb drivers.
1474  * That means we must use some initcall between subsys_initcall
1475  * and device_initcall. */
1476 fs_initcall(ssb_modinit);
1477
1478 static void __exit ssb_modexit(void)
1479 {
1480         ssb_gige_exit();
1481         b43_pci_ssb_bridge_exit();
1482         bus_unregister(&ssb_bustype);
1483 }
1484 module_exit(ssb_modexit)