drivers/ssb/main.c

   1 /*
   2  * Sonics Silicon Backplane
   3  * Subsystem core
   4  *
   5  * Copyright 2005, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include "ssb_private.h"
  12
  13 #include <linux/delay.h>
  14 #include <linux/io.h>
  15 #include <linux/ssb/ssb.h>
  16 #include <linux/ssb/ssb_regs.h>
  17 #include <linux/ssb/ssb_driver_gige.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/pci.h>
  20 #include <linux/mmc/sdio_func.h>
  21 #include <linux/slab.h>
  22
  23 #include <pcmcia/cistpl.h>
  24 #include <pcmcia/ds.h>
  25
  26
  27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
  28 MODULE_LICENSE("GPL");
  29
  30
  31 /* Temporary list of yet-to-be-attached buses */
  32 static LIST_HEAD(attach_queue);
  33 /* List if running buses */
  34 static LIST_HEAD(buses);
  35 /* Software ID counter */
  36 static unsigned int next_busnumber;
  37 /* buses_mutes locks the two buslists and the next_busnumber.
  38  * Don't lock this directly, but use ssb_buses_[un]lock() below. */
  39 static DEFINE_MUTEX(buses_mutex);
  40
  41 /* There are differences in the codeflow, if the bus is
  42  * initialized from early boot, as various needed services
  43  * are not available early. This is a mechanism to delay
  44  * these initializations to after early boot has finished.
  45  * It's also used to avoid mutex locking, as that's not
  46  * available and needed early. */
  47 static bool ssb_is_early_boot = 1;
  48
  49 static void ssb_buses_lock(void);
  50 static void ssb_buses_unlock(void);
  51
  52
  53 #ifdef CONFIG_SSB_PCIHOST
  54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
  55 {
  56         struct ssb_bus *bus;
  57
  58         ssb_buses_lock();
  59         list_for_each_entry(bus, &buses, list) {
  60                 if (bus->bustype == SSB_BUSTYPE_PCI &&
  61                     bus->host_pci == pdev)
  62                         goto found;
  63         }
  64         bus = NULL;
  65 found:
  66         ssb_buses_unlock();
  67
  68         return bus;
  69 }
  70 #endif /* CONFIG_SSB_PCIHOST */
  71
  72 #ifdef CONFIG_SSB_PCMCIAHOST
  73 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
  74 {
  75         struct ssb_bus *bus;
  76
  77         ssb_buses_lock();
  78         list_for_each_entry(bus, &buses, list) {
  79                 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
  80                     bus->host_pcmcia == pdev)
  81                         goto found;
  82         }
  83         bus = NULL;
  84 found:
  85         ssb_buses_unlock();
  86
  87         return bus;
  88 }
  89 #endif /* CONFIG_SSB_PCMCIAHOST */
  90
  91 #ifdef CONFIG_SSB_SDIOHOST
  92 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
  93 {
  94         struct ssb_bus *bus;
  95
  96         ssb_buses_lock();
  97         list_for_each_entry(bus, &buses, list) {
  98                 if (bus->bustype == SSB_BUSTYPE_SDIO &&
  99                     bus->host_sdio == func)
 100                         goto found;
 101         }
 102         bus = NULL;
 103 found:
 104         ssb_buses_unlock();
 105
 106         return bus;
 107 }
 108 #endif /* CONFIG_SSB_SDIOHOST */
 109
 110 int ssb_for_each_bus_call(unsigned long data,
 111                           int (*func)(struct ssb_bus *bus, unsigned long data))
 112 {
 113         struct ssb_bus *bus;
 114         int res;
 115
 116         ssb_buses_lock();
 117         list_for_each_entry(bus, &buses, list) {
 118                 res = func(bus, data);
 119                 if (res >= 0) {
 120                         ssb_buses_unlock();
 121                         return res;
 122                 }
 123         }
 124         ssb_buses_unlock();
 125
 126         return -ENODEV;
 127 }
 128
 129 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
 130 {
 131         if (dev)
 132                 get_device(dev->dev);
 133         return dev;
 134 }
 135
 136 static void ssb_device_put(struct ssb_device *dev)
 137 {
 138         if (dev)
 139                 put_device(dev->dev);
 140 }
 141
 142 static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv)
 143 {
 144         if (drv)
 145                 get_driver(&drv->drv);
 146         return drv;
 147 }
 148
 149 static inline void ssb_driver_put(struct ssb_driver *drv)
 150 {
 151         if (drv)
 152                 put_driver(&drv->drv);
 153 }
 154
 155 static int ssb_device_resume(struct device *dev)
 156 {
 157         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 158         struct ssb_driver *ssb_drv;
 159         int err = 0;
 160
 161         if (dev->driver) {
 162                 ssb_drv = drv_to_ssb_drv(dev->driver);
 163                 if (ssb_drv && ssb_drv->resume)
 164                         err = ssb_drv->resume(ssb_dev);
 165                 if (err)
 166                         goto out;
 167         }
 168 out:
 169         return err;
 170 }
 171
 172 static int ssb_device_suspend(struct device *dev, pm_message_t state)
 173 {
 174         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 175         struct ssb_driver *ssb_drv;
 176         int err = 0;
 177
 178         if (dev->driver) {
 179                 ssb_drv = drv_to_ssb_drv(dev->driver);
 180                 if (ssb_drv && ssb_drv->suspend)
 181                         err = ssb_drv->suspend(ssb_dev, state);
 182                 if (err)
 183                         goto out;
 184         }
 185 out:
 186         return err;
 187 }
 188
 189 int ssb_bus_resume(struct ssb_bus *bus)
 190 {
 191         int err;
 192
 193         /* Reset HW state information in memory, so that HW is
 194          * completely reinitialized. */
 195         bus->mapped_device = NULL;
 196 #ifdef CONFIG_SSB_DRIVER_PCICORE
 197         bus->pcicore.setup_done = 0;
 198 #endif
 199
 200         err = ssb_bus_powerup(bus, 0);
 201         if (err)
 202                 return err;
 203         err = ssb_pcmcia_hardware_setup(bus);
 204         if (err) {
 205                 ssb_bus_may_powerdown(bus);
 206                 return err;
 207         }
 208         ssb_chipco_resume(&bus->chipco);
 209         ssb_bus_may_powerdown(bus);
 210
 211         return 0;
 212 }
 213 EXPORT_SYMBOL(ssb_bus_resume);
 214
 215 int ssb_bus_suspend(struct ssb_bus *bus)
 216 {
 217         ssb_chipco_suspend(&bus->chipco);
 218         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 219
 220         return 0;
 221 }
 222 EXPORT_SYMBOL(ssb_bus_suspend);
 223
 224 #ifdef CONFIG_SSB_SPROM
 225 /** ssb_devices_freeze - Freeze all devices on the bus.
 226  *
 227  * After freezing no device driver will be handling a device
 228  * on this bus anymore. ssb_devices_thaw() must be called after
 229  * a successful freeze to reactivate the devices.
 230  *
 231  * @bus: The bus.
 232  * @ctx: Context structure. Pass this to ssb_devices_thaw().
 233  */
 234 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
 235 {
 236         struct ssb_device *sdev;
 237         struct ssb_driver *sdrv;
 238         unsigned int i;
 239
 240         memset(ctx, 0, sizeof(*ctx));
 241         ctx->bus = bus;
 242         SSB_WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
 243
 244         for (i = 0; i < bus->nr_devices; i++) {
 245                 sdev = ssb_device_get(&bus->devices[i]);
 246
 247                 if (!sdev->dev || !sdev->dev->driver ||
 248                     !device_is_registered(sdev->dev)) {
 249                         ssb_device_put(sdev);
 250                         continue;
 251                 }
 252                 sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver));
 253                 if (!sdrv || SSB_WARN_ON(!sdrv->remove)) {
 254                         ssb_device_put(sdev);
 255                         continue;
 256                 }
 257                 sdrv->remove(sdev);
 258                 ctx->device_frozen[i] = 1;
 259         }
 260
 261         return 0;
 262 }
 263
 264 /** ssb_devices_thaw - Unfreeze all devices on the bus.
 265  *
 266  * This will re-attach the device drivers and re-init the devices.
 267  *
 268  * @ctx: The context structure from ssb_devices_freeze()
 269  */
 270 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
 271 {
 272         struct ssb_bus *bus = ctx->bus;
 273         struct ssb_device *sdev;
 274         struct ssb_driver *sdrv;
 275         unsigned int i;
 276         int err, result = 0;
 277
 278         for (i = 0; i < bus->nr_devices; i++) {
 279                 if (!ctx->device_frozen[i])
 280                         continue;
 281                 sdev = &bus->devices[i];
 282
 283                 if (SSB_WARN_ON(!sdev->dev || !sdev->dev->driver))
 284                         continue;
 285                 sdrv = drv_to_ssb_drv(sdev->dev->driver);
 286                 if (SSB_WARN_ON(!sdrv || !sdrv->probe))
 287                         continue;
 288
 289                 err = sdrv->probe(sdev, &sdev->id);
 290                 if (err) {
 291                         ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
 292                                    dev_name(sdev->dev));
 293                         result = err;
 294                 }
 295                 ssb_driver_put(sdrv);
 296                 ssb_device_put(sdev);
 297         }
 298
 299         return result;
 300 }
 301 #endif /* CONFIG_SSB_SPROM */
 302
 303 static void ssb_device_shutdown(struct device *dev)
 304 {
 305         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 306         struct ssb_driver *ssb_drv;
 307
 308         if (!dev->driver)
 309                 return;
 310         ssb_drv = drv_to_ssb_drv(dev->driver);
 311         if (ssb_drv && ssb_drv->shutdown)
 312                 ssb_drv->shutdown(ssb_dev);
 313 }
 314
 315 static int ssb_device_remove(struct device *dev)
 316 {
 317         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 318         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 319
 320         if (ssb_drv && ssb_drv->remove)
 321                 ssb_drv->remove(ssb_dev);
 322         ssb_device_put(ssb_dev);
 323
 324         return 0;
 325 }
 326
 327 static int ssb_device_probe(struct device *dev)
 328 {
 329         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 330         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 331         int err = 0;
 332
 333         ssb_device_get(ssb_dev);
 334         if (ssb_drv && ssb_drv->probe)
 335                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
 336         if (err)
 337                 ssb_device_put(ssb_dev);
 338
 339         return err;
 340 }
 341
 342 static int ssb_match_devid(const struct ssb_device_id *tabid,
 343                            const struct ssb_device_id *devid)
 344 {
 345         if ((tabid->vendor != devid->vendor) &&
 346             tabid->vendor != SSB_ANY_VENDOR)
 347                 return 0;
 348         if ((tabid->coreid != devid->coreid) &&
 349             tabid->coreid != SSB_ANY_ID)
 350                 return 0;
 351         if ((tabid->revision != devid->revision) &&
 352             tabid->revision != SSB_ANY_REV)
 353                 return 0;
 354         return 1;
 355 }
 356
 357 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
 358 {
 359         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 360         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
 361         const struct ssb_device_id *id;
 362
 363         for (id = ssb_drv->id_table;
 364              id->vendor || id->coreid || id->revision;
 365              id++) {
 366                 if (ssb_match_devid(id, &ssb_dev->id))
 367                         return 1; /* found */
 368         }
 369
 370         return 0;
 371 }
 372
 373 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
 374 {
 375         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 376
 377         if (!dev)
 378                 return -ENODEV;
 379
 380         return add_uevent_var(env,
 381                              "MODALIAS=ssb:v%04Xid%04Xrev%02X",
 382                              ssb_dev->id.vendor, ssb_dev->id.coreid,
 383                              ssb_dev->id.revision);
 384 }
 385
 386 #define ssb_config_attr(attrib, field, format_string) \
 387 static ssize_t \
 388 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
 389 { \
 390         return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
 391 }
 392
 393 ssb_config_attr(core_num, core_index, "%u\n")
 394 ssb_config_attr(coreid, id.coreid, "0x%04x\n")
 395 ssb_config_attr(vendor, id.vendor, "0x%04x\n")
 396 ssb_config_attr(revision, id.revision, "%u\n")
 397 ssb_config_attr(irq, irq, "%u\n")
 398 static ssize_t
 399 name_show(struct device *dev, struct device_attribute *attr, char *buf)
 400 {
 401         return sprintf(buf, "%s\n",
 402                        ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
 403 }
 404
 405 static struct device_attribute ssb_device_attrs[] = {
 406         __ATTR_RO(name),
 407         __ATTR_RO(core_num),
 408         __ATTR_RO(coreid),
 409         __ATTR_RO(vendor),
 410         __ATTR_RO(revision),
 411         __ATTR_RO(irq),
 412         __ATTR_NULL,
 413 };
 414
 415 static struct bus_type ssb_bustype = {
 416         .name           = "ssb",
 417         .match          = ssb_bus_match,
 418         .probe          = ssb_device_probe,
 419         .remove         = ssb_device_remove,
 420         .shutdown       = ssb_device_shutdown,
 421         .suspend        = ssb_device_suspend,
 422         .resume         = ssb_device_resume,
 423         .uevent         = ssb_device_uevent,
 424         .dev_attrs      = ssb_device_attrs,
 425 };
 426
 427 static void ssb_buses_lock(void)
 428 {
 429         /* See the comment at the ssb_is_early_boot definition */
 430         if (!ssb_is_early_boot)
 431                 mutex_lock(&buses_mutex);
 432 }
 433
 434 static void ssb_buses_unlock(void)
 435 {
 436         /* See the comment at the ssb_is_early_boot definition */
 437         if (!ssb_is_early_boot)
 438                 mutex_unlock(&buses_mutex);
 439 }
 440
 441 static void ssb_devices_unregister(struct ssb_bus *bus)
 442 {
 443         struct ssb_device *sdev;
 444         int i;
 445
 446         for (i = bus->nr_devices - 1; i >= 0; i--) {
 447                 sdev = &(bus->devices[i]);
 448                 if (sdev->dev)
 449                         device_unregister(sdev->dev);
 450         }
 451 }
 452
 453 void ssb_bus_unregister(struct ssb_bus *bus)
 454 {
 455         ssb_buses_lock();
 456         ssb_devices_unregister(bus);
 457         list_del(&bus->list);
 458         ssb_buses_unlock();
 459
 460         ssb_pcmcia_exit(bus);
 461         ssb_pci_exit(bus);
 462         ssb_iounmap(bus);
 463 }
 464 EXPORT_SYMBOL(ssb_bus_unregister);
 465
 466 static void ssb_release_dev(struct device *dev)
 467 {
 468         struct __ssb_dev_wrapper *devwrap;
 469
 470         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 471         kfree(devwrap);
 472 }
 473
 474 static int ssb_devices_register(struct ssb_bus *bus)
 475 {
 476         struct ssb_device *sdev;
 477         struct device *dev;
 478         struct __ssb_dev_wrapper *devwrap;
 479         int i, err = 0;
 480         int dev_idx = 0;
 481
 482         for (i = 0; i < bus->nr_devices; i++) {
 483                 sdev = &(bus->devices[i]);
 484
 485                 /* We don't register SSB-system devices to the kernel,
 486                  * as the drivers for them are built into SSB. */
 487                 switch (sdev->id.coreid) {
 488                 case SSB_DEV_CHIPCOMMON:
 489                 case SSB_DEV_PCI:
 490                 case SSB_DEV_PCIE:
 491                 case SSB_DEV_PCMCIA:
 492                 case SSB_DEV_MIPS:
 493                 case SSB_DEV_MIPS_3302:
 494                 case SSB_DEV_EXTIF:
 495                         continue;
 496                 }
 497
 498                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 499                 if (!devwrap) {
 500                         ssb_printk(KERN_ERR PFX
 501                                    "Could not allocate device\n");
 502                         err = -ENOMEM;
 503                         goto error;
 504                 }
 505                 dev = &devwrap->dev;
 506                 devwrap->sdev = sdev;
 507
 508                 dev->release = ssb_release_dev;
 509                 dev->bus = &ssb_bustype;
 510                 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
 511
 512                 switch (bus->bustype) {
 513                 case SSB_BUSTYPE_PCI:
 514 #ifdef CONFIG_SSB_PCIHOST
 515                         sdev->irq = bus->host_pci->irq;
 516                         dev->parent = &bus->host_pci->dev;
 517                         sdev->dma_dev = dev->parent;
 518 #endif
 519                         break;
 520                 case SSB_BUSTYPE_PCMCIA:
 521 #ifdef CONFIG_SSB_PCMCIAHOST
 522                         sdev->irq = bus->host_pcmcia->irq;
 523                         dev->parent = &bus->host_pcmcia->dev;
 524 #endif
 525                         break;
 526                 case SSB_BUSTYPE_SDIO:
 527 #ifdef CONFIG_SSB_SDIOHOST
 528                         dev->parent = &bus->host_sdio->dev;
 529 #endif
 530                         break;
 531                 case SSB_BUSTYPE_SSB:
 532                         dev->dma_mask = &dev->coherent_dma_mask;
 533                         sdev->dma_dev = dev;
 534                         break;
 535                 }
 536
 537                 sdev->dev = dev;
 538                 err = device_register(dev);
 539                 if (err) {
 540                         ssb_printk(KERN_ERR PFX
 541                                    "Could not register %s\n",
 542                                    dev_name(dev));
 543                         /* Set dev to NULL to not unregister
 544                          * dev on error unwinding. */
 545                         sdev->dev = NULL;
 546                         kfree(devwrap);
 547                         goto error;
 548                 }
 549                 dev_idx++;
 550         }
 551
 552         return 0;
 553 error:
 554         /* Unwind the already registered devices. */
 555         ssb_devices_unregister(bus);
 556         return err;
 557 }
 558
 559 /* Needs ssb_buses_lock() */
 560 static int __devinit ssb_attach_queued_buses(void)
 561 {
 562         struct ssb_bus *bus, *n;
 563         int err = 0;
 564         int drop_them_all = 0;
 565
 566         list_for_each_entry_safe(bus, n, &attach_queue, list) {
 567                 if (drop_them_all) {
 568                         list_del(&bus->list);
 569                         continue;
 570                 }
 571                 /* Can't init the PCIcore in ssb_bus_register(), as that
 572                  * is too early in boot for embedded systems
 573                  * (no udelay() available). So do it here in attach stage.
 574                  */
 575                 err = ssb_bus_powerup(bus, 0);
 576                 if (err)
 577                         goto error;
 578                 ssb_pcicore_init(&bus->pcicore);
 579                 ssb_bus_may_powerdown(bus);
 580
 581                 err = ssb_devices_register(bus);
 582 error:
 583                 if (err) {
 584                         drop_them_all = 1;
 585                         list_del(&bus->list);
 586                         continue;
 587                 }
 588                 list_move_tail(&bus->list, &buses);
 589         }
 590
 591         return err;
 592 }
 593
 594 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
 595 {
 596         struct ssb_bus *bus = dev->bus;
 597
 598         offset += dev->core_index * SSB_CORE_SIZE;
 599         return readb(bus->mmio + offset);
 600 }
 601
 602 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
 603 {
 604         struct ssb_bus *bus = dev->bus;
 605
 606         offset += dev->core_index * SSB_CORE_SIZE;
 607         return readw(bus->mmio + offset);
 608 }
 609
 610 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
 611 {
 612         struct ssb_bus *bus = dev->bus;
 613
 614         offset += dev->core_index * SSB_CORE_SIZE;
 615         return readl(bus->mmio + offset);
 616 }
 617
 618 #ifdef CONFIG_SSB_BLOCKIO
 619 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
 620                                size_t count, u16 offset, u8 reg_width)
 621 {
 622         struct ssb_bus *bus = dev->bus;
 623         void __iomem *addr;
 624
 625         offset += dev->core_index * SSB_CORE_SIZE;
 626         addr = bus->mmio + offset;
 627
 628         switch (reg_width) {
 629         case sizeof(u8): {
 630                 u8 *buf = buffer;
 631
 632                 while (count) {
 633                         *buf = __raw_readb(addr);
 634                         buf++;
 635                         count--;
 636                 }
 637                 break;
 638         }
 639         case sizeof(u16): {
 640                 __le16 *buf = buffer;
 641
 642                 SSB_WARN_ON(count & 1);
 643                 while (count) {
 644                         *buf = (__force __le16)__raw_readw(addr);
 645                         buf++;
 646                         count -= 2;
 647                 }
 648                 break;
 649         }
 650         case sizeof(u32): {
 651                 __le32 *buf = buffer;
 652
 653                 SSB_WARN_ON(count & 3);
 654                 while (count) {
 655                         *buf = (__force __le32)__raw_readl(addr);
 656                         buf++;
 657                         count -= 4;
 658                 }
 659                 break;
 660         }
 661         default:
 662                 SSB_WARN_ON(1);
 663         }
 664 }
 665 #endif /* CONFIG_SSB_BLOCKIO */
 666
 667 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 668 {
 669         struct ssb_bus *bus = dev->bus;
 670
 671         offset += dev->core_index * SSB_CORE_SIZE;
 672         writeb(value, bus->mmio + offset);
 673 }
 674
 675 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 676 {
 677         struct ssb_bus *bus = dev->bus;
 678
 679         offset += dev->core_index * SSB_CORE_SIZE;
 680         writew(value, bus->mmio + offset);
 681 }
 682
 683 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 684 {
 685         struct ssb_bus *bus = dev->bus;
 686
 687         offset += dev->core_index * SSB_CORE_SIZE;
 688         writel(value, bus->mmio + offset);
 689 }
 690
 691 #ifdef CONFIG_SSB_BLOCKIO
 692 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
 693                                 size_t count, u16 offset, u8 reg_width)
 694 {
 695         struct ssb_bus *bus = dev->bus;
 696         void __iomem *addr;
 697
 698         offset += dev->core_index * SSB_CORE_SIZE;
 699         addr = bus->mmio + offset;
 700
 701         switch (reg_width) {
 702         case sizeof(u8): {
 703                 const u8 *buf = buffer;
 704
 705                 while (count) {
 706                         __raw_writeb(*buf, addr);
 707                         buf++;
 708                         count--;
 709                 }
 710                 break;
 711         }
 712         case sizeof(u16): {
 713                 const __le16 *buf = buffer;
 714
 715                 SSB_WARN_ON(count & 1);
 716                 while (count) {
 717                         __raw_writew((__force u16)(*buf), addr);
 718                         buf++;
 719                         count -= 2;
 720                 }
 721                 break;
 722         }
 723         case sizeof(u32): {
 724                 const __le32 *buf = buffer;
 725
 726                 SSB_WARN_ON(count & 3);
 727                 while (count) {
 728                         __raw_writel((__force u32)(*buf), addr);
 729                         buf++;
 730                         count -= 4;
 731                 }
 732                 break;
 733         }
 734         default:
 735                 SSB_WARN_ON(1);
 736         }
 737 }
 738 #endif /* CONFIG_SSB_BLOCKIO */
 739
 740 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
 741 static const struct ssb_bus_ops ssb_ssb_ops = {
 742         .read8          = ssb_ssb_read8,
 743         .read16         = ssb_ssb_read16,
 744         .read32         = ssb_ssb_read32,
 745         .write8         = ssb_ssb_write8,
 746         .write16        = ssb_ssb_write16,
 747         .write32        = ssb_ssb_write32,
 748 #ifdef CONFIG_SSB_BLOCKIO
 749         .block_read     = ssb_ssb_block_read,
 750         .block_write    = ssb_ssb_block_write,
 751 #endif
 752 };
 753
 754 static int ssb_fetch_invariants(struct ssb_bus *bus,
 755                                 ssb_invariants_func_t get_invariants)
 756 {
 757         struct ssb_init_invariants iv;
 758         int err;
 759
 760         memset(&iv, 0, sizeof(iv));
 761         err = get_invariants(bus, &iv);
 762         if (err)
 763                 goto out;
 764         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
 765         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
 766         bus->has_cardbus_slot = iv.has_cardbus_slot;
 767 out:
 768         return err;
 769 }
 770
 771 static int __devinit ssb_bus_register(struct ssb_bus *bus,
 772                                       ssb_invariants_func_t get_invariants,
 773                                       unsigned long baseaddr)
 774 {
 775         int err;
 776
 777         spin_lock_init(&bus->bar_lock);
 778         INIT_LIST_HEAD(&bus->list);
 779 #ifdef CONFIG_SSB_EMBEDDED
 780         spin_lock_init(&bus->gpio_lock);
 781 #endif
 782
 783         /* Powerup the bus */
 784         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
 785         if (err)
 786                 goto out;
 787
 788         /* Init SDIO-host device (if any), before the scan */
 789         err = ssb_sdio_init(bus);
 790         if (err)
 791                 goto err_disable_xtal;
 792
 793         ssb_buses_lock();
 794         bus->busnumber = next_busnumber;
 795         /* Scan for devices (cores) */
 796         err = ssb_bus_scan(bus, baseaddr);
 797         if (err)
 798                 goto err_sdio_exit;
 799
 800         /* Init PCI-host device (if any) */
 801         err = ssb_pci_init(bus);
 802         if (err)
 803                 goto err_unmap;
 804         /* Init PCMCIA-host device (if any) */
 805         err = ssb_pcmcia_init(bus);
 806         if (err)
 807                 goto err_pci_exit;
 808
 809         /* Initialize basic system devices (if available) */
 810         err = ssb_bus_powerup(bus, 0);
 811         if (err)
 812                 goto err_pcmcia_exit;
 813         ssb_chipcommon_init(&bus->chipco);
 814         ssb_mipscore_init(&bus->mipscore);
 815         err = ssb_fetch_invariants(bus, get_invariants);
 816         if (err) {
 817                 ssb_bus_may_powerdown(bus);
 818                 goto err_pcmcia_exit;
 819         }
 820         ssb_bus_may_powerdown(bus);
 821
 822         /* Queue it for attach.
 823          * See the comment at the ssb_is_early_boot definition. */
 824         list_add_tail(&bus->list, &attach_queue);
 825         if (!ssb_is_early_boot) {
 826                 /* This is not early boot, so we must attach the bus now */
 827                 err = ssb_attach_queued_buses();
 828                 if (err)
 829                         goto err_dequeue;
 830         }
 831         next_busnumber++;
 832         ssb_buses_unlock();
 833
 834 out:
 835         return err;
 836
 837 err_dequeue:
 838         list_del(&bus->list);
 839 err_pcmcia_exit:
 840         ssb_pcmcia_exit(bus);
 841 err_pci_exit:
 842         ssb_pci_exit(bus);
 843 err_unmap:
 844         ssb_iounmap(bus);
 845 err_sdio_exit:
 846         ssb_sdio_exit(bus);
 847 err_disable_xtal:
 848         ssb_buses_unlock();
 849         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 850         return err;
 851 }
 852
 853 #ifdef CONFIG_SSB_PCIHOST
 854 int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
 855                                       struct pci_dev *host_pci)
 856 {
 857         int err;
 858
 859         bus->bustype = SSB_BUSTYPE_PCI;
 860         bus->host_pci = host_pci;
 861         bus->ops = &ssb_pci_ops;
 862
 863         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 864         if (!err) {
 865                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 866                            "PCI device %s\n", dev_name(&host_pci->dev));
 867         } else {
 868                 ssb_printk(KERN_ERR PFX "Failed to register PCI version"
 869                            " of SSB with error %d\n", err);
 870         }
 871
 872         return err;
 873 }
 874 EXPORT_SYMBOL(ssb_bus_pcibus_register);
 875 #endif /* CONFIG_SSB_PCIHOST */
 876
 877 #ifdef CONFIG_SSB_PCMCIAHOST
 878 int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 879                                          struct pcmcia_device *pcmcia_dev,
 880                                          unsigned long baseaddr)
 881 {
 882         int err;
 883
 884         bus->bustype = SSB_BUSTYPE_PCMCIA;
 885         bus->host_pcmcia = pcmcia_dev;
 886         bus->ops = &ssb_pcmcia_ops;
 887
 888         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 889         if (!err) {
 890                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 891                            "PCMCIA device %s\n", pcmcia_dev->devname);
 892         }
 893
 894         return err;
 895 }
 896 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
 897 #endif /* CONFIG_SSB_PCMCIAHOST */
 898
 899 #ifdef CONFIG_SSB_SDIOHOST
 900 int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
 901                                        struct sdio_func *func,
 902                                        unsigned int quirks)
 903 {
 904         int err;
 905
 906         bus->bustype = SSB_BUSTYPE_SDIO;
 907         bus->host_sdio = func;
 908         bus->ops = &ssb_sdio_ops;
 909         bus->quirks = quirks;
 910
 911         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
 912         if (!err) {
 913                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 914                            "SDIO device %s\n", sdio_func_id(func));
 915         }
 916
 917         return err;
 918 }
 919 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
 920 #endif /* CONFIG_SSB_PCMCIAHOST */
 921
 922 int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
 923                                       unsigned long baseaddr,
 924                                       ssb_invariants_func_t get_invariants)
 925 {
 926         int err;
 927
 928         bus->bustype = SSB_BUSTYPE_SSB;
 929         bus->ops = &ssb_ssb_ops;
 930
 931         err = ssb_bus_register(bus, get_invariants, baseaddr);
 932         if (!err) {
 933                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 934                            "address 0x%08lX\n", baseaddr);
 935         }
 936
 937         return err;
 938 }
 939
 940 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
 941 {
 942         drv->drv.name = drv->name;
 943         drv->drv.bus = &ssb_bustype;
 944         drv->drv.owner = owner;
 945
 946         return driver_register(&drv->drv);
 947 }
 948 EXPORT_SYMBOL(__ssb_driver_register);
 949
 950 void ssb_driver_unregister(struct ssb_driver *drv)
 951 {
 952         driver_unregister(&drv->drv);
 953 }
 954 EXPORT_SYMBOL(ssb_driver_unregister);
 955
 956 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
 957 {
 958         struct ssb_bus *bus = dev->bus;
 959         struct ssb_device *ent;
 960         int i;
 961
 962         for (i = 0; i < bus->nr_devices; i++) {
 963                 ent = &(bus->devices[i]);
 964                 if (ent->id.vendor != dev->id.vendor)
 965                         continue;
 966                 if (ent->id.coreid != dev->id.coreid)
 967                         continue;
 968
 969                 ent->devtypedata = data;
 970         }
 971 }
 972 EXPORT_SYMBOL(ssb_set_devtypedata);
 973
 974 static u32 clkfactor_f6_resolve(u32 v)
 975 {
 976         /* map the magic values */
 977         switch (v) {
 978         case SSB_CHIPCO_CLK_F6_2:
 979                 return 2;
 980         case SSB_CHIPCO_CLK_F6_3:
 981                 return 3;
 982         case SSB_CHIPCO_CLK_F6_4:
 983                 return 4;
 984         case SSB_CHIPCO_CLK_F6_5:
 985                 return 5;
 986         case SSB_CHIPCO_CLK_F6_6:
 987                 return 6;
 988         case SSB_CHIPCO_CLK_F6_7:
 989                 return 7;
 990         }
 991         return 0;
 992 }
 993
 994 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
 995 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
 996 {
 997         u32 n1, n2, clock, m1, m2, m3, mc;
 998
 999         n1 = (n & SSB_CHIPCO_CLK_N1);
1000         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
1001
1002         switch (plltype) {
1003         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
1004                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
1005                         return SSB_CHIPCO_CLK_T6_M1;
1006                 return SSB_CHIPCO_CLK_T6_M0;
1007         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1008         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1009         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1010         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1011                 n1 = clkfactor_f6_resolve(n1);
1012                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
1013                 break;
1014         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
1015                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
1016                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
1017                 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
1018                 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
1019                 break;
1020         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
1021                 return 100000000;
1022         default:
1023                 SSB_WARN_ON(1);
1024         }
1025
1026         switch (plltype) {
1027         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1028         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1029                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
1030                 break;
1031         default:
1032                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
1033         }
1034         if (!clock)
1035                 return 0;
1036
1037         m1 = (m & SSB_CHIPCO_CLK_M1);
1038         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
1039         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
1040         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
1041
1042         switch (plltype) {
1043         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1044         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1045         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1046         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1047                 m1 = clkfactor_f6_resolve(m1);
1048                 if ((plltype == SSB_PLLTYPE_1) ||
1049                     (plltype == SSB_PLLTYPE_3))
1050                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
1051                 else
1052                         m2 = clkfactor_f6_resolve(m2);
1053                 m3 = clkfactor_f6_resolve(m3);
1054
1055                 switch (mc) {
1056                 case SSB_CHIPCO_CLK_MC_BYPASS:
1057                         return clock;
1058                 case SSB_CHIPCO_CLK_MC_M1:
1059                         return (clock / m1);
1060                 case SSB_CHIPCO_CLK_MC_M1M2:
1061                         return (clock / (m1 * m2));
1062                 case SSB_CHIPCO_CLK_MC_M1M2M3:
1063                         return (clock / (m1 * m2 * m3));
1064                 case SSB_CHIPCO_CLK_MC_M1M3:
1065                         return (clock / (m1 * m3));
1066                 }
1067                 return 0;
1068         case SSB_PLLTYPE_2:
1069                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
1070                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
1071                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
1072                 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
1073                 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
1074                 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
1075
1076                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
1077                         clock /= m1;
1078                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
1079                         clock /= m2;
1080                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
1081                         clock /= m3;
1082                 return clock;
1083         default:
1084                 SSB_WARN_ON(1);
1085         }
1086         return 0;
1087 }
1088
1089 /* Get the current speed the backplane is running at */
1090 u32 ssb_clockspeed(struct ssb_bus *bus)
1091 {
1092         u32 rate;
1093         u32 plltype;
1094         u32 clkctl_n, clkctl_m;
1095
1096         if (ssb_extif_available(&bus->extif))
1097                 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1098                                            &clkctl_n, &clkctl_m);
1099         else if (bus->chipco.dev)
1100                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1101                                             &clkctl_n, &clkctl_m);
1102         else
1103                 return 0;
1104
1105         if (bus->chip_id == 0x5365) {
1106                 rate = 100000000;
1107         } else {
1108                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1109                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1110                         rate /= 2;
1111         }
1112
1113         return rate;
1114 }
1115 EXPORT_SYMBOL(ssb_clockspeed);
1116
1117 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1118 {
1119         u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1120
1121         /* The REJECT bit seems to be different for Backplane rev 2.3 */
1122         switch (rev) {
1123         case SSB_IDLOW_SSBREV_22:
1124         case SSB_IDLOW_SSBREV_24:
1125         case SSB_IDLOW_SSBREV_26:
1126                 return SSB_TMSLOW_REJECT;
1127         case SSB_IDLOW_SSBREV_23:
1128                 return SSB_TMSLOW_REJECT_23;
1129         case SSB_IDLOW_SSBREV_25:     /* TODO - find the proper REJECT bit */
1130         case SSB_IDLOW_SSBREV_27:     /* same here */
1131                 return SSB_TMSLOW_REJECT;       /* this is a guess */
1132         default:
1133                 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1134                 WARN_ON(1);
1135         }
1136         return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1137 }
1138
1139 int ssb_device_is_enabled(struct ssb_device *dev)
1140 {
1141         u32 val;
1142         u32 reject;
1143
1144         reject = ssb_tmslow_reject_bitmask(dev);
1145         val = ssb_read32(dev, SSB_TMSLOW);
1146         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1147
1148         return (val == SSB_TMSLOW_CLOCK);
1149 }
1150 EXPORT_SYMBOL(ssb_device_is_enabled);
1151
1152 static void ssb_flush_tmslow(struct ssb_device *dev)
1153 {
1154         /* Make _really_ sure the device has finished the TMSLOW
1155          * register write transaction, as we risk running into
1156          * a machine check exception otherwise.
1157          * Do this by reading the register back to commit the
1158          * PCI write and delay an additional usec for the device
1159          * to react to the change. */
1160         ssb_read32(dev, SSB_TMSLOW);
1161         udelay(1);
1162 }
1163
1164 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1165 {
1166         u32 val;
1167
1168         ssb_device_disable(dev, core_specific_flags);
1169         ssb_write32(dev, SSB_TMSLOW,
1170                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1171                     SSB_TMSLOW_FGC | core_specific_flags);
1172         ssb_flush_tmslow(dev);
1173
1174         /* Clear SERR if set. This is a hw bug workaround. */
1175         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1176                 ssb_write32(dev, SSB_TMSHIGH, 0);
1177
1178         val = ssb_read32(dev, SSB_IMSTATE);
1179         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1180                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1181                 ssb_write32(dev, SSB_IMSTATE, val);
1182         }
1183
1184         ssb_write32(dev, SSB_TMSLOW,
1185                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1186                     core_specific_flags);
1187         ssb_flush_tmslow(dev);
1188
1189         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1190                     core_specific_flags);
1191         ssb_flush_tmslow(dev);
1192 }
1193 EXPORT_SYMBOL(ssb_device_enable);
1194
1195 /* Wait for bitmask in a register to get set or cleared.
1196  * timeout is in units of ten-microseconds */
1197 static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1198                          int timeout, int set)
1199 {
1200         int i;
1201         u32 val;
1202
1203         for (i = 0; i < timeout; i++) {
1204                 val = ssb_read32(dev, reg);
1205                 if (set) {
1206                         if ((val & bitmask) == bitmask)
1207                                 return 0;
1208                 } else {
1209                         if (!(val & bitmask))
1210                                 return 0;
1211                 }
1212                 udelay(10);
1213         }
1214         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1215                             "register %04X to %s.\n",
1216                bitmask, reg, (set ? "set" : "clear"));
1217
1218         return -ETIMEDOUT;
1219 }
1220
1221 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1222 {
1223         u32 reject, val;
1224
1225         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1226                 return;
1227
1228         reject = ssb_tmslow_reject_bitmask(dev);
1229
1230         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1231                 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1232                 ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1233                 ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1234
1235                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1236                         val = ssb_read32(dev, SSB_IMSTATE);
1237                         val |= SSB_IMSTATE_REJECT;
1238                         ssb_write32(dev, SSB_IMSTATE, val);
1239                         ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1240                                       0);
1241                 }
1242
1243                 ssb_write32(dev, SSB_TMSLOW,
1244                         SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1245                         reject | SSB_TMSLOW_RESET |
1246                         core_specific_flags);
1247                 ssb_flush_tmslow(dev);
1248
1249                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1250                         val = ssb_read32(dev, SSB_IMSTATE);
1251                         val &= ~SSB_IMSTATE_REJECT;
1252                         ssb_write32(dev, SSB_IMSTATE, val);
1253                 }
1254         }
1255
1256         ssb_write32(dev, SSB_TMSLOW,
1257                     reject | SSB_TMSLOW_RESET |
1258                     core_specific_flags);
1259         ssb_flush_tmslow(dev);
1260 }
1261 EXPORT_SYMBOL(ssb_device_disable);
1262
1263 u32 ssb_dma_translation(struct ssb_device *dev)
1264 {
1265         switch (dev->bus->bustype) {
1266         case SSB_BUSTYPE_SSB:
1267                 return 0;
1268         case SSB_BUSTYPE_PCI:
1269                 return SSB_PCI_DMA;
1270         default:
1271                 __ssb_dma_not_implemented(dev);
1272         }
1273         return 0;
1274 }
1275 EXPORT_SYMBOL(ssb_dma_translation);
1276
1277 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1278 {
1279         struct ssb_chipcommon *cc;
1280         int err = 0;
1281
1282         /* On buses where more than one core may be working
1283          * at a time, we must not powerdown stuff if there are
1284          * still cores that may want to run. */
1285         if (bus->bustype == SSB_BUSTYPE_SSB)
1286                 goto out;
1287
1288         cc = &bus->chipco;
1289
1290         if (!cc->dev)
1291                 goto out;
1292         if (cc->dev->id.revision < 5)
1293                 goto out;
1294
1295         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1296         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1297         if (err)
1298                 goto error;
1299 out:
1300 #ifdef CONFIG_SSB_DEBUG
1301         bus->powered_up = 0;
1302 #endif
1303         return err;
1304 error:
1305         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1306         goto out;
1307 }
1308 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1309
1310 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1311 {
1312         int err;
1313         enum ssb_clkmode mode;
1314
1315         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1316         if (err)
1317                 goto error;
1318
1319 #ifdef CONFIG_SSB_DEBUG
1320         bus->powered_up = 1;
1321 #endif
1322
1323         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1324         ssb_chipco_set_clockmode(&bus->chipco, mode);
1325
1326         return 0;
1327 error:
1328         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1329         return err;
1330 }
1331 EXPORT_SYMBOL(ssb_bus_powerup);
1332
1333 static void ssb_broadcast_value(struct ssb_device *dev,
1334                                 u32 address, u32 data)
1335 {
1336 #ifdef CONFIG_SSB_DRIVER_PCICORE
1337         /* This is used for both, PCI and ChipCommon core, so be careful. */
1338         BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1339         BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1340 #endif
1341
1342         ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1343         ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1344         ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1345         ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1346 }
1347
1348 void ssb_commit_settings(struct ssb_bus *bus)
1349 {
1350         struct ssb_device *dev;
1351
1352 #ifdef CONFIG_SSB_DRIVER_PCICORE
1353         dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1354 #else
1355         dev = bus->chipco.dev;
1356 #endif
1357         if (WARN_ON(!dev))
1358                 return;
1359         /* This forces an update of the cached registers. */
1360         ssb_broadcast_value(dev, 0xFD8, 0);
1361 }
1362 EXPORT_SYMBOL(ssb_commit_settings);
1363
1364 u32 ssb_admatch_base(u32 adm)
1365 {
1366         u32 base = 0;
1367
1368         switch (adm & SSB_ADM_TYPE) {
1369         case SSB_ADM_TYPE0:
1370                 base = (adm & SSB_ADM_BASE0);
1371                 break;
1372         case SSB_ADM_TYPE1:
1373                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1374                 base = (adm & SSB_ADM_BASE1);
1375                 break;
1376         case SSB_ADM_TYPE2:
1377                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1378                 base = (adm & SSB_ADM_BASE2);
1379                 break;
1380         default:
1381                 SSB_WARN_ON(1);
1382         }
1383
1384         return base;
1385 }
1386 EXPORT_SYMBOL(ssb_admatch_base);
1387
1388 u32 ssb_admatch_size(u32 adm)
1389 {
1390         u32 size = 0;
1391
1392         switch (adm & SSB_ADM_TYPE) {
1393         case SSB_ADM_TYPE0:
1394                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1395                 break;
1396         case SSB_ADM_TYPE1:
1397                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1398                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1399                 break;
1400         case SSB_ADM_TYPE2:
1401                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1402                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1403                 break;
1404         default:
1405                 SSB_WARN_ON(1);
1406         }
1407         size = (1 << (size + 1));
1408
1409         return size;
1410 }
1411 EXPORT_SYMBOL(ssb_admatch_size);
1412
1413 static int __init ssb_modinit(void)
1414 {
1415         int err;
1416
1417         /* See the comment at the ssb_is_early_boot definition */
1418         ssb_is_early_boot = 0;
1419         err = bus_register(&ssb_bustype);
1420         if (err)
1421                 return err;
1422
1423         /* Maybe we already registered some buses at early boot.
1424          * Check for this and attach them
1425          */
1426         ssb_buses_lock();
1427         err = ssb_attach_queued_buses();
1428         ssb_buses_unlock();
1429         if (err) {
1430                 bus_unregister(&ssb_bustype);
1431                 goto out;
1432         }
1433
1434         err = b43_pci_ssb_bridge_init();
1435         if (err) {
1436                 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1437                            "initialization failed\n");
1438                 /* don't fail SSB init because of this */
1439                 err = 0;
1440         }
1441         err = ssb_gige_init();
1442         if (err) {
1443                 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1444                            "driver initialization failed\n");
1445                 /* don't fail SSB init because of this */
1446                 err = 0;
1447         }
1448 out:
1449         return err;
1450 }
1451 /* ssb must be initialized after PCI but before the ssb drivers.
1452  * That means we must use some initcall between subsys_initcall
1453  * and device_initcall. */
1454 fs_initcall(ssb_modinit);
1455
1456 static void __exit ssb_modexit(void)
1457 {
1458         ssb_gige_exit();
1459         b43_pci_ssb_bridge_exit();
1460         bus_unregister(&ssb_bustype);
1461 }
1462 module_exit(ssb_modexit)