drivers/ssb/main.c

   1 /*
   2  * Sonics Silicon Backplane
   3  * Subsystem core
   4  *
   5  * Copyright 2005, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include "ssb_private.h"
  12
  13 #include <linux/delay.h>
  14 #include <linux/io.h>
  15 #include <linux/ssb/ssb.h>
  16 #include <linux/ssb/ssb_regs.h>
  17 #include <linux/ssb/ssb_driver_gige.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/pci.h>
  20
  21 #include <pcmcia/cs_types.h>
  22 #include <pcmcia/cs.h>
  23 #include <pcmcia/cistpl.h>
  24 #include <pcmcia/ds.h>
  25
  26
  27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
  28 MODULE_LICENSE("GPL");
  29
  30
  31 /* Temporary list of yet-to-be-attached buses */
  32 static LIST_HEAD(attach_queue);
  33 /* List if running buses */
  34 static LIST_HEAD(buses);
  35 /* Software ID counter */
  36 static unsigned int next_busnumber;
  37 /* buses_mutes locks the two buslists and the next_busnumber.
  38  * Don't lock this directly, but use ssb_buses_[un]lock() below. */
  39 static DEFINE_MUTEX(buses_mutex);
  40
  41 /* There are differences in the codeflow, if the bus is
  42  * initialized from early boot, as various needed services
  43  * are not available early. This is a mechanism to delay
  44  * these initializations to after early boot has finished.
  45  * It's also used to avoid mutex locking, as that's not
  46  * available and needed early. */
  47 static bool ssb_is_early_boot = 1;
  48
  49 static void ssb_buses_lock(void);
  50 static void ssb_buses_unlock(void);
  51
  52
  53 #ifdef CONFIG_SSB_PCIHOST
  54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
  55 {
  56         struct ssb_bus *bus;
  57
  58         ssb_buses_lock();
  59         list_for_each_entry(bus, &buses, list) {
  60                 if (bus->bustype == SSB_BUSTYPE_PCI &&
  61                     bus->host_pci == pdev)
  62                         goto found;
  63         }
  64         bus = NULL;
  65 found:
  66         ssb_buses_unlock();
  67
  68         return bus;
  69 }
  70 #endif /* CONFIG_SSB_PCIHOST */
  71
  72 #ifdef CONFIG_SSB_PCMCIAHOST
  73 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
  74 {
  75         struct ssb_bus *bus;
  76
  77         ssb_buses_lock();
  78         list_for_each_entry(bus, &buses, list) {
  79                 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
  80                     bus->host_pcmcia == pdev)
  81                         goto found;
  82         }
  83         bus = NULL;
  84 found:
  85         ssb_buses_unlock();
  86
  87         return bus;
  88 }
  89 #endif /* CONFIG_SSB_PCMCIAHOST */
  90
  91 int ssb_for_each_bus_call(unsigned long data,
  92                           int (*func)(struct ssb_bus *bus, unsigned long data))
  93 {
  94         struct ssb_bus *bus;
  95         int res;
  96
  97         ssb_buses_lock();
  98         list_for_each_entry(bus, &buses, list) {
  99                 res = func(bus, data);
 100                 if (res >= 0) {
 101                         ssb_buses_unlock();
 102                         return res;
 103                 }
 104         }
 105         ssb_buses_unlock();
 106
 107         return -ENODEV;
 108 }
 109
 110 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
 111 {
 112         if (dev)
 113                 get_device(dev->dev);
 114         return dev;
 115 }
 116
 117 static void ssb_device_put(struct ssb_device *dev)
 118 {
 119         if (dev)
 120                 put_device(dev->dev);
 121 }
 122
 123 static int ssb_device_resume(struct device *dev)
 124 {
 125         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 126         struct ssb_driver *ssb_drv;
 127         int err = 0;
 128
 129         if (dev->driver) {
 130                 ssb_drv = drv_to_ssb_drv(dev->driver);
 131                 if (ssb_drv && ssb_drv->resume)
 132                         err = ssb_drv->resume(ssb_dev);
 133                 if (err)
 134                         goto out;
 135         }
 136 out:
 137         return err;
 138 }
 139
 140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
 141 {
 142         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 143         struct ssb_driver *ssb_drv;
 144         int err = 0;
 145
 146         if (dev->driver) {
 147                 ssb_drv = drv_to_ssb_drv(dev->driver);
 148                 if (ssb_drv && ssb_drv->suspend)
 149                         err = ssb_drv->suspend(ssb_dev, state);
 150                 if (err)
 151                         goto out;
 152         }
 153 out:
 154         return err;
 155 }
 156
 157 int ssb_bus_resume(struct ssb_bus *bus)
 158 {
 159         int err;
 160
 161         /* Reset HW state information in memory, so that HW is
 162          * completely reinitialized. */
 163         bus->mapped_device = NULL;
 164 #ifdef CONFIG_SSB_DRIVER_PCICORE
 165         bus->pcicore.setup_done = 0;
 166 #endif
 167
 168         err = ssb_bus_powerup(bus, 0);
 169         if (err)
 170                 return err;
 171         err = ssb_pcmcia_hardware_setup(bus);
 172         if (err) {
 173                 ssb_bus_may_powerdown(bus);
 174                 return err;
 175         }
 176         ssb_chipco_resume(&bus->chipco);
 177         ssb_bus_may_powerdown(bus);
 178
 179         return 0;
 180 }
 181 EXPORT_SYMBOL(ssb_bus_resume);
 182
 183 int ssb_bus_suspend(struct ssb_bus *bus)
 184 {
 185         ssb_chipco_suspend(&bus->chipco);
 186         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 187
 188         return 0;
 189 }
 190 EXPORT_SYMBOL(ssb_bus_suspend);
 191
 192 #ifdef CONFIG_SSB_SPROM
 193 int ssb_devices_freeze(struct ssb_bus *bus)
 194 {
 195         struct ssb_device *dev;
 196         struct ssb_driver *drv;
 197         int err = 0;
 198         int i;
 199         pm_message_t state = PMSG_FREEZE;
 200
 201         /* First check that we are capable to freeze all devices. */
 202         for (i = 0; i < bus->nr_devices; i++) {
 203                 dev = &(bus->devices[i]);
 204                 if (!dev->dev ||
 205                     !dev->dev->driver ||
 206                     !device_is_registered(dev->dev))
 207                         continue;
 208                 drv = drv_to_ssb_drv(dev->dev->driver);
 209                 if (!drv)
 210                         continue;
 211                 if (!drv->suspend) {
 212                         /* Nope, can't suspend this one. */
 213                         return -EOPNOTSUPP;
 214                 }
 215         }
 216         /* Now suspend all devices */
 217         for (i = 0; i < bus->nr_devices; i++) {
 218                 dev = &(bus->devices[i]);
 219                 if (!dev->dev ||
 220                     !dev->dev->driver ||
 221                     !device_is_registered(dev->dev))
 222                         continue;
 223                 drv = drv_to_ssb_drv(dev->dev->driver);
 224                 if (!drv)
 225                         continue;
 226                 err = drv->suspend(dev, state);
 227                 if (err) {
 228                         ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
 229                                    dev->dev->bus_id);
 230                         goto err_unwind;
 231                 }
 232         }
 233
 234         return 0;
 235 err_unwind:
 236         for (i--; i >= 0; i--) {
 237                 dev = &(bus->devices[i]);
 238                 if (!dev->dev ||
 239                     !dev->dev->driver ||
 240                     !device_is_registered(dev->dev))
 241                         continue;
 242                 drv = drv_to_ssb_drv(dev->dev->driver);
 243                 if (!drv)
 244                         continue;
 245                 if (drv->resume)
 246                         drv->resume(dev);
 247         }
 248         return err;
 249 }
 250
 251 int ssb_devices_thaw(struct ssb_bus *bus)
 252 {
 253         struct ssb_device *dev;
 254         struct ssb_driver *drv;
 255         int err;
 256         int i;
 257
 258         for (i = 0; i < bus->nr_devices; i++) {
 259                 dev = &(bus->devices[i]);
 260                 if (!dev->dev ||
 261                     !dev->dev->driver ||
 262                     !device_is_registered(dev->dev))
 263                         continue;
 264                 drv = drv_to_ssb_drv(dev->dev->driver);
 265                 if (!drv)
 266                         continue;
 267                 if (SSB_WARN_ON(!drv->resume))
 268                         continue;
 269                 err = drv->resume(dev);
 270                 if (err) {
 271                         ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
 272                                    dev->dev->bus_id);
 273                 }
 274         }
 275
 276         return 0;
 277 }
 278 #endif /* CONFIG_SSB_SPROM */
 279
 280 static void ssb_device_shutdown(struct device *dev)
 281 {
 282         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 283         struct ssb_driver *ssb_drv;
 284
 285         if (!dev->driver)
 286                 return;
 287         ssb_drv = drv_to_ssb_drv(dev->driver);
 288         if (ssb_drv && ssb_drv->shutdown)
 289                 ssb_drv->shutdown(ssb_dev);
 290 }
 291
 292 static int ssb_device_remove(struct device *dev)
 293 {
 294         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 295         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 296
 297         if (ssb_drv && ssb_drv->remove)
 298                 ssb_drv->remove(ssb_dev);
 299         ssb_device_put(ssb_dev);
 300
 301         return 0;
 302 }
 303
 304 static int ssb_device_probe(struct device *dev)
 305 {
 306         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 307         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 308         int err = 0;
 309
 310         ssb_device_get(ssb_dev);
 311         if (ssb_drv && ssb_drv->probe)
 312                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
 313         if (err)
 314                 ssb_device_put(ssb_dev);
 315
 316         return err;
 317 }
 318
 319 static int ssb_match_devid(const struct ssb_device_id *tabid,
 320                            const struct ssb_device_id *devid)
 321 {
 322         if ((tabid->vendor != devid->vendor) &&
 323             tabid->vendor != SSB_ANY_VENDOR)
 324                 return 0;
 325         if ((tabid->coreid != devid->coreid) &&
 326             tabid->coreid != SSB_ANY_ID)
 327                 return 0;
 328         if ((tabid->revision != devid->revision) &&
 329             tabid->revision != SSB_ANY_REV)
 330                 return 0;
 331         return 1;
 332 }
 333
 334 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
 335 {
 336         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 337         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
 338         const struct ssb_device_id *id;
 339
 340         for (id = ssb_drv->id_table;
 341              id->vendor || id->coreid || id->revision;
 342              id++) {
 343                 if (ssb_match_devid(id, &ssb_dev->id))
 344                         return 1; /* found */
 345         }
 346
 347         return 0;
 348 }
 349
 350 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
 351 {
 352         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 353
 354         if (!dev)
 355                 return -ENODEV;
 356
 357         return add_uevent_var(env,
 358                              "MODALIAS=ssb:v%04Xid%04Xrev%02X",
 359                              ssb_dev->id.vendor, ssb_dev->id.coreid,
 360                              ssb_dev->id.revision);
 361 }
 362
 363 static struct bus_type ssb_bustype = {
 364         .name           = "ssb",
 365         .match          = ssb_bus_match,
 366         .probe          = ssb_device_probe,
 367         .remove         = ssb_device_remove,
 368         .shutdown       = ssb_device_shutdown,
 369         .suspend        = ssb_device_suspend,
 370         .resume         = ssb_device_resume,
 371         .uevent         = ssb_device_uevent,
 372 };
 373
 374 static void ssb_buses_lock(void)
 375 {
 376         /* See the comment at the ssb_is_early_boot definition */
 377         if (!ssb_is_early_boot)
 378                 mutex_lock(&buses_mutex);
 379 }
 380
 381 static void ssb_buses_unlock(void)
 382 {
 383         /* See the comment at the ssb_is_early_boot definition */
 384         if (!ssb_is_early_boot)
 385                 mutex_unlock(&buses_mutex);
 386 }
 387
 388 static void ssb_devices_unregister(struct ssb_bus *bus)
 389 {
 390         struct ssb_device *sdev;
 391         int i;
 392
 393         for (i = bus->nr_devices - 1; i >= 0; i--) {
 394                 sdev = &(bus->devices[i]);
 395                 if (sdev->dev)
 396                         device_unregister(sdev->dev);
 397         }
 398 }
 399
 400 void ssb_bus_unregister(struct ssb_bus *bus)
 401 {
 402         ssb_buses_lock();
 403         ssb_devices_unregister(bus);
 404         list_del(&bus->list);
 405         ssb_buses_unlock();
 406
 407         ssb_pcmcia_exit(bus);
 408         ssb_pci_exit(bus);
 409         ssb_iounmap(bus);
 410 }
 411 EXPORT_SYMBOL(ssb_bus_unregister);
 412
 413 static void ssb_release_dev(struct device *dev)
 414 {
 415         struct __ssb_dev_wrapper *devwrap;
 416
 417         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 418         kfree(devwrap);
 419 }
 420
 421 static int ssb_devices_register(struct ssb_bus *bus)
 422 {
 423         struct ssb_device *sdev;
 424         struct device *dev;
 425         struct __ssb_dev_wrapper *devwrap;
 426         int i, err = 0;
 427         int dev_idx = 0;
 428
 429         for (i = 0; i < bus->nr_devices; i++) {
 430                 sdev = &(bus->devices[i]);
 431
 432                 /* We don't register SSB-system devices to the kernel,
 433                  * as the drivers for them are built into SSB. */
 434                 switch (sdev->id.coreid) {
 435                 case SSB_DEV_CHIPCOMMON:
 436                 case SSB_DEV_PCI:
 437                 case SSB_DEV_PCIE:
 438                 case SSB_DEV_PCMCIA:
 439                 case SSB_DEV_MIPS:
 440                 case SSB_DEV_MIPS_3302:
 441                 case SSB_DEV_EXTIF:
 442                         continue;
 443                 }
 444
 445                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 446                 if (!devwrap) {
 447                         ssb_printk(KERN_ERR PFX
 448                                    "Could not allocate device\n");
 449                         err = -ENOMEM;
 450                         goto error;
 451                 }
 452                 dev = &devwrap->dev;
 453                 devwrap->sdev = sdev;
 454
 455                 dev->release = ssb_release_dev;
 456                 dev->bus = &ssb_bustype;
 457                 snprintf(dev->bus_id, sizeof(dev->bus_id),
 458                          "ssb%u:%d", bus->busnumber, dev_idx);
 459
 460                 switch (bus->bustype) {
 461                 case SSB_BUSTYPE_PCI:
 462 #ifdef CONFIG_SSB_PCIHOST
 463                         sdev->irq = bus->host_pci->irq;
 464                         dev->parent = &bus->host_pci->dev;
 465 #endif
 466                         break;
 467                 case SSB_BUSTYPE_PCMCIA:
 468 #ifdef CONFIG_SSB_PCMCIAHOST
 469                         sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
 470                         dev->parent = &bus->host_pcmcia->dev;
 471 #endif
 472                         break;
 473                 case SSB_BUSTYPE_SSB:
 474                         dev->dma_mask = &dev->coherent_dma_mask;
 475                         break;
 476                 }
 477
 478                 sdev->dev = dev;
 479                 err = device_register(dev);
 480                 if (err) {
 481                         ssb_printk(KERN_ERR PFX
 482                                    "Could not register %s\n",
 483                                    dev->bus_id);
 484                         /* Set dev to NULL to not unregister
 485                          * dev on error unwinding. */
 486                         sdev->dev = NULL;
 487                         kfree(devwrap);
 488                         goto error;
 489                 }
 490                 dev_idx++;
 491         }
 492
 493         return 0;
 494 error:
 495         /* Unwind the already registered devices. */
 496         ssb_devices_unregister(bus);
 497         return err;
 498 }
 499
 500 /* Needs ssb_buses_lock() */
 501 static int ssb_attach_queued_buses(void)
 502 {
 503         struct ssb_bus *bus, *n;
 504         int err = 0;
 505         int drop_them_all = 0;
 506
 507         list_for_each_entry_safe(bus, n, &attach_queue, list) {
 508                 if (drop_them_all) {
 509                         list_del(&bus->list);
 510                         continue;
 511                 }
 512                 /* Can't init the PCIcore in ssb_bus_register(), as that
 513                  * is too early in boot for embedded systems
 514                  * (no udelay() available). So do it here in attach stage.
 515                  */
 516                 err = ssb_bus_powerup(bus, 0);
 517                 if (err)
 518                         goto error;
 519                 ssb_pcicore_init(&bus->pcicore);
 520                 ssb_bus_may_powerdown(bus);
 521
 522                 err = ssb_devices_register(bus);
 523 error:
 524                 if (err) {
 525                         drop_them_all = 1;
 526                         list_del(&bus->list);
 527                         continue;
 528                 }
 529                 list_move_tail(&bus->list, &buses);
 530         }
 531
 532         return err;
 533 }
 534
 535 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
 536 {
 537         struct ssb_bus *bus = dev->bus;
 538
 539         offset += dev->core_index * SSB_CORE_SIZE;
 540         return readb(bus->mmio + offset);
 541 }
 542
 543 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
 544 {
 545         struct ssb_bus *bus = dev->bus;
 546
 547         offset += dev->core_index * SSB_CORE_SIZE;
 548         return readw(bus->mmio + offset);
 549 }
 550
 551 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
 552 {
 553         struct ssb_bus *bus = dev->bus;
 554
 555         offset += dev->core_index * SSB_CORE_SIZE;
 556         return readl(bus->mmio + offset);
 557 }
 558
 559 #ifdef CONFIG_SSB_BLOCKIO
 560 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
 561                                size_t count, u16 offset, u8 reg_width)
 562 {
 563         struct ssb_bus *bus = dev->bus;
 564         void __iomem *addr;
 565
 566         offset += dev->core_index * SSB_CORE_SIZE;
 567         addr = bus->mmio + offset;
 568
 569         switch (reg_width) {
 570         case sizeof(u8): {
 571                 u8 *buf = buffer;
 572
 573                 while (count) {
 574                         *buf = __raw_readb(addr);
 575                         buf++;
 576                         count--;
 577                 }
 578                 break;
 579         }
 580         case sizeof(u16): {
 581                 __le16 *buf = buffer;
 582
 583                 SSB_WARN_ON(count & 1);
 584                 while (count) {
 585                         *buf = (__force __le16)__raw_readw(addr);
 586                         buf++;
 587                         count -= 2;
 588                 }
 589                 break;
 590         }
 591         case sizeof(u32): {
 592                 __le32 *buf = buffer;
 593
 594                 SSB_WARN_ON(count & 3);
 595                 while (count) {
 596                         *buf = (__force __le32)__raw_readl(addr);
 597                         buf++;
 598                         count -= 4;
 599                 }
 600                 break;
 601         }
 602         default:
 603                 SSB_WARN_ON(1);
 604         }
 605 }
 606 #endif /* CONFIG_SSB_BLOCKIO */
 607
 608 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 609 {
 610         struct ssb_bus *bus = dev->bus;
 611
 612         offset += dev->core_index * SSB_CORE_SIZE;
 613         writeb(value, bus->mmio + offset);
 614 }
 615
 616 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 617 {
 618         struct ssb_bus *bus = dev->bus;
 619
 620         offset += dev->core_index * SSB_CORE_SIZE;
 621         writew(value, bus->mmio + offset);
 622 }
 623
 624 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 625 {
 626         struct ssb_bus *bus = dev->bus;
 627
 628         offset += dev->core_index * SSB_CORE_SIZE;
 629         writel(value, bus->mmio + offset);
 630 }
 631
 632 #ifdef CONFIG_SSB_BLOCKIO
 633 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
 634                                 size_t count, u16 offset, u8 reg_width)
 635 {
 636         struct ssb_bus *bus = dev->bus;
 637         void __iomem *addr;
 638
 639         offset += dev->core_index * SSB_CORE_SIZE;
 640         addr = bus->mmio + offset;
 641
 642         switch (reg_width) {
 643         case sizeof(u8): {
 644                 const u8 *buf = buffer;
 645
 646                 while (count) {
 647                         __raw_writeb(*buf, addr);
 648                         buf++;
 649                         count--;
 650                 }
 651                 break;
 652         }
 653         case sizeof(u16): {
 654                 const __le16 *buf = buffer;
 655
 656                 SSB_WARN_ON(count & 1);
 657                 while (count) {
 658                         __raw_writew((__force u16)(*buf), addr);
 659                         buf++;
 660                         count -= 2;
 661                 }
 662                 break;
 663         }
 664         case sizeof(u32): {
 665                 const __le32 *buf = buffer;
 666
 667                 SSB_WARN_ON(count & 3);
 668                 while (count) {
 669                         __raw_writel((__force u32)(*buf), addr);
 670                         buf++;
 671                         count -= 4;
 672                 }
 673                 break;
 674         }
 675         default:
 676                 SSB_WARN_ON(1);
 677         }
 678 }
 679 #endif /* CONFIG_SSB_BLOCKIO */
 680
 681 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
 682 static const struct ssb_bus_ops ssb_ssb_ops = {
 683         .read8          = ssb_ssb_read8,
 684         .read16         = ssb_ssb_read16,
 685         .read32         = ssb_ssb_read32,
 686         .write8         = ssb_ssb_write8,
 687         .write16        = ssb_ssb_write16,
 688         .write32        = ssb_ssb_write32,
 689 #ifdef CONFIG_SSB_BLOCKIO
 690         .block_read     = ssb_ssb_block_read,
 691         .block_write    = ssb_ssb_block_write,
 692 #endif
 693 };
 694
 695 static int ssb_fetch_invariants(struct ssb_bus *bus,
 696                                 ssb_invariants_func_t get_invariants)
 697 {
 698         struct ssb_init_invariants iv;
 699         int err;
 700
 701         memset(&iv, 0, sizeof(iv));
 702         err = get_invariants(bus, &iv);
 703         if (err)
 704                 goto out;
 705         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
 706         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
 707         bus->has_cardbus_slot = iv.has_cardbus_slot;
 708 out:
 709         return err;
 710 }
 711
 712 static int ssb_bus_register(struct ssb_bus *bus,
 713                             ssb_invariants_func_t get_invariants,
 714                             unsigned long baseaddr)
 715 {
 716         int err;
 717
 718         spin_lock_init(&bus->bar_lock);
 719         INIT_LIST_HEAD(&bus->list);
 720 #ifdef CONFIG_SSB_EMBEDDED
 721         spin_lock_init(&bus->gpio_lock);
 722 #endif
 723
 724         /* Powerup the bus */
 725         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
 726         if (err)
 727                 goto out;
 728         ssb_buses_lock();
 729         bus->busnumber = next_busnumber;
 730         /* Scan for devices (cores) */
 731         err = ssb_bus_scan(bus, baseaddr);
 732         if (err)
 733                 goto err_disable_xtal;
 734
 735         /* Init PCI-host device (if any) */
 736         err = ssb_pci_init(bus);
 737         if (err)
 738                 goto err_unmap;
 739         /* Init PCMCIA-host device (if any) */
 740         err = ssb_pcmcia_init(bus);
 741         if (err)
 742                 goto err_pci_exit;
 743
 744         /* Initialize basic system devices (if available) */
 745         err = ssb_bus_powerup(bus, 0);
 746         if (err)
 747                 goto err_pcmcia_exit;
 748         ssb_chipcommon_init(&bus->chipco);
 749         ssb_mipscore_init(&bus->mipscore);
 750         err = ssb_fetch_invariants(bus, get_invariants);
 751         if (err) {
 752                 ssb_bus_may_powerdown(bus);
 753                 goto err_pcmcia_exit;
 754         }
 755         ssb_bus_may_powerdown(bus);
 756
 757         /* Queue it for attach.
 758          * See the comment at the ssb_is_early_boot definition. */
 759         list_add_tail(&bus->list, &attach_queue);
 760         if (!ssb_is_early_boot) {
 761                 /* This is not early boot, so we must attach the bus now */
 762                 err = ssb_attach_queued_buses();
 763                 if (err)
 764                         goto err_dequeue;
 765         }
 766         next_busnumber++;
 767         ssb_buses_unlock();
 768
 769 out:
 770         return err;
 771
 772 err_dequeue:
 773         list_del(&bus->list);
 774 err_pcmcia_exit:
 775         ssb_pcmcia_exit(bus);
 776 err_pci_exit:
 777         ssb_pci_exit(bus);
 778 err_unmap:
 779         ssb_iounmap(bus);
 780 err_disable_xtal:
 781         ssb_buses_unlock();
 782         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 783         return err;
 784 }
 785
 786 #ifdef CONFIG_SSB_PCIHOST
 787 int ssb_bus_pcibus_register(struct ssb_bus *bus,
 788                             struct pci_dev *host_pci)
 789 {
 790         int err;
 791
 792         bus->bustype = SSB_BUSTYPE_PCI;
 793         bus->host_pci = host_pci;
 794         bus->ops = &ssb_pci_ops;
 795
 796         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 797         if (!err) {
 798                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 799                            "PCI device %s\n", host_pci->dev.bus_id);
 800         }
 801
 802         return err;
 803 }
 804 EXPORT_SYMBOL(ssb_bus_pcibus_register);
 805 #endif /* CONFIG_SSB_PCIHOST */
 806
 807 #ifdef CONFIG_SSB_PCMCIAHOST
 808 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 809                                struct pcmcia_device *pcmcia_dev,
 810                                unsigned long baseaddr)
 811 {
 812         int err;
 813
 814         bus->bustype = SSB_BUSTYPE_PCMCIA;
 815         bus->host_pcmcia = pcmcia_dev;
 816         bus->ops = &ssb_pcmcia_ops;
 817
 818         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 819         if (!err) {
 820                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 821                            "PCMCIA device %s\n", pcmcia_dev->devname);
 822         }
 823
 824         return err;
 825 }
 826 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
 827 #endif /* CONFIG_SSB_PCMCIAHOST */
 828
 829 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 830                             unsigned long baseaddr,
 831                             ssb_invariants_func_t get_invariants)
 832 {
 833         int err;
 834
 835         bus->bustype = SSB_BUSTYPE_SSB;
 836         bus->ops = &ssb_ssb_ops;
 837
 838         err = ssb_bus_register(bus, get_invariants, baseaddr);
 839         if (!err) {
 840                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 841                            "address 0x%08lX\n", baseaddr);
 842         }
 843
 844         return err;
 845 }
 846
 847 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
 848 {
 849         drv->drv.name = drv->name;
 850         drv->drv.bus = &ssb_bustype;
 851         drv->drv.owner = owner;
 852
 853         return driver_register(&drv->drv);
 854 }
 855 EXPORT_SYMBOL(__ssb_driver_register);
 856
 857 void ssb_driver_unregister(struct ssb_driver *drv)
 858 {
 859         driver_unregister(&drv->drv);
 860 }
 861 EXPORT_SYMBOL(ssb_driver_unregister);
 862
 863 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
 864 {
 865         struct ssb_bus *bus = dev->bus;
 866         struct ssb_device *ent;
 867         int i;
 868
 869         for (i = 0; i < bus->nr_devices; i++) {
 870                 ent = &(bus->devices[i]);
 871                 if (ent->id.vendor != dev->id.vendor)
 872                         continue;
 873                 if (ent->id.coreid != dev->id.coreid)
 874                         continue;
 875
 876                 ent->devtypedata = data;
 877         }
 878 }
 879 EXPORT_SYMBOL(ssb_set_devtypedata);
 880
 881 static u32 clkfactor_f6_resolve(u32 v)
 882 {
 883         /* map the magic values */
 884         switch (v) {
 885         case SSB_CHIPCO_CLK_F6_2:
 886                 return 2;
 887         case SSB_CHIPCO_CLK_F6_3:
 888                 return 3;
 889         case SSB_CHIPCO_CLK_F6_4:
 890                 return 4;
 891         case SSB_CHIPCO_CLK_F6_5:
 892                 return 5;
 893         case SSB_CHIPCO_CLK_F6_6:
 894                 return 6;
 895         case SSB_CHIPCO_CLK_F6_7:
 896                 return 7;
 897         }
 898         return 0;
 899 }
 900
 901 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
 902 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
 903 {
 904         u32 n1, n2, clock, m1, m2, m3, mc;
 905
 906         n1 = (n & SSB_CHIPCO_CLK_N1);
 907         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
 908
 909         switch (plltype) {
 910         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
 911                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
 912                         return SSB_CHIPCO_CLK_T6_M0;
 913                 return SSB_CHIPCO_CLK_T6_M1;
 914         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
 915         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
 916         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
 917         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
 918                 n1 = clkfactor_f6_resolve(n1);
 919                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
 920                 break;
 921         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
 922                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
 923                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
 924                 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
 925                 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
 926                 break;
 927         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
 928                 return 100000000;
 929         default:
 930                 SSB_WARN_ON(1);
 931         }
 932
 933         switch (plltype) {
 934         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
 935         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
 936                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
 937                 break;
 938         default:
 939                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
 940         }
 941         if (!clock)
 942                 return 0;
 943
 944         m1 = (m & SSB_CHIPCO_CLK_M1);
 945         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
 946         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
 947         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
 948
 949         switch (plltype) {
 950         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
 951         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
 952         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
 953         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
 954                 m1 = clkfactor_f6_resolve(m1);
 955                 if ((plltype == SSB_PLLTYPE_1) ||
 956                     (plltype == SSB_PLLTYPE_3))
 957                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
 958                 else
 959                         m2 = clkfactor_f6_resolve(m2);
 960                 m3 = clkfactor_f6_resolve(m3);
 961
 962                 switch (mc) {
 963                 case SSB_CHIPCO_CLK_MC_BYPASS:
 964                         return clock;
 965                 case SSB_CHIPCO_CLK_MC_M1:
 966                         return (clock / m1);
 967                 case SSB_CHIPCO_CLK_MC_M1M2:
 968                         return (clock / (m1 * m2));
 969                 case SSB_CHIPCO_CLK_MC_M1M2M3:
 970                         return (clock / (m1 * m2 * m3));
 971                 case SSB_CHIPCO_CLK_MC_M1M3:
 972                         return (clock / (m1 * m3));
 973                 }
 974                 return 0;
 975         case SSB_PLLTYPE_2:
 976                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
 977                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
 978                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
 979                 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
 980                 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
 981                 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
 982
 983                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
 984                         clock /= m1;
 985                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
 986                         clock /= m2;
 987                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
 988                         clock /= m3;
 989                 return clock;
 990         default:
 991                 SSB_WARN_ON(1);
 992         }
 993         return 0;
 994 }
 995
 996 /* Get the current speed the backplane is running at */
 997 u32 ssb_clockspeed(struct ssb_bus *bus)
 998 {
 999         u32 rate;
1000         u32 plltype;
1001         u32 clkctl_n, clkctl_m;
1002
1003         if (ssb_extif_available(&bus->extif))
1004                 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1005                                            &clkctl_n, &clkctl_m);
1006         else if (bus->chipco.dev)
1007                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1008                                             &clkctl_n, &clkctl_m);
1009         else
1010                 return 0;
1011
1012         if (bus->chip_id == 0x5365) {
1013                 rate = 100000000;
1014         } else {
1015                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1016                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1017                         rate /= 2;
1018         }
1019
1020         return rate;
1021 }
1022 EXPORT_SYMBOL(ssb_clockspeed);
1023
1024 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1025 {
1026         u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1027
1028         /* The REJECT bit changed position in TMSLOW between
1029          * Backplane revisions. */
1030         switch (rev) {
1031         case SSB_IDLOW_SSBREV_22:
1032                 return SSB_TMSLOW_REJECT_22;
1033         case SSB_IDLOW_SSBREV_23:
1034                 return SSB_TMSLOW_REJECT_23;
1035         case SSB_IDLOW_SSBREV_24:     /* TODO - find the proper REJECT bits */
1036         case SSB_IDLOW_SSBREV_25:     /* same here */
1037         case SSB_IDLOW_SSBREV_26:     /* same here */
1038         case SSB_IDLOW_SSBREV_27:     /* same here */
1039                 return SSB_TMSLOW_REJECT_23;    /* this is a guess */
1040         default:
1041                 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1042                 WARN_ON(1);
1043         }
1044         return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
1045 }
1046
1047 int ssb_device_is_enabled(struct ssb_device *dev)
1048 {
1049         u32 val;
1050         u32 reject;
1051
1052         reject = ssb_tmslow_reject_bitmask(dev);
1053         val = ssb_read32(dev, SSB_TMSLOW);
1054         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1055
1056         return (val == SSB_TMSLOW_CLOCK);
1057 }
1058 EXPORT_SYMBOL(ssb_device_is_enabled);
1059
1060 static void ssb_flush_tmslow(struct ssb_device *dev)
1061 {
1062         /* Make _really_ sure the device has finished the TMSLOW
1063          * register write transaction, as we risk running into
1064          * a machine check exception otherwise.
1065          * Do this by reading the register back to commit the
1066          * PCI write and delay an additional usec for the device
1067          * to react to the change. */
1068         ssb_read32(dev, SSB_TMSLOW);
1069         udelay(1);
1070 }
1071
1072 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1073 {
1074         u32 val;
1075
1076         ssb_device_disable(dev, core_specific_flags);
1077         ssb_write32(dev, SSB_TMSLOW,
1078                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1079                     SSB_TMSLOW_FGC | core_specific_flags);
1080         ssb_flush_tmslow(dev);
1081
1082         /* Clear SERR if set. This is a hw bug workaround. */
1083         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1084                 ssb_write32(dev, SSB_TMSHIGH, 0);
1085
1086         val = ssb_read32(dev, SSB_IMSTATE);
1087         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1088                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1089                 ssb_write32(dev, SSB_IMSTATE, val);
1090         }
1091
1092         ssb_write32(dev, SSB_TMSLOW,
1093                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1094                     core_specific_flags);
1095         ssb_flush_tmslow(dev);
1096
1097         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1098                     core_specific_flags);
1099         ssb_flush_tmslow(dev);
1100 }
1101 EXPORT_SYMBOL(ssb_device_enable);
1102
1103 /* Wait for a bit in a register to get set or unset.
1104  * timeout is in units of ten-microseconds */
1105 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1106                         int timeout, int set)
1107 {
1108         int i;
1109         u32 val;
1110
1111         for (i = 0; i < timeout; i++) {
1112                 val = ssb_read32(dev, reg);
1113                 if (set) {
1114                         if (val & bitmask)
1115                                 return 0;
1116                 } else {
1117                         if (!(val & bitmask))
1118                                 return 0;
1119                 }
1120                 udelay(10);
1121         }
1122         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1123                             "register %04X to %s.\n",
1124                bitmask, reg, (set ? "set" : "clear"));
1125
1126         return -ETIMEDOUT;
1127 }
1128
1129 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1130 {
1131         u32 reject;
1132
1133         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1134                 return;
1135
1136         reject = ssb_tmslow_reject_bitmask(dev);
1137         ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1138         ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1139         ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1140         ssb_write32(dev, SSB_TMSLOW,
1141                     SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1142                     reject | SSB_TMSLOW_RESET |
1143                     core_specific_flags);
1144         ssb_flush_tmslow(dev);
1145
1146         ssb_write32(dev, SSB_TMSLOW,
1147                     reject | SSB_TMSLOW_RESET |
1148                     core_specific_flags);
1149         ssb_flush_tmslow(dev);
1150 }
1151 EXPORT_SYMBOL(ssb_device_disable);
1152
1153 u32 ssb_dma_translation(struct ssb_device *dev)
1154 {
1155         switch (dev->bus->bustype) {
1156         case SSB_BUSTYPE_SSB:
1157                 return 0;
1158         case SSB_BUSTYPE_PCI:
1159                 return SSB_PCI_DMA;
1160         default:
1161                 __ssb_dma_not_implemented(dev);
1162         }
1163         return 0;
1164 }
1165 EXPORT_SYMBOL(ssb_dma_translation);
1166
1167 int ssb_dma_set_mask(struct ssb_device *dev, u64 mask)
1168 {
1169 #ifdef CONFIG_SSB_PCIHOST
1170         int err;
1171 #endif
1172
1173         switch (dev->bus->bustype) {
1174         case SSB_BUSTYPE_PCI:
1175 #ifdef CONFIG_SSB_PCIHOST
1176                 err = pci_set_dma_mask(dev->bus->host_pci, mask);
1177                 if (err)
1178                         return err;
1179                 err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask);
1180                 return err;
1181 #endif
1182         case SSB_BUSTYPE_SSB:
1183                 return dma_set_mask(dev->dev, mask);
1184         default:
1185                 __ssb_dma_not_implemented(dev);
1186         }
1187         return -ENOSYS;
1188 }
1189 EXPORT_SYMBOL(ssb_dma_set_mask);
1190
1191 void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
1192                                 dma_addr_t *dma_handle, gfp_t gfp_flags)
1193 {
1194         switch (dev->bus->bustype) {
1195         case SSB_BUSTYPE_PCI:
1196 #ifdef CONFIG_SSB_PCIHOST
1197                 if (gfp_flags & GFP_DMA) {
1198                         /* Workaround: The PCI API does not support passing
1199                          * a GFP flag. */
1200                         return dma_alloc_coherent(&dev->bus->host_pci->dev,
1201                                                   size, dma_handle, gfp_flags);
1202                 }
1203                 return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle);
1204 #endif
1205         case SSB_BUSTYPE_SSB:
1206                 return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags);
1207         default:
1208                 __ssb_dma_not_implemented(dev);
1209         }
1210         return NULL;
1211 }
1212 EXPORT_SYMBOL(ssb_dma_alloc_consistent);
1213
1214 void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
1215                              void *vaddr, dma_addr_t dma_handle,
1216                              gfp_t gfp_flags)
1217 {
1218         switch (dev->bus->bustype) {
1219         case SSB_BUSTYPE_PCI:
1220 #ifdef CONFIG_SSB_PCIHOST
1221                 if (gfp_flags & GFP_DMA) {
1222                         /* Workaround: The PCI API does not support passing
1223                          * a GFP flag. */
1224                         dma_free_coherent(&dev->bus->host_pci->dev,
1225                                           size, vaddr, dma_handle);
1226                         return;
1227                 }
1228                 pci_free_consistent(dev->bus->host_pci, size,
1229                                     vaddr, dma_handle);
1230                 return;
1231 #endif
1232         case SSB_BUSTYPE_SSB:
1233                 dma_free_coherent(dev->dev, size, vaddr, dma_handle);
1234                 return;
1235         default:
1236                 __ssb_dma_not_implemented(dev);
1237         }
1238 }
1239 EXPORT_SYMBOL(ssb_dma_free_consistent);
1240
1241 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1242 {
1243         struct ssb_chipcommon *cc;
1244         int err = 0;
1245
1246         /* On buses where more than one core may be working
1247          * at a time, we must not powerdown stuff if there are
1248          * still cores that may want to run. */
1249         if (bus->bustype == SSB_BUSTYPE_SSB)
1250                 goto out;
1251
1252         cc = &bus->chipco;
1253
1254         if (!cc->dev)
1255                 goto out;
1256         if (cc->dev->id.revision < 5)
1257                 goto out;
1258
1259         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1260         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1261         if (err)
1262                 goto error;
1263 out:
1264 #ifdef CONFIG_SSB_DEBUG
1265         bus->powered_up = 0;
1266 #endif
1267         return err;
1268 error:
1269         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1270         goto out;
1271 }
1272 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1273
1274 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1275 {
1276         struct ssb_chipcommon *cc;
1277         int err;
1278         enum ssb_clkmode mode;
1279
1280         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1281         if (err)
1282                 goto error;
1283         cc = &bus->chipco;
1284         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1285         ssb_chipco_set_clockmode(cc, mode);
1286
1287 #ifdef CONFIG_SSB_DEBUG
1288         bus->powered_up = 1;
1289 #endif
1290         return 0;
1291 error:
1292         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1293         return err;
1294 }
1295 EXPORT_SYMBOL(ssb_bus_powerup);
1296
1297 u32 ssb_admatch_base(u32 adm)
1298 {
1299         u32 base = 0;
1300
1301         switch (adm & SSB_ADM_TYPE) {
1302         case SSB_ADM_TYPE0:
1303                 base = (adm & SSB_ADM_BASE0);
1304                 break;
1305         case SSB_ADM_TYPE1:
1306                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1307                 base = (adm & SSB_ADM_BASE1);
1308                 break;
1309         case SSB_ADM_TYPE2:
1310                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1311                 base = (adm & SSB_ADM_BASE2);
1312                 break;
1313         default:
1314                 SSB_WARN_ON(1);
1315         }
1316
1317         return base;
1318 }
1319 EXPORT_SYMBOL(ssb_admatch_base);
1320
1321 u32 ssb_admatch_size(u32 adm)
1322 {
1323         u32 size = 0;
1324
1325         switch (adm & SSB_ADM_TYPE) {
1326         case SSB_ADM_TYPE0:
1327                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1328                 break;
1329         case SSB_ADM_TYPE1:
1330                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1331                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1332                 break;
1333         case SSB_ADM_TYPE2:
1334                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1335                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1336                 break;
1337         default:
1338                 SSB_WARN_ON(1);
1339         }
1340         size = (1 << (size + 1));
1341
1342         return size;
1343 }
1344 EXPORT_SYMBOL(ssb_admatch_size);
1345
1346 static int __init ssb_modinit(void)
1347 {
1348         int err;
1349
1350         /* See the comment at the ssb_is_early_boot definition */
1351         ssb_is_early_boot = 0;
1352         err = bus_register(&ssb_bustype);
1353         if (err)
1354                 return err;
1355
1356         /* Maybe we already registered some buses at early boot.
1357          * Check for this and attach them
1358          */
1359         ssb_buses_lock();
1360         err = ssb_attach_queued_buses();
1361         ssb_buses_unlock();
1362         if (err)
1363                 bus_unregister(&ssb_bustype);
1364
1365         err = b43_pci_ssb_bridge_init();
1366         if (err) {
1367                 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1368                            "initialization failed\n");
1369                 /* don't fail SSB init because of this */
1370                 err = 0;
1371         }
1372         err = ssb_gige_init();
1373         if (err) {
1374                 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1375                            "driver initialization failed\n");
1376                 /* don't fail SSB init because of this */
1377                 err = 0;
1378         }
1379
1380         return err;
1381 }
1382 /* ssb must be initialized after PCI but before the ssb drivers.
1383  * That means we must use some initcall between subsys_initcall
1384  * and device_initcall. */
1385 fs_initcall(ssb_modinit);
1386
1387 static void __exit ssb_modexit(void)
1388 {
1389         ssb_gige_exit();
1390         b43_pci_ssb_bridge_exit();
1391         bus_unregister(&ssb_bustype);
1392 }
1393 module_exit(ssb_modexit)