drivers/serial/uartlite.c

   1 /*
   2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
   3  *
   4  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
   5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/module.h>
  14 #include <linux/console.h>
  15 #include <linux/serial.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/tty.h>
  18 #include <linux/delay.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/init.h>
  21 #include <asm/io.h>
  22 #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
  23 #include <linux/of.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_platform.h>
  27
  28 /* Match table for of_platform binding */
  29 static struct of_device_id ulite_of_match[] __devinitdata = {
  30         { .compatible = "xlnx,opb-uartlite-1.00.b", },
  31         { .compatible = "xlnx,xps-uartlite-1.00.a", },
  32         {}
  33 };
  34 MODULE_DEVICE_TABLE(of, ulite_of_match);
  35
  36 #endif
  37
  38 #define ULITE_NAME              "ttyUL"
  39 #define ULITE_MAJOR             204
  40 #define ULITE_MINOR             187
  41 #define ULITE_NR_UARTS          4
  42
  43 /* ---------------------------------------------------------------------
  44  * Register definitions
  45  *
  46  * For register details see datasheet:
  47  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
  48  */
  49
  50 #define ULITE_RX                0x00
  51 #define ULITE_TX                0x04
  52 #define ULITE_STATUS            0x08
  53 #define ULITE_CONTROL           0x0c
  54
  55 #define ULITE_REGION            16
  56
  57 #define ULITE_STATUS_RXVALID    0x01
  58 #define ULITE_STATUS_RXFULL     0x02
  59 #define ULITE_STATUS_TXEMPTY    0x04
  60 #define ULITE_STATUS_TXFULL     0x08
  61 #define ULITE_STATUS_IE         0x10
  62 #define ULITE_STATUS_OVERRUN    0x20
  63 #define ULITE_STATUS_FRAME      0x40
  64 #define ULITE_STATUS_PARITY     0x80
  65
  66 #define ULITE_CONTROL_RST_TX    0x01
  67 #define ULITE_CONTROL_RST_RX    0x02
  68 #define ULITE_CONTROL_IE        0x10
  69
  70
  71 static struct uart_port ulite_ports[ULITE_NR_UARTS];
  72
  73 /* ---------------------------------------------------------------------
  74  * Core UART driver operations
  75  */
  76
  77 static int ulite_receive(struct uart_port *port, int stat)
  78 {
  79         struct tty_struct *tty = port->state->port.tty;
  80         unsigned char ch = 0;
  81         char flag = TTY_NORMAL;
  82
  83         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  84                      | ULITE_STATUS_FRAME)) == 0)
  85                 return 0;
  86
  87         /* stats */
  88         if (stat & ULITE_STATUS_RXVALID) {
  89                 port->icount.rx++;
  90                 ch = ioread32be(port->membase + ULITE_RX);
  91
  92                 if (stat & ULITE_STATUS_PARITY)
  93                         port->icount.parity++;
  94         }
  95
  96         if (stat & ULITE_STATUS_OVERRUN)
  97                 port->icount.overrun++;
  98
  99         if (stat & ULITE_STATUS_FRAME)
 100                 port->icount.frame++;
 101
 102
 103         /* drop byte with parity error if IGNPAR specificed */
 104         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 105                 stat &= ~ULITE_STATUS_RXVALID;
 106
 107         stat &= port->read_status_mask;
 108
 109         if (stat & ULITE_STATUS_PARITY)
 110                 flag = TTY_PARITY;
 111
 112
 113         stat &= ~port->ignore_status_mask;
 114
 115         if (stat & ULITE_STATUS_RXVALID)
 116                 tty_insert_flip_char(tty, ch, flag);
 117
 118         if (stat & ULITE_STATUS_FRAME)
 119                 tty_insert_flip_char(tty, 0, TTY_FRAME);
 120
 121         if (stat & ULITE_STATUS_OVERRUN)
 122                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 123
 124         return 1;
 125 }
 126
 127 static int ulite_transmit(struct uart_port *port, int stat)
 128 {
 129         struct circ_buf *xmit  = &port->state->xmit;
 130
 131         if (stat & ULITE_STATUS_TXFULL)
 132                 return 0;
 133
 134         if (port->x_char) {
 135                 iowrite32be(port->x_char, port->membase + ULITE_TX);
 136                 port->x_char = 0;
 137                 port->icount.tx++;
 138                 return 1;
 139         }
 140
 141         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 142                 return 0;
 143
 144         iowrite32be(xmit->buf[xmit->tail], port->membase + ULITE_TX);
 145         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 146         port->icount.tx++;
 147
 148         /* wake up */
 149         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 150                 uart_write_wakeup(port);
 151
 152         return 1;
 153 }
 154
 155 static irqreturn_t ulite_isr(int irq, void *dev_id)
 156 {
 157         struct uart_port *port = dev_id;
 158         int busy, n = 0;
 159
 160         do {
 161                 int stat = ioread32be(port->membase + ULITE_STATUS);
 162                 busy  = ulite_receive(port, stat);
 163                 busy |= ulite_transmit(port, stat);
 164                 n++;
 165         } while (busy);
 166
 167         /* work done? */
 168         if (n > 1) {
 169                 tty_flip_buffer_push(port->state->port.tty);
 170                 return IRQ_HANDLED;
 171         } else {
 172                 return IRQ_NONE;
 173         }
 174 }
 175
 176 static unsigned int ulite_tx_empty(struct uart_port *port)
 177 {
 178         unsigned long flags;
 179         unsigned int ret;
 180
 181         spin_lock_irqsave(&port->lock, flags);
 182         ret = ioread32be(port->membase + ULITE_STATUS);
 183         spin_unlock_irqrestore(&port->lock, flags);
 184
 185         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 186 }
 187
 188 static unsigned int ulite_get_mctrl(struct uart_port *port)
 189 {
 190         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 191 }
 192
 193 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 194 {
 195         /* N/A */
 196 }
 197
 198 static void ulite_stop_tx(struct uart_port *port)
 199 {
 200         /* N/A */
 201 }
 202
 203 static void ulite_start_tx(struct uart_port *port)
 204 {
 205         ulite_transmit(port, ioread32be(port->membase + ULITE_STATUS));
 206 }
 207
 208 static void ulite_stop_rx(struct uart_port *port)
 209 {
 210         /* don't forward any more data (like !CREAD) */
 211         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 212                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 213 }
 214
 215 static void ulite_enable_ms(struct uart_port *port)
 216 {
 217         /* N/A */
 218 }
 219
 220 static void ulite_break_ctl(struct uart_port *port, int ctl)
 221 {
 222         /* N/A */
 223 }
 224
 225 static int ulite_startup(struct uart_port *port)
 226 {
 227         int ret;
 228
 229         ret = request_irq(port->irq, ulite_isr,
 230                           IRQF_SHARED | IRQF_SAMPLE_RANDOM, "uartlite", port);
 231         if (ret)
 232                 return ret;
 233
 234         iowrite32be(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 235                port->membase + ULITE_CONTROL);
 236         iowrite32be(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
 237
 238         return 0;
 239 }
 240
 241 static void ulite_shutdown(struct uart_port *port)
 242 {
 243         iowrite32be(0, port->membase + ULITE_CONTROL);
 244         ioread32be(port->membase + ULITE_CONTROL); /* dummy */
 245         free_irq(port->irq, port);
 246 }
 247
 248 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 249                               struct ktermios *old)
 250 {
 251         unsigned long flags;
 252         unsigned int baud;
 253
 254         spin_lock_irqsave(&port->lock, flags);
 255
 256         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 257                 | ULITE_STATUS_TXFULL;
 258
 259         if (termios->c_iflag & INPCK)
 260                 port->read_status_mask |=
 261                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 262
 263         port->ignore_status_mask = 0;
 264         if (termios->c_iflag & IGNPAR)
 265                 port->ignore_status_mask |= ULITE_STATUS_PARITY
 266                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 267
 268         /* ignore all characters if CREAD is not set */
 269         if ((termios->c_cflag & CREAD) == 0)
 270                 port->ignore_status_mask |=
 271                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 272                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 273
 274         /* update timeout */
 275         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 276         uart_update_timeout(port, termios->c_cflag, baud);
 277
 278         spin_unlock_irqrestore(&port->lock, flags);
 279 }
 280
 281 static const char *ulite_type(struct uart_port *port)
 282 {
 283         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 284 }
 285
 286 static void ulite_release_port(struct uart_port *port)
 287 {
 288         release_mem_region(port->mapbase, ULITE_REGION);
 289         iounmap(port->membase);
 290         port->membase = NULL;
 291 }
 292
 293 static int ulite_request_port(struct uart_port *port)
 294 {
 295         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
 296                  port, (unsigned long long) port->mapbase);
 297
 298         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 299                 dev_err(port->dev, "Memory region busy\n");
 300                 return -EBUSY;
 301         }
 302
 303         port->membase = ioremap(port->mapbase, ULITE_REGION);
 304         if (!port->membase) {
 305                 dev_err(port->dev, "Unable to map registers\n");
 306                 release_mem_region(port->mapbase, ULITE_REGION);
 307                 return -EBUSY;
 308         }
 309
 310         return 0;
 311 }
 312
 313 static void ulite_config_port(struct uart_port *port, int flags)
 314 {
 315         if (!ulite_request_port(port))
 316                 port->type = PORT_UARTLITE;
 317 }
 318
 319 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 320 {
 321         /* we don't want the core code to modify any port params */
 322         return -EINVAL;
 323 }
 324
 325 #ifdef CONFIG_CONSOLE_POLL
 326 static int ulite_get_poll_char(struct uart_port *port)
 327 {
 328         if (!(ioread32be(port->membase + ULITE_STATUS)
 329                                                 & ULITE_STATUS_RXVALID))
 330                 return NO_POLL_CHAR;
 331
 332         return ioread32be(port->membase + ULITE_RX);
 333 }
 334
 335 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
 336 {
 337         while (ioread32be(port->membase + ULITE_STATUS) & ULITE_STATUS_TXFULL)
 338                 cpu_relax();
 339
 340         /* write char to device */
 341         iowrite32be(ch, port->membase + ULITE_TX);
 342 }
 343 #endif
 344
 345 static struct uart_ops ulite_ops = {
 346         .tx_empty       = ulite_tx_empty,
 347         .set_mctrl      = ulite_set_mctrl,
 348         .get_mctrl      = ulite_get_mctrl,
 349         .stop_tx        = ulite_stop_tx,
 350         .start_tx       = ulite_start_tx,
 351         .stop_rx        = ulite_stop_rx,
 352         .enable_ms      = ulite_enable_ms,
 353         .break_ctl      = ulite_break_ctl,
 354         .startup        = ulite_startup,
 355         .shutdown       = ulite_shutdown,
 356         .set_termios    = ulite_set_termios,
 357         .type           = ulite_type,
 358         .release_port   = ulite_release_port,
 359         .request_port   = ulite_request_port,
 360         .config_port    = ulite_config_port,
 361         .verify_port    = ulite_verify_port,
 362 #ifdef CONFIG_CONSOLE_POLL
 363         .poll_get_char  = ulite_get_poll_char,
 364         .poll_put_char  = ulite_put_poll_char,
 365 #endif
 366 };
 367
 368 /* ---------------------------------------------------------------------
 369  * Console driver operations
 370  */
 371
 372 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 373 static void ulite_console_wait_tx(struct uart_port *port)
 374 {
 375         int i;
 376         u8 val;
 377
 378         /* Spin waiting for TX fifo to have space available */
 379         for (i = 0; i < 100000; i++) {
 380                 val = ioread32be(port->membase + ULITE_STATUS);
 381                 if ((val & ULITE_STATUS_TXFULL) == 0)
 382                         break;
 383                 cpu_relax();
 384         }
 385 }
 386
 387 static void ulite_console_putchar(struct uart_port *port, int ch)
 388 {
 389         ulite_console_wait_tx(port);
 390         iowrite32be(ch, port->membase + ULITE_TX);
 391 }
 392
 393 static void ulite_console_write(struct console *co, const char *s,
 394                                 unsigned int count)
 395 {
 396         struct uart_port *port = &ulite_ports[co->index];
 397         unsigned long flags;
 398         unsigned int ier;
 399         int locked = 1;
 400
 401         if (oops_in_progress) {
 402                 locked = spin_trylock_irqsave(&port->lock, flags);
 403         } else
 404                 spin_lock_irqsave(&port->lock, flags);
 405
 406         /* save and disable interrupt */
 407         ier = ioread32be(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
 408         iowrite32be(0, port->membase + ULITE_CONTROL);
 409
 410         uart_console_write(port, s, count, ulite_console_putchar);
 411
 412         ulite_console_wait_tx(port);
 413
 414         /* restore interrupt state */
 415         if (ier)
 416                 iowrite32be(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
 417
 418         if (locked)
 419                 spin_unlock_irqrestore(&port->lock, flags);
 420 }
 421
 422 static int __devinit ulite_console_setup(struct console *co, char *options)
 423 {
 424         struct uart_port *port;
 425         int baud = 9600;
 426         int bits = 8;
 427         int parity = 'n';
 428         int flow = 'n';
 429
 430         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
 431                 return -EINVAL;
 432
 433         port = &ulite_ports[co->index];
 434
 435         /* Has the device been initialized yet? */
 436         if (!port->mapbase) {
 437                 pr_debug("console on ttyUL%i not present\n", co->index);
 438                 return -ENODEV;
 439         }
 440
 441         /* not initialized yet? */
 442         if (!port->membase) {
 443                 if (ulite_request_port(port))
 444                         return -ENODEV;
 445         }
 446
 447         if (options)
 448                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 449
 450         return uart_set_options(port, co, baud, parity, bits, flow);
 451 }
 452
 453 static struct uart_driver ulite_uart_driver;
 454
 455 static struct console ulite_console = {
 456         .name   = ULITE_NAME,
 457         .write  = ulite_console_write,
 458         .device = uart_console_device,
 459         .setup  = ulite_console_setup,
 460         .flags  = CON_PRINTBUFFER,
 461         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 462         .data   = &ulite_uart_driver,
 463 };
 464
 465 static int __init ulite_console_init(void)
 466 {
 467         register_console(&ulite_console);
 468         return 0;
 469 }
 470
 471 console_initcall(ulite_console_init);
 472
 473 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 474
 475 static struct uart_driver ulite_uart_driver = {
 476         .owner          = THIS_MODULE,
 477         .driver_name    = "uartlite",
 478         .dev_name       = ULITE_NAME,
 479         .major          = ULITE_MAJOR,
 480         .minor          = ULITE_MINOR,
 481         .nr             = ULITE_NR_UARTS,
 482 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 483         .cons           = &ulite_console,
 484 #endif
 485 };
 486
 487 /* ---------------------------------------------------------------------
 488  * Port assignment functions (mapping devices to uart_port structures)
 489  */
 490
 491 /** ulite_assign: register a uartlite device with the driver
 492  *
 493  * @dev: pointer to device structure
 494  * @id: requested id number.  Pass -1 for automatic port assignment
 495  * @base: base address of uartlite registers
 496  * @irq: irq number for uartlite
 497  *
 498  * Returns: 0 on success, <0 otherwise
 499  */
 500 static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
 501 {
 502         struct uart_port *port;
 503         int rc;
 504
 505         /* if id = -1; then scan for a free id and use that */
 506         if (id < 0) {
 507                 for (id = 0; id < ULITE_NR_UARTS; id++)
 508                         if (ulite_ports[id].mapbase == 0)
 509                                 break;
 510         }
 511         if (id < 0 || id >= ULITE_NR_UARTS) {
 512                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 513                 return -EINVAL;
 514         }
 515
 516         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 517                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 518                         ULITE_NAME, id);
 519                 return -EBUSY;
 520         }
 521
 522         port = &ulite_ports[id];
 523
 524         spin_lock_init(&port->lock);
 525         port->fifosize = 16;
 526         port->regshift = 2;
 527         port->iotype = UPIO_MEM;
 528         port->iobase = 1; /* mark port in use */
 529         port->mapbase = base;
 530         port->membase = NULL;
 531         port->ops = &ulite_ops;
 532         port->irq = irq;
 533         port->flags = UPF_BOOT_AUTOCONF;
 534         port->dev = dev;
 535         port->type = PORT_UNKNOWN;
 536         port->line = id;
 537
 538         dev_set_drvdata(dev, port);
 539
 540         /* Register the port */
 541         rc = uart_add_one_port(&ulite_uart_driver, port);
 542         if (rc) {
 543                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 544                 port->mapbase = 0;
 545                 dev_set_drvdata(dev, NULL);
 546                 return rc;
 547         }
 548
 549         return 0;
 550 }
 551
 552 /** ulite_release: register a uartlite device with the driver
 553  *
 554  * @dev: pointer to device structure
 555  */
 556 static int __devexit ulite_release(struct device *dev)
 557 {
 558         struct uart_port *port = dev_get_drvdata(dev);
 559         int rc = 0;
 560
 561         if (port) {
 562                 rc = uart_remove_one_port(&ulite_uart_driver, port);
 563                 dev_set_drvdata(dev, NULL);
 564                 port->mapbase = 0;
 565         }
 566
 567         return rc;
 568 }
 569
 570 /* ---------------------------------------------------------------------
 571  * Platform bus binding
 572  */
 573
 574 static int __devinit ulite_probe(struct platform_device *pdev)
 575 {
 576         struct resource *res, *res2;
 577
 578         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 579         if (!res)
 580                 return -ENODEV;
 581
 582         res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 583         if (!res2)
 584                 return -ENODEV;
 585
 586         return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
 587 }
 588
 589 static int __devexit ulite_remove(struct platform_device *pdev)
 590 {
 591         return ulite_release(&pdev->dev);
 592 }
 593
 594 /* work with hotplug and coldplug */
 595 MODULE_ALIAS("platform:uartlite");
 596
 597 static struct platform_driver ulite_platform_driver = {
 598         .probe  = ulite_probe,
 599         .remove = __devexit_p(ulite_remove),
 600         .driver = {
 601                    .owner = THIS_MODULE,
 602                    .name  = "uartlite",
 603                    },
 604 };
 605
 606 /* ---------------------------------------------------------------------
 607  * OF bus bindings
 608  */
 609 #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
 610 static int __devinit
 611 ulite_of_probe(struct platform_device *op, const struct of_device_id *match)
 612 {
 613         struct resource res;
 614         const unsigned int *id;
 615         int irq, rc;
 616
 617         dev_dbg(&op->dev, "%s(%p, %p)\n", __func__, op, match);
 618
 619         rc = of_address_to_resource(op->dev.of_node, 0, &res);
 620         if (rc) {
 621                 dev_err(&op->dev, "invalid address\n");
 622                 return rc;
 623         }
 624
 625         irq = irq_of_parse_and_map(op->dev.of_node, 0);
 626
 627         id = of_get_property(op->dev.of_node, "port-number", NULL);
 628
 629         return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
 630 }
 631
 632 static int __devexit ulite_of_remove(struct platform_device *op)
 633 {
 634         return ulite_release(&op->dev);
 635 }
 636
 637 static struct of_platform_driver ulite_of_driver = {
 638         .probe = ulite_of_probe,
 639         .remove = __devexit_p(ulite_of_remove),
 640         .driver = {
 641                 .name = "uartlite",
 642                 .owner = THIS_MODULE,
 643                 .of_match_table = ulite_of_match,
 644         },
 645 };
 646
 647 /* Registration helpers to keep the number of #ifdefs to a minimum */
 648 static inline int __init ulite_of_register(void)
 649 {
 650         pr_debug("uartlite: calling of_register_platform_driver()\n");
 651         return of_register_platform_driver(&ulite_of_driver);
 652 }
 653
 654 static inline void __exit ulite_of_unregister(void)
 655 {
 656         of_unregister_platform_driver(&ulite_of_driver);
 657 }
 658 #else /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
 659 /* Appropriate config not enabled; do nothing helpers */
 660 static inline int __init ulite_of_register(void) { return 0; }
 661 static inline void __exit ulite_of_unregister(void) { }
 662 #endif /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
 663
 664 /* ---------------------------------------------------------------------
 665  * Module setup/teardown
 666  */
 667
 668 int __init ulite_init(void)
 669 {
 670         int ret;
 671
 672         pr_debug("uartlite: calling uart_register_driver()\n");
 673         ret = uart_register_driver(&ulite_uart_driver);
 674         if (ret)
 675                 goto err_uart;
 676
 677         ret = ulite_of_register();
 678         if (ret)
 679                 goto err_of;
 680
 681         pr_debug("uartlite: calling platform_driver_register()\n");
 682         ret = platform_driver_register(&ulite_platform_driver);
 683         if (ret)
 684                 goto err_plat;
 685
 686         return 0;
 687
 688 err_plat:
 689         ulite_of_unregister();
 690 err_of:
 691         uart_unregister_driver(&ulite_uart_driver);
 692 err_uart:
 693         printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
 694         return ret;
 695 }
 696
 697 void __exit ulite_exit(void)
 698 {
 699         platform_driver_unregister(&ulite_platform_driver);
 700         ulite_of_unregister();
 701         uart_unregister_driver(&ulite_uart_driver);
 702 }
 703
 704 module_init(ulite_init);
 705 module_exit(ulite_exit);
 706
 707 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 708 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 709 MODULE_LICENSE("GPL");