drivers/serial/bfin_5xx.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2010 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #define DRIVER_NAME "bfin-uart"
  16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  17
  18 #include <linux/module.h>
  19 #include <linux/ioport.h>
  20 #include <linux/gfp.h>
  21 #include <linux/io.h>
  22 #include <linux/init.h>
  23 #include <linux/console.h>
  24 #include <linux/sysrq.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/tty.h>
  27 #include <linux/tty_flip.h>
  28 #include <linux/serial_core.h>
  29 #include <linux/gpio.h>
  30 #include <linux/irq.h>
  31 #include <linux/kgdb.h>
  32 #include <linux/slab.h>
  33 #include <linux/dma-mapping.h>
  34
  35 #include <asm/portmux.h>
  36 #include <asm/cacheflush.h>
  37 #include <asm/dma.h>
  38
  39 #define port_membase(uart)     (((struct bfin_serial_port *)(uart))->port.membase)
  40 #define get_lsr_cache(uart)    (((struct bfin_serial_port *)(uart))->lsr)
  41 #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
  42 #include <asm/bfin_serial.h>
  43
  44 #ifdef CONFIG_SERIAL_BFIN_MODULE
  45 # undef CONFIG_EARLY_PRINTK
  46 #endif
  47
  48 #ifdef CONFIG_SERIAL_BFIN_MODULE
  49 # undef CONFIG_EARLY_PRINTK
  50 #endif
  51
  52 /* UART name and device definitions */
  53 #define BFIN_SERIAL_DEV_NAME    "ttyBF"
  54 #define BFIN_SERIAL_MAJOR       204
  55 #define BFIN_SERIAL_MINOR       64
  56
  57 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  58
  59 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  60         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  61
  62 # ifndef CONFIG_SERIAL_BFIN_PIO
  63 #  error KGDB only support UART in PIO mode.
  64 # endif
  65
  66 static int kgdboc_port_line;
  67 static int kgdboc_break_enabled;
  68 #endif
  69 /*
  70  * Setup for console. Argument comes from the menuconfig
  71  */
  72 #define DMA_RX_XCOUNT           512
  73 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  74
  75 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  76
  77 #ifdef CONFIG_SERIAL_BFIN_DMA
  78 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  79 #else
  80 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  81 #endif
  82
  83 static void bfin_serial_reset_irda(struct uart_port *port);
  84
  85 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  86         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  87 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  88 {
  89         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  90         if (uart->cts_pin < 0)
  91                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  92
  93         /* CTS PIN is negative assertive. */
  94         if (UART_GET_CTS(uart))
  95                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  96         else
  97                 return TIOCM_DSR | TIOCM_CAR;
  98 }
  99
 100 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 101 {
 102         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 103         if (uart->rts_pin < 0)
 104                 return;
 105
 106         /* RTS PIN is negative assertive. */
 107         if (mctrl & TIOCM_RTS)
 108                 UART_ENABLE_RTS(uart);
 109         else
 110                 UART_DISABLE_RTS(uart);
 111 }
 112
 113 /*
 114  * Handle any change of modem status signal.
 115  */
 116 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 117 {
 118         struct bfin_serial_port *uart = dev_id;
 119         unsigned int status;
 120
 121         status = bfin_serial_get_mctrl(&uart->port);
 122         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 123 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 124         uart->scts = 1;
 125         UART_CLEAR_SCTS(uart);
 126         UART_CLEAR_IER(uart, EDSSI);
 127 #endif
 128
 129         return IRQ_HANDLED;
 130 }
 131 #else
 132 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 133 {
 134         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 135 }
 136
 137 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 138 {
 139 }
 140 #endif
 141
 142 /*
 143  * interrupts are disabled on entry
 144  */
 145 static void bfin_serial_stop_tx(struct uart_port *port)
 146 {
 147         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 148 #ifdef CONFIG_SERIAL_BFIN_DMA
 149         struct circ_buf *xmit = &uart->port.state->xmit;
 150 #endif
 151
 152         while (!(UART_GET_LSR(uart) & TEMT))
 153                 cpu_relax();
 154
 155 #ifdef CONFIG_SERIAL_BFIN_DMA
 156         disable_dma(uart->tx_dma_channel);
 157         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 158         uart->port.icount.tx += uart->tx_count;
 159         uart->tx_count = 0;
 160         uart->tx_done = 1;
 161 #else
 162 #ifdef CONFIG_BF54x
 163         /* Clear TFI bit */
 164         UART_PUT_LSR(uart, TFI);
 165 #endif
 166         UART_CLEAR_IER(uart, ETBEI);
 167 #endif
 168 }
 169
 170 /*
 171  * port is locked and interrupts are disabled
 172  */
 173 static void bfin_serial_start_tx(struct uart_port *port)
 174 {
 175         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 176         struct tty_struct *tty = uart->port.state->port.tty;
 177
 178 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 179         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 180                 uart->scts = 0;
 181                 uart_handle_cts_change(&uart->port, uart->scts);
 182         }
 183 #endif
 184
 185         /*
 186          * To avoid losting RX interrupt, we reset IR function
 187          * before sending data.
 188          */
 189         if (tty->termios->c_line == N_IRDA)
 190                 bfin_serial_reset_irda(port);
 191
 192 #ifdef CONFIG_SERIAL_BFIN_DMA
 193         if (uart->tx_done)
 194                 bfin_serial_dma_tx_chars(uart);
 195 #else
 196         UART_SET_IER(uart, ETBEI);
 197         bfin_serial_tx_chars(uart);
 198 #endif
 199 }
 200
 201 /*
 202  * Interrupts are enabled
 203  */
 204 static void bfin_serial_stop_rx(struct uart_port *port)
 205 {
 206         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 207
 208         UART_CLEAR_IER(uart, ERBFI);
 209 }
 210
 211 /*
 212  * Set the modem control timer to fire immediately.
 213  */
 214 static void bfin_serial_enable_ms(struct uart_port *port)
 215 {
 216 }
 217
 218
 219 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 220 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 221 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 222 #else
 223 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 224 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 225 #endif
 226
 227 #ifdef CONFIG_SERIAL_BFIN_PIO
 228 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 229 {
 230         struct tty_struct *tty = NULL;
 231         unsigned int status, ch, flg;
 232         static struct timeval anomaly_start = { .tv_sec = 0 };
 233
 234         status = UART_GET_LSR(uart);
 235         UART_CLEAR_LSR(uart);
 236
 237         ch = UART_GET_CHAR(uart);
 238         uart->port.icount.rx++;
 239
 240 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 241         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 242         if (kgdb_connected && kgdboc_port_line == uart->port.line
 243                 && kgdboc_break_enabled)
 244                 if (ch == 0x3) {/* Ctrl + C */
 245                         kgdb_breakpoint();
 246                         return;
 247                 }
 248
 249         if (!uart->port.state || !uart->port.state->port.tty)
 250                 return;
 251 #endif
 252         tty = uart->port.state->port.tty;
 253
 254         if (ANOMALY_05000363) {
 255                 /* The BF533 (and BF561) family of processors have a nice anomaly
 256                  * where they continuously generate characters for a "single" break.
 257                  * We have to basically ignore this flood until the "next" valid
 258                  * character comes across.  Due to the nature of the flood, it is
 259                  * not possible to reliably catch bytes that are sent too quickly
 260                  * after this break.  So application code talking to the Blackfin
 261                  * which sends a break signal must allow at least 1.5 character
 262                  * times after the end of the break for things to stabilize.  This
 263                  * timeout was picked as it must absolutely be larger than 1
 264                  * character time +/- some percent.  So 1.5 sounds good.  All other
 265                  * Blackfin families operate properly.  Woo.
 266                  */
 267                 if (anomaly_start.tv_sec) {
 268                         struct timeval curr;
 269                         suseconds_t usecs;
 270
 271                         if ((~ch & (~ch + 1)) & 0xff)
 272                                 goto known_good_char;
 273
 274                         do_gettimeofday(&curr);
 275                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 276                                 goto known_good_char;
 277
 278                         usecs = 0;
 279                         if (curr.tv_sec != anomaly_start.tv_sec)
 280                                 usecs += USEC_PER_SEC;
 281                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 282
 283                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 284                                 goto known_good_char;
 285
 286                         if (ch)
 287                                 anomaly_start.tv_sec = 0;
 288                         else
 289                                 anomaly_start = curr;
 290
 291                         return;
 292
 293  known_good_char:
 294                         status &= ~BI;
 295                         anomaly_start.tv_sec = 0;
 296                 }
 297         }
 298
 299         if (status & BI) {
 300                 if (ANOMALY_05000363)
 301                         if (bfin_revid() < 5)
 302                                 do_gettimeofday(&anomaly_start);
 303                 uart->port.icount.brk++;
 304                 if (uart_handle_break(&uart->port))
 305                         goto ignore_char;
 306                 status &= ~(PE | FE);
 307         }
 308         if (status & PE)
 309                 uart->port.icount.parity++;
 310         if (status & OE)
 311                 uart->port.icount.overrun++;
 312         if (status & FE)
 313                 uart->port.icount.frame++;
 314
 315         status &= uart->port.read_status_mask;
 316
 317         if (status & BI)
 318                 flg = TTY_BREAK;
 319         else if (status & PE)
 320                 flg = TTY_PARITY;
 321         else if (status & FE)
 322                 flg = TTY_FRAME;
 323         else
 324                 flg = TTY_NORMAL;
 325
 326         if (uart_handle_sysrq_char(&uart->port, ch))
 327                 goto ignore_char;
 328
 329         uart_insert_char(&uart->port, status, OE, ch, flg);
 330
 331  ignore_char:
 332         tty_flip_buffer_push(tty);
 333 }
 334
 335 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 336 {
 337         struct circ_buf *xmit = &uart->port.state->xmit;
 338
 339         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 340 #ifdef CONFIG_BF54x
 341                 /* Clear TFI bit */
 342                 UART_PUT_LSR(uart, TFI);
 343 #endif
 344                 /* Anomaly notes:
 345                  *  05000215 -  we always clear ETBEI within last UART TX
 346                  *              interrupt to end a string. It is always set
 347                  *              when start a new tx.
 348                  */
 349                 UART_CLEAR_IER(uart, ETBEI);
 350                 return;
 351         }
 352
 353         if (uart->port.x_char) {
 354                 UART_PUT_CHAR(uart, uart->port.x_char);
 355                 uart->port.icount.tx++;
 356                 uart->port.x_char = 0;
 357         }
 358
 359         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 360                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 361                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 362                 uart->port.icount.tx++;
 363         }
 364
 365         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 366                 uart_write_wakeup(&uart->port);
 367 }
 368
 369 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 370 {
 371         struct bfin_serial_port *uart = dev_id;
 372
 373         spin_lock(&uart->port.lock);
 374         while (UART_GET_LSR(uart) & DR)
 375                 bfin_serial_rx_chars(uart);
 376         spin_unlock(&uart->port.lock);
 377
 378         return IRQ_HANDLED;
 379 }
 380
 381 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 382 {
 383         struct bfin_serial_port *uart = dev_id;
 384
 385 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 386         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 387                 uart->scts = 0;
 388                 uart_handle_cts_change(&uart->port, uart->scts);
 389         }
 390 #endif
 391         spin_lock(&uart->port.lock);
 392         if (UART_GET_LSR(uart) & THRE)
 393                 bfin_serial_tx_chars(uart);
 394         spin_unlock(&uart->port.lock);
 395
 396         return IRQ_HANDLED;
 397 }
 398 #endif
 399
 400 #ifdef CONFIG_SERIAL_BFIN_DMA
 401 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 402 {
 403         struct circ_buf *xmit = &uart->port.state->xmit;
 404
 405         uart->tx_done = 0;
 406
 407         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 408                 uart->tx_count = 0;
 409                 uart->tx_done = 1;
 410                 return;
 411         }
 412
 413         if (uart->port.x_char) {
 414                 UART_PUT_CHAR(uart, uart->port.x_char);
 415                 uart->port.icount.tx++;
 416                 uart->port.x_char = 0;
 417         }
 418
 419         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 420         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 421                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 422         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 423                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 424         set_dma_config(uart->tx_dma_channel,
 425                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 426                         INTR_ON_BUF,
 427                         DIMENSION_LINEAR,
 428                         DATA_SIZE_8,
 429                         DMA_SYNC_RESTART));
 430         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 431         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 432         set_dma_x_modify(uart->tx_dma_channel, 1);
 433         SSYNC();
 434         enable_dma(uart->tx_dma_channel);
 435
 436         UART_SET_IER(uart, ETBEI);
 437 }
 438
 439 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 440 {
 441         struct tty_struct *tty = uart->port.state->port.tty;
 442         int i, flg, status;
 443
 444         status = UART_GET_LSR(uart);
 445         UART_CLEAR_LSR(uart);
 446
 447         uart->port.icount.rx +=
 448                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 449                 UART_XMIT_SIZE);
 450
 451         if (status & BI) {
 452                 uart->port.icount.brk++;
 453                 if (uart_handle_break(&uart->port))
 454                         goto dma_ignore_char;
 455                 status &= ~(PE | FE);
 456         }
 457         if (status & PE)
 458                 uart->port.icount.parity++;
 459         if (status & OE)
 460                 uart->port.icount.overrun++;
 461         if (status & FE)
 462                 uart->port.icount.frame++;
 463
 464         status &= uart->port.read_status_mask;
 465
 466         if (status & BI)
 467                 flg = TTY_BREAK;
 468         else if (status & PE)
 469                 flg = TTY_PARITY;
 470         else if (status & FE)
 471                 flg = TTY_FRAME;
 472         else
 473                 flg = TTY_NORMAL;
 474
 475         for (i = uart->rx_dma_buf.tail; ; i++) {
 476                 if (i >= UART_XMIT_SIZE)
 477                         i = 0;
 478                 if (i == uart->rx_dma_buf.head)
 479                         break;
 480                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 481                         uart_insert_char(&uart->port, status, OE,
 482                                 uart->rx_dma_buf.buf[i], flg);
 483         }
 484
 485  dma_ignore_char:
 486         tty_flip_buffer_push(tty);
 487 }
 488
 489 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 490 {
 491         int x_pos, pos;
 492
 493         dma_disable_irq(uart->tx_dma_channel);
 494         dma_disable_irq(uart->rx_dma_channel);
 495         spin_lock_bh(&uart->port.lock);
 496
 497         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 498          * curr_x_count can't be read as an atomic operation,
 499          * curr_y_count should be read before curr_x_count. When
 500          * curr_x_count is read, curr_y_count may already indicate
 501          * next buffer line. But, the position calculated here is
 502          * still indicate the old line. The wrong position data may
 503          * be smaller than current buffer tail, which cause garbages
 504          * are received if it is not prohibit.
 505          */
 506         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 507         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 508         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 509         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 510                 uart->rx_dma_nrows = 0;
 511         x_pos = DMA_RX_XCOUNT - x_pos;
 512         if (x_pos == DMA_RX_XCOUNT)
 513                 x_pos = 0;
 514
 515         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 516         /* Ignore receiving data if new position is in the same line of
 517          * current buffer tail and small.
 518          */
 519         if (pos > uart->rx_dma_buf.tail ||
 520                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 521                 uart->rx_dma_buf.head = pos;
 522                 bfin_serial_dma_rx_chars(uart);
 523                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 524         }
 525
 526         spin_unlock_bh(&uart->port.lock);
 527         dma_enable_irq(uart->tx_dma_channel);
 528         dma_enable_irq(uart->rx_dma_channel);
 529
 530         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 531 }
 532
 533 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 534 {
 535         struct bfin_serial_port *uart = dev_id;
 536         struct circ_buf *xmit = &uart->port.state->xmit;
 537
 538 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 539         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
 540                 uart->scts = 0;
 541                 uart_handle_cts_change(&uart->port, uart->scts);
 542         }
 543 #endif
 544
 545         spin_lock(&uart->port.lock);
 546         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 547                 disable_dma(uart->tx_dma_channel);
 548                 clear_dma_irqstat(uart->tx_dma_channel);
 549                 /* Anomaly notes:
 550                  *  05000215 -  we always clear ETBEI within last UART TX
 551                  *              interrupt to end a string. It is always set
 552                  *              when start a new tx.
 553                  */
 554                 UART_CLEAR_IER(uart, ETBEI);
 555                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 556                 uart->port.icount.tx += uart->tx_count;
 557
 558                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 559                         uart_write_wakeup(&uart->port);
 560
 561                 bfin_serial_dma_tx_chars(uart);
 562         }
 563
 564         spin_unlock(&uart->port.lock);
 565         return IRQ_HANDLED;
 566 }
 567
 568 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 569 {
 570         struct bfin_serial_port *uart = dev_id;
 571         unsigned short irqstat;
 572         int x_pos, pos;
 573
 574         spin_lock(&uart->port.lock);
 575         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 576         clear_dma_irqstat(uart->rx_dma_channel);
 577
 578         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 579         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 580         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 581         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 582                 uart->rx_dma_nrows = 0;
 583
 584         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 585         if (pos > uart->rx_dma_buf.tail ||
 586                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 587                 uart->rx_dma_buf.head = pos;
 588                 bfin_serial_dma_rx_chars(uart);
 589                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 590         }
 591
 592         spin_unlock(&uart->port.lock);
 593
 594         return IRQ_HANDLED;
 595 }
 596 #endif
 597
 598 /*
 599  * Return TIOCSER_TEMT when transmitter is not busy.
 600  */
 601 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 602 {
 603         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 604         unsigned short lsr;
 605
 606         lsr = UART_GET_LSR(uart);
 607         if (lsr & TEMT)
 608                 return TIOCSER_TEMT;
 609         else
 610                 return 0;
 611 }
 612
 613 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 614 {
 615         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 616         u16 lcr = UART_GET_LCR(uart);
 617         if (break_state)
 618                 lcr |= SB;
 619         else
 620                 lcr &= ~SB;
 621         UART_PUT_LCR(uart, lcr);
 622         SSYNC();
 623 }
 624
 625 static int bfin_serial_startup(struct uart_port *port)
 626 {
 627         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 628
 629 #ifdef CONFIG_SERIAL_BFIN_DMA
 630         dma_addr_t dma_handle;
 631
 632         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 633                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 634                 return -EBUSY;
 635         }
 636
 637         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 638                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 639                 free_dma(uart->rx_dma_channel);
 640                 return -EBUSY;
 641         }
 642
 643         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 644         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 645
 646         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 647         uart->rx_dma_buf.head = 0;
 648         uart->rx_dma_buf.tail = 0;
 649         uart->rx_dma_nrows = 0;
 650
 651         set_dma_config(uart->rx_dma_channel,
 652                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 653                                 INTR_ON_ROW, DIMENSION_2D,
 654                                 DATA_SIZE_8,
 655                                 DMA_SYNC_RESTART));
 656         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 657         set_dma_x_modify(uart->rx_dma_channel, 1);
 658         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 659         set_dma_y_modify(uart->rx_dma_channel, 1);
 660         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 661         enable_dma(uart->rx_dma_channel);
 662
 663         uart->rx_dma_timer.data = (unsigned long)(uart);
 664         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 665         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 666         add_timer(&(uart->rx_dma_timer));
 667 #else
 668 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 669         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 670         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 671                 kgdboc_break_enabled = 0;
 672         else {
 673 # endif
 674         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 675              "BFIN_UART_RX", uart)) {
 676                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 677                 return -EBUSY;
 678         }
 679
 680         if (request_irq
 681             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 682              "BFIN_UART_TX", uart)) {
 683                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 684                 free_irq(uart->port.irq, uart);
 685                 return -EBUSY;
 686         }
 687
 688 # ifdef CONFIG_BF54x
 689         {
 690                 /*
 691                  * UART2 and UART3 on BF548 share interrupt PINs and DMA
 692                  * controllers with SPORT2 and SPORT3. UART rx and tx
 693                  * interrupts are generated in PIO mode only when configure
 694                  * their peripheral mapping registers properly, which means
 695                  * request corresponding DMA channels in PIO mode as well.
 696                  */
 697                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 698
 699                 switch (uart->port.irq) {
 700                 case IRQ_UART3_RX:
 701                         uart_dma_ch_rx = CH_UART3_RX;
 702                         uart_dma_ch_tx = CH_UART3_TX;
 703                         break;
 704                 case IRQ_UART2_RX:
 705                         uart_dma_ch_rx = CH_UART2_RX;
 706                         uart_dma_ch_tx = CH_UART2_TX;
 707                         break;
 708                 default:
 709                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 710                         break;
 711                 };
 712
 713                 if (uart_dma_ch_rx &&
 714                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 715                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 716                         free_irq(uart->port.irq, uart);
 717                         free_irq(uart->port.irq + 1, uart);
 718                         return -EBUSY;
 719                 }
 720                 if (uart_dma_ch_tx &&
 721                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 722                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 723                         free_dma(uart_dma_ch_rx);
 724                         free_irq(uart->port.irq, uart);
 725                         free_irq(uart->port.irq + 1, uart);
 726                         return -EBUSY;
 727                 }
 728         }
 729 # endif
 730 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 731         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 732         }
 733 # endif
 734 #endif
 735
 736 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 737         if (uart->cts_pin >= 0) {
 738                 if (request_irq(gpio_to_irq(uart->cts_pin),
 739                         bfin_serial_mctrl_cts_int,
 740                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 741                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
 742                         uart->cts_pin = -1;
 743                         pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
 744                 }
 745         }
 746         if (uart->rts_pin >= 0) {
 747                 gpio_direction_output(uart->rts_pin, 0);
 748         }
 749 #endif
 750 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 751         if (uart->cts_pin >= 0 && request_irq(uart->status_irq,
 752                 bfin_serial_mctrl_cts_int,
 753                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 754                 uart->cts_pin = -1;
 755                 pr_info("Unable to attach BlackFin UART Modem Status interrupt.\n");
 756         }
 757
 758         /* CTS RTS PINs are negative assertive. */
 759         UART_PUT_MCR(uart, ACTS);
 760         UART_SET_IER(uart, EDSSI);
 761 #endif
 762
 763         UART_SET_IER(uart, ERBFI);
 764         return 0;
 765 }
 766
 767 static void bfin_serial_shutdown(struct uart_port *port)
 768 {
 769         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 770
 771 #ifdef CONFIG_SERIAL_BFIN_DMA
 772         disable_dma(uart->tx_dma_channel);
 773         free_dma(uart->tx_dma_channel);
 774         disable_dma(uart->rx_dma_channel);
 775         free_dma(uart->rx_dma_channel);
 776         del_timer(&(uart->rx_dma_timer));
 777         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 778 #else
 779 #ifdef CONFIG_BF54x
 780         switch (uart->port.irq) {
 781         case IRQ_UART3_RX:
 782                 free_dma(CH_UART3_RX);
 783                 free_dma(CH_UART3_TX);
 784                 break;
 785         case IRQ_UART2_RX:
 786                 free_dma(CH_UART2_RX);
 787                 free_dma(CH_UART2_TX);
 788                 break;
 789         default:
 790                 break;
 791         };
 792 #endif
 793         free_irq(uart->port.irq, uart);
 794         free_irq(uart->port.irq+1, uart);
 795 #endif
 796
 797 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 798         if (uart->cts_pin >= 0)
 799                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 800 #endif
 801 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 802         if (uart->cts_pin >= 0)
 803                 free_irq(uart->status_irq, uart);
 804 #endif
 805 }
 806
 807 static void
 808 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 809                    struct ktermios *old)
 810 {
 811         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 812         unsigned long flags;
 813         unsigned int baud, quot;
 814         unsigned short val, ier, lcr = 0;
 815
 816         switch (termios->c_cflag & CSIZE) {
 817         case CS8:
 818                 lcr = WLS(8);
 819                 break;
 820         case CS7:
 821                 lcr = WLS(7);
 822                 break;
 823         case CS6:
 824                 lcr = WLS(6);
 825                 break;
 826         case CS5:
 827                 lcr = WLS(5);
 828                 break;
 829         default:
 830                 printk(KERN_ERR "%s: word lengh not supported\n",
 831                         __func__);
 832         }
 833
 834         /* Anomaly notes:
 835          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 836          */
 837         if (termios->c_cflag & CSTOPB) {
 838                 if (ANOMALY_05000231)
 839                         printk(KERN_WARNING "STOP bits other than 1 is not "
 840                                 "supported in case of anomaly 05000231.\n");
 841                 else
 842                         lcr |= STB;
 843         }
 844         if (termios->c_cflag & PARENB)
 845                 lcr |= PEN;
 846         if (!(termios->c_cflag & PARODD))
 847                 lcr |= EPS;
 848         if (termios->c_cflag & CMSPAR)
 849                 lcr |= STP;
 850
 851         spin_lock_irqsave(&uart->port.lock, flags);
 852
 853         port->read_status_mask = OE;
 854         if (termios->c_iflag & INPCK)
 855                 port->read_status_mask |= (FE | PE);
 856         if (termios->c_iflag & (BRKINT | PARMRK))
 857                 port->read_status_mask |= BI;
 858
 859         /*
 860          * Characters to ignore
 861          */
 862         port->ignore_status_mask = 0;
 863         if (termios->c_iflag & IGNPAR)
 864                 port->ignore_status_mask |= FE | PE;
 865         if (termios->c_iflag & IGNBRK) {
 866                 port->ignore_status_mask |= BI;
 867                 /*
 868                  * If we're ignoring parity and break indicators,
 869                  * ignore overruns too (for real raw support).
 870                  */
 871                 if (termios->c_iflag & IGNPAR)
 872                         port->ignore_status_mask |= OE;
 873         }
 874
 875         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 876         quot = uart_get_divisor(port, baud);
 877
 878         /* If discipline is not IRDA, apply ANOMALY_05000230 */
 879         if (termios->c_line != N_IRDA)
 880                 quot -= ANOMALY_05000230;
 881
 882         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 883
 884         /* Disable UART */
 885         ier = UART_GET_IER(uart);
 886         UART_DISABLE_INTS(uart);
 887
 888         /* Set DLAB in LCR to Access DLL and DLH */
 889         UART_SET_DLAB(uart);
 890
 891         UART_PUT_DLL(uart, quot & 0xFF);
 892         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 893         SSYNC();
 894
 895         /* Clear DLAB in LCR to Access THR RBR IER */
 896         UART_CLEAR_DLAB(uart);
 897
 898         UART_PUT_LCR(uart, lcr);
 899
 900         /* Enable UART */
 901         UART_ENABLE_INTS(uart, ier);
 902
 903         val = UART_GET_GCTL(uart);
 904         val |= UCEN;
 905         UART_PUT_GCTL(uart, val);
 906
 907         /* Port speed changed, update the per-port timeout. */
 908         uart_update_timeout(port, termios->c_cflag, baud);
 909
 910         spin_unlock_irqrestore(&uart->port.lock, flags);
 911 }
 912
 913 static const char *bfin_serial_type(struct uart_port *port)
 914 {
 915         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 916
 917         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 918 }
 919
 920 /*
 921  * Release the memory region(s) being used by 'port'.
 922  */
 923 static void bfin_serial_release_port(struct uart_port *port)
 924 {
 925 }
 926
 927 /*
 928  * Request the memory region(s) being used by 'port'.
 929  */
 930 static int bfin_serial_request_port(struct uart_port *port)
 931 {
 932         return 0;
 933 }
 934
 935 /*
 936  * Configure/autoconfigure the port.
 937  */
 938 static void bfin_serial_config_port(struct uart_port *port, int flags)
 939 {
 940         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 941
 942         if (flags & UART_CONFIG_TYPE &&
 943             bfin_serial_request_port(&uart->port) == 0)
 944                 uart->port.type = PORT_BFIN;
 945 }
 946
 947 /*
 948  * Verify the new serial_struct (for TIOCSSERIAL).
 949  * The only change we allow are to the flags and type, and
 950  * even then only between PORT_BFIN and PORT_UNKNOWN
 951  */
 952 static int
 953 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 954 {
 955         return 0;
 956 }
 957
 958 /*
 959  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 960  * In other cases, disable IrDA function.
 961  */
 962 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
 963 {
 964         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 965         unsigned short val;
 966
 967         switch (ld) {
 968         case N_IRDA:
 969                 val = UART_GET_GCTL(uart);
 970                 val |= (IREN | RPOLC);
 971                 UART_PUT_GCTL(uart, val);
 972                 break;
 973         default:
 974                 val = UART_GET_GCTL(uart);
 975                 val &= ~(IREN | RPOLC);
 976                 UART_PUT_GCTL(uart, val);
 977         }
 978 }
 979
 980 static void bfin_serial_reset_irda(struct uart_port *port)
 981 {
 982         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 983         unsigned short val;
 984
 985         val = UART_GET_GCTL(uart);
 986         val &= ~(IREN | RPOLC);
 987         UART_PUT_GCTL(uart, val);
 988         SSYNC();
 989         val |= (IREN | RPOLC);
 990         UART_PUT_GCTL(uart, val);
 991         SSYNC();
 992 }
 993
 994 #ifdef CONFIG_CONSOLE_POLL
 995 /* Anomaly notes:
 996  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 997  *              losing other bits of UART_LSR is not a problem here.
 998  */
 999 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
1000 {
1001         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1002
1003         while (!(UART_GET_LSR(uart) & THRE))
1004                 cpu_relax();
1005
1006         UART_CLEAR_DLAB(uart);
1007         UART_PUT_CHAR(uart, (unsigned char)chr);
1008 }
1009
1010 static int bfin_serial_poll_get_char(struct uart_port *port)
1011 {
1012         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1013         unsigned char chr;
1014
1015         while (!(UART_GET_LSR(uart) & DR))
1016                 cpu_relax();
1017
1018         UART_CLEAR_DLAB(uart);
1019         chr = UART_GET_CHAR(uart);
1020
1021         return chr;
1022 }
1023 #endif
1024
1025 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1026         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1027 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1028 {
1029         if (kgdboc_break_enabled) {
1030                 kgdboc_break_enabled = 0;
1031                 bfin_serial_shutdown(port);
1032         }
1033 }
1034
1035 static int bfin_kgdboc_port_startup(struct uart_port *port)
1036 {
1037         kgdboc_port_line = port->line;
1038         kgdboc_break_enabled = !bfin_serial_startup(port);
1039         return 0;
1040 }
1041 #endif
1042
1043 static struct uart_ops bfin_serial_pops = {
1044         .tx_empty       = bfin_serial_tx_empty,
1045         .set_mctrl      = bfin_serial_set_mctrl,
1046         .get_mctrl      = bfin_serial_get_mctrl,
1047         .stop_tx        = bfin_serial_stop_tx,
1048         .start_tx       = bfin_serial_start_tx,
1049         .stop_rx        = bfin_serial_stop_rx,
1050         .enable_ms      = bfin_serial_enable_ms,
1051         .break_ctl      = bfin_serial_break_ctl,
1052         .startup        = bfin_serial_startup,
1053         .shutdown       = bfin_serial_shutdown,
1054         .set_termios    = bfin_serial_set_termios,
1055         .set_ldisc      = bfin_serial_set_ldisc,
1056         .type           = bfin_serial_type,
1057         .release_port   = bfin_serial_release_port,
1058         .request_port   = bfin_serial_request_port,
1059         .config_port    = bfin_serial_config_port,
1060         .verify_port    = bfin_serial_verify_port,
1061 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1062         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1063         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1064         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1065 #endif
1066 #ifdef CONFIG_CONSOLE_POLL
1067         .poll_put_char  = bfin_serial_poll_put_char,
1068         .poll_get_char  = bfin_serial_poll_get_char,
1069 #endif
1070 };
1071
1072 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1073 /*
1074  * If the port was already initialised (eg, by a boot loader),
1075  * try to determine the current setup.
1076  */
1077 static void __init
1078 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1079                            int *parity, int *bits)
1080 {
1081         unsigned short status;
1082
1083         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1084         if (status == (ERBFI | ETBEI)) {
1085                 /* ok, the port was enabled */
1086                 u16 lcr, dlh, dll;
1087
1088                 lcr = UART_GET_LCR(uart);
1089
1090                 *parity = 'n';
1091                 if (lcr & PEN) {
1092                         if (lcr & EPS)
1093                                 *parity = 'e';
1094                         else
1095                                 *parity = 'o';
1096                 }
1097                 switch (lcr & 0x03) {
1098                         case 0: *bits = 5; break;
1099                         case 1: *bits = 6; break;
1100                         case 2: *bits = 7; break;
1101                         case 3: *bits = 8; break;
1102                 }
1103                 /* Set DLAB in LCR to Access DLL and DLH */
1104                 UART_SET_DLAB(uart);
1105
1106                 dll = UART_GET_DLL(uart);
1107                 dlh = UART_GET_DLH(uart);
1108
1109                 /* Clear DLAB in LCR to Access THR RBR IER */
1110                 UART_CLEAR_DLAB(uart);
1111
1112                 *baud = get_sclk() / (16*(dll | dlh << 8));
1113         }
1114         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1115 }
1116
1117 static struct uart_driver bfin_serial_reg;
1118
1119 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1120 {
1121         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1122         while (!(UART_GET_LSR(uart) & THRE))
1123                 barrier();
1124         UART_PUT_CHAR(uart, ch);
1125 }
1126
1127 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1128                  defined (CONFIG_EARLY_PRINTK) */
1129
1130 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1131 #define CLASS_BFIN_CONSOLE      "bfin-console"
1132 /*
1133  * Interrupts are disabled on entering
1134  */
1135 static void
1136 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1137 {
1138         struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1139         unsigned long flags;
1140
1141         spin_lock_irqsave(&uart->port.lock, flags);
1142         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1143         spin_unlock_irqrestore(&uart->port.lock, flags);
1144
1145 }
1146
1147 static int __init
1148 bfin_serial_console_setup(struct console *co, char *options)
1149 {
1150         struct bfin_serial_port *uart;
1151         int baud = 57600;
1152         int bits = 8;
1153         int parity = 'n';
1154 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1155         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1156         int flow = 'r';
1157 # else
1158         int flow = 'n';
1159 # endif
1160
1161         /*
1162          * Check whether an invalid uart number has been specified, and
1163          * if so, search for the first available port that does have
1164          * console support.
1165          */
1166         if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1167                 return -ENODEV;
1168
1169         uart = bfin_serial_ports[co->index];
1170         if (!uart)
1171                 return -ENODEV;
1172
1173         if (options)
1174                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1175         else
1176                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1177
1178         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1179 }
1180
1181 static struct console bfin_serial_console = {
1182         .name           = BFIN_SERIAL_DEV_NAME,
1183         .write          = bfin_serial_console_write,
1184         .device         = uart_console_device,
1185         .setup          = bfin_serial_console_setup,
1186         .flags          = CON_PRINTBUFFER,
1187         .index          = -1,
1188         .data           = &bfin_serial_reg,
1189 };
1190 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1191 #else
1192 #define BFIN_SERIAL_CONSOLE     NULL
1193 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1194
1195 #ifdef  CONFIG_EARLY_PRINTK
1196 static struct bfin_serial_port bfin_earlyprintk_port;
1197 #define CLASS_BFIN_EARLYPRINTK  "bfin-earlyprintk"
1198
1199 /*
1200  * Interrupts are disabled on entering
1201  */
1202 static void
1203 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1204 {
1205         unsigned long flags;
1206
1207         if (bfin_earlyprintk_port.port.line != co->index)
1208                 return;
1209
1210         spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1211         uart_console_write(&bfin_earlyprintk_port.port, s, count,
1212                 bfin_serial_console_putchar);
1213         spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1214 }
1215
1216 /*
1217  * This should have a .setup or .early_setup in it, but then things get called
1218  * without the command line options, and the baud rate gets messed up - so
1219  * don't let the common infrastructure play with things. (see calls to setup
1220  * & earlysetup in ./kernel/printk.c:register_console()
1221  */
1222 static struct __initdata console bfin_early_serial_console = {
1223         .name = "early_BFuart",
1224         .write = bfin_earlyprintk_console_write,
1225         .device = uart_console_device,
1226         .flags = CON_PRINTBUFFER,
1227         .index = -1,
1228         .data  = &bfin_serial_reg,
1229 };
1230 #endif
1231
1232 static struct uart_driver bfin_serial_reg = {
1233         .owner                  = THIS_MODULE,
1234         .driver_name            = DRIVER_NAME,
1235         .dev_name               = BFIN_SERIAL_DEV_NAME,
1236         .major                  = BFIN_SERIAL_MAJOR,
1237         .minor                  = BFIN_SERIAL_MINOR,
1238         .nr                     = BFIN_UART_NR_PORTS,
1239         .cons                   = BFIN_SERIAL_CONSOLE,
1240 };
1241
1242 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1243 {
1244         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1245
1246         return uart_suspend_port(&bfin_serial_reg, &uart->port);
1247 }
1248
1249 static int bfin_serial_resume(struct platform_device *pdev)
1250 {
1251         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1252
1253         return uart_resume_port(&bfin_serial_reg, &uart->port);
1254 }
1255
1256 static int bfin_serial_probe(struct platform_device *pdev)
1257 {
1258         struct resource *res;
1259         struct bfin_serial_port *uart = NULL;
1260         int ret = 0;
1261
1262         if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1263                 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1264                 return -ENOENT;
1265         }
1266
1267         if (bfin_serial_ports[pdev->id] == NULL) {
1268
1269                 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1270                 if (!uart) {
1271                         dev_err(&pdev->dev,
1272                                 "fail to malloc bfin_serial_port\n");
1273                         return -ENOMEM;
1274                 }
1275                 bfin_serial_ports[pdev->id] = uart;
1276
1277 #ifdef CONFIG_EARLY_PRINTK
1278                 if (!(bfin_earlyprintk_port.port.membase
1279                         && bfin_earlyprintk_port.port.line == pdev->id)) {
1280                         /*
1281                          * If the peripheral PINs of current port is allocated
1282                          * in earlyprintk probe stage, don't do it again.
1283                          */
1284 #endif
1285                 ret = peripheral_request_list(
1286                         (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1287                 if (ret) {
1288                         dev_err(&pdev->dev,
1289                                 "fail to request bfin serial peripherals\n");
1290                         goto out_error_free_mem;
1291                 }
1292 #ifdef CONFIG_EARLY_PRINTK
1293                 }
1294 #endif
1295
1296                 spin_lock_init(&uart->port.lock);
1297                 uart->port.uartclk   = get_sclk();
1298                 uart->port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1299                 uart->port.ops       = &bfin_serial_pops;
1300                 uart->port.line      = pdev->id;
1301                 uart->port.iotype    = UPIO_MEM;
1302                 uart->port.flags     = UPF_BOOT_AUTOCONF;
1303
1304                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1305                 if (res == NULL) {
1306                         dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1307                         ret = -ENOENT;
1308                         goto out_error_free_peripherals;
1309                 }
1310
1311                 uart->port.membase = ioremap(res->start,
1312                         res->end - res->start);
1313                 if (!uart->port.membase) {
1314                         dev_err(&pdev->dev, "Cannot map uart IO\n");
1315                         ret = -ENXIO;
1316                         goto out_error_free_peripherals;
1317                 }
1318                 uart->port.mapbase = res->start;
1319
1320                 uart->port.irq = platform_get_irq(pdev, 0);
1321                 if (uart->port.irq < 0) {
1322                         dev_err(&pdev->dev, "No uart RX/TX IRQ specified\n");
1323                         ret = -ENOENT;
1324                         goto out_error_unmap;
1325                 }
1326
1327                 uart->status_irq = platform_get_irq(pdev, 1);
1328                 if (uart->status_irq < 0) {
1329                         dev_err(&pdev->dev, "No uart status IRQ specified\n");
1330                         ret = -ENOENT;
1331                         goto out_error_unmap;
1332                 }
1333
1334 #ifdef CONFIG_SERIAL_BFIN_DMA
1335                 uart->tx_done       = 1;
1336                 uart->tx_count      = 0;
1337
1338                 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1339                 if (res == NULL) {
1340                         dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1341                         ret = -ENOENT;
1342                         goto out_error_unmap;
1343                 }
1344                 uart->tx_dma_channel = res->start;
1345
1346                 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1347                 if (res == NULL) {
1348                         dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1349                         ret = -ENOENT;
1350                         goto out_error_unmap;
1351                 }
1352                 uart->rx_dma_channel = res->start;
1353
1354                 init_timer(&(uart->rx_dma_timer));
1355 #endif
1356
1357 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1358         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1359                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1360                 if (res == NULL)
1361                         uart->cts_pin = -1;
1362                 else
1363                         uart->cts_pin = res->start;
1364
1365                 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1366                 if (res == NULL)
1367                         uart->rts_pin = -1;
1368                 else
1369                         uart->rts_pin = res->start;
1370 # if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1371                 if (uart->rts_pin >= 0)
1372                         gpio_request(uart->rts_pin, DRIVER_NAME);
1373 # endif
1374 #endif
1375         }
1376
1377 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1378         if (!is_early_platform_device(pdev)) {
1379 #endif
1380                 uart = bfin_serial_ports[pdev->id];
1381                 uart->port.dev = &pdev->dev;
1382                 dev_set_drvdata(&pdev->dev, uart);
1383                 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1384 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1385         }
1386 #endif
1387
1388         if (!ret)
1389                 return 0;
1390
1391         if (uart) {
1392 out_error_unmap:
1393                 iounmap(uart->port.membase);
1394 out_error_free_peripherals:
1395                 peripheral_free_list(
1396                         (unsigned short *)pdev->dev.platform_data);
1397 out_error_free_mem:
1398                 kfree(uart);
1399                 bfin_serial_ports[pdev->id] = NULL;
1400         }
1401
1402         return ret;
1403 }
1404
1405 static int __devexit bfin_serial_remove(struct platform_device *pdev)
1406 {
1407         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1408
1409         dev_set_drvdata(&pdev->dev, NULL);
1410
1411         if (uart) {
1412                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1413 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1414                 if (uart->rts_pin >= 0)
1415                         gpio_free(uart->rts_pin);
1416 #endif
1417                 iounmap(uart->port.membase);
1418                 peripheral_free_list(
1419                         (unsigned short *)pdev->dev.platform_data);
1420                 kfree(uart);
1421                 bfin_serial_ports[pdev->id] = NULL;
1422         }
1423
1424         return 0;
1425 }
1426
1427 static struct platform_driver bfin_serial_driver = {
1428         .probe          = bfin_serial_probe,
1429         .remove         = __devexit_p(bfin_serial_remove),
1430         .suspend        = bfin_serial_suspend,
1431         .resume         = bfin_serial_resume,
1432         .driver         = {
1433                 .name   = DRIVER_NAME,
1434                 .owner  = THIS_MODULE,
1435         },
1436 };
1437
1438 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1439 static __initdata struct early_platform_driver early_bfin_serial_driver = {
1440         .class_str = CLASS_BFIN_CONSOLE,
1441         .pdrv = &bfin_serial_driver,
1442         .requested_id = EARLY_PLATFORM_ID_UNSET,
1443 };
1444
1445 static int __init bfin_serial_rs_console_init(void)
1446 {
1447         early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1448
1449         early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1450
1451         register_console(&bfin_serial_console);
1452
1453         return 0;
1454 }
1455 console_initcall(bfin_serial_rs_console_init);
1456 #endif
1457
1458 #ifdef CONFIG_EARLY_PRINTK
1459 /*
1460  * Memory can't be allocated dynamically during earlyprink init stage.
1461  * So, do individual probe for earlyprink with a static uart port variable.
1462  */
1463 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1464 {
1465         struct resource *res;
1466         int ret;
1467
1468         if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1469                 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1470                 return -ENOENT;
1471         }
1472
1473         ret = peripheral_request_list(
1474                 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1475         if (ret) {
1476                 dev_err(&pdev->dev,
1477                                 "fail to request bfin serial peripherals\n");
1478                         return ret;
1479         }
1480
1481         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1482         if (res == NULL) {
1483                 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1484                 ret = -ENOENT;
1485                 goto out_error_free_peripherals;
1486         }
1487
1488         bfin_earlyprintk_port.port.membase = ioremap(res->start,
1489                         res->end - res->start);
1490         if (!bfin_earlyprintk_port.port.membase) {
1491                 dev_err(&pdev->dev, "Cannot map uart IO\n");
1492                 ret = -ENXIO;
1493                 goto out_error_free_peripherals;
1494         }
1495         bfin_earlyprintk_port.port.mapbase = res->start;
1496         bfin_earlyprintk_port.port.line = pdev->id;
1497         bfin_earlyprintk_port.port.uartclk = get_sclk();
1498         bfin_earlyprintk_port.port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1499         spin_lock_init(&bfin_earlyprintk_port.port.lock);
1500
1501         return 0;
1502
1503 out_error_free_peripherals:
1504         peripheral_free_list(
1505                 (unsigned short *)pdev->dev.platform_data);
1506
1507         return ret;
1508 }
1509
1510 static struct platform_driver bfin_earlyprintk_driver = {
1511         .probe          = bfin_earlyprintk_probe,
1512         .driver         = {
1513                 .name   = DRIVER_NAME,
1514                 .owner  = THIS_MODULE,
1515         },
1516 };
1517
1518 static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
1519         .class_str = CLASS_BFIN_EARLYPRINTK,
1520         .pdrv = &bfin_earlyprintk_driver,
1521         .requested_id = EARLY_PLATFORM_ID_UNSET,
1522 };
1523
1524 struct console __init *bfin_earlyserial_init(unsigned int port,
1525                                                 unsigned int cflag)
1526 {
1527         struct ktermios t;
1528         char port_name[20];
1529
1530         if (port < 0 || port >= BFIN_UART_NR_PORTS)
1531                 return NULL;
1532
1533         /*
1534          * Only probe resource of the given port in earlyprintk boot arg.
1535          * The expected port id should be indicated in port name string.
1536          */
1537         snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1538         early_platform_driver_register(&early_bfin_earlyprintk_driver,
1539                 port_name);
1540         early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1541
1542         if (!bfin_earlyprintk_port.port.membase)
1543                 return NULL;
1544
1545 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1546         /*
1547          * If we are using early serial, don't let the normal console rewind
1548          * log buffer, since that causes things to be printed multiple times
1549          */
1550         bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1551 #endif
1552
1553         bfin_early_serial_console.index = port;
1554         t.c_cflag = cflag;
1555         t.c_iflag = 0;
1556         t.c_oflag = 0;
1557         t.c_lflag = ICANON;
1558         t.c_line = port;
1559         bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1560
1561         return &bfin_early_serial_console;
1562 }
1563 #endif /* CONFIG_EARLY_PRINTK */
1564
1565 static int __init bfin_serial_init(void)
1566 {
1567         int ret;
1568
1569         pr_info("Blackfin serial driver\n");
1570
1571         ret = uart_register_driver(&bfin_serial_reg);
1572         if (ret) {
1573                 pr_err("failed to register %s:%d\n",
1574                         bfin_serial_reg.driver_name, ret);
1575         }
1576
1577         ret = platform_driver_register(&bfin_serial_driver);
1578         if (ret) {
1579                 pr_err("fail to register bfin uart\n");
1580                 uart_unregister_driver(&bfin_serial_reg);
1581         }
1582
1583         return ret;
1584 }
1585
1586 static void __exit bfin_serial_exit(void)
1587 {
1588         platform_driver_unregister(&bfin_serial_driver);
1589         uart_unregister_driver(&bfin_serial_reg);
1590 }
1591
1592
1593 module_init(bfin_serial_init);
1594 module_exit(bfin_serial_exit);
1595
1596 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1597 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1598 MODULE_LICENSE("GPL");
1599 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1600 MODULE_ALIAS("platform:bfin-uart");