drivers/scsi/isci/firmware/create_fw.c

   1 #include <stdio.h>
   2 #include <stdlib.h>
   3 #include <unistd.h>
   4 #include <sys/types.h>
   5 #include <sys/stat.h>
   6 #include <fcntl.h>
   7 #include <string.h>
   8 #include <errno.h>
   9 #include <asm/types.h>
  10 #include <strings.h>
  11 #include <stdint.h>
  12
  13 #include "create_fw.h"
  14 #include "../probe_roms.h"
  15
  16 int write_blob(struct isci_orom *isci_orom)
  17 {
  18         FILE *fd;
  19         int err;
  20         size_t count;
  21
  22         fd = fopen(blob_name, "w+");
  23         if (!fd) {
  24                 perror("Open file for write failed");
  25                 fclose(fd);
  26                 return -EIO;
  27         }
  28
  29         count = fwrite(isci_orom, sizeof(struct isci_orom), 1, fd);
  30         if (count != 1) {
  31                 perror("Write data failed");
  32                 fclose(fd);
  33                 return -EIO;
  34         }
  35
  36         fclose(fd);
  37
  38         return 0;
  39 }
  40
  41 void set_binary_values(struct isci_orom *isci_orom)
  42 {
  43         int ctrl_idx, phy_idx, port_idx;
  44
  45         /* setting OROM signature */
  46         strncpy(isci_orom->hdr.signature, sig, strlen(sig));
  47         isci_orom->hdr.version = version;
  48         isci_orom->hdr.total_block_length = sizeof(struct isci_orom);
  49         isci_orom->hdr.hdr_length = sizeof(struct sci_bios_oem_param_block_hdr);
  50         isci_orom->hdr.num_elements = num_elements;
  51
  52         for (ctrl_idx = 0; ctrl_idx < 2; ctrl_idx++) {
  53                 isci_orom->ctrl[ctrl_idx].controller.mode_type = mode_type;
  54                 isci_orom->ctrl[ctrl_idx].controller.max_concurrent_dev_spin_up =
  55                         max_num_concurrent_dev_spin_up;
  56                 isci_orom->ctrl[ctrl_idx].controller.do_enable_ssc =
  57                         enable_ssc;
  58
  59                 for (port_idx = 0; port_idx < 4; port_idx++)
  60                         isci_orom->ctrl[ctrl_idx].ports[port_idx].phy_mask =
  61                                 phy_mask[ctrl_idx][port_idx];
  62
  63                 for (phy_idx = 0; phy_idx < 4; phy_idx++) {
  64                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.high =
  65                                 (__u32)(sas_addr[ctrl_idx][phy_idx] >> 32);
  66                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.low =
  67                                 (__u32)(sas_addr[ctrl_idx][phy_idx]);
  68
  69                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control0 =
  70                                 afe_tx_amp_control0;
  71                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control1 =
  72                                 afe_tx_amp_control1;
  73                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control2 =
  74                                 afe_tx_amp_control2;
  75                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control3 =
  76                                 afe_tx_amp_control3;
  77                 }
  78         }
  79 }
  80
  81 int main(void)
  82 {
  83         int err;
  84         struct isci_orom *isci_orom;
  85
  86         isci_orom = malloc(sizeof(struct isci_orom));
  87         memset(isci_orom, 0, sizeof(struct isci_orom));
  88
  89         set_binary_values(isci_orom);
  90
  91         err = write_blob(isci_orom);
  92         if (err < 0) {
  93                 free(isci_orom);
  94                 return err;
  95         }
  96
  97         free(isci_orom);
  98         return 0;
  99 }