drivers/rtc/rtc-ds1305.c

   1 /*
   2  * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
   3  *
   4  * Copyright (C) 2008 David Brownell
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/bcd.h>
  14 #include <linux/slab.h>
  15 #include <linux/rtc.h>
  16 #include <linux/workqueue.h>
  17
  18 #include <linux/spi/spi.h>
  19 #include <linux/spi/ds1305.h>
  20
  21
  22 /*
  23  * Registers ... mask DS1305_WRITE into register address to write,
  24  * otherwise you're reading it.  All non-bitmask values are BCD.
  25  */
  26 #define DS1305_WRITE            0x80
  27
  28
  29 /* RTC date/time ... the main special cases are that we:
  30  *  - Need fancy "hours" encoding in 12hour mode
  31  *  - Don't rely on the "day-of-week" field (or tm_wday)
  32  *  - Are a 21st-century clock (2000 <= year < 2100)
  33  */
  34 #define DS1305_RTC_LEN          7               /* bytes for RTC regs */
  35
  36 #define DS1305_SEC              0x00            /* register addresses */
  37 #define DS1305_MIN              0x01
  38 #define DS1305_HOUR             0x02
  39 #       define DS1305_HR_12             0x40    /* set == 12 hr mode */
  40 #       define DS1305_HR_PM             0x20    /* set == PM (12hr mode) */
  41 #define DS1305_WDAY             0x03
  42 #define DS1305_MDAY             0x04
  43 #define DS1305_MON              0x05
  44 #define DS1305_YEAR             0x06
  45
  46
  47 /* The two alarms have only sec/min/hour/wday fields (ALM_LEN).
  48  * DS1305_ALM_DISABLE disables a match field (some combos are bad).
  49  *
  50  * NOTE that since we don't use WDAY, we limit ourselves to alarms
  51  * only one day into the future (vs potentially up to a week).
  52  *
  53  * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
  54  * don't currently support them.  We'd either need to do it only when
  55  * no alarm is pending (not the standard model), or to use the second
  56  * alarm (implying that this is a DS1305 not DS1306, *and* that either
  57  * it's wired up a second IRQ we know, or that INTCN is set)
  58  */
  59 #define DS1305_ALM_LEN          4               /* bytes for ALM regs */
  60 #define DS1305_ALM_DISABLE      0x80
  61
  62 #define DS1305_ALM0(r)          (0x07 + (r))    /* register addresses */
  63 #define DS1305_ALM1(r)          (0x0b + (r))
  64
  65
  66 /* three control registers */
  67 #define DS1305_CONTROL_LEN      3               /* bytes of control regs */
  68
  69 #define DS1305_CONTROL          0x0f            /* register addresses */
  70 #       define DS1305_nEOSC             0x80    /* low enables oscillator */
  71 #       define DS1305_WP                0x40    /* write protect */
  72 #       define DS1305_INTCN             0x04    /* clear == only int0 used */
  73 #       define DS1306_1HZ               0x04    /* enable 1Hz output */
  74 #       define DS1305_AEI1              0x02    /* enable ALM1 IRQ */
  75 #       define DS1305_AEI0              0x01    /* enable ALM0 IRQ */
  76 #define DS1305_STATUS           0x10
  77 /* status has just AEIx bits, mirrored as IRQFx */
  78 #define DS1305_TRICKLE          0x11
  79 /* trickle bits are defined in <linux/spi/ds1305.h> */
  80
  81 /* a bunch of NVRAM */
  82 #define DS1305_NVRAM_LEN        96              /* bytes of NVRAM */
  83
  84 #define DS1305_NVRAM            0x20            /* register addresses */
  85
  86
  87 struct ds1305 {
  88         struct spi_device       *spi;
  89         struct rtc_device       *rtc;
  90
  91         struct work_struct      work;
  92
  93         unsigned long           flags;
  94 #define FLAG_EXITING    0
  95
  96         bool                    hr12;
  97         u8                      ctrl[DS1305_CONTROL_LEN];
  98 };
  99
 100
 101 /*----------------------------------------------------------------------*/
 102
 103 /*
 104  * Utilities ...  tolerate 12-hour AM/PM notation in case of non-Linux
 105  * software (like a bootloader) which may require it.
 106  */
 107
 108 static unsigned bcd2hour(u8 bcd)
 109 {
 110         if (bcd & DS1305_HR_12) {
 111                 unsigned        hour = 0;
 112
 113                 bcd &= ~DS1305_HR_12;
 114                 if (bcd & DS1305_HR_PM) {
 115                         hour = 12;
 116                         bcd &= ~DS1305_HR_PM;
 117                 }
 118                 hour += bcd2bin(bcd);
 119                 return hour - 1;
 120         }
 121         return bcd2bin(bcd);
 122 }
 123
 124 static u8 hour2bcd(bool hr12, int hour)
 125 {
 126         if (hr12) {
 127                 hour++;
 128                 if (hour <= 12)
 129                         return DS1305_HR_12 | bin2bcd(hour);
 130                 hour -= 12;
 131                 return DS1305_HR_12 | DS1305_HR_PM | bin2bcd(hour);
 132         }
 133         return bin2bcd(hour);
 134 }
 135
 136 /*----------------------------------------------------------------------*/
 137
 138 /*
 139  * Interface to RTC framework
 140  */
 141
 142 static int ds1305_alarm_irq_enable(struct device *dev, unsigned int enabled)
 143 {
 144         struct ds1305   *ds1305 = dev_get_drvdata(dev);
 145         u8              buf[2];
 146         long            err = -EINVAL;
 147
 148         buf[0] = DS1305_WRITE | DS1305_CONTROL;
 149         buf[1] = ds1305->ctrl[0];
 150
 151         if (enabled) {
 152                 if (ds1305->ctrl[0] & DS1305_AEI0)
 153                         goto done;
 154                 buf[1] |= DS1305_AEI0;
 155         } else {
 156                 if (!(buf[1] & DS1305_AEI0))
 157                         goto done;
 158                 buf[1] &= ~DS1305_AEI0;
 159         }
 160         err = spi_write_then_read(ds1305->spi, buf, sizeof buf, NULL, 0);
 161         if (err >= 0)
 162                 ds1305->ctrl[0] = buf[1];
 163 done:
 164         return err;
 165
 166 }
 167
 168
 169 /*
 170  * Get/set of date and time is pretty normal.
 171  */
 172
 173 static int ds1305_get_time(struct device *dev, struct rtc_time *time)
 174 {
 175         struct ds1305   *ds1305 = dev_get_drvdata(dev);
 176         u8              addr = DS1305_SEC;
 177         u8              buf[DS1305_RTC_LEN];
 178         int             status;
 179
 180         /* Use write-then-read to get all the date/time registers
 181          * since dma from stack is nonportable
 182          */
 183         status = spi_write_then_read(ds1305->spi, &addr, sizeof addr,
 184                         buf, sizeof buf);
 185         if (status < 0)
 186                 return status;
 187
 188         dev_vdbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
 189                 "read", buf[0], buf[1], buf[2], buf[3],
 190                 buf[4], buf[5], buf[6]);
 191
 192         /* Decode the registers */
 193         time->tm_sec = bcd2bin(buf[DS1305_SEC]);
 194         time->tm_min = bcd2bin(buf[DS1305_MIN]);
 195         time->tm_hour = bcd2hour(buf[DS1305_HOUR]);
 196         time->tm_wday = buf[DS1305_WDAY] - 1;
 197         time->tm_mday = bcd2bin(buf[DS1305_MDAY]);
 198         time->tm_mon = bcd2bin(buf[DS1305_MON]) - 1;
 199         time->tm_year = bcd2bin(buf[DS1305_YEAR]) + 100;
 200
 201         dev_vdbg(dev, "%s secs=%d, mins=%d, "
 202                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 203                 "read", time->tm_sec, time->tm_min,
 204                 time->tm_hour, time->tm_mday,
 205                 time->tm_mon, time->tm_year, time->tm_wday);
 206
 207         /* Time may not be set */
 208         return rtc_valid_tm(time);
 209 }
 210
 211 static int ds1305_set_time(struct device *dev, struct rtc_time *time)
 212 {
 213         struct ds1305   *ds1305 = dev_get_drvdata(dev);
 214         u8              buf[1 + DS1305_RTC_LEN];
 215         u8              *bp = buf;
 216
 217         dev_vdbg(dev, "%s secs=%d, mins=%d, "
 218                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 219                 "write", time->tm_sec, time->tm_min,
 220                 time->tm_hour, time->tm_mday,
 221                 time->tm_mon, time->tm_year, time->tm_wday);
 222
 223         /* Write registers starting at the first time/date address. */
 224         *bp++ = DS1305_WRITE | DS1305_SEC;
 225
 226         *bp++ = bin2bcd(time->tm_sec);
 227         *bp++ = bin2bcd(time->tm_min);
 228         *bp++ = hour2bcd(ds1305->hr12, time->tm_hour);
 229         *bp++ = (time->tm_wday < 7) ? (time->tm_wday + 1) : 1;
 230         *bp++ = bin2bcd(time->tm_mday);
 231         *bp++ = bin2bcd(time->tm_mon + 1);
 232         *bp++ = bin2bcd(time->tm_year - 100);
 233
 234         dev_dbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
 235                 "write", buf[1], buf[2], buf[3],
 236                 buf[4], buf[5], buf[6], buf[7]);
 237
 238         /* use write-then-read since dma from stack is nonportable */
 239         return spi_write_then_read(ds1305->spi, buf, sizeof buf,
 240                         NULL, 0);
 241 }
 242
 243 /*
 244  * Get/set of alarm is a bit funky:
 245  *
 246  * - First there's the inherent raciness of getting the (partitioned)
 247  *   status of an alarm that could trigger while we're reading parts
 248  *   of that status.
 249  *
 250  * - Second there's its limited range (we could increase it a bit by
 251  *   relying on WDAY), which means it will easily roll over.
 252  *
 253  * - Third there's the choice of two alarms and alarm signals.
 254  *   Here we use ALM0 and expect that nINT0 (open drain) is used;
 255  *   that's the only real option for DS1306 runtime alarms, and is
 256  *   natural on DS1305.
 257  *
 258  * - Fourth, there's also ALM1, and a second interrupt signal:
 259  *     + On DS1305 ALM1 uses nINT1 (when INTCN=1) else nINT0;
 260  *     + On DS1306 ALM1 only uses INT1 (an active high pulse)
 261  *       and it won't work when VCC1 is active.
 262  *
 263  *   So to be most general, we should probably set both alarms to the
 264  *   same value, letting ALM1 be the wakeup event source on DS1306
 265  *   and handling several wiring options on DS1305.
 266  *
 267  * - Fifth, we support the polled mode (as well as possible; why not?)
 268  *   even when no interrupt line is wired to an IRQ.
 269  */
 270
 271 /*
 272  * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
 273  */
 274 static int ds1305_get_alarm(struct device *dev, struct rtc_wkalrm *alm)
 275 {
 276         struct ds1305   *ds1305 = dev_get_drvdata(dev);
 277         struct spi_device *spi = ds1305->spi;
 278         u8              addr;
 279         int             status;
 280         u8              buf[DS1305_ALM_LEN];
 281
 282         /* Refresh control register cache BEFORE reading ALM0 registers,
 283          * since reading alarm registers acks any pending IRQ.  That
 284          * makes returning "pending" status a bit of a lie, but that bit
 285          * of EFI status is at best fragile anyway (given IRQ handlers).
 286          */
 287         addr = DS1305_CONTROL;
 288         status = spi_write_then_read(spi, &addr, sizeof addr,
 289                         ds1305->ctrl, sizeof ds1305->ctrl);
 290         if (status < 0)
 291                 return status;
 292
 293         alm->enabled = !!(ds1305->ctrl[0] & DS1305_AEI0);
 294         alm->pending = !!(ds1305->ctrl[1] & DS1305_AEI0);
 295
 296         /* get and check ALM0 registers */
 297         addr = DS1305_ALM0(DS1305_SEC);
 298         status = spi_write_then_read(spi, &addr, sizeof addr,
 299                         buf, sizeof buf);
 300         if (status < 0)
 301                 return status;
 302
 303         dev_vdbg(dev, "%s: %02x %02x %02x %02x\n",
 304                 "alm0 read", buf[DS1305_SEC], buf[DS1305_MIN],
 305                 buf[DS1305_HOUR], buf[DS1305_WDAY]);
 306
 307         if ((DS1305_ALM_DISABLE & buf[DS1305_SEC])
 308                         || (DS1305_ALM_DISABLE & buf[DS1305_MIN])
 309                         || (DS1305_ALM_DISABLE & buf[DS1305_HOUR]))
 310                 return -EIO;
 311
 312         /* Stuff these values into alm->time and let RTC framework code
 313          * fill in the rest ... and also handle rollover to tomorrow when
 314          * that's needed.
 315          */
 316         alm->time.tm_sec = bcd2bin(buf[DS1305_SEC]);
 317         alm->time.tm_min = bcd2bin(buf[DS1305_MIN]);
 318         alm->time.tm_hour = bcd2hour(buf[DS1305_HOUR]);
 319         alm->time.tm_mday = -1;
 320         alm->time.tm_mon = -1;
 321         alm->time.tm_year = -1;
 322         /* next three fields are unused by Linux */
 323         alm->time.tm_wday = -1;
 324         alm->time.tm_mday = -1;
 325         alm->time.tm_isdst = -1;
 326
 327         return 0;
 328 }
 329
 330 /*
 331  * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
 332  */
 333 static int ds1305_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 334 {
 335         struct ds1305   *ds1305 = dev_get_drvdata(dev);
 336         struct spi_device *spi = ds1305->spi;
 337         unsigned long   now, later;
 338         struct rtc_time tm;
 339         int             status;
 340         u8              buf[1 + DS1305_ALM_LEN];
 341
 342         /* convert desired alarm to time_t */
 343         status = rtc_tm_to_time(&alm->time, &later);
 344         if (status < 0)
 345                 return status;
 346
 347         /* Read current time as time_t */
 348         status = ds1305_get_time(dev, &tm);
 349         if (status < 0)
 350                 return status;
 351         status = rtc_tm_to_time(&tm, &now);
 352         if (status < 0)
 353                 return status;
 354
 355         /* make sure alarm fires within the next 24 hours */
 356         if (later <= now)
 357                 return -EINVAL;
 358         if ((later - now) > 24 * 60 * 60)
 359                 return -EDOM;
 360
 361         /* disable alarm if needed */
 362         if (ds1305->ctrl[0] & DS1305_AEI0) {
 363                 ds1305->ctrl[0] &= ~DS1305_AEI0;
 364
 365                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
 366                 buf[1] = ds1305->ctrl[0];
 367                 status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
 368                 if (status < 0)
 369                         return status;
 370         }
 371
 372         /* write alarm */
 373         buf[0] = DS1305_WRITE | DS1305_ALM0(DS1305_SEC);
 374         buf[1 + DS1305_SEC] = bin2bcd(alm->time.tm_sec);
 375         buf[1 + DS1305_MIN] = bin2bcd(alm->time.tm_min);
 376         buf[1 + DS1305_HOUR] = hour2bcd(ds1305->hr12, alm->time.tm_hour);
 377         buf[1 + DS1305_WDAY] = DS1305_ALM_DISABLE;
 378
 379         dev_dbg(dev, "%s: %02x %02x %02x %02x\n",
 380                 "alm0 write", buf[1 + DS1305_SEC], buf[1 + DS1305_MIN],
 381                 buf[1 + DS1305_HOUR], buf[1 + DS1305_WDAY]);
 382
 383         status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
 384         if (status < 0)
 385                 return status;
 386
 387         /* enable alarm if requested */
 388         if (alm->enabled) {
 389                 ds1305->ctrl[0] |= DS1305_AEI0;
 390
 391                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
 392                 buf[1] = ds1305->ctrl[0];
 393                 status = spi_write_then_read(ds1305->spi, buf, 2, NULL, 0);
 394         }
 395
 396         return status;
 397 }
 398
 399 #ifdef CONFIG_PROC_FS
 400
 401 static int ds1305_proc(struct device *dev, struct seq_file *seq)
 402 {
 403         struct ds1305   *ds1305 = dev_get_drvdata(dev);
 404         char            *diodes = "no";
 405         char            *resistors = "";
 406
 407         /* ctrl[2] is treated as read-only; no locking needed */
 408         if ((ds1305->ctrl[2] & 0xf0) == DS1305_TRICKLE_MAGIC) {
 409                 switch (ds1305->ctrl[2] & 0x0c) {
 410                 case DS1305_TRICKLE_DS2:
 411                         diodes = "2 diodes, ";
 412                         break;
 413                 case DS1305_TRICKLE_DS1:
 414                         diodes = "1 diode, ";
 415                         break;
 416                 default:
 417                         goto done;
 418                 }
 419                 switch (ds1305->ctrl[2] & 0x03) {
 420                 case DS1305_TRICKLE_2K:
 421                         resistors = "2k Ohm";
 422                         break;
 423                 case DS1305_TRICKLE_4K:
 424                         resistors = "4k Ohm";
 425                         break;
 426                 case DS1305_TRICKLE_8K:
 427                         resistors = "8k Ohm";
 428                         break;
 429                 default:
 430                         diodes = "no";
 431                         break;
 432                 }
 433         }
 434
 435 done:
 436         return seq_printf(seq,
 437                         "trickle_charge\t: %s%s\n",
 438                         diodes, resistors);
 439 }
 440
 441 #else
 442 #define ds1305_proc     NULL
 443 #endif
 444
 445 static const struct rtc_class_ops ds1305_ops = {
 446         .read_time      = ds1305_get_time,
 447         .set_time       = ds1305_set_time,
 448         .read_alarm     = ds1305_get_alarm,
 449         .set_alarm      = ds1305_set_alarm,
 450         .proc           = ds1305_proc,
 451         .alarm_irq_enable = ds1305_alarm_irq_enable,
 452 };
 453
 454 static void ds1305_work(struct work_struct *work)
 455 {
 456         struct ds1305   *ds1305 = container_of(work, struct ds1305, work);
 457         struct mutex    *lock = &ds1305->rtc->ops_lock;
 458         struct spi_device *spi = ds1305->spi;
 459         u8              buf[3];
 460         int             status;
 461
 462         /* lock to protect ds1305->ctrl */
 463         mutex_lock(lock);
 464
 465         /* Disable the IRQ, and clear its status ... for now, we "know"
 466          * that if more than one alarm is active, they're in sync.
 467          * Note that reading ALM data registers also clears IRQ status.
 468          */
 469         ds1305->ctrl[0] &= ~(DS1305_AEI1 | DS1305_AEI0);
 470         ds1305->ctrl[1] = 0;
 471
 472         buf[0] = DS1305_WRITE | DS1305_CONTROL;
 473         buf[1] = ds1305->ctrl[0];
 474         buf[2] = 0;
 475
 476         status = spi_write_then_read(spi, buf, sizeof buf,
 477                         NULL, 0);
 478         if (status < 0)
 479                 dev_dbg(&spi->dev, "clear irq --> %d\n", status);
 480
 481         mutex_unlock(lock);
 482
 483         if (!test_bit(FLAG_EXITING, &ds1305->flags))
 484                 enable_irq(spi->irq);
 485
 486         rtc_update_irq(ds1305->rtc, 1, RTC_AF | RTC_IRQF);
 487 }
 488
 489 /*
 490  * This "real" IRQ handler hands off to a workqueue mostly to allow
 491  * mutex locking for ds1305->ctrl ... unlike I2C, we could issue async
 492  * I/O requests in IRQ context (to clear the IRQ status).
 493  */
 494 static irqreturn_t ds1305_irq(int irq, void *p)
 495 {
 496         struct ds1305           *ds1305 = p;
 497
 498         disable_irq(irq);
 499         schedule_work(&ds1305->work);
 500         return IRQ_HANDLED;
 501 }
 502
 503 /*----------------------------------------------------------------------*/
 504
 505 /*
 506  * Interface for NVRAM
 507  */
 508
 509 static void msg_init(struct spi_message *m, struct spi_transfer *x,
 510                 u8 *addr, size_t count, char *tx, char *rx)
 511 {
 512         spi_message_init(m);
 513         memset(x, 0, 2 * sizeof(*x));
 514
 515         x->tx_buf = addr;
 516         x->len = 1;
 517         spi_message_add_tail(x, m);
 518
 519         x++;
 520
 521         x->tx_buf = tx;
 522         x->rx_buf = rx;
 523         x->len = count;
 524         spi_message_add_tail(x, m);
 525 }
 526
 527 static ssize_t
 528 ds1305_nvram_read(struct file *filp, struct kobject *kobj,
 529                 struct bin_attribute *attr,
 530                 char *buf, loff_t off, size_t count)
 531 {
 532         struct spi_device       *spi;
 533         u8                      addr;
 534         struct spi_message      m;
 535         struct spi_transfer     x[2];
 536         int                     status;
 537
 538         spi = container_of(kobj, struct spi_device, dev.kobj);
 539
 540         if (unlikely(off >= DS1305_NVRAM_LEN))
 541                 return 0;
 542         if (count >= DS1305_NVRAM_LEN)
 543                 count = DS1305_NVRAM_LEN;
 544         if ((off + count) > DS1305_NVRAM_LEN)
 545                 count = DS1305_NVRAM_LEN - off;
 546         if (unlikely(!count))
 547                 return count;
 548
 549         addr = DS1305_NVRAM + off;
 550         msg_init(&m, x, &addr, count, NULL, buf);
 551
 552         status = spi_sync(spi, &m);
 553         if (status < 0)
 554                 dev_err(&spi->dev, "nvram %s error %d\n", "read", status);
 555         return (status < 0) ? status : count;
 556 }
 557
 558 static ssize_t
 559 ds1305_nvram_write(struct file *filp, struct kobject *kobj,
 560                 struct bin_attribute *attr,
 561                 char *buf, loff_t off, size_t count)
 562 {
 563         struct spi_device       *spi;
 564         u8                      addr;
 565         struct spi_message      m;
 566         struct spi_transfer     x[2];
 567         int                     status;
 568
 569         spi = container_of(kobj, struct spi_device, dev.kobj);
 570
 571         if (unlikely(off >= DS1305_NVRAM_LEN))
 572                 return -EFBIG;
 573         if (count >= DS1305_NVRAM_LEN)
 574                 count = DS1305_NVRAM_LEN;
 575         if ((off + count) > DS1305_NVRAM_LEN)
 576                 count = DS1305_NVRAM_LEN - off;
 577         if (unlikely(!count))
 578                 return count;
 579
 580         addr = (DS1305_WRITE | DS1305_NVRAM) + off;
 581         msg_init(&m, x, &addr, count, buf, NULL);
 582
 583         status = spi_sync(spi, &m);
 584         if (status < 0)
 585                 dev_err(&spi->dev, "nvram %s error %d\n", "write", status);
 586         return (status < 0) ? status : count;
 587 }
 588
 589 static struct bin_attribute nvram = {
 590         .attr.name      = "nvram",
 591         .attr.mode      = S_IRUGO | S_IWUSR,
 592         .read           = ds1305_nvram_read,
 593         .write          = ds1305_nvram_write,
 594         .size           = DS1305_NVRAM_LEN,
 595 };
 596
 597 /*----------------------------------------------------------------------*/
 598
 599 /*
 600  * Interface to SPI stack
 601  */
 602
 603 static int __devinit ds1305_probe(struct spi_device *spi)
 604 {
 605         struct ds1305                   *ds1305;
 606         int                             status;
 607         u8                              addr, value;
 608         struct ds1305_platform_data     *pdata = spi->dev.platform_data;
 609         bool                            write_ctrl = false;
 610
 611         /* Sanity check board setup data.  This may be hooked up
 612          * in 3wire mode, but we don't care.  Note that unless
 613          * there's an inverter in place, this needs SPI_CS_HIGH!
 614          */
 615         if ((spi->bits_per_word && spi->bits_per_word != 8)
 616                         || (spi->max_speed_hz > 2000000)
 617                         || !(spi->mode & SPI_CPHA))
 618                 return -EINVAL;
 619
 620         /* set up driver data */
 621         ds1305 = kzalloc(sizeof *ds1305, GFP_KERNEL);
 622         if (!ds1305)
 623                 return -ENOMEM;
 624         ds1305->spi = spi;
 625         spi_set_drvdata(spi, ds1305);
 626
 627         /* read and cache control registers */
 628         addr = DS1305_CONTROL;
 629         status = spi_write_then_read(spi, &addr, sizeof addr,
 630                         ds1305->ctrl, sizeof ds1305->ctrl);
 631         if (status < 0) {
 632                 dev_dbg(&spi->dev, "can't %s, %d\n",
 633                                 "read", status);
 634                 goto fail0;
 635         }
 636
 637         dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
 638                         "read", ds1305->ctrl[0],
 639                         ds1305->ctrl[1], ds1305->ctrl[2]);
 640
 641         /* Sanity check register values ... partially compensating for the
 642          * fact that SPI has no device handshake.  A pullup on MISO would
 643          * make these tests fail; but not all systems will have one.  If
 644          * some register is neither 0x00 nor 0xff, a chip is likely there.
 645          */
 646         if ((ds1305->ctrl[0] & 0x38) != 0 || (ds1305->ctrl[1] & 0xfc) != 0) {
 647                 dev_dbg(&spi->dev, "RTC chip is not present\n");
 648                 status = -ENODEV;
 649                 goto fail0;
 650         }
 651         if (ds1305->ctrl[2] == 0)
 652                 dev_dbg(&spi->dev, "chip may not be present\n");
 653
 654         /* enable writes if needed ... if we were paranoid it would
 655          * make sense to enable them only when absolutely necessary.
 656          */
 657         if (ds1305->ctrl[0] & DS1305_WP) {
 658                 u8              buf[2];
 659
 660                 ds1305->ctrl[0] &= ~DS1305_WP;
 661
 662                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
 663                 buf[1] = ds1305->ctrl[0];
 664                 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
 665
 666                 dev_dbg(&spi->dev, "clear WP --> %d\n", status);
 667                 if (status < 0)
 668                         goto fail0;
 669         }
 670
 671         /* on DS1305, maybe start oscillator; like most low power
 672          * oscillators, it may take a second to stabilize
 673          */
 674         if (ds1305->ctrl[0] & DS1305_nEOSC) {
 675                 ds1305->ctrl[0] &= ~DS1305_nEOSC;
 676                 write_ctrl = true;
 677                 dev_warn(&spi->dev, "SET TIME!\n");
 678         }
 679
 680         /* ack any pending IRQs */
 681         if (ds1305->ctrl[1]) {
 682                 ds1305->ctrl[1] = 0;
 683                 write_ctrl = true;
 684         }
 685
 686         /* this may need one-time (re)init */
 687         if (pdata) {
 688                 /* maybe enable trickle charge */
 689                 if (((ds1305->ctrl[2] & 0xf0) != DS1305_TRICKLE_MAGIC)) {
 690                         ds1305->ctrl[2] = DS1305_TRICKLE_MAGIC
 691                                                 | pdata->trickle;
 692                         write_ctrl = true;
 693                 }
 694
 695                 /* on DS1306, configure 1 Hz signal */
 696                 if (pdata->is_ds1306) {
 697                         if (pdata->en_1hz) {
 698                                 if (!(ds1305->ctrl[0] & DS1306_1HZ)) {
 699                                         ds1305->ctrl[0] |= DS1306_1HZ;
 700                                         write_ctrl = true;
 701                                 }
 702                         } else {
 703                                 if (ds1305->ctrl[0] & DS1306_1HZ) {
 704                                         ds1305->ctrl[0] &= ~DS1306_1HZ;
 705                                         write_ctrl = true;
 706                                 }
 707                         }
 708                 }
 709         }
 710
 711         if (write_ctrl) {
 712                 u8              buf[4];
 713
 714                 buf[0] = DS1305_WRITE | DS1305_CONTROL;
 715                 buf[1] = ds1305->ctrl[0];
 716                 buf[2] = ds1305->ctrl[1];
 717                 buf[3] = ds1305->ctrl[2];
 718                 status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
 719                 if (status < 0) {
 720                         dev_dbg(&spi->dev, "can't %s, %d\n",
 721                                         "write", status);
 722                         goto fail0;
 723                 }
 724
 725                 dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
 726                                 "write", ds1305->ctrl[0],
 727                                 ds1305->ctrl[1], ds1305->ctrl[2]);
 728         }
 729
 730         /* see if non-Linux software set up AM/PM mode */
 731         addr = DS1305_HOUR;
 732         status = spi_write_then_read(spi, &addr, sizeof addr,
 733                                 &value, sizeof value);
 734         if (status < 0) {
 735                 dev_dbg(&spi->dev, "read HOUR --> %d\n", status);
 736                 goto fail0;
 737         }
 738
 739         ds1305->hr12 = (DS1305_HR_12 & value) != 0;
 740         if (ds1305->hr12)
 741                 dev_dbg(&spi->dev, "AM/PM\n");
 742
 743         /* register RTC ... from here on, ds1305->ctrl needs locking */
 744         ds1305->rtc = rtc_device_register("ds1305", &spi->dev,
 745                         &ds1305_ops, THIS_MODULE);
 746         if (IS_ERR(ds1305->rtc)) {
 747                 status = PTR_ERR(ds1305->rtc);
 748                 dev_dbg(&spi->dev, "register rtc --> %d\n", status);
 749                 goto fail0;
 750         }
 751
 752         /* Maybe set up alarm IRQ; be ready to handle it triggering right
 753          * away.  NOTE that we don't share this.  The signal is active low,
 754          * and we can't ack it before a SPI message delay.  We temporarily
 755          * disable the IRQ until it's acked, which lets us work with more
 756          * IRQ trigger modes (not all IRQ controllers can do falling edge).
 757          */
 758         if (spi->irq) {
 759                 INIT_WORK(&ds1305->work, ds1305_work);
 760                 status = request_irq(spi->irq, ds1305_irq,
 761                                 0, dev_name(&ds1305->rtc->dev), ds1305);
 762                 if (status < 0) {
 763                         dev_dbg(&spi->dev, "request_irq %d --> %d\n",
 764                                         spi->irq, status);
 765                         goto fail1;
 766                 }
 767
 768                 device_set_wakeup_capable(&spi->dev, 1);
 769         }
 770
 771         /* export NVRAM */
 772         status = sysfs_create_bin_file(&spi->dev.kobj, &nvram);
 773         if (status < 0) {
 774                 dev_dbg(&spi->dev, "register nvram --> %d\n", status);
 775                 goto fail2;
 776         }
 777
 778         return 0;
 779
 780 fail2:
 781         free_irq(spi->irq, ds1305);
 782 fail1:
 783         rtc_device_unregister(ds1305->rtc);
 784 fail0:
 785         kfree(ds1305);
 786         return status;
 787 }
 788
 789 static int __devexit ds1305_remove(struct spi_device *spi)
 790 {
 791         struct ds1305 *ds1305 = spi_get_drvdata(spi);
 792
 793         sysfs_remove_bin_file(&spi->dev.kobj, &nvram);
 794
 795         /* carefully shut down irq and workqueue, if present */
 796         if (spi->irq) {
 797                 set_bit(FLAG_EXITING, &ds1305->flags);
 798                 free_irq(spi->irq, ds1305);
 799                 cancel_work_sync(&ds1305->work);
 800         }
 801
 802         rtc_device_unregister(ds1305->rtc);
 803         spi_set_drvdata(spi, NULL);
 804         kfree(ds1305);
 805         return 0;
 806 }
 807
 808 static struct spi_driver ds1305_driver = {
 809         .driver.name    = "rtc-ds1305",
 810         .driver.owner   = THIS_MODULE,
 811         .probe          = ds1305_probe,
 812         .remove         = __devexit_p(ds1305_remove),
 813         /* REVISIT add suspend/resume */
 814 };
 815
 816 static int __init ds1305_init(void)
 817 {
 818         return spi_register_driver(&ds1305_driver);
 819 }
 820 module_init(ds1305_init);
 821
 822 static void __exit ds1305_exit(void)
 823 {
 824         spi_unregister_driver(&ds1305_driver);
 825 }
 826 module_exit(ds1305_exit);
 827
 828 MODULE_DESCRIPTION("RTC driver for DS1305 and DS1306 chips");
 829 MODULE_LICENSE("GPL");
 830 MODULE_ALIAS("spi:rtc-ds1305");