3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/smp_lock.h>
15 #include <linux/pci.h>
16 #include <linux/proc_fs.h>
18 #include <asm/errno.h>
25 static DEFINE_SPINLOCK(msi_lock);
26 static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
27 static kmem_cache_t* msi_cachep;
29 static int pci_msi_enable = 1;
30 static int last_alloc_vector;
31 static int nr_released_vectors;
32 static int nr_reserved_vectors = NR_HP_RESERVED_VECTORS;
33 static int nr_msix_devices;
35 #ifndef CONFIG_X86_IO_APIC
36 int vector_irq[NR_VECTORS] = { [0 ... NR_VECTORS - 1] = -1};
39 static struct msi_ops *msi_ops;
42 msi_register(struct msi_ops *ops)
48 static int msi_cache_init(void)
50 msi_cachep = kmem_cache_create("msi_cache", sizeof(struct msi_desc),
51 0, SLAB_HWCACHE_ALIGN, NULL, NULL);
58 static void msi_set_mask_bit(unsigned int vector, int flag)
60 struct msi_desc *entry;
62 entry = (struct msi_desc *)msi_desc[vector];
63 if (!entry || !entry->dev || !entry->mask_base)
65 switch (entry->msi_attrib.type) {
71 pos = (long)entry->mask_base;
72 pci_read_config_dword(entry->dev, pos, &mask_bits);
75 pci_write_config_dword(entry->dev, pos, mask_bits);
80 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
81 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
82 writel(flag, entry->mask_base + offset);
90 static void read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
92 switch(entry->msi_attrib.type) {
95 struct pci_dev *dev = entry->dev;
96 int pos = entry->msi_attrib.pos;
99 pci_read_config_dword(dev, msi_lower_address_reg(pos),
101 if (entry->msi_attrib.is_64) {
102 pci_read_config_dword(dev, msi_upper_address_reg(pos),
104 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
107 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
112 case PCI_CAP_ID_MSIX:
115 base = entry->mask_base +
116 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
118 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
119 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
120 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
128 static void write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
130 switch (entry->msi_attrib.type) {
133 struct pci_dev *dev = entry->dev;
134 int pos = entry->msi_attrib.pos;
136 pci_write_config_dword(dev, msi_lower_address_reg(pos),
138 if (entry->msi_attrib.is_64) {
139 pci_write_config_dword(dev, msi_upper_address_reg(pos),
141 pci_write_config_word(dev, msi_data_reg(pos, 1),
144 pci_write_config_word(dev, msi_data_reg(pos, 0),
149 case PCI_CAP_ID_MSIX:
152 base = entry->mask_base +
153 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
155 writel(msg->address_lo,
156 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
157 writel(msg->address_hi,
158 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
159 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
168 static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
170 struct msi_desc *entry;
172 unsigned int irq = vector;
173 unsigned int dest_cpu = first_cpu(cpu_mask);
175 entry = (struct msi_desc *)msi_desc[vector];
176 if (!entry || !entry->dev)
179 read_msi_msg(entry, &msg);
180 msi_ops->target(vector, dest_cpu, &msg.address_hi, &msg.address_lo);
181 write_msi_msg(entry, &msg);
182 set_native_irq_info(irq, cpu_mask);
185 #define set_msi_affinity NULL
186 #endif /* CONFIG_SMP */
188 static void mask_MSI_irq(unsigned int vector)
190 msi_set_mask_bit(vector, 1);
193 static void unmask_MSI_irq(unsigned int vector)
195 msi_set_mask_bit(vector, 0);
198 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector)
200 struct msi_desc *entry;
203 spin_lock_irqsave(&msi_lock, flags);
204 entry = msi_desc[vector];
205 if (!entry || !entry->dev) {
206 spin_unlock_irqrestore(&msi_lock, flags);
209 entry->msi_attrib.state = 1; /* Mark it active */
210 spin_unlock_irqrestore(&msi_lock, flags);
212 return 0; /* never anything pending */
215 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector)
217 startup_msi_irq_wo_maskbit(vector);
218 unmask_MSI_irq(vector);
219 return 0; /* never anything pending */
222 static void shutdown_msi_irq(unsigned int vector)
224 struct msi_desc *entry;
227 spin_lock_irqsave(&msi_lock, flags);
228 entry = msi_desc[vector];
229 if (entry && entry->dev)
230 entry->msi_attrib.state = 0; /* Mark it not active */
231 spin_unlock_irqrestore(&msi_lock, flags);
234 static void end_msi_irq_wo_maskbit(unsigned int vector)
236 move_native_irq(vector);
240 static void end_msi_irq_w_maskbit(unsigned int vector)
242 move_native_irq(vector);
243 unmask_MSI_irq(vector);
247 static void do_nothing(unsigned int vector)
252 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
253 * which implement the MSI-X Capability Structure.
255 static struct hw_interrupt_type msix_irq_type = {
256 .typename = "PCI-MSI-X",
257 .startup = startup_msi_irq_w_maskbit,
258 .shutdown = shutdown_msi_irq,
259 .enable = unmask_MSI_irq,
260 .disable = mask_MSI_irq,
262 .end = end_msi_irq_w_maskbit,
263 .set_affinity = set_msi_affinity
267 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
268 * which implement the MSI Capability Structure with
269 * Mask-and-Pending Bits.
271 static struct hw_interrupt_type msi_irq_w_maskbit_type = {
272 .typename = "PCI-MSI",
273 .startup = startup_msi_irq_w_maskbit,
274 .shutdown = shutdown_msi_irq,
275 .enable = unmask_MSI_irq,
276 .disable = mask_MSI_irq,
278 .end = end_msi_irq_w_maskbit,
279 .set_affinity = set_msi_affinity
283 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
284 * which implement the MSI Capability Structure without
285 * Mask-and-Pending Bits.
287 static struct hw_interrupt_type msi_irq_wo_maskbit_type = {
288 .typename = "PCI-MSI",
289 .startup = startup_msi_irq_wo_maskbit,
290 .shutdown = shutdown_msi_irq,
291 .enable = do_nothing,
292 .disable = do_nothing,
294 .end = end_msi_irq_wo_maskbit,
295 .set_affinity = set_msi_affinity
298 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign);
299 static int assign_msi_vector(void)
301 static int new_vector_avail = 1;
306 * msi_lock is provided to ensure that successful allocation of MSI
307 * vector is assigned unique among drivers.
309 spin_lock_irqsave(&msi_lock, flags);
311 if (!new_vector_avail) {
315 * vector_irq[] = -1 indicates that this specific vector is:
316 * - assigned for MSI (since MSI have no associated IRQ) or
317 * - assigned for legacy if less than 16, or
318 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
319 * vector_irq[] = 0 indicates that this vector, previously
320 * assigned for MSI, is freed by hotplug removed operations.
321 * This vector will be reused for any subsequent hotplug added
323 * vector_irq[] > 0 indicates that this vector is assigned for
324 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
325 * vector-to-IOxAPIC IRQ mapping.
327 for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) {
328 if (vector_irq[vector] != 0)
330 free_vector = vector;
331 if (!msi_desc[vector])
337 spin_unlock_irqrestore(&msi_lock, flags);
340 vector_irq[free_vector] = -1;
341 nr_released_vectors--;
342 spin_unlock_irqrestore(&msi_lock, flags);
343 if (msi_desc[free_vector] != NULL) {
347 /* free all linked vectors before re-assign */
349 spin_lock_irqsave(&msi_lock, flags);
350 dev = msi_desc[free_vector]->dev;
351 tail = msi_desc[free_vector]->link.tail;
352 spin_unlock_irqrestore(&msi_lock, flags);
353 msi_free_vector(dev, tail, 1);
354 } while (free_vector != tail);
359 vector = assign_irq_vector(AUTO_ASSIGN);
360 last_alloc_vector = vector;
361 if (vector == LAST_DEVICE_VECTOR)
362 new_vector_avail = 0;
364 spin_unlock_irqrestore(&msi_lock, flags);
368 static int get_new_vector(void)
370 int vector = assign_msi_vector();
373 set_intr_gate(vector, interrupt[vector]);
378 static int msi_init(void)
380 static int status = -ENOMEM;
387 printk(KERN_WARNING "PCI: MSI quirk detected. MSI disabled.\n");
392 status = msi_arch_init();
396 "PCI: MSI arch init failed. MSI disabled.\n");
402 "PCI: MSI ops not registered. MSI disabled.\n");
407 last_alloc_vector = assign_irq_vector(AUTO_ASSIGN);
408 status = msi_cache_init();
411 printk(KERN_WARNING "PCI: MSI cache init failed\n");
415 if (last_alloc_vector < 0) {
417 printk(KERN_WARNING "PCI: No interrupt vectors available for MSI\n");
421 vector_irq[last_alloc_vector] = 0;
422 nr_released_vectors++;
427 static int get_msi_vector(struct pci_dev *dev)
429 return get_new_vector();
432 static struct msi_desc* alloc_msi_entry(void)
434 struct msi_desc *entry;
436 entry = kmem_cache_zalloc(msi_cachep, GFP_KERNEL);
440 entry->link.tail = entry->link.head = 0; /* single message */
446 static void attach_msi_entry(struct msi_desc *entry, int vector)
450 spin_lock_irqsave(&msi_lock, flags);
451 msi_desc[vector] = entry;
452 spin_unlock_irqrestore(&msi_lock, flags);
455 static void irq_handler_init(int cap_id, int pos, int mask)
459 spin_lock_irqsave(&irq_desc[pos].lock, flags);
460 if (cap_id == PCI_CAP_ID_MSIX)
461 irq_desc[pos].chip = &msix_irq_type;
464 irq_desc[pos].chip = &msi_irq_wo_maskbit_type;
466 irq_desc[pos].chip = &msi_irq_w_maskbit_type;
468 spin_unlock_irqrestore(&irq_desc[pos].lock, flags);
471 static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
475 pci_read_config_word(dev, msi_control_reg(pos), &control);
476 if (type == PCI_CAP_ID_MSI) {
477 /* Set enabled bits to single MSI & enable MSI_enable bit */
478 msi_enable(control, 1);
479 pci_write_config_word(dev, msi_control_reg(pos), control);
480 dev->msi_enabled = 1;
482 msix_enable(control);
483 pci_write_config_word(dev, msi_control_reg(pos), control);
484 dev->msix_enabled = 1;
486 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
487 /* PCI Express Endpoint device detected */
488 pci_intx(dev, 0); /* disable intx */
492 void disable_msi_mode(struct pci_dev *dev, int pos, int type)
496 pci_read_config_word(dev, msi_control_reg(pos), &control);
497 if (type == PCI_CAP_ID_MSI) {
498 /* Set enabled bits to single MSI & enable MSI_enable bit */
499 msi_disable(control);
500 pci_write_config_word(dev, msi_control_reg(pos), control);
501 dev->msi_enabled = 0;
503 msix_disable(control);
504 pci_write_config_word(dev, msi_control_reg(pos), control);
505 dev->msix_enabled = 0;
507 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
508 /* PCI Express Endpoint device detected */
509 pci_intx(dev, 1); /* enable intx */
513 static int msi_lookup_vector(struct pci_dev *dev, int type)
518 spin_lock_irqsave(&msi_lock, flags);
519 for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) {
520 if (!msi_desc[vector] || msi_desc[vector]->dev != dev ||
521 msi_desc[vector]->msi_attrib.type != type ||
522 msi_desc[vector]->msi_attrib.default_vector != dev->irq)
524 spin_unlock_irqrestore(&msi_lock, flags);
525 /* This pre-assigned MSI vector for this device
526 already exits. Override dev->irq with this vector */
530 spin_unlock_irqrestore(&msi_lock, flags);
535 void pci_scan_msi_device(struct pci_dev *dev)
540 if (pci_find_capability(dev, PCI_CAP_ID_MSIX) > 0)
542 else if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0)
543 nr_reserved_vectors++;
547 int pci_save_msi_state(struct pci_dev *dev)
551 struct pci_cap_saved_state *save_state;
554 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
555 if (pos <= 0 || dev->no_msi)
558 pci_read_config_word(dev, msi_control_reg(pos), &control);
559 if (!(control & PCI_MSI_FLAGS_ENABLE))
562 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
565 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
568 cap = &save_state->data[0];
570 pci_read_config_dword(dev, pos, &cap[i++]);
571 control = cap[0] >> 16;
572 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
573 if (control & PCI_MSI_FLAGS_64BIT) {
574 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
575 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
577 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
578 if (control & PCI_MSI_FLAGS_MASKBIT)
579 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
580 save_state->cap_nr = PCI_CAP_ID_MSI;
581 pci_add_saved_cap(dev, save_state);
585 void pci_restore_msi_state(struct pci_dev *dev)
589 struct pci_cap_saved_state *save_state;
592 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
593 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
594 if (!save_state || pos <= 0)
596 cap = &save_state->data[0];
598 control = cap[i++] >> 16;
599 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
600 if (control & PCI_MSI_FLAGS_64BIT) {
601 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
602 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
604 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
605 if (control & PCI_MSI_FLAGS_MASKBIT)
606 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
607 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
608 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
609 pci_remove_saved_cap(save_state);
613 int pci_save_msix_state(struct pci_dev *dev)
617 int vector, head, tail = 0;
619 struct pci_cap_saved_state *save_state;
621 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
622 if (pos <= 0 || dev->no_msi)
625 /* save the capability */
626 pci_read_config_word(dev, msi_control_reg(pos), &control);
627 if (!(control & PCI_MSIX_FLAGS_ENABLE))
629 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
632 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
635 *((u16 *)&save_state->data[0]) = control;
639 if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
644 vector = head = dev->irq;
645 while (head != tail) {
646 struct msi_desc *entry;
648 entry = msi_desc[vector];
649 read_msi_msg(entry, &entry->msg_save);
651 tail = msi_desc[vector]->link.tail;
656 save_state->cap_nr = PCI_CAP_ID_MSIX;
657 pci_add_saved_cap(dev, save_state);
661 void pci_restore_msix_state(struct pci_dev *dev)
665 int vector, head, tail = 0;
666 struct msi_desc *entry;
668 struct pci_cap_saved_state *save_state;
670 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
673 save = *((u16 *)&save_state->data[0]);
674 pci_remove_saved_cap(save_state);
677 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
681 /* route the table */
683 if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX))
685 vector = head = dev->irq;
686 while (head != tail) {
687 entry = msi_desc[vector];
688 write_msi_msg(entry, &entry->msg_save);
690 tail = msi_desc[vector]->link.tail;
695 pci_write_config_word(dev, msi_control_reg(pos), save);
696 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
700 static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
704 int pos, vector = dev->irq;
707 pos = entry->msi_attrib.pos;
708 pci_read_config_word(dev, msi_control_reg(pos), &control);
710 /* Configure MSI capability structure */
711 status = msi_ops->setup(dev, vector, &msg.address_hi, &msg.address_lo, &msg.data);
715 write_msi_msg(entry, &msg);
716 if (entry->msi_attrib.maskbit) {
717 unsigned int maskbits, temp;
718 /* All MSIs are unmasked by default, Mask them all */
719 pci_read_config_dword(dev,
720 msi_mask_bits_reg(pos, is_64bit_address(control)),
722 temp = (1 << multi_msi_capable(control));
723 temp = ((temp - 1) & ~temp);
725 pci_write_config_dword(dev,
726 msi_mask_bits_reg(pos, is_64bit_address(control)),
734 * msi_capability_init - configure device's MSI capability structure
735 * @dev: pointer to the pci_dev data structure of MSI device function
737 * Setup the MSI capability structure of device function with a single
738 * MSI vector, regardless of device function is capable of handling
739 * multiple messages. A return of zero indicates the successful setup
740 * of an entry zero with the new MSI vector or non-zero for otherwise.
742 static int msi_capability_init(struct pci_dev *dev)
745 struct msi_desc *entry;
749 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
750 pci_read_config_word(dev, msi_control_reg(pos), &control);
751 /* MSI Entry Initialization */
752 entry = alloc_msi_entry();
756 vector = get_msi_vector(dev);
758 kmem_cache_free(msi_cachep, entry);
761 entry->link.head = vector;
762 entry->link.tail = vector;
763 entry->msi_attrib.type = PCI_CAP_ID_MSI;
764 entry->msi_attrib.state = 0; /* Mark it not active */
765 entry->msi_attrib.is_64 = is_64bit_address(control);
766 entry->msi_attrib.entry_nr = 0;
767 entry->msi_attrib.maskbit = is_mask_bit_support(control);
768 entry->msi_attrib.default_vector = dev->irq; /* Save IOAPIC IRQ */
769 entry->msi_attrib.pos = pos;
772 if (is_mask_bit_support(control)) {
773 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
774 is_64bit_address(control));
776 /* Replace with MSI handler */
777 irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
778 /* Configure MSI capability structure */
779 status = msi_register_init(dev, entry);
781 dev->irq = entry->msi_attrib.default_vector;
782 kmem_cache_free(msi_cachep, entry);
786 attach_msi_entry(entry, vector);
787 /* Set MSI enabled bits */
788 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
794 * msix_capability_init - configure device's MSI-X capability
795 * @dev: pointer to the pci_dev data structure of MSI-X device function
796 * @entries: pointer to an array of struct msix_entry entries
797 * @nvec: number of @entries
799 * Setup the MSI-X capability structure of device function with a
800 * single MSI-X vector. A return of zero indicates the successful setup of
801 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
803 static int msix_capability_init(struct pci_dev *dev,
804 struct msix_entry *entries, int nvec)
806 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
809 int vector, pos, i, j, nr_entries, temp = 0;
810 unsigned long phys_addr;
816 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
817 /* Request & Map MSI-X table region */
818 pci_read_config_word(dev, msi_control_reg(pos), &control);
819 nr_entries = multi_msix_capable(control);
821 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
822 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
823 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
824 phys_addr = pci_resource_start (dev, bir) + table_offset;
825 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
829 /* MSI-X Table Initialization */
830 for (i = 0; i < nvec; i++) {
831 entry = alloc_msi_entry();
834 vector = get_msi_vector(dev);
836 kmem_cache_free(msi_cachep, entry);
840 j = entries[i].entry;
841 entries[i].vector = vector;
842 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
843 entry->msi_attrib.state = 0; /* Mark it not active */
844 entry->msi_attrib.is_64 = 1;
845 entry->msi_attrib.entry_nr = j;
846 entry->msi_attrib.maskbit = 1;
847 entry->msi_attrib.default_vector = dev->irq;
848 entry->msi_attrib.pos = pos;
850 entry->mask_base = base;
852 entry->link.head = vector;
853 entry->link.tail = vector;
856 entry->link.head = temp;
857 entry->link.tail = tail->link.tail;
858 tail->link.tail = vector;
859 head->link.head = vector;
863 /* Replace with MSI-X handler */
864 irq_handler_init(PCI_CAP_ID_MSIX, vector, 1);
865 /* Configure MSI-X capability structure */
866 status = msi_ops->setup(dev, vector,
873 write_msi_msg(entry, &msg);
874 attach_msi_entry(entry, vector);
878 for (; i >= 0; i--) {
879 vector = (entries + i)->vector;
880 msi_free_vector(dev, vector, 0);
881 (entries + i)->vector = 0;
885 /* Set MSI-X enabled bits */
886 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
892 * pci_msi_supported - check whether MSI may be enabled on device
893 * @dev: pointer to the pci_dev data structure of MSI device function
895 * MSI must be globally enabled and supported by the device and its root
896 * bus. But, the root bus is not easy to find since some architectures
897 * have virtual busses on top of the PCI hierarchy (for instance the
898 * hypertransport bus), while the actual bus where MSI must be supported
899 * is below. So we test the MSI flag on all parent busses and assume
900 * that no quirk will ever set the NO_MSI flag on a non-root bus.
903 int pci_msi_supported(struct pci_dev * dev)
907 if (!pci_msi_enable || !dev || dev->no_msi)
910 /* check MSI flags of all parent busses */
911 for (bus = dev->bus; bus; bus = bus->parent)
912 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
919 * pci_enable_msi - configure device's MSI capability structure
920 * @dev: pointer to the pci_dev data structure of MSI device function
922 * Setup the MSI capability structure of device function with
923 * a single MSI vector upon its software driver call to request for
924 * MSI mode enabled on its hardware device function. A return of zero
925 * indicates the successful setup of an entry zero with the new MSI
926 * vector or non-zero for otherwise.
928 int pci_enable_msi(struct pci_dev* dev)
930 int pos, temp, status;
932 if (pci_msi_supported(dev) < 0)
941 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
945 WARN_ON(!msi_lookup_vector(dev, PCI_CAP_ID_MSI));
947 /* Check whether driver already requested for MSI-X vectors */
948 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
949 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
950 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
951 "Device already has MSI-X vectors assigned\n",
956 status = msi_capability_init(dev);
959 nr_reserved_vectors--; /* Only MSI capable */
960 else if (nr_msix_devices > 0)
961 nr_msix_devices--; /* Both MSI and MSI-X capable,
962 but choose enabling MSI */
968 void pci_disable_msi(struct pci_dev* dev)
970 struct msi_desc *entry;
971 int pos, default_vector;
980 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
984 pci_read_config_word(dev, msi_control_reg(pos), &control);
985 if (!(control & PCI_MSI_FLAGS_ENABLE))
988 disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
990 spin_lock_irqsave(&msi_lock, flags);
991 entry = msi_desc[dev->irq];
992 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
993 spin_unlock_irqrestore(&msi_lock, flags);
996 if (entry->msi_attrib.state) {
997 spin_unlock_irqrestore(&msi_lock, flags);
998 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
999 "free_irq() on MSI vector %d\n",
1000 pci_name(dev), dev->irq);
1001 BUG_ON(entry->msi_attrib.state > 0);
1003 default_vector = entry->msi_attrib.default_vector;
1004 spin_unlock_irqrestore(&msi_lock, flags);
1005 msi_free_vector(dev, dev->irq, 0);
1007 /* Restore dev->irq to its default pin-assertion vector */
1008 dev->irq = default_vector;
1012 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign)
1014 struct msi_desc *entry;
1015 int head, entry_nr, type;
1017 unsigned long flags;
1019 msi_ops->teardown(vector);
1021 spin_lock_irqsave(&msi_lock, flags);
1022 entry = msi_desc[vector];
1023 if (!entry || entry->dev != dev) {
1024 spin_unlock_irqrestore(&msi_lock, flags);
1027 type = entry->msi_attrib.type;
1028 entry_nr = entry->msi_attrib.entry_nr;
1029 head = entry->link.head;
1030 base = entry->mask_base;
1031 msi_desc[entry->link.head]->link.tail = entry->link.tail;
1032 msi_desc[entry->link.tail]->link.head = entry->link.head;
1035 vector_irq[vector] = 0;
1036 nr_released_vectors++;
1038 msi_desc[vector] = NULL;
1039 spin_unlock_irqrestore(&msi_lock, flags);
1041 kmem_cache_free(msi_cachep, entry);
1043 if (type == PCI_CAP_ID_MSIX) {
1046 entry_nr * PCI_MSIX_ENTRY_SIZE +
1047 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
1057 * pci_enable_msix - configure device's MSI-X capability structure
1058 * @dev: pointer to the pci_dev data structure of MSI-X device function
1059 * @entries: pointer to an array of MSI-X entries
1060 * @nvec: number of MSI-X vectors requested for allocation by device driver
1062 * Setup the MSI-X capability structure of device function with the number
1063 * of requested vectors upon its software driver call to request for
1064 * MSI-X mode enabled on its hardware device function. A return of zero
1065 * indicates the successful configuration of MSI-X capability structure
1066 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
1067 * Or a return of > 0 indicates that driver request is exceeding the number
1068 * of vectors available. Driver should use the returned value to re-send
1071 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
1073 int status, pos, nr_entries, free_vectors;
1076 unsigned long flags;
1078 if (!entries || pci_msi_supported(dev) < 0)
1081 status = msi_init();
1085 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1089 pci_read_config_word(dev, msi_control_reg(pos), &control);
1090 nr_entries = multi_msix_capable(control);
1091 if (nvec > nr_entries)
1094 /* Check for any invalid entries */
1095 for (i = 0; i < nvec; i++) {
1096 if (entries[i].entry >= nr_entries)
1097 return -EINVAL; /* invalid entry */
1098 for (j = i + 1; j < nvec; j++) {
1099 if (entries[i].entry == entries[j].entry)
1100 return -EINVAL; /* duplicate entry */
1104 WARN_ON(!msi_lookup_vector(dev, PCI_CAP_ID_MSIX));
1106 /* Check whether driver already requested for MSI vector */
1107 if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 &&
1108 !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
1109 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
1110 "Device already has an MSI vector assigned\n",
1116 spin_lock_irqsave(&msi_lock, flags);
1118 * msi_lock is provided to ensure that enough vectors resources are
1119 * available before granting.
1121 free_vectors = pci_vector_resources(last_alloc_vector,
1122 nr_released_vectors);
1123 /* Ensure that each MSI/MSI-X device has one vector reserved by
1124 default to avoid any MSI-X driver to take all available
1126 free_vectors -= nr_reserved_vectors;
1127 /* Find the average of free vectors among MSI-X devices */
1128 if (nr_msix_devices > 0)
1129 free_vectors /= nr_msix_devices;
1130 spin_unlock_irqrestore(&msi_lock, flags);
1132 if (nvec > free_vectors) {
1133 if (free_vectors > 0)
1134 return free_vectors;
1139 status = msix_capability_init(dev, entries, nvec);
1140 if (!status && nr_msix_devices > 0)
1146 void pci_disable_msix(struct pci_dev* dev)
1151 if (!pci_msi_enable)
1156 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1160 pci_read_config_word(dev, msi_control_reg(pos), &control);
1161 if (!(control & PCI_MSIX_FLAGS_ENABLE))
1164 disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
1167 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1168 int state, vector, head, tail = 0, warning = 0;
1169 unsigned long flags;
1171 vector = head = dev->irq;
1172 dev->irq = temp; /* Restore pin IRQ */
1173 while (head != tail) {
1174 spin_lock_irqsave(&msi_lock, flags);
1175 state = msi_desc[vector]->msi_attrib.state;
1176 tail = msi_desc[vector]->link.tail;
1177 spin_unlock_irqrestore(&msi_lock, flags);
1180 else if (vector != head) /* Release MSI-X vector */
1181 msi_free_vector(dev, vector, 0);
1184 msi_free_vector(dev, vector, 0);
1186 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
1187 "free_irq() on all MSI-X vectors\n",
1189 BUG_ON(warning > 0);
1195 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1196 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1198 * Being called during hotplug remove, from which the device function
1199 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1200 * allocated for this device function, are reclaimed to unused state,
1201 * which may be used later on.
1203 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
1205 int state, pos, temp;
1206 unsigned long flags;
1208 if (!pci_msi_enable || !dev)
1211 temp = dev->irq; /* Save IOAPIC IRQ */
1212 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
1213 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
1214 spin_lock_irqsave(&msi_lock, flags);
1215 state = msi_desc[dev->irq]->msi_attrib.state;
1216 spin_unlock_irqrestore(&msi_lock, flags);
1218 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
1219 "called without free_irq() on MSI vector %d\n",
1220 pci_name(dev), dev->irq);
1222 } else /* Release MSI vector assigned to this device */
1223 msi_free_vector(dev, dev->irq, 0);
1224 dev->irq = temp; /* Restore IOAPIC IRQ */
1226 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1227 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1228 int vector, head, tail = 0, warning = 0;
1229 void __iomem *base = NULL;
1231 vector = head = dev->irq;
1232 while (head != tail) {
1233 spin_lock_irqsave(&msi_lock, flags);
1234 state = msi_desc[vector]->msi_attrib.state;
1235 tail = msi_desc[vector]->link.tail;
1236 base = msi_desc[vector]->mask_base;
1237 spin_unlock_irqrestore(&msi_lock, flags);
1240 else if (vector != head) /* Release MSI-X vector */
1241 msi_free_vector(dev, vector, 0);
1244 msi_free_vector(dev, vector, 0);
1247 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
1248 "called without free_irq() on all MSI-X vectors\n",
1250 BUG_ON(warning > 0);
1252 dev->irq = temp; /* Restore IOAPIC IRQ */
1256 void pci_no_msi(void)
1261 EXPORT_SYMBOL(pci_enable_msi);
1262 EXPORT_SYMBOL(pci_disable_msi);
1263 EXPORT_SYMBOL(pci_enable_msix);
1264 EXPORT_SYMBOL(pci_disable_msix);