2 * This file is part of wl1251
4 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #ifndef __WL1251_OPS_H__
25 #define __WL1251_OPS_H__
27 #include <linux/bitops.h>
30 #include "wl1251_acx.h"
32 #define WL1251_FW_NAME "wl1251-fw.bin"
33 #define WL1251_NVS_NAME "wl1251-nvs.bin"
35 #define WL1251_POWER_ON_SLEEP 10 /* in miliseconds */
37 void wl1251_setup(struct wl1251 *wl);
40 struct wl1251_acx_memory {
41 __le16 num_stations; /* number of STAs to be supported. */
45 * Nmber of memory buffers for the RX mem pool.
46 * The actual number may be less if there are
47 * not enough blocks left for the minimum num
52 u8 num_tx_queues; /* From 1 to 16 */
53 u8 host_if_options; /* HOST_IF* */
54 u8 tx_min_mem_block_num;
56 __le16 debug_buffer_size;
57 } __attribute__ ((packed));
60 #define ACX_RX_DESC_MIN 1
61 #define ACX_RX_DESC_MAX 127
62 #define ACX_RX_DESC_DEF 32
63 struct wl1251_acx_rx_queue_config {
69 } __attribute__ ((packed));
71 #define ACX_TX_DESC_MIN 1
72 #define ACX_TX_DESC_MAX 127
73 #define ACX_TX_DESC_DEF 16
74 struct wl1251_acx_tx_queue_config {
78 } __attribute__ ((packed));
80 #define MAX_TX_QUEUE_CONFIGS 5
81 #define MAX_TX_QUEUES 4
82 struct wl1251_acx_config_memory {
83 struct acx_header header;
85 struct wl1251_acx_memory mem_config;
86 struct wl1251_acx_rx_queue_config rx_queue_config;
87 struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS];
88 } __attribute__ ((packed));
90 struct wl1251_acx_mem_map {
91 struct acx_header header;
96 void *wep_defkey_start;
99 void *sta_table_start;
102 void *packet_template_start;
103 void *packet_template_end;
105 void *queue_memory_start;
106 void *queue_memory_end;
108 void *packet_memory_pool_start;
109 void *packet_memory_pool_end;
111 void *debug_buffer1_start;
112 void *debug_buffer1_end;
114 void *debug_buffer2_start;
115 void *debug_buffer2_end;
117 /* Number of blocks FW allocated for TX packets */
118 u32 num_tx_mem_blocks;
120 /* Number of blocks FW allocated for RX packets */
121 u32 num_rx_mem_blocks;
122 } __attribute__ ((packed));
124 /*************************************************************************
126 Host Interrupt Register (WiLink -> Host)
128 **************************************************************************/
130 /* RX packet is ready in Xfer buffer #0 */
131 #define WL1251_ACX_INTR_RX0_DATA BIT(0)
133 /* TX result(s) are in the TX complete buffer */
134 #define WL1251_ACX_INTR_TX_RESULT BIT(1)
137 #define WL1251_ACX_INTR_TX_XFR BIT(2)
139 /* RX packet is ready in Xfer buffer #1 */
140 #define WL1251_ACX_INTR_RX1_DATA BIT(3)
142 /* Event was entered to Event MBOX #A */
143 #define WL1251_ACX_INTR_EVENT_A BIT(4)
145 /* Event was entered to Event MBOX #B */
146 #define WL1251_ACX_INTR_EVENT_B BIT(5)
149 #define WL1251_ACX_INTR_WAKE_ON_HOST BIT(6)
151 /* Trace meassge on MBOX #A */
152 #define WL1251_ACX_INTR_TRACE_A BIT(7)
154 /* Trace meassge on MBOX #B */
155 #define WL1251_ACX_INTR_TRACE_B BIT(8)
157 /* Command processing completion */
158 #define WL1251_ACX_INTR_CMD_COMPLETE BIT(9)
160 /* Init sequence is done */
161 #define WL1251_ACX_INTR_INIT_COMPLETE BIT(14)
163 #define WL1251_ACX_INTR_ALL 0xFFFFFFFF