Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[pandora-kernel.git] / drivers / net / wireless / wl12xx / spi.c
1 /*
2  * This file is part of wl1271
3  *
4  * Copyright (C) 2008-2009 Nokia Corporation
5  *
6  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  *
22  */
23
24 #include <linux/irq.h>
25 #include <linux/module.h>
26 #include <linux/crc7.h>
27 #include <linux/spi/spi.h>
28 #include <linux/wl12xx.h>
29 #include <linux/slab.h>
30
31 #include "wl12xx.h"
32 #include "wl12xx_80211.h"
33 #include "io.h"
34
35 #include "reg.h"
36
37 #define WSPI_CMD_READ                 0x40000000
38 #define WSPI_CMD_WRITE                0x00000000
39 #define WSPI_CMD_FIXED                0x20000000
40 #define WSPI_CMD_BYTE_LENGTH          0x1FFE0000
41 #define WSPI_CMD_BYTE_LENGTH_OFFSET   17
42 #define WSPI_CMD_BYTE_ADDR            0x0001FFFF
43
44 #define WSPI_INIT_CMD_CRC_LEN       5
45
46 #define WSPI_INIT_CMD_START         0x00
47 #define WSPI_INIT_CMD_TX            0x40
48 /* the extra bypass bit is sampled by the TNET as '1' */
49 #define WSPI_INIT_CMD_BYPASS_BIT    0x80
50 #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
51 #define WSPI_INIT_CMD_EN_FIXEDBUSY  0x80
52 #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
53 #define WSPI_INIT_CMD_IOD           0x40
54 #define WSPI_INIT_CMD_IP            0x20
55 #define WSPI_INIT_CMD_CS            0x10
56 #define WSPI_INIT_CMD_WS            0x08
57 #define WSPI_INIT_CMD_WSPI          0x01
58 #define WSPI_INIT_CMD_END           0x01
59
60 #define WSPI_INIT_CMD_LEN           8
61
62 #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
63                 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
64 #define HW_ACCESS_WSPI_INIT_CMD_MASK  0
65
66 /* HW limitation: maximum possible chunk size is 4095 bytes */
67 #define WSPI_MAX_CHUNK_SIZE    4092
68
69 #define WSPI_MAX_NUM_OF_CHUNKS (WL1271_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE)
70
71 static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
72 {
73         return wl->if_priv;
74 }
75
76 static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
77 {
78         return &(wl_to_spi(wl)->dev);
79 }
80
81 static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
82 {
83         disable_irq(wl->irq);
84 }
85
86 static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
87 {
88         enable_irq(wl->irq);
89 }
90
91 static void wl1271_spi_reset(struct wl1271 *wl)
92 {
93         u8 *cmd;
94         struct spi_transfer t;
95         struct spi_message m;
96
97         cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
98         if (!cmd) {
99                 wl1271_error("could not allocate cmd for spi reset");
100                 return;
101         }
102
103         memset(&t, 0, sizeof(t));
104         spi_message_init(&m);
105
106         memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
107
108         t.tx_buf = cmd;
109         t.len = WSPI_INIT_CMD_LEN;
110         spi_message_add_tail(&t, &m);
111
112         spi_sync(wl_to_spi(wl), &m);
113         kfree(cmd);
114
115         wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
116 }
117
118 static void wl1271_spi_init(struct wl1271 *wl)
119 {
120         u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
121         struct spi_transfer t;
122         struct spi_message m;
123
124         cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
125         if (!cmd) {
126                 wl1271_error("could not allocate cmd for spi init");
127                 return;
128         }
129
130         memset(crc, 0, sizeof(crc));
131         memset(&t, 0, sizeof(t));
132         spi_message_init(&m);
133
134         /*
135          * Set WSPI_INIT_COMMAND
136          * the data is being send from the MSB to LSB
137          */
138         cmd[2] = 0xff;
139         cmd[3] = 0xff;
140         cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
141         cmd[0] = 0;
142         cmd[7] = 0;
143         cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
144         cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
145
146         if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
147                 cmd[5] |=  WSPI_INIT_CMD_DIS_FIXEDBUSY;
148         else
149                 cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
150
151         cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
152                 | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
153
154         crc[0] = cmd[1];
155         crc[1] = cmd[0];
156         crc[2] = cmd[7];
157         crc[3] = cmd[6];
158         crc[4] = cmd[5];
159
160         cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
161         cmd[4] |= WSPI_INIT_CMD_END;
162
163         t.tx_buf = cmd;
164         t.len = WSPI_INIT_CMD_LEN;
165         spi_message_add_tail(&t, &m);
166
167         spi_sync(wl_to_spi(wl), &m);
168         wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
169         kfree(cmd);
170 }
171
172 #define WL1271_BUSY_WORD_TIMEOUT 1000
173
174 static int wl1271_spi_read_busy(struct wl1271 *wl)
175 {
176         struct spi_transfer t[1];
177         struct spi_message m;
178         u32 *busy_buf;
179         int num_busy_bytes = 0;
180
181         /*
182          * Read further busy words from SPI until a non-busy word is
183          * encountered, then read the data itself into the buffer.
184          */
185
186         num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
187         busy_buf = wl->buffer_busyword;
188         while (num_busy_bytes) {
189                 num_busy_bytes--;
190                 spi_message_init(&m);
191                 memset(t, 0, sizeof(t));
192                 t[0].rx_buf = busy_buf;
193                 t[0].len = sizeof(u32);
194                 t[0].cs_change = true;
195                 spi_message_add_tail(&t[0], &m);
196                 spi_sync(wl_to_spi(wl), &m);
197
198                 if (*busy_buf & 0x1)
199                         return 0;
200         }
201
202         /* The SPI bus is unresponsive, the read failed. */
203         wl1271_error("SPI read busy-word timeout!\n");
204         return -ETIMEDOUT;
205 }
206
207 static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
208                                 size_t len, bool fixed)
209 {
210         struct spi_transfer t[2];
211         struct spi_message m;
212         u32 *busy_buf;
213         u32 *cmd;
214         u32 chunk_len;
215
216         while (len > 0) {
217                 chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
218
219                 cmd = &wl->buffer_cmd;
220                 busy_buf = wl->buffer_busyword;
221
222                 *cmd = 0;
223                 *cmd |= WSPI_CMD_READ;
224                 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
225                         WSPI_CMD_BYTE_LENGTH;
226                 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
227
228                 if (fixed)
229                         *cmd |= WSPI_CMD_FIXED;
230
231                 spi_message_init(&m);
232                 memset(t, 0, sizeof(t));
233
234                 t[0].tx_buf = cmd;
235                 t[0].len = 4;
236                 t[0].cs_change = true;
237                 spi_message_add_tail(&t[0], &m);
238
239                 /* Busy and non busy words read */
240                 t[1].rx_buf = busy_buf;
241                 t[1].len = WL1271_BUSY_WORD_LEN;
242                 t[1].cs_change = true;
243                 spi_message_add_tail(&t[1], &m);
244
245                 spi_sync(wl_to_spi(wl), &m);
246
247                 if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
248                     wl1271_spi_read_busy(wl)) {
249                         memset(buf, 0, chunk_len);
250                         return;
251                 }
252
253                 spi_message_init(&m);
254                 memset(t, 0, sizeof(t));
255
256                 t[0].rx_buf = buf;
257                 t[0].len = chunk_len;
258                 t[0].cs_change = true;
259                 spi_message_add_tail(&t[0], &m);
260
261                 spi_sync(wl_to_spi(wl), &m);
262
263                 wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
264                 wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, chunk_len);
265
266                 if (!fixed)
267                         addr += chunk_len;
268                 buf += chunk_len;
269                 len -= chunk_len;
270         }
271 }
272
273 static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
274                           size_t len, bool fixed)
275 {
276         struct spi_transfer t[2 * WSPI_MAX_NUM_OF_CHUNKS];
277         struct spi_message m;
278         u32 commands[WSPI_MAX_NUM_OF_CHUNKS];
279         u32 *cmd;
280         u32 chunk_len;
281         int i;
282
283         WARN_ON(len > WL1271_AGGR_BUFFER_SIZE);
284
285         spi_message_init(&m);
286         memset(t, 0, sizeof(t));
287
288         cmd = &commands[0];
289         i = 0;
290         while (len > 0) {
291                 chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
292
293                 *cmd = 0;
294                 *cmd |= WSPI_CMD_WRITE;
295                 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
296                         WSPI_CMD_BYTE_LENGTH;
297                 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
298
299                 if (fixed)
300                         *cmd |= WSPI_CMD_FIXED;
301
302                 t[i].tx_buf = cmd;
303                 t[i].len = sizeof(*cmd);
304                 spi_message_add_tail(&t[i++], &m);
305
306                 t[i].tx_buf = buf;
307                 t[i].len = chunk_len;
308                 spi_message_add_tail(&t[i++], &m);
309
310                 wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
311                 wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, chunk_len);
312
313                 if (!fixed)
314                         addr += chunk_len;
315                 buf += chunk_len;
316                 len -= chunk_len;
317                 cmd++;
318         }
319
320         spi_sync(wl_to_spi(wl), &m);
321 }
322
323 static irqreturn_t wl1271_irq(int irq, void *cookie)
324 {
325         struct wl1271 *wl;
326         unsigned long flags;
327
328         wl1271_debug(DEBUG_IRQ, "IRQ");
329
330         wl = cookie;
331
332         /* complete the ELP completion */
333         spin_lock_irqsave(&wl->wl_lock, flags);
334         if (wl->elp_compl) {
335                 complete(wl->elp_compl);
336                 wl->elp_compl = NULL;
337         }
338
339         if (!test_and_set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags))
340                 ieee80211_queue_work(wl->hw, &wl->irq_work);
341         set_bit(WL1271_FLAG_IRQ_PENDING, &wl->flags);
342         spin_unlock_irqrestore(&wl->wl_lock, flags);
343
344         return IRQ_HANDLED;
345 }
346
347 static int wl1271_spi_set_power(struct wl1271 *wl, bool enable)
348 {
349         if (wl->set_power)
350                 wl->set_power(enable);
351
352         return 0;
353 }
354
355 static struct wl1271_if_operations spi_ops = {
356         .read           = wl1271_spi_raw_read,
357         .write          = wl1271_spi_raw_write,
358         .reset          = wl1271_spi_reset,
359         .init           = wl1271_spi_init,
360         .power          = wl1271_spi_set_power,
361         .dev            = wl1271_spi_wl_to_dev,
362         .enable_irq     = wl1271_spi_enable_interrupts,
363         .disable_irq    = wl1271_spi_disable_interrupts
364 };
365
366 static int __devinit wl1271_probe(struct spi_device *spi)
367 {
368         struct wl12xx_platform_data *pdata;
369         struct ieee80211_hw *hw;
370         struct wl1271 *wl;
371         int ret;
372
373         pdata = spi->dev.platform_data;
374         if (!pdata) {
375                 wl1271_error("no platform data");
376                 return -ENODEV;
377         }
378
379         hw = wl1271_alloc_hw();
380         if (IS_ERR(hw))
381                 return PTR_ERR(hw);
382
383         wl = hw->priv;
384
385         dev_set_drvdata(&spi->dev, wl);
386         wl->if_priv = spi;
387
388         wl->if_ops = &spi_ops;
389
390         /* This is the only SPI value that we need to set here, the rest
391          * comes from the board-peripherals file */
392         spi->bits_per_word = 32;
393
394         ret = spi_setup(spi);
395         if (ret < 0) {
396                 wl1271_error("spi_setup failed");
397                 goto out_free;
398         }
399
400         wl->set_power = pdata->set_power;
401         if (!wl->set_power) {
402                 wl1271_error("set power function missing in platform data");
403                 ret = -ENODEV;
404                 goto out_free;
405         }
406
407         wl->ref_clock = pdata->board_ref_clock;
408
409         wl->irq = spi->irq;
410         if (wl->irq < 0) {
411                 wl1271_error("irq missing in platform data");
412                 ret = -ENODEV;
413                 goto out_free;
414         }
415
416         ret = request_irq(wl->irq, wl1271_irq, 0, DRIVER_NAME, wl);
417         if (ret < 0) {
418                 wl1271_error("request_irq() failed: %d", ret);
419                 goto out_free;
420         }
421
422         set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING);
423
424         disable_irq(wl->irq);
425
426         ret = wl1271_init_ieee80211(wl);
427         if (ret)
428                 goto out_irq;
429
430         ret = wl1271_register_hw(wl);
431         if (ret)
432                 goto out_irq;
433
434         wl1271_notice("initialized");
435
436         return 0;
437
438  out_irq:
439         free_irq(wl->irq, wl);
440
441  out_free:
442         wl1271_free_hw(wl);
443
444         return ret;
445 }
446
447 static int __devexit wl1271_remove(struct spi_device *spi)
448 {
449         struct wl1271 *wl = dev_get_drvdata(&spi->dev);
450
451         wl1271_unregister_hw(wl);
452         free_irq(wl->irq, wl);
453         wl1271_free_hw(wl);
454
455         return 0;
456 }
457
458
459 static struct spi_driver wl1271_spi_driver = {
460         .driver = {
461                 .name           = "wl1271_spi",
462                 .bus            = &spi_bus_type,
463                 .owner          = THIS_MODULE,
464         },
465
466         .probe          = wl1271_probe,
467         .remove         = __devexit_p(wl1271_remove),
468 };
469
470 static int __init wl1271_init(void)
471 {
472         int ret;
473
474         ret = spi_register_driver(&wl1271_spi_driver);
475         if (ret < 0) {
476                 wl1271_error("failed to register spi driver: %d", ret);
477                 goto out;
478         }
479
480 out:
481         return ret;
482 }
483
484 static void __exit wl1271_exit(void)
485 {
486         spi_unregister_driver(&wl1271_spi_driver);
487
488         wl1271_notice("unloaded");
489 }
490
491 module_init(wl1271_init);
492 module_exit(wl1271_exit);
493
494 MODULE_LICENSE("GPL");
495 MODULE_AUTHOR("Luciano Coelho <luciano.coelho@nokia.com>");
496 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
497 MODULE_FIRMWARE(WL1271_FW_NAME);
498 MODULE_ALIAS("spi:wl1271");