pandora: defconfig: update
[pandora-kernel.git] / drivers / net / wireless / wl12xx / spi.c
1 /*
2  * This file is part of wl1271
3  *
4  * Copyright (C) 2008-2009 Nokia Corporation
5  *
6  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  *
22  */
23
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
27 #include <linux/crc7.h>
28 #include <linux/spi/spi.h>
29 #include <linux/wl12xx.h>
30 #include <linux/slab.h>
31
32 #include "wl12xx.h"
33 #include "wl12xx_80211.h"
34 #include "io.h"
35
36 #include "reg.h"
37
38 #define WSPI_CMD_READ                 0x40000000
39 #define WSPI_CMD_WRITE                0x00000000
40 #define WSPI_CMD_FIXED                0x20000000
41 #define WSPI_CMD_BYTE_LENGTH          0x1FFE0000
42 #define WSPI_CMD_BYTE_LENGTH_OFFSET   17
43 #define WSPI_CMD_BYTE_ADDR            0x0001FFFF
44
45 #define WSPI_INIT_CMD_CRC_LEN       5
46
47 #define WSPI_INIT_CMD_START         0x00
48 #define WSPI_INIT_CMD_TX            0x40
49 /* the extra bypass bit is sampled by the TNET as '1' */
50 #define WSPI_INIT_CMD_BYPASS_BIT    0x80
51 #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
52 #define WSPI_INIT_CMD_EN_FIXEDBUSY  0x80
53 #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
54 #define WSPI_INIT_CMD_IOD           0x40
55 #define WSPI_INIT_CMD_IP            0x20
56 #define WSPI_INIT_CMD_CS            0x10
57 #define WSPI_INIT_CMD_WS            0x08
58 #define WSPI_INIT_CMD_WSPI          0x01
59 #define WSPI_INIT_CMD_END           0x01
60
61 #define WSPI_INIT_CMD_LEN           8
62
63 #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
64                 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
65 #define HW_ACCESS_WSPI_INIT_CMD_MASK  0
66
67 /* HW limitation: maximum possible chunk size is 4095 bytes */
68 #define WSPI_MAX_CHUNK_SIZE    4092
69
70 /* Maximum number of SPI write chunks */
71 #define WSPI_MAX_NUM_OF_CHUNKS \
72         ((WL1271_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE) + 1)
73
74
75 static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
76 {
77         return wl->if_priv;
78 }
79
80 static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
81 {
82         return &(wl_to_spi(wl)->dev);
83 }
84
85 static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
86 {
87         disable_irq(wl->irq);
88 }
89
90 static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
91 {
92         enable_irq(wl->irq);
93 }
94
95 static void wl1271_spi_reset(struct wl1271 *wl)
96 {
97         u8 *cmd;
98         struct spi_transfer t;
99         struct spi_message m;
100
101         cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
102         if (!cmd) {
103                 wl1271_error("could not allocate cmd for spi reset");
104                 return;
105         }
106
107         memset(&t, 0, sizeof(t));
108         spi_message_init(&m);
109
110         memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
111
112         t.tx_buf = cmd;
113         t.len = WSPI_INIT_CMD_LEN;
114         spi_message_add_tail(&t, &m);
115
116         spi_sync(wl_to_spi(wl), &m);
117
118         wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
119         kfree(cmd);
120 }
121
122 static void wl1271_spi_init(struct wl1271 *wl)
123 {
124         u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
125         struct spi_transfer t;
126         struct spi_message m;
127
128         cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
129         if (!cmd) {
130                 wl1271_error("could not allocate cmd for spi init");
131                 return;
132         }
133
134         memset(crc, 0, sizeof(crc));
135         memset(&t, 0, sizeof(t));
136         spi_message_init(&m);
137
138         /*
139          * Set WSPI_INIT_COMMAND
140          * the data is being send from the MSB to LSB
141          */
142         cmd[2] = 0xff;
143         cmd[3] = 0xff;
144         cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
145         cmd[0] = 0;
146         cmd[7] = 0;
147         cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
148         cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
149
150         if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
151                 cmd[5] |=  WSPI_INIT_CMD_DIS_FIXEDBUSY;
152         else
153                 cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
154
155         cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
156                 | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
157
158         crc[0] = cmd[1];
159         crc[1] = cmd[0];
160         crc[2] = cmd[7];
161         crc[3] = cmd[6];
162         crc[4] = cmd[5];
163
164         cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
165         cmd[4] |= WSPI_INIT_CMD_END;
166
167         t.tx_buf = cmd;
168         t.len = WSPI_INIT_CMD_LEN;
169         spi_message_add_tail(&t, &m);
170
171         spi_sync(wl_to_spi(wl), &m);
172         wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
173         kfree(cmd);
174 }
175
176 #define WL1271_BUSY_WORD_TIMEOUT 1000
177
178 static int wl1271_spi_read_busy(struct wl1271 *wl)
179 {
180         struct spi_transfer t[1];
181         struct spi_message m;
182         u32 *busy_buf;
183         int num_busy_bytes = 0;
184
185         /*
186          * Read further busy words from SPI until a non-busy word is
187          * encountered, then read the data itself into the buffer.
188          */
189
190         num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
191         busy_buf = wl->buffer_busyword;
192         while (num_busy_bytes) {
193                 num_busy_bytes--;
194                 spi_message_init(&m);
195                 memset(t, 0, sizeof(t));
196                 t[0].rx_buf = busy_buf;
197                 t[0].len = sizeof(u32);
198                 t[0].cs_change = true;
199                 spi_message_add_tail(&t[0], &m);
200                 spi_sync(wl_to_spi(wl), &m);
201
202                 if (*busy_buf & 0x1)
203                         return 0;
204         }
205
206         /* The SPI bus is unresponsive, the read failed. */
207         wl1271_error("SPI read busy-word timeout!\n");
208         return -ETIMEDOUT;
209 }
210
211 static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
212                                 size_t len, bool fixed)
213 {
214         struct spi_transfer t[2];
215         struct spi_message m;
216         u32 *busy_buf;
217         u32 *cmd;
218         u32 chunk_len;
219
220         while (len > 0) {
221                 chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
222
223                 cmd = &wl->buffer_cmd;
224                 busy_buf = wl->buffer_busyword;
225
226                 *cmd = 0;
227                 *cmd |= WSPI_CMD_READ;
228                 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
229                         WSPI_CMD_BYTE_LENGTH;
230                 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
231
232                 if (fixed)
233                         *cmd |= WSPI_CMD_FIXED;
234
235                 spi_message_init(&m);
236                 memset(t, 0, sizeof(t));
237
238                 t[0].tx_buf = cmd;
239                 t[0].len = 4;
240                 t[0].cs_change = true;
241                 spi_message_add_tail(&t[0], &m);
242
243                 /* Busy and non busy words read */
244                 t[1].rx_buf = busy_buf;
245                 t[1].len = WL1271_BUSY_WORD_LEN;
246                 t[1].cs_change = true;
247                 spi_message_add_tail(&t[1], &m);
248
249                 spi_sync(wl_to_spi(wl), &m);
250
251                 if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
252                     wl1271_spi_read_busy(wl)) {
253                         memset(buf, 0, chunk_len);
254                         return;
255                 }
256
257                 spi_message_init(&m);
258                 memset(t, 0, sizeof(t));
259
260                 t[0].rx_buf = buf;
261                 t[0].len = chunk_len;
262                 t[0].cs_change = true;
263                 spi_message_add_tail(&t[0], &m);
264
265                 spi_sync(wl_to_spi(wl), &m);
266
267                 wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
268                 wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, chunk_len);
269
270                 if (!fixed)
271                         addr += chunk_len;
272                 buf += chunk_len;
273                 len -= chunk_len;
274         }
275 }
276
277 static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
278                           size_t len, bool fixed)
279 {
280         /* SPI write buffers - 2 for each chunk */
281         struct spi_transfer t[2 * WSPI_MAX_NUM_OF_CHUNKS];
282         struct spi_message m;
283         u32 commands[WSPI_MAX_NUM_OF_CHUNKS]; /* 1 command per chunk */
284         u32 *cmd;
285         u32 chunk_len;
286         int i;
287
288         WARN_ON(len > WL1271_AGGR_BUFFER_SIZE);
289
290         spi_message_init(&m);
291         memset(t, 0, sizeof(t));
292
293         cmd = &commands[0];
294         i = 0;
295         while (len > 0) {
296                 chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
297
298                 *cmd = 0;
299                 *cmd |= WSPI_CMD_WRITE;
300                 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
301                         WSPI_CMD_BYTE_LENGTH;
302                 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
303
304                 if (fixed)
305                         *cmd |= WSPI_CMD_FIXED;
306
307                 t[i].tx_buf = cmd;
308                 t[i].len = sizeof(*cmd);
309                 spi_message_add_tail(&t[i++], &m);
310
311                 t[i].tx_buf = buf;
312                 t[i].len = chunk_len;
313                 spi_message_add_tail(&t[i++], &m);
314
315                 wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
316                 wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, chunk_len);
317
318                 if (!fixed)
319                         addr += chunk_len;
320                 buf += chunk_len;
321                 len -= chunk_len;
322                 cmd++;
323         }
324
325         spi_sync(wl_to_spi(wl), &m);
326 }
327
328 static irqreturn_t wl1271_hardirq(int irq, void *cookie)
329 {
330         struct wl1271 *wl = cookie;
331         unsigned long flags;
332
333         wl1271_debug(DEBUG_IRQ, "IRQ");
334
335         /* complete the ELP completion */
336         spin_lock_irqsave(&wl->wl_lock, flags);
337         set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags);
338         if (wl->elp_compl) {
339                 complete(wl->elp_compl);
340                 wl->elp_compl = NULL;
341         }
342         spin_unlock_irqrestore(&wl->wl_lock, flags);
343
344         return IRQ_WAKE_THREAD;
345 }
346
347 static int wl1271_spi_set_power(struct wl1271 *wl, bool enable)
348 {
349         if (wl->set_power)
350                 wl->set_power(enable);
351
352         return 0;
353 }
354
355 static struct wl1271_if_operations spi_ops = {
356         .read           = wl1271_spi_raw_read,
357         .write          = wl1271_spi_raw_write,
358         .reset          = wl1271_spi_reset,
359         .init           = wl1271_spi_init,
360         .power          = wl1271_spi_set_power,
361         .dev            = wl1271_spi_wl_to_dev,
362         .enable_irq     = wl1271_spi_enable_interrupts,
363         .disable_irq    = wl1271_spi_disable_interrupts,
364         .set_block_size = NULL,
365 };
366
367 static int __devinit wl1271_probe(struct spi_device *spi)
368 {
369         struct wl12xx_platform_data *pdata;
370         struct ieee80211_hw *hw;
371         struct wl1271 *wl;
372         unsigned long irqflags;
373         int ret;
374
375         pdata = spi->dev.platform_data;
376         if (!pdata) {
377                 wl1271_error("no platform data");
378                 return -ENODEV;
379         }
380
381         hw = wl1271_alloc_hw();
382         if (IS_ERR(hw))
383                 return PTR_ERR(hw);
384
385         wl = hw->priv;
386
387         dev_set_drvdata(&spi->dev, wl);
388         wl->if_priv = spi;
389
390         wl->if_ops = &spi_ops;
391
392         /* This is the only SPI value that we need to set here, the rest
393          * comes from the board-peripherals file */
394         spi->bits_per_word = 32;
395
396         ret = spi_setup(spi);
397         if (ret < 0) {
398                 wl1271_error("spi_setup failed");
399                 goto out_free;
400         }
401
402         wl->set_power = pdata->set_power;
403         if (!wl->set_power) {
404                 wl1271_error("set power function missing in platform data");
405                 ret = -ENODEV;
406                 goto out_free;
407         }
408
409         wl->ref_clock = pdata->board_ref_clock;
410         wl->tcxo_clock = pdata->board_tcxo_clock;
411         wl->platform_quirks = pdata->platform_quirks;
412
413         if (wl->platform_quirks & WL12XX_PLATFORM_QUIRK_EDGE_IRQ)
414                 irqflags = IRQF_TRIGGER_RISING;
415         else
416                 irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
417
418         wl->irq = spi->irq;
419         if (wl->irq < 0) {
420                 wl1271_error("irq missing in platform data");
421                 ret = -ENODEV;
422                 goto out_free;
423         }
424
425         ret = request_threaded_irq(wl->irq, wl1271_hardirq, wl1271_irq,
426                                    irqflags,
427                                    DRIVER_NAME, wl);
428         if (ret < 0) {
429                 wl1271_error("request_irq() failed: %d", ret);
430                 goto out_free;
431         }
432
433         disable_irq(wl->irq);
434
435         ret = wl1271_init_ieee80211(wl);
436         if (ret)
437                 goto out_irq;
438
439         ret = wl1271_register_hw(wl);
440         if (ret)
441                 goto out_irq;
442
443         return 0;
444
445  out_irq:
446         free_irq(wl->irq, wl);
447
448  out_free:
449         wl1271_free_hw(wl);
450
451         return ret;
452 }
453
454 static int __devexit wl1271_remove(struct spi_device *spi)
455 {
456         struct wl1271 *wl = dev_get_drvdata(&spi->dev);
457
458         wl1271_unregister_hw(wl);
459         free_irq(wl->irq, wl);
460         wl1271_free_hw(wl);
461
462         return 0;
463 }
464
465
466 static struct spi_driver wl1271_spi_driver = {
467         .driver = {
468                 .name           = "wl1271_spi",
469                 .bus            = &spi_bus_type,
470                 .owner          = THIS_MODULE,
471         },
472
473         .probe          = wl1271_probe,
474         .remove         = __devexit_p(wl1271_remove),
475 };
476
477 static int __init wl1271_init(void)
478 {
479         return spi_register_driver(&wl1271_spi_driver);
480 }
481
482 static void __exit wl1271_exit(void)
483 {
484         spi_unregister_driver(&wl1271_spi_driver);
485 }
486
487 module_init(wl1271_init);
488 module_exit(wl1271_exit);
489
490 MODULE_LICENSE("GPL");
491 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
492 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
493 MODULE_FIRMWARE(WL127X_FW_NAME);
494 MODULE_FIRMWARE(WL128X_FW_NAME);
495 MODULE_ALIAS("spi:wl1271");