2 * This file is part of wl1271
4 * Copyright (C) 2008-2009 Nokia Corporation
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
27 #include <linux/crc7.h>
28 #include <linux/spi/spi.h>
29 #include <linux/wl12xx.h>
30 #include <linux/slab.h>
33 #include "wl12xx_80211.h"
38 #define WSPI_CMD_READ 0x40000000
39 #define WSPI_CMD_WRITE 0x00000000
40 #define WSPI_CMD_FIXED 0x20000000
41 #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
42 #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
43 #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
45 #define WSPI_INIT_CMD_CRC_LEN 5
47 #define WSPI_INIT_CMD_START 0x00
48 #define WSPI_INIT_CMD_TX 0x40
49 /* the extra bypass bit is sampled by the TNET as '1' */
50 #define WSPI_INIT_CMD_BYPASS_BIT 0x80
51 #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
52 #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
53 #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
54 #define WSPI_INIT_CMD_IOD 0x40
55 #define WSPI_INIT_CMD_IP 0x20
56 #define WSPI_INIT_CMD_CS 0x10
57 #define WSPI_INIT_CMD_WS 0x08
58 #define WSPI_INIT_CMD_WSPI 0x01
59 #define WSPI_INIT_CMD_END 0x01
61 #define WSPI_INIT_CMD_LEN 8
63 #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
64 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
65 #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
67 /* HW limitation: maximum possible chunk size is 4095 bytes */
68 #define WSPI_MAX_CHUNK_SIZE 4092
70 /* Maximum number of SPI write chunks */
71 #define WSPI_MAX_NUM_OF_CHUNKS \
72 ((WL1271_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE) + 1)
75 static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
80 static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
82 return &(wl_to_spi(wl)->dev);
85 static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
90 static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
95 static void wl1271_spi_reset(struct wl1271 *wl)
98 struct spi_transfer t;
101 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
103 wl1271_error("could not allocate cmd for spi reset");
107 memset(&t, 0, sizeof(t));
108 spi_message_init(&m);
110 memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
113 t.len = WSPI_INIT_CMD_LEN;
114 spi_message_add_tail(&t, &m);
116 spi_sync(wl_to_spi(wl), &m);
118 wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
122 static void wl1271_spi_init(struct wl1271 *wl)
124 u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
125 struct spi_transfer t;
126 struct spi_message m;
128 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
130 wl1271_error("could not allocate cmd for spi init");
134 memset(crc, 0, sizeof(crc));
135 memset(&t, 0, sizeof(t));
136 spi_message_init(&m);
139 * Set WSPI_INIT_COMMAND
140 * the data is being send from the MSB to LSB
144 cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
147 cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
148 cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
150 if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
151 cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
153 cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
155 cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
156 | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
164 cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
165 cmd[4] |= WSPI_INIT_CMD_END;
168 t.len = WSPI_INIT_CMD_LEN;
169 spi_message_add_tail(&t, &m);
171 spi_sync(wl_to_spi(wl), &m);
172 wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
176 #define WL1271_BUSY_WORD_TIMEOUT 1000
178 static int wl1271_spi_read_busy(struct wl1271 *wl)
180 struct spi_transfer t[1];
181 struct spi_message m;
183 int num_busy_bytes = 0;
186 * Read further busy words from SPI until a non-busy word is
187 * encountered, then read the data itself into the buffer.
190 num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
191 busy_buf = wl->buffer_busyword;
192 while (num_busy_bytes) {
194 spi_message_init(&m);
195 memset(t, 0, sizeof(t));
196 t[0].rx_buf = busy_buf;
197 t[0].len = sizeof(u32);
198 t[0].cs_change = true;
199 spi_message_add_tail(&t[0], &m);
200 spi_sync(wl_to_spi(wl), &m);
206 /* The SPI bus is unresponsive, the read failed. */
207 wl1271_error("SPI read busy-word timeout!\n");
211 static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
212 size_t len, bool fixed)
214 struct spi_transfer t[2];
215 struct spi_message m;
221 chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
223 cmd = &wl->buffer_cmd;
224 busy_buf = wl->buffer_busyword;
227 *cmd |= WSPI_CMD_READ;
228 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
229 WSPI_CMD_BYTE_LENGTH;
230 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
233 *cmd |= WSPI_CMD_FIXED;
235 spi_message_init(&m);
236 memset(t, 0, sizeof(t));
240 t[0].cs_change = true;
241 spi_message_add_tail(&t[0], &m);
243 /* Busy and non busy words read */
244 t[1].rx_buf = busy_buf;
245 t[1].len = WL1271_BUSY_WORD_LEN;
246 t[1].cs_change = true;
247 spi_message_add_tail(&t[1], &m);
249 spi_sync(wl_to_spi(wl), &m);
251 if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
252 wl1271_spi_read_busy(wl)) {
253 memset(buf, 0, chunk_len);
257 spi_message_init(&m);
258 memset(t, 0, sizeof(t));
261 t[0].len = chunk_len;
262 t[0].cs_change = true;
263 spi_message_add_tail(&t[0], &m);
265 spi_sync(wl_to_spi(wl), &m);
267 wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
268 wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, chunk_len);
277 static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
278 size_t len, bool fixed)
280 /* SPI write buffers - 2 for each chunk */
281 struct spi_transfer t[2 * WSPI_MAX_NUM_OF_CHUNKS];
282 struct spi_message m;
283 u32 commands[WSPI_MAX_NUM_OF_CHUNKS]; /* 1 command per chunk */
288 WARN_ON(len > WL1271_AGGR_BUFFER_SIZE);
290 spi_message_init(&m);
291 memset(t, 0, sizeof(t));
296 chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
299 *cmd |= WSPI_CMD_WRITE;
300 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
301 WSPI_CMD_BYTE_LENGTH;
302 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
305 *cmd |= WSPI_CMD_FIXED;
308 t[i].len = sizeof(*cmd);
309 spi_message_add_tail(&t[i++], &m);
312 t[i].len = chunk_len;
313 spi_message_add_tail(&t[i++], &m);
315 wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
316 wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, chunk_len);
325 spi_sync(wl_to_spi(wl), &m);
328 static irqreturn_t wl1271_hardirq(int irq, void *cookie)
330 struct wl1271 *wl = cookie;
333 wl1271_debug(DEBUG_IRQ, "IRQ");
335 /* complete the ELP completion */
336 spin_lock_irqsave(&wl->wl_lock, flags);
337 set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags);
339 complete(wl->elp_compl);
340 wl->elp_compl = NULL;
342 spin_unlock_irqrestore(&wl->wl_lock, flags);
344 return IRQ_WAKE_THREAD;
347 static int wl1271_spi_set_power(struct wl1271 *wl, bool enable)
350 wl->set_power(enable);
355 static struct wl1271_if_operations spi_ops = {
356 .read = wl1271_spi_raw_read,
357 .write = wl1271_spi_raw_write,
358 .reset = wl1271_spi_reset,
359 .init = wl1271_spi_init,
360 .power = wl1271_spi_set_power,
361 .dev = wl1271_spi_wl_to_dev,
362 .enable_irq = wl1271_spi_enable_interrupts,
363 .disable_irq = wl1271_spi_disable_interrupts,
364 .set_block_size = NULL,
367 static int __devinit wl1271_probe(struct spi_device *spi)
369 struct wl12xx_platform_data *pdata;
370 struct ieee80211_hw *hw;
372 unsigned long irqflags;
375 pdata = spi->dev.platform_data;
377 wl1271_error("no platform data");
381 hw = wl1271_alloc_hw();
387 dev_set_drvdata(&spi->dev, wl);
390 wl->if_ops = &spi_ops;
392 /* This is the only SPI value that we need to set here, the rest
393 * comes from the board-peripherals file */
394 spi->bits_per_word = 32;
396 ret = spi_setup(spi);
398 wl1271_error("spi_setup failed");
402 wl->set_power = pdata->set_power;
403 if (!wl->set_power) {
404 wl1271_error("set power function missing in platform data");
409 wl->ref_clock = pdata->board_ref_clock;
410 wl->tcxo_clock = pdata->board_tcxo_clock;
411 wl->platform_quirks = pdata->platform_quirks;
413 if (wl->platform_quirks & WL12XX_PLATFORM_QUIRK_EDGE_IRQ)
414 irqflags = IRQF_TRIGGER_RISING;
416 irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
420 wl1271_error("irq missing in platform data");
425 ret = request_threaded_irq(wl->irq, wl1271_hardirq, wl1271_irq,
429 wl1271_error("request_irq() failed: %d", ret);
433 disable_irq(wl->irq);
435 ret = wl1271_init_ieee80211(wl);
439 ret = wl1271_register_hw(wl);
446 free_irq(wl->irq, wl);
454 static int __devexit wl1271_remove(struct spi_device *spi)
456 struct wl1271 *wl = dev_get_drvdata(&spi->dev);
458 wl1271_unregister_hw(wl);
459 free_irq(wl->irq, wl);
466 static struct spi_driver wl1271_spi_driver = {
468 .name = "wl1271_spi",
469 .bus = &spi_bus_type,
470 .owner = THIS_MODULE,
473 .probe = wl1271_probe,
474 .remove = __devexit_p(wl1271_remove),
477 static int __init wl1271_init(void)
479 return spi_register_driver(&wl1271_spi_driver);
482 static void __exit wl1271_exit(void)
484 spi_unregister_driver(&wl1271_spi_driver);
487 module_init(wl1271_init);
488 module_exit(wl1271_exit);
490 MODULE_LICENSE("GPL");
491 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
492 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
493 MODULE_FIRMWARE(WL127X_FW_NAME);
494 MODULE_FIRMWARE(WL128X_FW_NAME);
495 MODULE_ALIAS("spi:wl1271");