drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "core.h"
  31 #include "wifi.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36
  37 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  38         INTEL_VENDOR_ID,
  39         ATI_VENDOR_ID,
  40         AMD_VENDOR_ID,
  41         SIS_VENDOR_ID
  42 };
  43
  44 static const u8 ac_to_hwq[] = {
  45         VO_QUEUE,
  46         VI_QUEUE,
  47         BE_QUEUE,
  48         BK_QUEUE
  49 };
  50
  51 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  52                        struct sk_buff *skb)
  53 {
  54         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  55         __le16 fc = rtl_get_fc(skb);
  56         u8 queue_index = skb_get_queue_mapping(skb);
  57
  58         if (unlikely(ieee80211_is_beacon(fc)))
  59                 return BEACON_QUEUE;
  60         if (ieee80211_is_mgmt(fc))
  61                 return MGNT_QUEUE;
  62         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  63                 if (ieee80211_is_nullfunc(fc))
  64                         return HIGH_QUEUE;
  65
  66         return ac_to_hwq[queue_index];
  67 }
  68
  69 /* Update PCI dependent default settings*/
  70 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  71 {
  72         struct rtl_priv *rtlpriv = rtl_priv(hw);
  73         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  74         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  75         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  76         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  77         u8 init_aspm;
  78
  79         ppsc->reg_rfps_level = 0;
  80         ppsc->support_aspm = 0;
  81
  82         /*Update PCI ASPM setting */
  83         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  84         switch (rtlpci->const_pci_aspm) {
  85         case 0:
  86                 /*No ASPM */
  87                 break;
  88
  89         case 1:
  90                 /*ASPM dynamically enabled/disable. */
  91                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  92                 break;
  93
  94         case 2:
  95                 /*ASPM with Clock Req dynamically enabled/disable. */
  96                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  97                                          RT_RF_OFF_LEVL_CLK_REQ);
  98                 break;
  99
 100         case 3:
 101                 /*
 102                  * Always enable ASPM and Clock Req
 103                  * from initialization to halt.
 104                  * */
 105                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 106                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 4:
 111                 /*
 112                  * Always enable ASPM without Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 116                                           RT_RF_OFF_LEVL_CLK_REQ);
 117                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 118                 break;
 119         }
 120
 121         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122
 123         /*Update Radio OFF setting */
 124         switch (rtlpci->const_hwsw_rfoff_d3) {
 125         case 1:
 126                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 127                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 128                 break;
 129
 130         case 2:
 131                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 132                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 133                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 134                 break;
 135
 136         case 3:
 137                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 138                 break;
 139         }
 140
 141         /*Set HW definition to determine if it supports ASPM. */
 142         switch (rtlpci->const_support_pciaspm) {
 143         case 0:{
 144                         /*Not support ASPM. */
 145                         bool support_aspm = false;
 146                         ppsc->support_aspm = support_aspm;
 147                         break;
 148                 }
 149         case 1:{
 150                         /*Support ASPM. */
 151                         bool support_aspm = true;
 152                         bool support_backdoor = true;
 153                         ppsc->support_aspm = support_aspm;
 154
 155                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 156                            !priv->ndis_adapter.amd_l1_patch)
 157                            support_backdoor = false; */
 158
 159                         ppsc->support_backdoor = support_backdoor;
 160
 161                         break;
 162                 }
 163         case 2:
 164                 /*ASPM value set by chipset. */
 165                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 166                         bool support_aspm = true;
 167                         ppsc->support_aspm = support_aspm;
 168                 }
 169                 break;
 170         default:
 171                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 172                          ("switch case not process\n"));
 173                 break;
 174         }
 175
 176         /* toshiba aspm issue, toshiba will set aspm selfly
 177          * so we should not set aspm in driver */
 178         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 179         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 180                 init_aspm == 0x43)
 181                 ppsc->support_aspm = false;
 182 }
 183
 184 static bool _rtl_pci_platform_switch_device_pci_aspm(
 185                         struct ieee80211_hw *hw,
 186                         u8 value)
 187 {
 188         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 189         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 190
 191         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 192                 value |= 0x40;
 193
 194         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 195
 196         return false;
 197 }
 198
 199 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 200 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 201 {
 202         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 203         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 204
 205         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 206
 207         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 208                 udelay(100);
 209
 210         return true;
 211 }
 212
 213 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 214 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 215 {
 216         struct rtl_priv *rtlpriv = rtl_priv(hw);
 217         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 218         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 219         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 220         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 221         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 223         /*Retrieve original configuration settings. */
 224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 226                                 pcibridge_linkctrlreg;
 227         u16 aspmlevel = 0;
 228         u8 tmp_u1b = 0;
 229
 230         if (!ppsc->support_aspm)
 231                 return;
 232
 233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 235                          ("PCI(Bridge) UNKNOWN.\n"));
 236
 237                 return;
 238         }
 239
 240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 242                 _rtl_pci_switch_clk_req(hw, 0x0);
 243         }
 244
 245         /*for promising device will in L0 state after an I/O. */
 246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 247
 248         /*Set corresponding value. */
 249         aspmlevel |= BIT(0) | BIT(1);
 250         linkctrl_reg &= ~aspmlevel;
 251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 252
 253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 254         udelay(50);
 255
 256         /*4 Disable Pci Bridge ASPM */
 257         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 258                                      pcicfg_addrport + (num4bytes << 2));
 259         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
 260
 261         udelay(50);
 262 }
 263
 264 /*
 265  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 266  *power saving We should follow the sequence to enable
 267  *RTL8192SE first then enable Pci Bridge ASPM
 268  *or the system will show bluescreen.
 269  */
 270 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 271 {
 272         struct rtl_priv *rtlpriv = rtl_priv(hw);
 273         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 274         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 275         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 276         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 277         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 278         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 279         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 280         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 281         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 282         u16 aspmlevel;
 283         u8 u_pcibridge_aspmsetting;
 284         u8 u_device_aspmsetting;
 285
 286         if (!ppsc->support_aspm)
 287                 return;
 288
 289         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 290                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 291                          ("PCI(Bridge) UNKNOWN.\n"));
 292                 return;
 293         }
 294
 295         /*4 Enable Pci Bridge ASPM */
 296         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 297                                      pcicfg_addrport + (num4bytes << 2));
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
 307
 308         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 309                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 310                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 311                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 312                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 313                   u_pcibridge_aspmsetting));
 314
 315         udelay(50);
 316
 317         /*Get ASPM level (with/without Clock Req) */
 318         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 319         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 320
 321         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 322         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 323
 324         u_device_aspmsetting |= aspmlevel;
 325
 326         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 327
 328         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 329                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 330                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 331                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 332         }
 333         udelay(100);
 334 }
 335
 336 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 337 {
 338         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 339         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 340
 341         bool status = false;
 342         u8 offset_e0;
 343         unsigned offset_e4;
 344
 345         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 346                         pcicfg_addrport + 0xE0);
 347         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, 0xA0);
 348
 349         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 350                         pcicfg_addrport + 0xE0);
 351         rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &offset_e0);
 352
 353         if (offset_e0 == 0xA0) {
 354                 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 355                                              pcicfg_addrport + 0xE4);
 356                 rtl_pci_raw_read_port_ulong(PCI_CONF_DATA, &offset_e4);
 357                 if (offset_e4 & BIT(23))
 358                         status = true;
 359         }
 360
 361         return status;
 362 }
 363
 364 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 365 {
 366         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 367         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 368         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 369         u8 linkctrl_reg;
 370         u8 num4bbytes;
 371
 372         num4bbytes = (capabilityoffset + 0x10) / 4;
 373
 374         /*Read  Link Control Register */
 375         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 376                                      pcicfg_addrport + (num4bbytes << 2));
 377         rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg);
 378
 379         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 380 }
 381
 382 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 383                 struct ieee80211_hw *hw)
 384 {
 385         struct rtl_priv *rtlpriv = rtl_priv(hw);
 386         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 387
 388         u8 tmp;
 389         int pos;
 390         u8 linkctrl_reg;
 391
 392         /*Link Control Register */
 393         pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
 394         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 395         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 396
 397         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 398                  ("Link Control Register =%x\n",
 399                   pcipriv->ndis_adapter.linkctrl_reg));
 400
 401         pci_read_config_byte(pdev, 0x98, &tmp);
 402         tmp |= BIT(4);
 403         pci_write_config_byte(pdev, 0x98, tmp);
 404
 405         tmp = 0x17;
 406         pci_write_config_byte(pdev, 0x70f, tmp);
 407 }
 408
 409 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 410 {
 411         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 412
 413         _rtl_pci_update_default_setting(hw);
 414
 415         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 416                 /*Always enable ASPM & Clock Req. */
 417                 rtl_pci_enable_aspm(hw);
 418                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 419         }
 420
 421 }
 422
 423 static void _rtl_pci_io_handler_init(struct device *dev,
 424                                      struct ieee80211_hw *hw)
 425 {
 426         struct rtl_priv *rtlpriv = rtl_priv(hw);
 427
 428         rtlpriv->io.dev = dev;
 429
 430         rtlpriv->io.write8_async = pci_write8_async;
 431         rtlpriv->io.write16_async = pci_write16_async;
 432         rtlpriv->io.write32_async = pci_write32_async;
 433
 434         rtlpriv->io.read8_sync = pci_read8_sync;
 435         rtlpriv->io.read16_sync = pci_read16_sync;
 436         rtlpriv->io.read32_sync = pci_read32_sync;
 437
 438 }
 439
 440 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 441 {
 442 }
 443
 444 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 445                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 446 {
 447         struct rtl_priv *rtlpriv = rtl_priv(hw);
 448         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 449         u8 additionlen = FCS_LEN;
 450         struct sk_buff *next_skb;
 451
 452         /* here open is 4, wep/tkip is 8, aes is 12*/
 453         if (info->control.hw_key)
 454                 additionlen += info->control.hw_key->icv_len;
 455
 456         /* The most skb num is 6 */
 457         tcb_desc->empkt_num = 0;
 458         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 459         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 460                 struct ieee80211_tx_info *next_info;
 461
 462                 next_info = IEEE80211_SKB_CB(next_skb);
 463                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 464                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 465                                 next_skb->len + additionlen;
 466                         tcb_desc->empkt_num++;
 467                 } else {
 468                         break;
 469                 }
 470
 471                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 472                                       next_skb))
 473                         break;
 474
 475                 if (tcb_desc->empkt_num >= 5)
 476                         break;
 477         }
 478         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 479
 480         return true;
 481 }
 482
 483 /* just for early mode now */
 484 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 485 {
 486         struct rtl_priv *rtlpriv = rtl_priv(hw);
 487         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 488         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 489         struct sk_buff *skb = NULL;
 490         struct ieee80211_tx_info *info = NULL;
 491         int tid; /* should be int */
 492
 493         if (!rtlpriv->rtlhal.earlymode_enable)
 494                 return;
 495
 496         /* we juse use em for BE/BK/VI/VO */
 497         for (tid = 7; tid >= 0; tid--) {
 498                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 499                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 500                 while (!mac->act_scanning &&
 501                        rtlpriv->psc.rfpwr_state == ERFON) {
 502                         struct rtl_tcb_desc tcb_desc;
 503                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 504
 505                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 506                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 507                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 508                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 509                         } else {
 510                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 511                                 break;
 512                         }
 513                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 514
 515                         /* Some macaddr can't do early mode. like
 516                          * multicast/broadcast/no_qos data */
 517                         info = IEEE80211_SKB_CB(skb);
 518                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 519                                 _rtl_update_earlymode_info(hw, skb,
 520                                                            &tcb_desc, tid);
 521
 522                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 523                 }
 524         }
 525 }
 526
 527
 528 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 529 {
 530         struct rtl_priv *rtlpriv = rtl_priv(hw);
 531         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 532
 533         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 534
 535         while (skb_queue_len(&ring->queue)) {
 536                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 537                 struct sk_buff *skb;
 538                 struct ieee80211_tx_info *info;
 539                 __le16 fc;
 540                 u8 tid;
 541
 542                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 543                                                           HW_DESC_OWN);
 544
 545                 /*
 546                  *beacon packet will only use the first
 547                  *descriptor defautly,and the own may not
 548                  *be cleared by the hardware
 549                  */
 550                 if (own)
 551                         return;
 552                 ring->idx = (ring->idx + 1) % ring->entries;
 553
 554                 skb = __skb_dequeue(&ring->queue);
 555                 pci_unmap_single(rtlpci->pdev,
 556                                  rtlpriv->cfg->ops->
 557                                              get_desc((u8 *) entry, true,
 558                                                       HW_DESC_TXBUFF_ADDR),
 559                                  skb->len, PCI_DMA_TODEVICE);
 560
 561                 /* remove early mode header */
 562                 if (rtlpriv->rtlhal.earlymode_enable)
 563                         skb_pull(skb, EM_HDR_LEN);
 564
 565                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 566                          ("new ring->idx:%d, "
 567                           "free: skb_queue_len:%d, free: seq:%x\n",
 568                           ring->idx,
 569                           skb_queue_len(&ring->queue),
 570                           *(u16 *) (skb->data + 22)));
 571
 572                 if (prio == TXCMD_QUEUE) {
 573                         dev_kfree_skb(skb);
 574                         goto tx_status_ok;
 575
 576                 }
 577
 578                 /* for sw LPS, just after NULL skb send out, we can
 579                  * sure AP kown we are sleeped, our we should not let
 580                  * rf to sleep*/
 581                 fc = rtl_get_fc(skb);
 582                 if (ieee80211_is_nullfunc(fc)) {
 583                         if (ieee80211_has_pm(fc)) {
 584                                 rtlpriv->mac80211.offchan_deley = true;
 585                                 rtlpriv->psc.state_inap = 1;
 586                         } else {
 587                                 rtlpriv->psc.state_inap = 0;
 588                         }
 589                 }
 590
 591                 /* update tid tx pkt num */
 592                 tid = rtl_get_tid(skb);
 593                 if (tid <= 7)
 594                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 595
 596                 info = IEEE80211_SKB_CB(skb);
 597                 ieee80211_tx_info_clear_status(info);
 598
 599                 info->flags |= IEEE80211_TX_STAT_ACK;
 600                 /*info->status.rates[0].count = 1; */
 601
 602                 ieee80211_tx_status_irqsafe(hw, skb);
 603
 604                 if ((ring->entries - skb_queue_len(&ring->queue))
 605                                 == 2) {
 606
 607                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 608                                         ("more desc left, wake"
 609                                          "skb_queue@%d,ring->idx = %d,"
 610                                          "skb_queue_len = 0x%d\n",
 611                                          prio, ring->idx,
 612                                          skb_queue_len(&ring->queue)));
 613
 614                         ieee80211_wake_queue(hw,
 615                                         skb_get_queue_mapping
 616                                         (skb));
 617                 }
 618 tx_status_ok:
 619                 skb = NULL;
 620         }
 621
 622         if (((rtlpriv->link_info.num_rx_inperiod +
 623                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 624                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 625                 rtl_lps_leave(hw);
 626         }
 627 }
 628
 629 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 630 {
 631         struct rtl_priv *rtlpriv = rtl_priv(hw);
 632         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 633         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 634
 635         struct ieee80211_rx_status rx_status = { 0 };
 636         unsigned int count = rtlpci->rxringcount;
 637         u8 own;
 638         u8 tmp_one;
 639         u32 bufferaddress;
 640         bool unicast = false;
 641
 642         struct rtl_stats stats = {
 643                 .signal = 0,
 644                 .noise = -98,
 645                 .rate = 0,
 646         };
 647
 648         /*RX NORMAL PKT */
 649         while (count--) {
 650                 /*rx descriptor */
 651                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 652                                 rtlpci->rx_ring[rx_queue_idx].idx];
 653                 /*rx pkt */
 654                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 655                                 rtlpci->rx_ring[rx_queue_idx].idx];
 656
 657                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 658                                                        false, HW_DESC_OWN);
 659
 660                 if (own) {
 661                         /*wait data to be filled by hardware */
 662                         return;
 663                 } else {
 664                         struct ieee80211_hdr *hdr;
 665                         __le16 fc;
 666                         struct sk_buff *new_skb = NULL;
 667
 668                         rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 669                                                          &rx_status,
 670                                                          (u8 *) pdesc, skb);
 671
 672                         skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 673                                                          false,
 674                                                          HW_DESC_RXPKT_LEN));
 675                         skb_reserve(skb,
 676                                     stats.rx_drvinfo_size + stats.rx_bufshift);
 677
 678                         /*
 679                          *NOTICE This can not be use for mac80211,
 680                          *this is done in mac80211 code,
 681                          *if you done here sec DHCP will fail
 682                          *skb_trim(skb, skb->len - 4);
 683                          */
 684
 685                         hdr = rtl_get_hdr(skb);
 686                         fc = rtl_get_fc(skb);
 687
 688                         /* try for new buffer - if allocation fails, drop
 689                          * frame and reuse old buffer
 690                          */
 691                         new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 692                         if (unlikely(!new_skb)) {
 693                                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 694                                          DBG_DMESG,
 695                                          ("can't alloc skb for rx\n"));
 696                                 goto done;
 697                         }
 698                         pci_unmap_single(rtlpci->pdev,
 699                                          *((dma_addr_t *) skb->cb),
 700                                          rtlpci->rxbuffersize,
 701                                          PCI_DMA_FROMDEVICE);
 702
 703                         if (!stats.crc || !stats.hwerror) {
 704                                 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 705                                        sizeof(rx_status));
 706
 707                                 if (is_broadcast_ether_addr(hdr->addr1)) {
 708                                         ;/*TODO*/
 709                                 } else if (is_multicast_ether_addr(hdr->addr1)) {
 710                                         ;/*TODO*/
 711                                 } else {
 712                                         unicast = true;
 713                                         rtlpriv->stats.rxbytesunicast +=
 714                                             skb->len;
 715                                 }
 716
 717                                 rtl_is_special_data(hw, skb, false);
 718
 719                                 if (ieee80211_is_data(fc)) {
 720                                         rtlpriv->cfg->ops->led_control(hw,
 721                                                                LED_CTL_RX);
 722
 723                                         if (unicast)
 724                                                 rtlpriv->link_info.
 725                                                     num_rx_inperiod++;
 726                                 }
 727
 728                                 /* for sw lps */
 729                                 rtl_swlps_beacon(hw, (void *)skb->data,
 730                                                  skb->len);
 731                                 rtl_recognize_peer(hw, (void *)skb->data,
 732                                                    skb->len);
 733                                 if ((rtlpriv->mac80211.opmode ==
 734                                      NL80211_IFTYPE_AP) &&
 735                                     (rtlpriv->rtlhal.current_bandtype ==
 736                                      BAND_ON_2_4G) &&
 737                                      (ieee80211_is_beacon(fc) ||
 738                                      ieee80211_is_probe_resp(fc))) {
 739                                         dev_kfree_skb_any(skb);
 740                                 } else {
 741                                         if (unlikely(!rtl_action_proc(hw, skb,
 742                                             false))) {
 743                                                 dev_kfree_skb_any(skb);
 744                                         } else {
 745                                                 struct sk_buff *uskb = NULL;
 746                                                 u8 *pdata;
 747                                                 uskb = dev_alloc_skb(skb->len
 748                                                                      + 128);
 749                                                 memcpy(IEEE80211_SKB_RXCB(uskb),
 750                                                        &rx_status,
 751                                                        sizeof(rx_status));
 752                                                 pdata = (u8 *)skb_put(uskb,
 753                                                         skb->len);
 754                                                 memcpy(pdata, skb->data,
 755                                                        skb->len);
 756                                                 dev_kfree_skb_any(skb);
 757
 758                                                 ieee80211_rx_irqsafe(hw, uskb);
 759                                         }
 760                                 }
 761                         } else {
 762                                 dev_kfree_skb_any(skb);
 763                         }
 764
 765                         if (((rtlpriv->link_info.num_rx_inperiod +
 766                                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 767                                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 768                                 rtl_lps_leave(hw);
 769                         }
 770
 771                         skb = new_skb;
 772
 773                         rtlpci->rx_ring[rx_queue_idx].rx_buf[rtlpci->
 774                                                              rx_ring
 775                                                              [rx_queue_idx].
 776                                                              idx] = skb;
 777                         *((dma_addr_t *) skb->cb) =
 778                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 779                                            rtlpci->rxbuffersize,
 780                                            PCI_DMA_FROMDEVICE);
 781
 782                 }
 783 done:
 784                 bufferaddress = (*((dma_addr_t *)skb->cb));
 785                 tmp_one = 1;
 786                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 787                                             HW_DESC_RXBUFF_ADDR,
 788                                             (u8 *)&bufferaddress);
 789                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 790                                             (u8 *)&tmp_one);
 791                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 792                                             HW_DESC_RXPKT_LEN,
 793                                             (u8 *)&rtlpci->rxbuffersize);
 794
 795                 if (rtlpci->rx_ring[rx_queue_idx].idx ==
 796                     rtlpci->rxringcount - 1)
 797                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 798                                                     HW_DESC_RXERO,
 799                                                     (u8 *)&tmp_one);
 800
 801                 rtlpci->rx_ring[rx_queue_idx].idx =
 802                     (rtlpci->rx_ring[rx_queue_idx].idx + 1) %
 803                     rtlpci->rxringcount;
 804         }
 805
 806 }
 807
 808 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 809 {
 810         struct ieee80211_hw *hw = dev_id;
 811         struct rtl_priv *rtlpriv = rtl_priv(hw);
 812         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 813         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 814         unsigned long flags;
 815         u32 inta = 0;
 816         u32 intb = 0;
 817
 818         if (rtlpci->irq_enabled == 0)
 819                 return IRQ_HANDLED;
 820
 821         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 822
 823         /*read ISR: 4/8bytes */
 824         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 825
 826         /*Shared IRQ or HW disappared */
 827         if (!inta || inta == 0xffff)
 828                 goto done;
 829
 830         /*<1> beacon related */
 831         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 832                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 833                          ("beacon ok interrupt!\n"));
 834         }
 835
 836         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 837                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 838                          ("beacon err interrupt!\n"));
 839         }
 840
 841         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 842                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 843                          ("beacon interrupt!\n"));
 844         }
 845
 846         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 847                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 848                          ("prepare beacon for interrupt!\n"));
 849                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 850         }
 851
 852         /*<3> Tx related */
 853         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 854                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 855
 856         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 857                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 858                          ("Manage ok interrupt!\n"));
 859                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 860         }
 861
 862         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 863                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 864                          ("HIGH_QUEUE ok interrupt!\n"));
 865                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 866         }
 867
 868         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 869                 rtlpriv->link_info.num_tx_inperiod++;
 870
 871                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 872                          ("BK Tx OK interrupt!\n"));
 873                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 874         }
 875
 876         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 877                 rtlpriv->link_info.num_tx_inperiod++;
 878
 879                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 880                          ("BE TX OK interrupt!\n"));
 881                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 882         }
 883
 884         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 885                 rtlpriv->link_info.num_tx_inperiod++;
 886
 887                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 888                          ("VI TX OK interrupt!\n"));
 889                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 890         }
 891
 892         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 893                 rtlpriv->link_info.num_tx_inperiod++;
 894
 895                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 896                          ("Vo TX OK interrupt!\n"));
 897                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 898         }
 899
 900         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 901                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 902                         rtlpriv->link_info.num_tx_inperiod++;
 903
 904                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 905                                         ("CMD TX OK interrupt!\n"));
 906                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 907                 }
 908         }
 909
 910         /*<2> Rx related */
 911         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 912                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 913                 _rtl_pci_rx_interrupt(hw);
 914         }
 915
 916         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 917                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 918                          ("rx descriptor unavailable!\n"));
 919                 _rtl_pci_rx_interrupt(hw);
 920         }
 921
 922         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 923                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 924                 _rtl_pci_rx_interrupt(hw);
 925         }
 926
 927         if (rtlpriv->rtlhal.earlymode_enable)
 928                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 929
 930         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 931         return IRQ_HANDLED;
 932
 933 done:
 934         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 935         return IRQ_HANDLED;
 936 }
 937
 938 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 939 {
 940         _rtl_pci_tx_chk_waitq(hw);
 941 }
 942
 943 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 944 {
 945         struct rtl_priv *rtlpriv = rtl_priv(hw);
 946         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 947         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 948         struct rtl8192_tx_ring *ring = NULL;
 949         struct ieee80211_hdr *hdr = NULL;
 950         struct ieee80211_tx_info *info = NULL;
 951         struct sk_buff *pskb = NULL;
 952         struct rtl_tx_desc *pdesc = NULL;
 953         struct rtl_tcb_desc tcb_desc;
 954         u8 temp_one = 1;
 955
 956         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 957         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 958         pskb = __skb_dequeue(&ring->queue);
 959         if (pskb)
 960                 kfree_skb(pskb);
 961
 962         /*NB: the beacon data buffer must be 32-bit aligned. */
 963         pskb = ieee80211_beacon_get(hw, mac->vif);
 964         if (pskb == NULL)
 965                 return;
 966         hdr = rtl_get_hdr(pskb);
 967         info = IEEE80211_SKB_CB(pskb);
 968         pdesc = &ring->desc[0];
 969         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 970                 info, pskb, BEACON_QUEUE, &tcb_desc);
 971
 972         __skb_queue_tail(&ring->queue, pskb);
 973
 974         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 975                                     (u8 *)&temp_one);
 976
 977         return;
 978 }
 979
 980 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 981 {
 982         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 983         u8 i;
 984
 985         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 986                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 987
 988         /*
 989          *we just alloc 2 desc for beacon queue,
 990          *because we just need first desc in hw beacon.
 991          */
 992         rtlpci->txringcount[BEACON_QUEUE] = 2;
 993
 994         /*
 995          *BE queue need more descriptor for performance
 996          *consideration or, No more tx desc will happen,
 997          *and may cause mac80211 mem leakage.
 998          */
 999         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1000
1001         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1002         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1003 }
1004
1005 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1006                 struct pci_dev *pdev)
1007 {
1008         struct rtl_priv *rtlpriv = rtl_priv(hw);
1009         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1010         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1011         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1012
1013         rtlpci->up_first_time = true;
1014         rtlpci->being_init_adapter = false;
1015
1016         rtlhal->hw = hw;
1017         rtlpci->pdev = pdev;
1018
1019         /*Tx/Rx related var */
1020         _rtl_pci_init_trx_var(hw);
1021
1022         /*IBSS*/ mac->beacon_interval = 100;
1023
1024         /*AMPDU*/
1025         mac->min_space_cfg = 0;
1026         mac->max_mss_density = 0;
1027         /*set sane AMPDU defaults */
1028         mac->current_ampdu_density = 7;
1029         mac->current_ampdu_factor = 3;
1030
1031         /*QOS*/
1032         rtlpci->acm_method = eAcmWay2_SW;
1033
1034         /*task */
1035         tasklet_init(&rtlpriv->works.irq_tasklet,
1036                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1037                      (unsigned long)hw);
1038         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1039                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1040                      (unsigned long)hw);
1041 }
1042
1043 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1044                                  unsigned int prio, unsigned int entries)
1045 {
1046         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1047         struct rtl_priv *rtlpriv = rtl_priv(hw);
1048         struct rtl_tx_desc *ring;
1049         dma_addr_t dma;
1050         u32 nextdescaddress;
1051         int i;
1052
1053         ring = pci_alloc_consistent(rtlpci->pdev,
1054                                     sizeof(*ring) * entries, &dma);
1055
1056         if (!ring || (unsigned long)ring & 0xFF) {
1057                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1058                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1059                 return -ENOMEM;
1060         }
1061
1062         memset(ring, 0, sizeof(*ring) * entries);
1063         rtlpci->tx_ring[prio].desc = ring;
1064         rtlpci->tx_ring[prio].dma = dma;
1065         rtlpci->tx_ring[prio].idx = 0;
1066         rtlpci->tx_ring[prio].entries = entries;
1067         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1068
1069         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1070                  ("queue:%d, ring_addr:%p\n", prio, ring));
1071
1072         for (i = 0; i < entries; i++) {
1073                 nextdescaddress = (u32) dma +
1074                                               ((i + 1) % entries) *
1075                                               sizeof(*ring);
1076
1077                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1078                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1079                                             (u8 *)&nextdescaddress);
1080         }
1081
1082         return 0;
1083 }
1084
1085 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1086 {
1087         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1088         struct rtl_priv *rtlpriv = rtl_priv(hw);
1089         struct rtl_rx_desc *entry = NULL;
1090         int i, rx_queue_idx;
1091         u8 tmp_one = 1;
1092
1093         /*
1094          *rx_queue_idx 0:RX_MPDU_QUEUE
1095          *rx_queue_idx 1:RX_CMD_QUEUE
1096          */
1097         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1098              rx_queue_idx++) {
1099                 rtlpci->rx_ring[rx_queue_idx].desc =
1100                     pci_alloc_consistent(rtlpci->pdev,
1101                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1102                                                 desc) * rtlpci->rxringcount,
1103                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1104
1105                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1106                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1107                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1108                                  ("Cannot allocate RX ring\n"));
1109                         return -ENOMEM;
1110                 }
1111
1112                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1113                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1114                        rtlpci->rxringcount);
1115
1116                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1117
1118                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1119                  * change will reduce memory fragmentation.
1120                  */
1121                 if (rtlpci->rxbuffersize > 4096 &&
1122                     rtlpriv->rtlhal.disable_amsdu_8k)
1123                         rtlpci->rxbuffersize = 4096;
1124
1125                 for (i = 0; i < rtlpci->rxringcount; i++) {
1126                         struct sk_buff *skb =
1127                             dev_alloc_skb(rtlpci->rxbuffersize);
1128                         u32 bufferaddress;
1129                         if (!skb)
1130                                 return 0;
1131                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1132
1133                         /*skb->dev = dev; */
1134
1135                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1136
1137                         /*
1138                          *just set skb->cb to mapping addr
1139                          *for pci_unmap_single use
1140                          */
1141                         *((dma_addr_t *) skb->cb) =
1142                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1143                                            rtlpci->rxbuffersize,
1144                                            PCI_DMA_FROMDEVICE);
1145
1146                         bufferaddress = (*((dma_addr_t *)skb->cb));
1147                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1148                                                     HW_DESC_RXBUFF_ADDR,
1149                                                     (u8 *)&bufferaddress);
1150                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1151                                                     HW_DESC_RXPKT_LEN,
1152                                                     (u8 *)&rtlpci->
1153                                                     rxbuffersize);
1154                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1155                                                     HW_DESC_RXOWN,
1156                                                     (u8 *)&tmp_one);
1157                 }
1158
1159                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1160                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1161         }
1162         return 0;
1163 }
1164
1165 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1166                 unsigned int prio)
1167 {
1168         struct rtl_priv *rtlpriv = rtl_priv(hw);
1169         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1170         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1171
1172         while (skb_queue_len(&ring->queue)) {
1173                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1174                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1175
1176                 pci_unmap_single(rtlpci->pdev,
1177                                  rtlpriv->cfg->
1178                                              ops->get_desc((u8 *) entry, true,
1179                                                    HW_DESC_TXBUFF_ADDR),
1180                                  skb->len, PCI_DMA_TODEVICE);
1181                 kfree_skb(skb);
1182                 ring->idx = (ring->idx + 1) % ring->entries;
1183         }
1184
1185         pci_free_consistent(rtlpci->pdev,
1186                             sizeof(*ring->desc) * ring->entries,
1187                             ring->desc, ring->dma);
1188         ring->desc = NULL;
1189 }
1190
1191 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1192 {
1193         int i, rx_queue_idx;
1194
1195         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1196         /*rx_queue_idx 1:RX_CMD_QUEUE */
1197         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1198              rx_queue_idx++) {
1199                 for (i = 0; i < rtlpci->rxringcount; i++) {
1200                         struct sk_buff *skb =
1201                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1202                         if (!skb)
1203                                 continue;
1204
1205                         pci_unmap_single(rtlpci->pdev,
1206                                          *((dma_addr_t *) skb->cb),
1207                                          rtlpci->rxbuffersize,
1208                                          PCI_DMA_FROMDEVICE);
1209                         kfree_skb(skb);
1210                 }
1211
1212                 pci_free_consistent(rtlpci->pdev,
1213                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1214                                            desc) * rtlpci->rxringcount,
1215                                     rtlpci->rx_ring[rx_queue_idx].desc,
1216                                     rtlpci->rx_ring[rx_queue_idx].dma);
1217                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1218         }
1219 }
1220
1221 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1222 {
1223         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1224         int ret;
1225         int i;
1226
1227         ret = _rtl_pci_init_rx_ring(hw);
1228         if (ret)
1229                 return ret;
1230
1231         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1232                 ret = _rtl_pci_init_tx_ring(hw, i,
1233                                  rtlpci->txringcount[i]);
1234                 if (ret)
1235                         goto err_free_rings;
1236         }
1237
1238         return 0;
1239
1240 err_free_rings:
1241         _rtl_pci_free_rx_ring(rtlpci);
1242
1243         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1244                 if (rtlpci->tx_ring[i].desc)
1245                         _rtl_pci_free_tx_ring(hw, i);
1246
1247         return 1;
1248 }
1249
1250 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1251 {
1252         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1253         u32 i;
1254
1255         /*free rx rings */
1256         _rtl_pci_free_rx_ring(rtlpci);
1257
1258         /*free tx rings */
1259         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1260                 _rtl_pci_free_tx_ring(hw, i);
1261
1262         return 0;
1263 }
1264
1265 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1266 {
1267         struct rtl_priv *rtlpriv = rtl_priv(hw);
1268         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1269         int i, rx_queue_idx;
1270         unsigned long flags;
1271         u8 tmp_one = 1;
1272
1273         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1274         /*rx_queue_idx 1:RX_CMD_QUEUE */
1275         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1276              rx_queue_idx++) {
1277                 /*
1278                  *force the rx_ring[RX_MPDU_QUEUE/
1279                  *RX_CMD_QUEUE].idx to the first one
1280                  */
1281                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1282                         struct rtl_rx_desc *entry = NULL;
1283
1284                         for (i = 0; i < rtlpci->rxringcount; i++) {
1285                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1286                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1287                                                             false,
1288                                                             HW_DESC_RXOWN,
1289                                                             (u8 *)&tmp_one);
1290                         }
1291                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1292                 }
1293         }
1294
1295         /*
1296          *after reset, release previous pending packet,
1297          *and force the  tx idx to the first one
1298          */
1299         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1300         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1301                 if (rtlpci->tx_ring[i].desc) {
1302                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1303
1304                         while (skb_queue_len(&ring->queue)) {
1305                                 struct rtl_tx_desc *entry =
1306                                     &ring->desc[ring->idx];
1307                                 struct sk_buff *skb =
1308                                     __skb_dequeue(&ring->queue);
1309
1310                                 pci_unmap_single(rtlpci->pdev,
1311                                                  rtlpriv->cfg->ops->
1312                                                          get_desc((u8 *)
1313                                                          entry,
1314                                                          true,
1315                                                          HW_DESC_TXBUFF_ADDR),
1316                                                  skb->len, PCI_DMA_TODEVICE);
1317                                 kfree_skb(skb);
1318                                 ring->idx = (ring->idx + 1) % ring->entries;
1319                         }
1320                         ring->idx = 0;
1321                 }
1322         }
1323
1324         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1325
1326         return 0;
1327 }
1328
1329 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1330                                         struct sk_buff *skb)
1331 {
1332         struct rtl_priv *rtlpriv = rtl_priv(hw);
1333         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1334         struct ieee80211_sta *sta = info->control.sta;
1335         struct rtl_sta_info *sta_entry = NULL;
1336         u8 tid = rtl_get_tid(skb);
1337
1338         if (!sta)
1339                 return false;
1340         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1341
1342         if (!rtlpriv->rtlhal.earlymode_enable)
1343                 return false;
1344         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1345                 return false;
1346         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1347                 return false;
1348         if (tid > 7)
1349                 return false;
1350
1351         /* maybe every tid should be checked */
1352         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1353                 return false;
1354
1355         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1356         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1357         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1358
1359         return true;
1360 }
1361
1362 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1363                 struct rtl_tcb_desc *ptcb_desc)
1364 {
1365         struct rtl_priv *rtlpriv = rtl_priv(hw);
1366         struct rtl_sta_info *sta_entry = NULL;
1367         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1368         struct ieee80211_sta *sta = info->control.sta;
1369         struct rtl8192_tx_ring *ring;
1370         struct rtl_tx_desc *pdesc;
1371         u8 idx;
1372         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1373         unsigned long flags;
1374         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1375         __le16 fc = rtl_get_fc(skb);
1376         u8 *pda_addr = hdr->addr1;
1377         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1378         /*ssn */
1379         u8 tid = 0;
1380         u16 seq_number = 0;
1381         u8 own;
1382         u8 temp_one = 1;
1383
1384         if (ieee80211_is_auth(fc)) {
1385                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1386                 rtl_ips_nic_on(hw);
1387         }
1388
1389         if (rtlpriv->psc.sw_ps_enabled) {
1390                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1391                         !ieee80211_has_pm(fc))
1392                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1393         }
1394
1395         rtl_action_proc(hw, skb, true);
1396
1397         if (is_multicast_ether_addr(pda_addr))
1398                 rtlpriv->stats.txbytesmulticast += skb->len;
1399         else if (is_broadcast_ether_addr(pda_addr))
1400                 rtlpriv->stats.txbytesbroadcast += skb->len;
1401         else
1402                 rtlpriv->stats.txbytesunicast += skb->len;
1403
1404         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1405         ring = &rtlpci->tx_ring[hw_queue];
1406         if (hw_queue != BEACON_QUEUE)
1407                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1408                                 ring->entries;
1409         else
1410                 idx = 0;
1411
1412         pdesc = &ring->desc[idx];
1413         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1414                         true, HW_DESC_OWN);
1415
1416         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1417                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1418                          ("No more TX desc@%d, ring->idx = %d,"
1419                           "idx = %d, skb_queue_len = 0x%d\n",
1420                           hw_queue, ring->idx, idx,
1421                           skb_queue_len(&ring->queue)));
1422
1423                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1424                 return skb->len;
1425         }
1426
1427         if (ieee80211_is_data_qos(fc)) {
1428                 tid = rtl_get_tid(skb);
1429                 if (sta) {
1430                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1431                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1432                                       IEEE80211_SCTL_SEQ) >> 4;
1433                         seq_number += 1;
1434
1435                         if (!ieee80211_has_morefrags(hdr->frame_control))
1436                                 sta_entry->tids[tid].seq_number = seq_number;
1437                 }
1438         }
1439
1440         if (ieee80211_is_data(fc))
1441                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1442
1443         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1444                         info, skb, hw_queue, ptcb_desc);
1445
1446         __skb_queue_tail(&ring->queue, skb);
1447
1448         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1449                                     HW_DESC_OWN, (u8 *)&temp_one);
1450
1451
1452         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1453             hw_queue != BEACON_QUEUE) {
1454
1455                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1456                          ("less desc left, stop skb_queue@%d, "
1457                           "ring->idx = %d,"
1458                           "idx = %d, skb_queue_len = 0x%d\n",
1459                           hw_queue, ring->idx, idx,
1460                           skb_queue_len(&ring->queue)));
1461
1462                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1463         }
1464
1465         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1466
1467         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1468
1469         return 0;
1470 }
1471
1472 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1473 {
1474         struct rtl_priv *rtlpriv = rtl_priv(hw);
1475         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1476         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1477         u16 i = 0;
1478         int queue_id;
1479         struct rtl8192_tx_ring *ring;
1480
1481         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1482                 u32 queue_len;
1483                 ring = &pcipriv->dev.tx_ring[queue_id];
1484                 queue_len = skb_queue_len(&ring->queue);
1485                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1486                         queue_id == TXCMD_QUEUE) {
1487                         queue_id--;
1488                         continue;
1489                 } else {
1490                         msleep(20);
1491                         i++;
1492                 }
1493
1494                 /* we just wait 1s for all queues */
1495                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1496                         is_hal_stop(rtlhal) || i >= 200)
1497                         return;
1498         }
1499 }
1500
1501 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1502 {
1503         struct rtl_priv *rtlpriv = rtl_priv(hw);
1504         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1505
1506         _rtl_pci_deinit_trx_ring(hw);
1507
1508         synchronize_irq(rtlpci->pdev->irq);
1509         tasklet_kill(&rtlpriv->works.irq_tasklet);
1510
1511         flush_workqueue(rtlpriv->works.rtl_wq);
1512         destroy_workqueue(rtlpriv->works.rtl_wq);
1513
1514 }
1515
1516 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1517 {
1518         struct rtl_priv *rtlpriv = rtl_priv(hw);
1519         int err;
1520
1521         _rtl_pci_init_struct(hw, pdev);
1522
1523         err = _rtl_pci_init_trx_ring(hw);
1524         if (err) {
1525                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1526                          ("tx ring initialization failed"));
1527                 return err;
1528         }
1529
1530         return 1;
1531 }
1532
1533 static int rtl_pci_start(struct ieee80211_hw *hw)
1534 {
1535         struct rtl_priv *rtlpriv = rtl_priv(hw);
1536         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1537         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1538         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1539
1540         int err;
1541
1542         rtl_pci_reset_trx_ring(hw);
1543
1544         rtlpci->driver_is_goingto_unload = false;
1545         err = rtlpriv->cfg->ops->hw_init(hw);
1546         if (err) {
1547                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1548                          ("Failed to config hardware!\n"));
1549                 return err;
1550         }
1551
1552         rtlpriv->cfg->ops->enable_interrupt(hw);
1553         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1554
1555         rtl_init_rx_config(hw);
1556
1557         /*should after adapter start and interrupt enable. */
1558         set_hal_start(rtlhal);
1559
1560         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1561
1562         rtlpci->up_first_time = false;
1563
1564         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1565         return 0;
1566 }
1567
1568 static void rtl_pci_stop(struct ieee80211_hw *hw)
1569 {
1570         struct rtl_priv *rtlpriv = rtl_priv(hw);
1571         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1572         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1573         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1574         unsigned long flags;
1575         u8 RFInProgressTimeOut = 0;
1576
1577         /*
1578          *should before disable interrrupt&adapter
1579          *and will do it immediately.
1580          */
1581         set_hal_stop(rtlhal);
1582
1583         rtlpriv->cfg->ops->disable_interrupt(hw);
1584
1585         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1586         while (ppsc->rfchange_inprogress) {
1587                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1588                 if (RFInProgressTimeOut > 100) {
1589                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1590                         break;
1591                 }
1592                 mdelay(1);
1593                 RFInProgressTimeOut++;
1594                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1595         }
1596         ppsc->rfchange_inprogress = true;
1597         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1598
1599         rtlpci->driver_is_goingto_unload = true;
1600         rtlpriv->cfg->ops->hw_disable(hw);
1601         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1602
1603         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1604         ppsc->rfchange_inprogress = false;
1605         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1606
1607         rtl_pci_enable_aspm(hw);
1608 }
1609
1610 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1611                 struct ieee80211_hw *hw)
1612 {
1613         struct rtl_priv *rtlpriv = rtl_priv(hw);
1614         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1615         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1616         struct pci_dev *bridge_pdev = pdev->bus->self;
1617         u16 venderid;
1618         u16 deviceid;
1619         u8 revisionid;
1620         u16 irqline;
1621         u8 tmp;
1622
1623         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1624         venderid = pdev->vendor;
1625         deviceid = pdev->device;
1626         pci_read_config_byte(pdev, 0x8, &revisionid);
1627         pci_read_config_word(pdev, 0x3C, &irqline);
1628
1629         if (deviceid == RTL_PCI_8192_DID ||
1630             deviceid == RTL_PCI_0044_DID ||
1631             deviceid == RTL_PCI_0047_DID ||
1632             deviceid == RTL_PCI_8192SE_DID ||
1633             deviceid == RTL_PCI_8174_DID ||
1634             deviceid == RTL_PCI_8173_DID ||
1635             deviceid == RTL_PCI_8172_DID ||
1636             deviceid == RTL_PCI_8171_DID) {
1637                 switch (revisionid) {
1638                 case RTL_PCI_REVISION_ID_8192PCIE:
1639                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1640                                  ("8192 PCI-E is found - "
1641                                   "vid/did=%x/%x\n", venderid, deviceid));
1642                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1643                         break;
1644                 case RTL_PCI_REVISION_ID_8192SE:
1645                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1646                                  ("8192SE is found - "
1647                                   "vid/did=%x/%x\n", venderid, deviceid));
1648                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1649                         break;
1650                 default:
1651                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1652                                  ("Err: Unknown device - "
1653                                   "vid/did=%x/%x\n", venderid, deviceid));
1654                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1655                         break;
1656
1657                 }
1658         } else if (deviceid == RTL_PCI_8192CET_DID ||
1659                    deviceid == RTL_PCI_8192CE_DID ||
1660                    deviceid == RTL_PCI_8191CE_DID ||
1661                    deviceid == RTL_PCI_8188CE_DID) {
1662                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1663                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1664                          ("8192C PCI-E is found - "
1665                           "vid/did=%x/%x\n", venderid, deviceid));
1666         } else if (deviceid == RTL_PCI_8192DE_DID ||
1667                    deviceid == RTL_PCI_8192DE_DID2) {
1668                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1669                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1670                          ("8192D PCI-E is found - "
1671                           "vid/did=%x/%x\n", venderid, deviceid));
1672         } else {
1673                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1674                          ("Err: Unknown device -"
1675                           " vid/did=%x/%x\n", venderid, deviceid));
1676
1677                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1678         }
1679
1680         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1681                 if (revisionid == 0 || revisionid == 1) {
1682                         if (revisionid == 0) {
1683                                 RT_TRACE(rtlpriv, COMP_INIT,
1684                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1685                                 rtlhal->interfaceindex = 0;
1686                         } else if (revisionid == 1) {
1687                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1688                                         ("Find 92DE MAC1.\n"));
1689                                 rtlhal->interfaceindex = 1;
1690                         }
1691                 } else {
1692                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1693                                 ("Unknown device - "
1694                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1695                                 venderid, deviceid, revisionid));
1696                         rtlhal->interfaceindex = 0;
1697                 }
1698         }
1699         /*find bus info */
1700         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1701         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1702         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1703
1704         /*find bridge info */
1705         pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1706         for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1707                 if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1708                         pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1709                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1710                                  ("Pci Bridge Vendor is found index: %d\n",
1711                                   tmp));
1712                         break;
1713                 }
1714         }
1715
1716         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1717                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1718                 pcipriv->ndis_adapter.pcibridge_busnum =
1719                     bridge_pdev->bus->number;
1720                 pcipriv->ndis_adapter.pcibridge_devnum =
1721                     PCI_SLOT(bridge_pdev->devfn);
1722                 pcipriv->ndis_adapter.pcibridge_funcnum =
1723                     PCI_FUNC(bridge_pdev->devfn);
1724                 pcipriv->ndis_adapter.pcicfg_addrport =
1725                     (pcipriv->ndis_adapter.pcibridge_busnum << 16) |
1726                     (pcipriv->ndis_adapter.pcibridge_devnum << 11) |
1727                     (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31);
1728                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1729                     pci_pcie_cap(bridge_pdev);
1730                 pcipriv->ndis_adapter.num4bytes =
1731                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1732
1733                 rtl_pci_get_linkcontrol_field(hw);
1734
1735                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1736                     PCI_BRIDGE_VENDOR_AMD) {
1737                         pcipriv->ndis_adapter.amd_l1_patch =
1738                             rtl_pci_get_amd_l1_patch(hw);
1739                 }
1740         }
1741
1742         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1743                  ("pcidev busnumber:devnumber:funcnumber:"
1744                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1745                   pcipriv->ndis_adapter.busnumber,
1746                   pcipriv->ndis_adapter.devnumber,
1747                   pcipriv->ndis_adapter.funcnumber,
1748                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1749
1750         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1751                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1752                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1753                   pcipriv->ndis_adapter.pcibridge_busnum,
1754                   pcipriv->ndis_adapter.pcibridge_devnum,
1755                   pcipriv->ndis_adapter.pcibridge_funcnum,
1756                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1757                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1758                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1759                   pcipriv->ndis_adapter.amd_l1_patch));
1760
1761         rtl_pci_parse_configuration(pdev, hw);
1762
1763         return true;
1764 }
1765
1766 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1767                             const struct pci_device_id *id)
1768 {
1769         struct ieee80211_hw *hw = NULL;
1770
1771         struct rtl_priv *rtlpriv = NULL;
1772         struct rtl_pci_priv *pcipriv = NULL;
1773         struct rtl_pci *rtlpci;
1774         unsigned long pmem_start, pmem_len, pmem_flags;
1775         int err;
1776
1777         err = pci_enable_device(pdev);
1778         if (err) {
1779                 RT_ASSERT(false,
1780                           ("%s : Cannot enable new PCI device\n",
1781                            pci_name(pdev)));
1782                 return err;
1783         }
1784
1785         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1786                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1787                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1788                                           "for consistent allocations\n"));
1789                         pci_disable_device(pdev);
1790                         return -ENOMEM;
1791                 }
1792         }
1793
1794         pci_set_master(pdev);
1795
1796         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1797                                 sizeof(struct rtl_priv), &rtl_ops);
1798         if (!hw) {
1799                 RT_ASSERT(false,
1800                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1801                 err = -ENOMEM;
1802                 goto fail1;
1803         }
1804
1805         SET_IEEE80211_DEV(hw, &pdev->dev);
1806         pci_set_drvdata(pdev, hw);
1807
1808         rtlpriv = hw->priv;
1809         pcipriv = (void *)rtlpriv->priv;
1810         pcipriv->dev.pdev = pdev;
1811
1812         /* init cfg & intf_ops */
1813         rtlpriv->rtlhal.interface = INTF_PCI;
1814         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1815         rtlpriv->intf_ops = &rtl_pci_ops;
1816
1817         /*
1818          *init dbgp flags before all
1819          *other functions, because we will
1820          *use it in other funtions like
1821          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1822          *you can not use these macro
1823          *before this
1824          */
1825         rtl_dbgp_flag_init(hw);
1826
1827         /* MEM map */
1828         err = pci_request_regions(pdev, KBUILD_MODNAME);
1829         if (err) {
1830                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1831                 return err;
1832         }
1833
1834         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1835         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1836         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1837
1838         /*shared mem start */
1839         rtlpriv->io.pci_mem_start =
1840                         (unsigned long)pci_iomap(pdev,
1841                         rtlpriv->cfg->bar_id, pmem_len);
1842         if (rtlpriv->io.pci_mem_start == 0) {
1843                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1844                 goto fail2;
1845         }
1846
1847         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1848                  ("mem mapped space: start: 0x%08lx len:%08lx "
1849                   "flags:%08lx, after map:0x%08lx\n",
1850                   pmem_start, pmem_len, pmem_flags,
1851                   rtlpriv->io.pci_mem_start));
1852
1853         /* Disable Clk Request */
1854         pci_write_config_byte(pdev, 0x81, 0);
1855         /* leave D3 mode */
1856         pci_write_config_byte(pdev, 0x44, 0);
1857         pci_write_config_byte(pdev, 0x04, 0x06);
1858         pci_write_config_byte(pdev, 0x04, 0x07);
1859
1860         /* find adapter */
1861         _rtl_pci_find_adapter(pdev, hw);
1862
1863         /* Init IO handler */
1864         _rtl_pci_io_handler_init(&pdev->dev, hw);
1865
1866         /*like read eeprom and so on */
1867         rtlpriv->cfg->ops->read_eeprom_info(hw);
1868
1869         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1870                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1871                          ("Can't init_sw_vars.\n"));
1872                 goto fail3;
1873         }
1874
1875         rtlpriv->cfg->ops->init_sw_leds(hw);
1876
1877         /*aspm */
1878         rtl_pci_init_aspm(hw);
1879
1880         /* Init mac80211 sw */
1881         err = rtl_init_core(hw);
1882         if (err) {
1883                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1884                          ("Can't allocate sw for mac80211.\n"));
1885                 goto fail3;
1886         }
1887
1888         /* Init PCI sw */
1889         err = !rtl_pci_init(hw, pdev);
1890         if (err) {
1891                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1892                          ("Failed to init PCI.\n"));
1893                 goto fail3;
1894         }
1895
1896         err = ieee80211_register_hw(hw);
1897         if (err) {
1898                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1899                          ("Can't register mac80211 hw.\n"));
1900                 goto fail3;
1901         } else {
1902                 rtlpriv->mac80211.mac80211_registered = 1;
1903         }
1904
1905         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1906         if (err) {
1907                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1908                          ("failed to create sysfs device attributes\n"));
1909                 goto fail3;
1910         }
1911
1912         /*init rfkill */
1913         rtl_init_rfkill(hw);
1914
1915         rtlpci = rtl_pcidev(pcipriv);
1916         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1917                           IRQF_SHARED, KBUILD_MODNAME, hw);
1918         if (err) {
1919                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1920                          ("%s: failed to register IRQ handler\n",
1921                           wiphy_name(hw->wiphy)));
1922                 goto fail3;
1923         } else {
1924                 rtlpci->irq_alloc = 1;
1925         }
1926
1927         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1928         return 0;
1929
1930 fail3:
1931         pci_set_drvdata(pdev, NULL);
1932         rtl_deinit_core(hw);
1933         _rtl_pci_io_handler_release(hw);
1934         ieee80211_free_hw(hw);
1935
1936         if (rtlpriv->io.pci_mem_start != 0)
1937                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1938
1939 fail2:
1940         pci_release_regions(pdev);
1941
1942 fail1:
1943
1944         pci_disable_device(pdev);
1945
1946         return -ENODEV;
1947
1948 }
1949 EXPORT_SYMBOL(rtl_pci_probe);
1950
1951 void rtl_pci_disconnect(struct pci_dev *pdev)
1952 {
1953         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1954         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1955         struct rtl_priv *rtlpriv = rtl_priv(hw);
1956         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1957         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1958
1959         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1960
1961         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1962
1963         /*ieee80211_unregister_hw will call ops_stop */
1964         if (rtlmac->mac80211_registered == 1) {
1965                 ieee80211_unregister_hw(hw);
1966                 rtlmac->mac80211_registered = 0;
1967         } else {
1968                 rtl_deinit_deferred_work(hw);
1969                 rtlpriv->intf_ops->adapter_stop(hw);
1970         }
1971
1972         /*deinit rfkill */
1973         rtl_deinit_rfkill(hw);
1974
1975         rtl_pci_deinit(hw);
1976         rtl_deinit_core(hw);
1977         _rtl_pci_io_handler_release(hw);
1978         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1979
1980         if (rtlpci->irq_alloc) {
1981                 free_irq(rtlpci->pdev->irq, hw);
1982                 rtlpci->irq_alloc = 0;
1983         }
1984
1985         if (rtlpriv->io.pci_mem_start != 0) {
1986                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1987                 pci_release_regions(pdev);
1988         }
1989
1990         pci_disable_device(pdev);
1991
1992         rtl_pci_disable_aspm(hw);
1993
1994         pci_set_drvdata(pdev, NULL);
1995
1996         ieee80211_free_hw(hw);
1997 }
1998 EXPORT_SYMBOL(rtl_pci_disconnect);
1999
2000 /***************************************
2001 kernel pci power state define:
2002 PCI_D0         ((pci_power_t __force) 0)
2003 PCI_D1         ((pci_power_t __force) 1)
2004 PCI_D2         ((pci_power_t __force) 2)
2005 PCI_D3hot      ((pci_power_t __force) 3)
2006 PCI_D3cold     ((pci_power_t __force) 4)
2007 PCI_UNKNOWN    ((pci_power_t __force) 5)
2008
2009 This function is called when system
2010 goes into suspend state mac80211 will
2011 call rtl_mac_stop() from the mac80211
2012 suspend function first, So there is
2013 no need to call hw_disable here.
2014 ****************************************/
2015 int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2016 {
2017         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2018         struct rtl_priv *rtlpriv = rtl_priv(hw);
2019
2020         rtlpriv->cfg->ops->hw_suspend(hw);
2021         rtl_deinit_rfkill(hw);
2022
2023         pci_save_state(pdev);
2024         pci_disable_device(pdev);
2025         pci_set_power_state(pdev, PCI_D3hot);
2026         return 0;
2027 }
2028 EXPORT_SYMBOL(rtl_pci_suspend);
2029
2030 int rtl_pci_resume(struct pci_dev *pdev)
2031 {
2032         int ret;
2033         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2034         struct rtl_priv *rtlpriv = rtl_priv(hw);
2035
2036         pci_set_power_state(pdev, PCI_D0);
2037         ret = pci_enable_device(pdev);
2038         if (ret) {
2039                 RT_ASSERT(false, ("ERR: <======\n"));
2040                 return ret;
2041         }
2042
2043         pci_restore_state(pdev);
2044
2045         rtlpriv->cfg->ops->hw_resume(hw);
2046         rtl_init_rfkill(hw);
2047         return 0;
2048 }
2049 EXPORT_SYMBOL(rtl_pci_resume);
2050
2051 struct rtl_intf_ops rtl_pci_ops = {
2052         .read_efuse_byte = read_efuse_byte,
2053         .adapter_start = rtl_pci_start,
2054         .adapter_stop = rtl_pci_stop,
2055         .adapter_tx = rtl_pci_tx,
2056         .flush = rtl_pci_flush,
2057         .reset_trx_ring = rtl_pci_reset_trx_ring,
2058         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2059
2060         .disable_aspm = rtl_pci_disable_aspm,
2061         .enable_aspm = rtl_pci_enable_aspm,
2062 };