drivers/net/wireless/rtl818x/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  41
  42         /* rtl8180 */
  43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  44         { PCI_DEVICE(0x1799, 0x6001) },
  45         { PCI_DEVICE(0x1799, 0x6020) },
  46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  47         { }
  48 };
  49
  50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  51
  52 static const struct ieee80211_rate rtl818x_rates[] = {
  53         { .bitrate = 10, .hw_value = 0, },
  54         { .bitrate = 20, .hw_value = 1, },
  55         { .bitrate = 55, .hw_value = 2, },
  56         { .bitrate = 110, .hw_value = 3, },
  57         { .bitrate = 60, .hw_value = 4, },
  58         { .bitrate = 90, .hw_value = 5, },
  59         { .bitrate = 120, .hw_value = 6, },
  60         { .bitrate = 180, .hw_value = 7, },
  61         { .bitrate = 240, .hw_value = 8, },
  62         { .bitrate = 360, .hw_value = 9, },
  63         { .bitrate = 480, .hw_value = 10, },
  64         { .bitrate = 540, .hw_value = 11, },
  65 };
  66
  67 static const struct ieee80211_channel rtl818x_channels[] = {
  68         { .center_freq = 2412 },
  69         { .center_freq = 2417 },
  70         { .center_freq = 2422 },
  71         { .center_freq = 2427 },
  72         { .center_freq = 2432 },
  73         { .center_freq = 2437 },
  74         { .center_freq = 2442 },
  75         { .center_freq = 2447 },
  76         { .center_freq = 2452 },
  77         { .center_freq = 2457 },
  78         { .center_freq = 2462 },
  79         { .center_freq = 2467 },
  80         { .center_freq = 2472 },
  81         { .center_freq = 2484 },
  82 };
  83
  84
  85 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  86 {
  87         struct rtl8180_priv *priv = dev->priv;
  88         int i = 10;
  89         u32 buf;
  90
  91         buf = (data << 8) | addr;
  92
  93         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  94         while (i--) {
  95                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  96                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  97                         return;
  98         }
  99 }
 100
 101 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
 102 {
 103         struct rtl8180_priv *priv = dev->priv;
 104         unsigned int count = 32;
 105
 106         while (count--) {
 107                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
 108                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
 109                 u32 flags = le32_to_cpu(entry->flags);
 110
 111                 if (flags & RTL818X_RX_DESC_FLAG_OWN)
 112                         return;
 113
 114                 if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
 115                                       RTL818X_RX_DESC_FLAG_FOF |
 116                                       RTL818X_RX_DESC_FLAG_RX_ERR)))
 117                         goto done;
 118                 else {
 119                         u32 flags2 = le32_to_cpu(entry->flags2);
 120                         struct ieee80211_rx_status rx_status = {0};
 121                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
 122
 123                         if (unlikely(!new_skb))
 124                                 goto done;
 125
 126                         pci_unmap_single(priv->pdev,
 127                                          *((dma_addr_t *)skb->cb),
 128                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 129                         skb_put(skb, flags & 0xFFF);
 130
 131                         rx_status.antenna = (flags2 >> 15) & 1;
 132                         /* TODO: improve signal/rssi reporting */
 133                         rx_status.signal = (flags2 >> 8) & 0x7F;
 134                         /* XXX: is this correct? */
 135                         rx_status.rate_idx = (flags >> 20) & 0xF;
 136                         rx_status.freq = dev->conf.channel->center_freq;
 137                         rx_status.band = dev->conf.channel->band;
 138                         rx_status.mactime = le64_to_cpu(entry->tsft);
 139                         rx_status.flag |= RX_FLAG_TSFT;
 140                         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 141                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 142
 143                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 144                         ieee80211_rx_irqsafe(dev, skb);
 145
 146                         skb = new_skb;
 147                         priv->rx_buf[priv->rx_idx] = skb;
 148                         *((dma_addr_t *) skb->cb) =
 149                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 150                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 151                 }
 152
 153         done:
 154                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 155                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 156                                            MAX_RX_SIZE);
 157                 if (priv->rx_idx == 31)
 158                         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 159                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 160         }
 161 }
 162
 163 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 164 {
 165         struct rtl8180_priv *priv = dev->priv;
 166         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 167
 168         while (skb_queue_len(&ring->queue)) {
 169                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 170                 struct sk_buff *skb;
 171                 struct ieee80211_tx_info *info;
 172                 u32 flags = le32_to_cpu(entry->flags);
 173
 174                 if (flags & RTL818X_TX_DESC_FLAG_OWN)
 175                         return;
 176
 177                 ring->idx = (ring->idx + 1) % ring->entries;
 178                 skb = __skb_dequeue(&ring->queue);
 179                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 180                                  skb->len, PCI_DMA_TODEVICE);
 181
 182                 info = IEEE80211_SKB_CB(skb);
 183                 ieee80211_tx_info_clear_status(info);
 184
 185                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
 186                     (flags & RTL818X_TX_DESC_FLAG_TX_OK))
 187                         info->flags |= IEEE80211_TX_STAT_ACK;
 188
 189                 info->status.rates[0].count = (flags & 0xFF) + 1;
 190
 191                 ieee80211_tx_status_irqsafe(dev, skb);
 192                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 193                         ieee80211_wake_queue(dev, prio);
 194         }
 195 }
 196
 197 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 198 {
 199         struct ieee80211_hw *dev = dev_id;
 200         struct rtl8180_priv *priv = dev->priv;
 201         u16 reg;
 202
 203         spin_lock(&priv->lock);
 204         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 205         if (unlikely(reg == 0xFFFF)) {
 206                 spin_unlock(&priv->lock);
 207                 return IRQ_HANDLED;
 208         }
 209
 210         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 211
 212         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 213                 rtl8180_handle_tx(dev, 3);
 214
 215         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 216                 rtl8180_handle_tx(dev, 2);
 217
 218         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 219                 rtl8180_handle_tx(dev, 1);
 220
 221         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 222                 rtl8180_handle_tx(dev, 0);
 223
 224         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 225                 rtl8180_handle_rx(dev);
 226
 227         spin_unlock(&priv->lock);
 228
 229         return IRQ_HANDLED;
 230 }
 231
 232 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 233 {
 234         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 235         struct rtl8180_priv *priv = dev->priv;
 236         struct rtl8180_tx_ring *ring;
 237         struct rtl8180_tx_desc *entry;
 238         unsigned long flags;
 239         unsigned int idx, prio;
 240         dma_addr_t mapping;
 241         u32 tx_flags;
 242         u8 rc_flags;
 243         u16 plcp_len = 0;
 244         __le16 rts_duration = 0;
 245
 246         prio = skb_get_queue_mapping(skb);
 247         ring = &priv->tx_ring[prio];
 248
 249         mapping = pci_map_single(priv->pdev, skb->data,
 250                                  skb->len, PCI_DMA_TODEVICE);
 251
 252         tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
 253                    RTL818X_TX_DESC_FLAG_LS |
 254                    (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
 255                    skb->len;
 256
 257         if (priv->r8185)
 258                 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
 259                             RTL818X_TX_DESC_FLAG_NO_ENC;
 260
 261         rc_flags = info->control.rates[0].flags;
 262         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 263                 tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
 264                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 265         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 266                 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
 267                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 268         }
 269
 270         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
 271                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 272                                                       info);
 273
 274         if (!priv->r8185) {
 275                 unsigned int remainder;
 276
 277                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 278                                 (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 279                 remainder = (16 * (skb->len + 4)) %
 280                             ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 281                 if (remainder <= 6)
 282                         plcp_len |= 1 << 15;
 283         }
 284
 285         spin_lock_irqsave(&priv->lock, flags);
 286         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 287         entry = &ring->desc[idx];
 288
 289         entry->rts_duration = rts_duration;
 290         entry->plcp_len = cpu_to_le16(plcp_len);
 291         entry->tx_buf = cpu_to_le32(mapping);
 292         entry->frame_len = cpu_to_le32(skb->len);
 293         entry->flags2 = info->control.rates[1].idx >= 0 ?
 294                 ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0;
 295         entry->retry_limit = info->control.rates[0].count;
 296         entry->flags = cpu_to_le32(tx_flags);
 297         __skb_queue_tail(&ring->queue, skb);
 298         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 299                 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
 300         spin_unlock_irqrestore(&priv->lock, flags);
 301
 302         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 303
 304         return 0;
 305 }
 306
 307 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 308 {
 309         u8 reg;
 310
 311         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 312         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 313         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 314                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 315         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 316         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 317                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 318         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 319 }
 320
 321 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 322 {
 323         struct rtl8180_priv *priv = dev->priv;
 324         u16 reg;
 325
 326         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 327         rtl818x_ioread8(priv, &priv->map->CMD);
 328         msleep(10);
 329
 330         /* reset */
 331         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 332         rtl818x_ioread8(priv, &priv->map->CMD);
 333
 334         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 335         reg &= (1 << 1);
 336         reg |= RTL818X_CMD_RESET;
 337         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 338         rtl818x_ioread8(priv, &priv->map->CMD);
 339         msleep(200);
 340
 341         /* check success of reset */
 342         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 343                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 344                 return -ETIMEDOUT;
 345         }
 346
 347         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 348         rtl818x_ioread8(priv, &priv->map->CMD);
 349         msleep(200);
 350
 351         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 352                 /* For cardbus */
 353                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 354                 reg |= 1 << 1;
 355                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 356                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 357                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 358                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 359         }
 360
 361         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 362
 363         if (!priv->r8185)
 364                 rtl8180_set_anaparam(priv, priv->anaparam);
 365
 366         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 367         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 368         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 369         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 370         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 371
 372         /* TODO: necessary? specs indicate not */
 373         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 374         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 375         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 376         if (priv->r8185) {
 377                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 378                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 379         }
 380         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 381
 382         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 383
 384         /* TODO: turn off hw wep on rtl8180 */
 385
 386         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 387
 388         if (priv->r8185) {
 389                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 390                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 391                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 392
 393                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 394
 395                 /* TODO: set ClkRun enable? necessary? */
 396                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 397                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 398                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 399                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 400                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 401                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 402         } else {
 403                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 404                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 405
 406                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 407                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 408         }
 409
 410         priv->rf->init(dev);
 411         if (priv->r8185)
 412                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 413         return 0;
 414 }
 415
 416 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 417 {
 418         struct rtl8180_priv *priv = dev->priv;
 419         struct rtl8180_rx_desc *entry;
 420         int i;
 421
 422         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 423                                              sizeof(*priv->rx_ring) * 32,
 424                                              &priv->rx_ring_dma);
 425
 426         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 427                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 428                        wiphy_name(dev->wiphy));
 429                 return -ENOMEM;
 430         }
 431
 432         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 433         priv->rx_idx = 0;
 434
 435         for (i = 0; i < 32; i++) {
 436                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 437                 dma_addr_t *mapping;
 438                 entry = &priv->rx_ring[i];
 439                 if (!skb)
 440                         return 0;
 441
 442                 priv->rx_buf[i] = skb;
 443                 mapping = (dma_addr_t *)skb->cb;
 444                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 445                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 446                 entry->rx_buf = cpu_to_le32(*mapping);
 447                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 448                                            MAX_RX_SIZE);
 449         }
 450         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 451         return 0;
 452 }
 453
 454 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 455 {
 456         struct rtl8180_priv *priv = dev->priv;
 457         int i;
 458
 459         for (i = 0; i < 32; i++) {
 460                 struct sk_buff *skb = priv->rx_buf[i];
 461                 if (!skb)
 462                         continue;
 463
 464                 pci_unmap_single(priv->pdev,
 465                                  *((dma_addr_t *)skb->cb),
 466                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 467                 kfree_skb(skb);
 468         }
 469
 470         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 471                             priv->rx_ring, priv->rx_ring_dma);
 472         priv->rx_ring = NULL;
 473 }
 474
 475 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 476                                 unsigned int prio, unsigned int entries)
 477 {
 478         struct rtl8180_priv *priv = dev->priv;
 479         struct rtl8180_tx_desc *ring;
 480         dma_addr_t dma;
 481         int i;
 482
 483         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 484         if (!ring || (unsigned long)ring & 0xFF) {
 485                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 486                        wiphy_name(dev->wiphy), prio);
 487                 return -ENOMEM;
 488         }
 489
 490         memset(ring, 0, sizeof(*ring)*entries);
 491         priv->tx_ring[prio].desc = ring;
 492         priv->tx_ring[prio].dma = dma;
 493         priv->tx_ring[prio].idx = 0;
 494         priv->tx_ring[prio].entries = entries;
 495         skb_queue_head_init(&priv->tx_ring[prio].queue);
 496
 497         for (i = 0; i < entries; i++)
 498                 ring[i].next_tx_desc =
 499                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 500
 501         return 0;
 502 }
 503
 504 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 505 {
 506         struct rtl8180_priv *priv = dev->priv;
 507         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 508
 509         while (skb_queue_len(&ring->queue)) {
 510                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 511                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 512
 513                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 514                                  skb->len, PCI_DMA_TODEVICE);
 515                 kfree_skb(skb);
 516                 ring->idx = (ring->idx + 1) % ring->entries;
 517         }
 518
 519         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 520                             ring->desc, ring->dma);
 521         ring->desc = NULL;
 522 }
 523
 524 static int rtl8180_start(struct ieee80211_hw *dev)
 525 {
 526         struct rtl8180_priv *priv = dev->priv;
 527         int ret, i;
 528         u32 reg;
 529
 530         ret = rtl8180_init_rx_ring(dev);
 531         if (ret)
 532                 return ret;
 533
 534         for (i = 0; i < 4; i++)
 535                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 536                         goto err_free_rings;
 537
 538         ret = rtl8180_init_hw(dev);
 539         if (ret)
 540                 goto err_free_rings;
 541
 542         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 543         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 544         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 545         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 546         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 547
 548         ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
 549                           IRQF_SHARED, KBUILD_MODNAME, dev);
 550         if (ret) {
 551                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 552                        wiphy_name(dev->wiphy));
 553                 goto err_free_rings;
 554         }
 555
 556         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 557
 558         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 559         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 560
 561         reg = RTL818X_RX_CONF_ONLYERLPKT |
 562               RTL818X_RX_CONF_RX_AUTORESETPHY |
 563               RTL818X_RX_CONF_MGMT |
 564               RTL818X_RX_CONF_DATA |
 565               (7 << 8 /* MAX RX DMA */) |
 566               RTL818X_RX_CONF_BROADCAST |
 567               RTL818X_RX_CONF_NICMAC;
 568
 569         if (priv->r8185)
 570                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 571         else {
 572                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 573                         ? RTL818X_RX_CONF_CSDM1 : 0;
 574                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 575                         ? RTL818X_RX_CONF_CSDM2 : 0;
 576         }
 577
 578         priv->rx_conf = reg;
 579         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 580
 581         if (priv->r8185) {
 582                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 583                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 584                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 585                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 586
 587                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 588                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 589                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 590                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 591                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 592
 593                 /* disable early TX */
 594                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 595         }
 596
 597         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 598         reg |= (6 << 21 /* MAX TX DMA */) |
 599                RTL818X_TX_CONF_NO_ICV;
 600
 601         if (priv->r8185)
 602                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 603         else
 604                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 605
 606         /* different meaning, same value on both rtl8185 and rtl8180 */
 607         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 608
 609         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 610
 611         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 612         reg |= RTL818X_CMD_RX_ENABLE;
 613         reg |= RTL818X_CMD_TX_ENABLE;
 614         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 615
 616         return 0;
 617
 618  err_free_rings:
 619         rtl8180_free_rx_ring(dev);
 620         for (i = 0; i < 4; i++)
 621                 if (priv->tx_ring[i].desc)
 622                         rtl8180_free_tx_ring(dev, i);
 623
 624         return ret;
 625 }
 626
 627 static void rtl8180_stop(struct ieee80211_hw *dev)
 628 {
 629         struct rtl8180_priv *priv = dev->priv;
 630         u8 reg;
 631         int i;
 632
 633         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 634
 635         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 636         reg &= ~RTL818X_CMD_TX_ENABLE;
 637         reg &= ~RTL818X_CMD_RX_ENABLE;
 638         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 639
 640         priv->rf->stop(dev);
 641
 642         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 643         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 644         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 645         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 646
 647         free_irq(priv->pdev->irq, dev);
 648
 649         rtl8180_free_rx_ring(dev);
 650         for (i = 0; i < 4; i++)
 651                 rtl8180_free_tx_ring(dev, i);
 652 }
 653
 654 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 655                                  struct ieee80211_vif *vif)
 656 {
 657         struct rtl8180_priv *priv = dev->priv;
 658
 659         /*
 660          * We only support one active interface at a time.
 661          */
 662         if (priv->vif)
 663                 return -EBUSY;
 664
 665         switch (vif->type) {
 666         case NL80211_IFTYPE_STATION:
 667                 break;
 668         default:
 669                 return -EOPNOTSUPP;
 670         }
 671
 672         priv->vif = vif;
 673
 674         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 675         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 676                           le32_to_cpu(*(__le32 *)vif->addr));
 677         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 678                           le16_to_cpu(*(__le16 *)(vif->addr + 4)));
 679         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 680
 681         return 0;
 682 }
 683
 684 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 685                                      struct ieee80211_vif *vif)
 686 {
 687         struct rtl8180_priv *priv = dev->priv;
 688         priv->vif = NULL;
 689 }
 690
 691 static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
 692 {
 693         struct rtl8180_priv *priv = dev->priv;
 694         struct ieee80211_conf *conf = &dev->conf;
 695
 696         priv->rf->set_chan(dev, conf);
 697
 698         return 0;
 699 }
 700
 701 static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
 702                                      struct ieee80211_vif *vif,
 703                                      struct ieee80211_bss_conf *info,
 704                                      u32 changed)
 705 {
 706         struct rtl8180_priv *priv = dev->priv;
 707         int i;
 708
 709         if (changed & BSS_CHANGED_BSSID) {
 710                 for (i = 0; i < ETH_ALEN; i++)
 711                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
 712                                          info->bssid[i]);
 713
 714                 if (is_valid_ether_addr(info->bssid))
 715                         rtl818x_iowrite8(priv, &priv->map->MSR,
 716                                          RTL818X_MSR_INFRA);
 717                 else
 718                         rtl818x_iowrite8(priv, &priv->map->MSR,
 719                                          RTL818X_MSR_NO_LINK);
 720         }
 721
 722         if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
 723                 priv->rf->conf_erp(dev, info);
 724 }
 725
 726 static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev, int mc_count,
 727                                      struct dev_addr_list *mc_list)
 728 {
 729         return mc_count;
 730 }
 731
 732 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 733                                      unsigned int changed_flags,
 734                                      unsigned int *total_flags,
 735                                      u64 multicast)
 736 {
 737         struct rtl8180_priv *priv = dev->priv;
 738
 739         if (changed_flags & FIF_FCSFAIL)
 740                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 741         if (changed_flags & FIF_CONTROL)
 742                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 743         if (changed_flags & FIF_OTHER_BSS)
 744                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 745         if (*total_flags & FIF_ALLMULTI || multicast > 0)
 746                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 747         else
 748                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 749
 750         *total_flags = 0;
 751
 752         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 753                 *total_flags |= FIF_FCSFAIL;
 754         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 755                 *total_flags |= FIF_CONTROL;
 756         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 757                 *total_flags |= FIF_OTHER_BSS;
 758         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 759                 *total_flags |= FIF_ALLMULTI;
 760
 761         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 762 }
 763
 764 static u64 rtl8180_get_tsf(struct ieee80211_hw *dev)
 765 {
 766         struct rtl8180_priv *priv = dev->priv;
 767
 768         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
 769                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
 770 }
 771
 772 static const struct ieee80211_ops rtl8180_ops = {
 773         .tx                     = rtl8180_tx,
 774         .start                  = rtl8180_start,
 775         .stop                   = rtl8180_stop,
 776         .add_interface          = rtl8180_add_interface,
 777         .remove_interface       = rtl8180_remove_interface,
 778         .config                 = rtl8180_config,
 779         .bss_info_changed       = rtl8180_bss_info_changed,
 780         .prepare_multicast      = rtl8180_prepare_multicast,
 781         .configure_filter       = rtl8180_configure_filter,
 782         .get_tsf                = rtl8180_get_tsf,
 783 };
 784
 785 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 786 {
 787         struct ieee80211_hw *dev = eeprom->data;
 788         struct rtl8180_priv *priv = dev->priv;
 789         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 790
 791         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 792         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 793         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 794         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 795 }
 796
 797 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 798 {
 799         struct ieee80211_hw *dev = eeprom->data;
 800         struct rtl8180_priv *priv = dev->priv;
 801         u8 reg = 2 << 6;
 802
 803         if (eeprom->reg_data_in)
 804                 reg |= RTL818X_EEPROM_CMD_WRITE;
 805         if (eeprom->reg_data_out)
 806                 reg |= RTL818X_EEPROM_CMD_READ;
 807         if (eeprom->reg_data_clock)
 808                 reg |= RTL818X_EEPROM_CMD_CK;
 809         if (eeprom->reg_chip_select)
 810                 reg |= RTL818X_EEPROM_CMD_CS;
 811
 812         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 813         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 814         udelay(10);
 815 }
 816
 817 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 818                                    const struct pci_device_id *id)
 819 {
 820         struct ieee80211_hw *dev;
 821         struct rtl8180_priv *priv;
 822         unsigned long mem_addr, mem_len;
 823         unsigned int io_addr, io_len;
 824         int err, i;
 825         struct eeprom_93cx6 eeprom;
 826         const char *chip_name, *rf_name = NULL;
 827         u32 reg;
 828         u16 eeprom_val;
 829
 830         err = pci_enable_device(pdev);
 831         if (err) {
 832                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 833                        pci_name(pdev));
 834                 return err;
 835         }
 836
 837         err = pci_request_regions(pdev, KBUILD_MODNAME);
 838         if (err) {
 839                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 840                        pci_name(pdev));
 841                 return err;
 842         }
 843
 844         io_addr = pci_resource_start(pdev, 0);
 845         io_len = pci_resource_len(pdev, 0);
 846         mem_addr = pci_resource_start(pdev, 1);
 847         mem_len = pci_resource_len(pdev, 1);
 848
 849         if (mem_len < sizeof(struct rtl818x_csr) ||
 850             io_len < sizeof(struct rtl818x_csr)) {
 851                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 852                        pci_name(pdev));
 853                 err = -ENOMEM;
 854                 goto err_free_reg;
 855         }
 856
 857         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 858             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 859                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 860                        pci_name(pdev));
 861                 goto err_free_reg;
 862         }
 863
 864         pci_set_master(pdev);
 865
 866         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 867         if (!dev) {
 868                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 869                        pci_name(pdev));
 870                 err = -ENOMEM;
 871                 goto err_free_reg;
 872         }
 873
 874         priv = dev->priv;
 875         priv->pdev = pdev;
 876
 877         dev->max_rates = 2;
 878         SET_IEEE80211_DEV(dev, &pdev->dev);
 879         pci_set_drvdata(pdev, dev);
 880
 881         priv->map = pci_iomap(pdev, 1, mem_len);
 882         if (!priv->map)
 883                 priv->map = pci_iomap(pdev, 0, io_len);
 884
 885         if (!priv->map) {
 886                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 887                        pci_name(pdev));
 888                 goto err_free_dev;
 889         }
 890
 891         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 892         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 893
 894         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 895         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 896
 897         priv->band.band = IEEE80211_BAND_2GHZ;
 898         priv->band.channels = priv->channels;
 899         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 900         priv->band.bitrates = priv->rates;
 901         priv->band.n_bitrates = 4;
 902         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 903
 904         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 905                      IEEE80211_HW_RX_INCLUDES_FCS |
 906                      IEEE80211_HW_SIGNAL_UNSPEC;
 907         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
 908         dev->queues = 1;
 909         dev->max_signal = 65;
 910
 911         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 912         reg &= RTL818X_TX_CONF_HWVER_MASK;
 913         switch (reg) {
 914         case RTL818X_TX_CONF_R8180_ABCD:
 915                 chip_name = "RTL8180";
 916                 break;
 917         case RTL818X_TX_CONF_R8180_F:
 918                 chip_name = "RTL8180vF";
 919                 break;
 920         case RTL818X_TX_CONF_R8185_ABC:
 921                 chip_name = "RTL8185";
 922                 break;
 923         case RTL818X_TX_CONF_R8185_D:
 924                 chip_name = "RTL8185vD";
 925                 break;
 926         default:
 927                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 928                        pci_name(pdev), reg >> 25);
 929                 goto err_iounmap;
 930         }
 931
 932         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 933         if (priv->r8185) {
 934                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
 935                 pci_try_set_mwi(pdev);
 936         }
 937
 938         eeprom.data = dev;
 939         eeprom.register_read = rtl8180_eeprom_register_read;
 940         eeprom.register_write = rtl8180_eeprom_register_write;
 941         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 942                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 943         else
 944                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 945
 946         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 947         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 948         udelay(10);
 949
 950         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 951         eeprom_val &= 0xFF;
 952         switch (eeprom_val) {
 953         case 1: rf_name = "Intersil";
 954                 break;
 955         case 2: rf_name = "RFMD";
 956                 break;
 957         case 3: priv->rf = &sa2400_rf_ops;
 958                 break;
 959         case 4: priv->rf = &max2820_rf_ops;
 960                 break;
 961         case 5: priv->rf = &grf5101_rf_ops;
 962                 break;
 963         case 9: priv->rf = rtl8180_detect_rf(dev);
 964                 break;
 965         case 10:
 966                 rf_name = "RTL8255";
 967                 break;
 968         default:
 969                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 970                        pci_name(pdev), eeprom_val);
 971                 goto err_iounmap;
 972         }
 973
 974         if (!priv->rf) {
 975                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 976                        pci_name(pdev), rf_name);
 977                 goto err_iounmap;
 978         }
 979
 980         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 981         priv->csthreshold = eeprom_val >> 8;
 982         if (!priv->r8185) {
 983                 __le32 anaparam;
 984                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 985                 priv->anaparam = le32_to_cpu(anaparam);
 986                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 987         }
 988
 989         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
 990         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 991                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 992                        " randomly generated MAC addr\n", pci_name(pdev));
 993                 random_ether_addr(dev->wiphy->perm_addr);
 994         }
 995
 996         /* CCK TX power */
 997         for (i = 0; i < 14; i += 2) {
 998                 u16 txpwr;
 999                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
1000                 priv->channels[i].hw_value = txpwr & 0xFF;
1001                 priv->channels[i + 1].hw_value = txpwr >> 8;
1002         }
1003
1004         /* OFDM TX power */
1005         if (priv->r8185) {
1006                 for (i = 0; i < 14; i += 2) {
1007                         u16 txpwr;
1008                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
1009                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
1010                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
1011                 }
1012         }
1013
1014         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1015
1016         spin_lock_init(&priv->lock);
1017
1018         err = ieee80211_register_hw(dev);
1019         if (err) {
1020                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1021                        pci_name(pdev));
1022                 goto err_iounmap;
1023         }
1024
1025         printk(KERN_INFO "%s: hwaddr %pM, %s + %s\n",
1026                wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1027                chip_name, priv->rf->name);
1028
1029         return 0;
1030
1031  err_iounmap:
1032         iounmap(priv->map);
1033
1034  err_free_dev:
1035         pci_set_drvdata(pdev, NULL);
1036         ieee80211_free_hw(dev);
1037
1038  err_free_reg:
1039         pci_release_regions(pdev);
1040         pci_disable_device(pdev);
1041         return err;
1042 }
1043
1044 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1045 {
1046         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1047         struct rtl8180_priv *priv;
1048
1049         if (!dev)
1050                 return;
1051
1052         ieee80211_unregister_hw(dev);
1053
1054         priv = dev->priv;
1055
1056         pci_iounmap(pdev, priv->map);
1057         pci_release_regions(pdev);
1058         pci_disable_device(pdev);
1059         ieee80211_free_hw(dev);
1060 }
1061
1062 #ifdef CONFIG_PM
1063 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1064 {
1065         pci_save_state(pdev);
1066         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1067         return 0;
1068 }
1069
1070 static int rtl8180_resume(struct pci_dev *pdev)
1071 {
1072         pci_set_power_state(pdev, PCI_D0);
1073         pci_restore_state(pdev);
1074         return 0;
1075 }
1076
1077 #endif /* CONFIG_PM */
1078
1079 static struct pci_driver rtl8180_driver = {
1080         .name           = KBUILD_MODNAME,
1081         .id_table       = rtl8180_table,
1082         .probe          = rtl8180_probe,
1083         .remove         = __devexit_p(rtl8180_remove),
1084 #ifdef CONFIG_PM
1085         .suspend        = rtl8180_suspend,
1086         .resume         = rtl8180_resume,
1087 #endif /* CONFIG_PM */
1088 };
1089
1090 static int __init rtl8180_init(void)
1091 {
1092         return pci_register_driver(&rtl8180_driver);
1093 }
1094
1095 static void __exit rtl8180_exit(void)
1096 {
1097         pci_unregister_driver(&rtl8180_driver);
1098 }
1099
1100 module_init(rtl8180_init);
1101 module_exit(rtl8180_exit);