2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/completion.h>
19 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
21 #include <linux/moduleparam.h>
22 #include <linux/firmware.h>
23 #include <linux/workqueue.h>
25 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26 #define MWL8K_NAME KBUILD_MODNAME
27 #define MWL8K_VERSION "0.9.1"
29 MODULE_DESCRIPTION(MWL8K_DESC);
30 MODULE_VERSION(MWL8K_VERSION);
31 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
39 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41 #define IEEE80211_ADDR_LEN ETH_ALEN
43 /* Register definitions */
44 #define MWL8K_HIU_GEN_PTR 0x00000c10
45 #define MWL8K_MODE_STA 0x0000005a
46 #define MWL8K_MODE_AP 0x000000a5
47 #define MWL8K_HIU_INT_CODE 0x00000c14
48 #define MWL8K_FWSTA_READY 0xf0f1f2f4
49 #define MWL8K_FWAP_READY 0xf1f2f4a5
50 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
51 #define MWL8K_HIU_SCRATCH 0x00000c40
53 /* Host->device communications */
54 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
55 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
56 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
57 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
58 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
59 #define MWL8K_H2A_INT_DUMMY (1 << 20)
60 #define MWL8K_H2A_INT_RESET (1 << 15)
61 #define MWL8K_H2A_INT_PS (1 << 2)
62 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
63 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
65 /* Device->host communications */
66 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
67 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
68 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
69 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
70 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
71 #define MWL8K_A2H_INT_DUMMY (1 << 20)
72 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
73 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
74 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
75 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
76 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
77 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
78 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
79 #define MWL8K_A2H_INT_RX_READY (1 << 1)
80 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
82 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
83 MWL8K_A2H_INT_CHNL_SWITCHED | \
84 MWL8K_A2H_INT_QUEUE_EMPTY | \
85 MWL8K_A2H_INT_RADAR_DETECT | \
86 MWL8K_A2H_INT_RADIO_ON | \
87 MWL8K_A2H_INT_RADIO_OFF | \
88 MWL8K_A2H_INT_MAC_EVENT | \
89 MWL8K_A2H_INT_OPC_DONE | \
90 MWL8K_A2H_INT_RX_READY | \
91 MWL8K_A2H_INT_TX_DONE)
93 /* WME stream classes */
94 #define WME_AC_BE 0 /* best effort */
95 #define WME_AC_BK 1 /* background */
96 #define WME_AC_VI 2 /* video */
97 #define WME_AC_VO 3 /* voice */
99 #define MWL8K_RX_QUEUES 1
100 #define MWL8K_TX_QUEUES 4
102 struct mwl8k_rx_queue {
105 /* hw receives here */
108 /* refill descs here */
111 struct mwl8k_rx_desc *rx_desc_area;
112 dma_addr_t rx_desc_dma;
113 struct sk_buff **rx_skb;
118 * The DMA engine requires a modification to the payload.
119 * If the skbuff is shared/cloned, it needs to be unshared.
120 * This method is used to ensure the stack always gets back
121 * the skbuff it sent for transmission.
123 struct sk_buff *clone;
127 struct mwl8k_tx_queue {
128 /* hw transmits here */
131 /* sw appends here */
134 struct ieee80211_tx_queue_stats tx_stats;
135 struct mwl8k_tx_desc *tx_desc_area;
136 dma_addr_t tx_desc_dma;
137 struct mwl8k_skb *tx_skb;
140 /* Pointers to the firmware data and meta information about it. */
141 struct mwl8k_firmware {
143 struct firmware *ucode;
145 /* Boot helper code */
146 struct firmware *helper;
151 struct ieee80211_hw *hw;
153 struct pci_dev *pdev;
155 /* firmware access lock */
158 /* firmware files and meta data */
159 struct mwl8k_firmware fw;
162 /* lock held over TX and TX reap */
166 struct ieee80211_vif *vif;
167 struct list_head vif_list;
169 struct ieee80211_channel *current_channel;
171 /* power management status cookie from firmware */
173 dma_addr_t cookie_dma;
182 * Running count of TX packets in flight, to avoid
183 * iterating over the transmit rings each time.
187 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
188 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
191 struct ieee80211_supported_band band;
192 struct ieee80211_channel channels[14];
193 struct ieee80211_rate rates[12];
195 /* RF preamble: Short, Long or Auto */
199 /* WMM MODE 1 for enabled; 0 for disabled */
202 /* Set if PHY config is in progress */
205 /* XXX need to convert this to handle multiple interfaces */
207 u8 capture_bssid[IEEE80211_ADDR_LEN];
208 struct sk_buff *beacon_skb;
211 * This FJ worker has to be global as it is scheduled from the
212 * RX handler. At this point we don't know which interface it
213 * belongs to until the list of bssids waiting to complete join
216 struct work_struct finalize_join_worker;
218 /* Tasklet to reclaim TX descriptors and buffers after tx */
219 struct tasklet_struct tx_reclaim_task;
221 /* Work thread to serialize configuration requests */
222 struct workqueue_struct *config_wq;
223 struct completion *hostcmd_wait;
224 struct completion *tx_wait;
227 /* Per interface specific private data */
229 struct list_head node;
231 /* backpointer to parent config block */
232 struct mwl8k_priv *priv;
234 /* BSS config of AP or IBSS from mac80211*/
235 struct ieee80211_bss_conf bss_info;
237 /* BSSID of AP or IBSS */
238 u8 bssid[IEEE80211_ADDR_LEN];
239 u8 mac_addr[IEEE80211_ADDR_LEN];
242 * Subset of supported legacy rates.
243 * Intersection of AP and STA supported rates.
245 struct ieee80211_rate legacy_rates[12];
247 /* number of supported legacy rates */
250 /* Number of supported MCS rates. Work in progress */
253 /* Index into station database.Returned by update_sta_db call */
256 /* Non AMPDU sequence number assigned by driver */
259 /* Note:There is no channel info,
260 * refer to the master channel info in priv
264 #define MWL8K_VIF(_vif) (struct mwl8k_vif *)(&((_vif)->drv_priv))
266 static const struct ieee80211_channel mwl8k_channels[] = {
267 { .center_freq = 2412, .hw_value = 1, },
268 { .center_freq = 2417, .hw_value = 2, },
269 { .center_freq = 2422, .hw_value = 3, },
270 { .center_freq = 2427, .hw_value = 4, },
271 { .center_freq = 2432, .hw_value = 5, },
272 { .center_freq = 2437, .hw_value = 6, },
273 { .center_freq = 2442, .hw_value = 7, },
274 { .center_freq = 2447, .hw_value = 8, },
275 { .center_freq = 2452, .hw_value = 9, },
276 { .center_freq = 2457, .hw_value = 10, },
277 { .center_freq = 2462, .hw_value = 11, },
280 static const struct ieee80211_rate mwl8k_rates[] = {
281 { .bitrate = 10, .hw_value = 2, },
282 { .bitrate = 20, .hw_value = 4, },
283 { .bitrate = 55, .hw_value = 11, },
284 { .bitrate = 60, .hw_value = 12, },
285 { .bitrate = 90, .hw_value = 18, },
286 { .bitrate = 110, .hw_value = 22, },
287 { .bitrate = 120, .hw_value = 24, },
288 { .bitrate = 180, .hw_value = 36, },
289 { .bitrate = 240, .hw_value = 48, },
290 { .bitrate = 360, .hw_value = 72, },
291 { .bitrate = 480, .hw_value = 96, },
292 { .bitrate = 540, .hw_value = 108, },
296 #define MWL8K_RADIO_FORCE 0x2
297 #define MWL8K_RADIO_ENABLE 0x1
298 #define MWL8K_RADIO_DISABLE 0x0
299 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
300 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
301 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
304 #define MWL8K_WMM_ENABLE 1
305 #define MWL8K_WMM_DISABLE 0
307 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
311 /* Short Slot: 9us slot time */
312 #define MWL8K_SHORT_SLOTTIME 1
314 /* Long slot: 20us slot time */
315 #define MWL8K_LONG_SLOTTIME 0
317 /* Set or get info from Firmware */
318 #define MWL8K_CMD_SET 0x0001
319 #define MWL8K_CMD_GET 0x0000
321 /* Firmware command codes */
322 #define MWL8K_CMD_CODE_DNLD 0x0001
323 #define MWL8K_CMD_GET_HW_SPEC 0x0003
324 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
325 #define MWL8K_CMD_GET_STAT 0x0014
326 #define MWL8K_CMD_RADIO_CONTROL 0x001C
327 #define MWL8K_CMD_RF_TX_POWER 0x001E
328 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
329 #define MWL8K_CMD_SET_POST_SCAN 0x0108
330 #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
331 #define MWL8K_CMD_SET_SLOT 0x0114
332 #define MWL8K_CMD_MIMO_CONFIG 0x0125
333 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
334 #define MWL8K_CMD_SET_WMM_MODE 0x0123
335 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
336 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
337 #define MWL8K_CMD_UPDATE_STADB 0x1123
338 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
339 #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
340 #define MWL8K_CMD_SET_AID 0x010d
341 #define MWL8K_CMD_SET_RATE 0x0110
342 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
343 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
344 #define MWL8K_CMD_ENCRYPTION 0x1122
346 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
348 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
349 snprintf(buf, bufsize, "%s", #x);\
352 switch (cmd & (~0x8000)) {
353 MWL8K_CMDNAME(CODE_DNLD);
354 MWL8K_CMDNAME(GET_HW_SPEC);
355 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
356 MWL8K_CMDNAME(GET_STAT);
357 MWL8K_CMDNAME(RADIO_CONTROL);
358 MWL8K_CMDNAME(RF_TX_POWER);
359 MWL8K_CMDNAME(SET_PRE_SCAN);
360 MWL8K_CMDNAME(SET_POST_SCAN);
361 MWL8K_CMDNAME(SET_RF_CHANNEL);
362 MWL8K_CMDNAME(SET_SLOT);
363 MWL8K_CMDNAME(MIMO_CONFIG);
364 MWL8K_CMDNAME(ENABLE_SNIFFER);
365 MWL8K_CMDNAME(SET_WMM_MODE);
366 MWL8K_CMDNAME(SET_EDCA_PARAMS);
367 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
368 MWL8K_CMDNAME(UPDATE_STADB);
369 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
370 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
371 MWL8K_CMDNAME(SET_AID);
372 MWL8K_CMDNAME(SET_RATE);
373 MWL8K_CMDNAME(USE_FIXED_RATE);
374 MWL8K_CMDNAME(RTS_THRESHOLD);
375 MWL8K_CMDNAME(ENCRYPTION);
377 snprintf(buf, bufsize, "0x%x", cmd);
384 /* Hardware and firmware reset */
385 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
387 iowrite32(MWL8K_H2A_INT_RESET,
388 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
389 iowrite32(MWL8K_H2A_INT_RESET,
390 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
394 /* Release fw image */
395 static void mwl8k_release_fw(struct firmware **fw)
399 release_firmware(*fw);
403 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
405 mwl8k_release_fw(&priv->fw.ucode);
406 mwl8k_release_fw(&priv->fw.helper);
409 /* Request fw image */
410 static int mwl8k_request_fw(struct mwl8k_priv *priv,
411 const char *fname, struct firmware **fw)
413 /* release current image */
415 mwl8k_release_fw(fw);
417 return request_firmware((const struct firmware **)fw,
418 fname, &priv->pdev->dev);
421 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
426 priv->part_num = part_num;
428 snprintf(filename, sizeof(filename),
429 "mwl8k/helper_%u.fw", priv->part_num);
431 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
434 "%s Error requesting helper firmware file %s\n",
435 pci_name(priv->pdev), filename);
439 snprintf(filename, sizeof(filename),
440 "mwl8k/fmimage_%u.fw", priv->part_num);
442 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
444 printk(KERN_ERR "%s Error requesting firmware file %s\n",
445 pci_name(priv->pdev), filename);
446 mwl8k_release_fw(&priv->fw.helper);
453 struct mwl8k_cmd_pkt {
459 } __attribute__((packed));
465 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
467 void __iomem *regs = priv->regs;
472 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
473 if (pci_dma_mapping_error(priv->pdev, dma_addr))
476 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
477 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
478 iowrite32(MWL8K_H2A_INT_DOORBELL,
479 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 iowrite32(MWL8K_H2A_INT_DUMMY,
481 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
488 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
489 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
490 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
498 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
501 * Clear 'command done' interrupt bit.
507 status = ioread32(priv->regs +
508 MWL8K_HIU_A2H_INTERRUPT_STATUS);
509 if (status & MWL8K_A2H_INT_OPC_DONE) {
510 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
511 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
512 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
522 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
523 const u8 *data, size_t length)
525 struct mwl8k_cmd_pkt *cmd;
529 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
533 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
539 int block_size = length > 256 ? 256 : length;
541 memcpy(cmd->payload, data + done, block_size);
542 cmd->length = cpu_to_le16(block_size);
544 rc = mwl8k_send_fw_load_cmd(priv, cmd,
545 sizeof(*cmd) + block_size);
550 length -= block_size;
555 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
563 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
564 const u8 *data, size_t length)
566 unsigned char *buffer;
567 int may_continue, rc = 0;
568 u32 done, prev_block_size;
570 buffer = kmalloc(1024, GFP_KERNEL);
577 while (may_continue > 0) {
580 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
581 if (block_size & 1) {
585 done += prev_block_size;
586 length -= prev_block_size;
589 if (block_size > 1024 || block_size > length) {
599 if (block_size == 0) {
606 prev_block_size = block_size;
607 memcpy(buffer, data + done, block_size);
609 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
614 if (!rc && length != 0)
622 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
626 const u8 *ucode = priv->fw.ucode->data;
627 size_t ucode_len = priv->fw.ucode->size;
628 const u8 *helper = priv->fw.helper->data;
629 size_t helper_len = priv->fw.helper->size;
631 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
632 rc = mwl8k_load_fw_image(priv, helper, helper_len);
634 printk(KERN_ERR "%s: unable to load firmware "
635 "helper image\n", pci_name(priv->pdev));
640 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
642 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
646 printk(KERN_ERR "%s: unable to load firmware data\n",
647 pci_name(priv->pdev));
651 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
656 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
657 == MWL8K_FWSTA_READY)
662 return loops ? 0 : -ETIMEDOUT;
667 * Defines shared between transmission and reception.
669 /* HT control fields for firmware */
674 } __attribute__((packed));
676 /* Firmware Station database operations */
677 #define MWL8K_STA_DB_ADD_ENTRY 0
678 #define MWL8K_STA_DB_MODIFY_ENTRY 1
679 #define MWL8K_STA_DB_DEL_ENTRY 2
680 #define MWL8K_STA_DB_FLUSH 3
682 /* Peer Entry flags - used to define the type of the peer node */
683 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
684 #define MWL8K_PEER_TYPE_ADHOC_STATION 4
686 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
687 #define MWL8K_MCS_BITMAP_SIZE 16
690 struct peer_capability_info {
691 /* Peer type - AP vs. STA. */
694 /* Basic 802.11 capabilities from assoc resp. */
697 /* Set if peer supports 802.11n high throughput (HT). */
700 /* Valid if HT is supported. */
702 __u8 extended_ht_caps;
703 struct ewc_ht_info ewc_info;
705 /* Legacy rate table. Intersection of our rates and peer rates. */
706 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
708 /* HT rate table. Intersection of our rates and peer rates. */
709 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
712 /* If set, interoperability mode, no proprietary extensions. */
716 __le16 amsdu_enabled;
717 } __attribute__((packed));
719 /* Inline functions to manipulate QoS field in data descriptor. */
720 static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
722 u16 val_mask = 0x000f;
723 u16 qos_mask = ~val_mask;
726 return (qos & qos_mask) | (tid & val_mask);
729 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
731 u16 val_mask = 1 << 4;
733 /* End of Service Period Bit 4 */
734 return qos | val_mask;
737 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
741 u16 qos_mask = ~(val_mask << shift);
743 /* Ack Policy Bit 5-6 */
744 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
747 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
749 u16 val_mask = 1 << 7;
751 /* AMSDU present Bit 7 */
752 return qos | val_mask;
755 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
759 u16 qos_mask = ~(val_mask << shift);
761 /* Queue Length Bits 8-15 */
762 return (qos & qos_mask) | ((len & val_mask) << shift);
765 /* DMA header used by firmware and hardware. */
766 struct mwl8k_dma_data {
768 struct ieee80211_hdr wh;
769 } __attribute__((packed));
771 /* Routines to add/remove DMA header from skb. */
772 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
774 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
775 void *dst, *src = &tr->wh;
776 __le16 fc = tr->wh.frame_control;
777 int hdrlen = ieee80211_hdrlen(fc);
778 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
780 dst = (void *)tr + space;
782 memmove(dst, src, hdrlen);
783 skb_pull(skb, space);
789 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
791 struct ieee80211_hdr *wh;
793 struct mwl8k_dma_data *tr;
795 wh = (struct ieee80211_hdr *)skb->data;
796 hdrlen = ieee80211_hdrlen(wh->frame_control);
800 * Copy up/down the 802.11 header; the firmware requires
801 * we present a 2-byte payload length followed by a
802 * 4-address header (w/o QoS), followed (optionally) by
803 * any WEP/ExtIV header (but only filled in for CCMP).
805 if (hdrlen != sizeof(struct mwl8k_dma_data))
806 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
808 tr = (struct mwl8k_dma_data *)skb->data;
810 memmove(&tr->wh, wh, hdrlen);
813 memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
816 * Firmware length is the length of the fully formed "802.11
817 * payload". That is, everything except for the 802.11 header.
818 * This includes all crypto material including the MIC.
820 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
829 #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
830 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
831 #define MWL8K_RX_CTRL_AMPDU 0x01
833 struct mwl8k_rx_desc {
837 __le32 pkt_phys_addr;
838 __le32 next_rx_desc_phys_addr;
848 } __attribute__((packed));
850 #define MWL8K_RX_DESCS 256
851 #define MWL8K_RX_MAXSZ 3800
853 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
855 struct mwl8k_priv *priv = hw->priv;
856 struct mwl8k_rx_queue *rxq = priv->rxq + index;
860 rxq->rx_desc_count = 0;
864 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
867 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
868 if (rxq->rx_desc_area == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
873 memset(rxq->rx_desc_area, 0, size);
875 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
876 sizeof(*rxq->rx_skb), GFP_KERNEL);
877 if (rxq->rx_skb == NULL) {
878 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
880 pci_free_consistent(priv->pdev, size,
881 rxq->rx_desc_area, rxq->rx_desc_dma);
884 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
886 for (i = 0; i < MWL8K_RX_DESCS; i++) {
887 struct mwl8k_rx_desc *rx_desc;
890 rx_desc = rxq->rx_desc_area + i;
891 nexti = (i + 1) % MWL8K_RX_DESCS;
893 rx_desc->next_rx_desc_phys_addr =
894 cpu_to_le32(rxq->rx_desc_dma
895 + nexti * sizeof(*rx_desc));
896 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
902 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
904 struct mwl8k_priv *priv = hw->priv;
905 struct mwl8k_rx_queue *rxq = priv->rxq + index;
909 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
913 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
917 rxq->rx_desc_count++;
920 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
922 rxq->rx_desc_area[rx].pkt_phys_addr =
923 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
924 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
926 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
927 rxq->rx_skb[rx] = skb;
929 rxq->rx_desc_area[rx].rx_ctrl = 0;
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
944 for (i = 0; i < MWL8K_RX_DESCS; i++) {
945 if (rxq->rx_skb[i] != NULL) {
948 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
949 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
951 kfree_skb(rxq->rx_skb[i]);
952 rxq->rx_skb[i] = NULL;
959 pci_free_consistent(priv->pdev,
960 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
961 rxq->rx_desc_area, rxq->rx_desc_dma);
962 rxq->rx_desc_area = NULL;
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
971 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
973 return priv->capture_beacon &&
974 ieee80211_is_beacon(wh->frame_control) &&
975 !compare_ether_addr(wh->addr3, priv->capture_bssid);
978 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
981 priv->capture_beacon = false;
982 memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
985 * Use GFP_ATOMIC as rxq_process is called from
986 * the primary interrupt handler, memory allocation call
989 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
990 if (priv->beacon_skb != NULL)
991 queue_work(priv->config_wq,
992 &priv->finalize_join_worker);
995 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
997 struct mwl8k_priv *priv = hw->priv;
998 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1002 while (rxq->rx_desc_count && limit--) {
1003 struct mwl8k_rx_desc *rx_desc;
1004 struct sk_buff *skb;
1005 struct ieee80211_rx_status status;
1007 struct ieee80211_hdr *wh;
1009 rx_desc = rxq->rx_desc_area + rxq->rx_head;
1010 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
1014 skb = rxq->rx_skb[rxq->rx_head];
1015 rxq->rx_skb[rxq->rx_head] = NULL;
1017 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
1018 rxq->rx_desc_count--;
1020 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
1021 pci_unmap_single(priv->pdev, addr,
1022 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1024 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
1025 if (mwl8k_remove_dma_header(skb)) {
1030 wh = (struct ieee80211_hdr *)skb->data;
1033 * Check for pending join operation. save a copy of
1034 * the beacon and schedule a tasklet to send finalize
1035 * join command to the firmware.
1037 if (mwl8k_capture_bssid(priv, wh))
1038 mwl8k_save_beacon(priv, skb);
1040 memset(&status, 0, sizeof(status));
1042 status.signal = -rx_desc->rssi;
1043 status.noise = -rx_desc->noise_level;
1044 status.qual = rx_desc->link_quality;
1046 status.rate_idx = 1;
1048 status.band = IEEE80211_BAND_2GHZ;
1049 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1050 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1051 ieee80211_rx_irqsafe(hw, skb);
1061 * Packet transmission.
1064 /* Transmit queue assignment. */
1066 MWL8K_WME_AC_BK = 0, /* background access */
1067 MWL8K_WME_AC_BE = 1, /* best effort access */
1068 MWL8K_WME_AC_VI = 2, /* video access */
1069 MWL8K_WME_AC_VO = 3, /* voice access */
1072 /* Transmit packet ACK policy */
1073 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1074 #define MWL8K_TXD_ACK_POLICY_NONE 1
1075 #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
1076 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1078 #define GET_TXQ(_ac) (\
1079 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1080 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1081 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1084 #define MWL8K_TXD_STATUS_IDLE 0x00000000
1085 #define MWL8K_TXD_STATUS_USED 0x00000001
1086 #define MWL8K_TXD_STATUS_OK 0x00000001
1087 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1088 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1089 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1090 #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
1091 #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
1092 #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
1093 #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
1094 #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
1095 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1096 #define MWL8K_TXD_SOFTSTALE 0x80
1097 #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
1099 struct mwl8k_tx_desc {
1104 __le32 pkt_phys_addr;
1106 __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
1107 __le32 next_tx_desc_phys_addr;
1112 } __attribute__((packed));
1114 #define MWL8K_TX_DESCS 128
1116 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1118 struct mwl8k_priv *priv = hw->priv;
1119 struct mwl8k_tx_queue *txq = priv->txq + index;
1123 memset(&txq->tx_stats, 0,
1124 sizeof(struct ieee80211_tx_queue_stats));
1125 txq->tx_stats.limit = MWL8K_TX_DESCS;
1129 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1132 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1133 if (txq->tx_desc_area == NULL) {
1134 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1138 memset(txq->tx_desc_area, 0, size);
1140 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1142 if (txq->tx_skb == NULL) {
1143 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1145 pci_free_consistent(priv->pdev, size,
1146 txq->tx_desc_area, txq->tx_desc_dma);
1149 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1151 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1152 struct mwl8k_tx_desc *tx_desc;
1155 tx_desc = txq->tx_desc_area + i;
1156 nexti = (i + 1) % MWL8K_TX_DESCS;
1158 tx_desc->status = 0;
1159 tx_desc->next_tx_desc_phys_addr =
1160 cpu_to_le32(txq->tx_desc_dma +
1161 nexti * sizeof(*tx_desc));
1167 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1169 iowrite32(MWL8K_H2A_INT_PPA_READY,
1170 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1171 iowrite32(MWL8K_H2A_INT_DUMMY,
1172 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1173 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1176 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1178 return priv->pending_tx_pkts;
1181 struct mwl8k_txq_info {
1190 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1191 struct mwl8k_txq_info txinfo[],
1194 int count, desc, status;
1195 struct mwl8k_tx_queue *txq;
1196 struct mwl8k_tx_desc *tx_desc;
1199 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1200 spin_lock_bh(&priv->tx_lock);
1201 for (count = 0; count < num_queues; count++) {
1202 txq = priv->txq + count;
1203 txinfo[count].len = txq->tx_stats.len;
1204 txinfo[count].head = txq->tx_head;
1205 txinfo[count].tail = txq->tx_tail;
1206 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1207 tx_desc = txq->tx_desc_area + desc;
1208 status = le32_to_cpu(tx_desc->status);
1210 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1211 txinfo[count].fw_owned++;
1213 txinfo[count].drv_owned++;
1215 if (tx_desc->pkt_len == 0)
1216 txinfo[count].unused++;
1219 spin_unlock_bh(&priv->tx_lock);
1224 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1227 unsigned long timeout = 0;
1228 struct mwl8k_priv *priv = hw->priv;
1229 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1233 if (priv->tx_wait != NULL)
1234 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1236 spin_lock_bh(&priv->tx_lock);
1237 count = mwl8k_txq_busy(priv);
1239 priv->tx_wait = &cmd_wait;
1240 if (priv->radio_state)
1241 mwl8k_tx_start(priv);
1243 spin_unlock_bh(&priv->tx_lock);
1246 struct mwl8k_txq_info txinfo[4];
1250 timeout = wait_for_completion_timeout(&cmd_wait,
1251 msecs_to_jiffies(delay_ms));
1255 spin_lock_bh(&priv->tx_lock);
1256 priv->tx_wait = NULL;
1257 newcount = mwl8k_txq_busy(priv);
1258 spin_unlock_bh(&priv->tx_lock);
1260 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1261 __func__, __LINE__, delay_ms, count, newcount);
1263 mwl8k_scan_tx_ring(priv, txinfo, 4);
1264 for (index = 0 ; index < 4; index++)
1266 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1271 txinfo[index].fw_owned,
1272 txinfo[index].drv_owned,
1273 txinfo[index].unused);
1280 #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
1281 MWL8K_TXD_STATUS_OK_RETRY | \
1282 MWL8K_TXD_STATUS_OK_MORE_RETRY)
1283 #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
1284 #define MWL8K_TXD_FAIL_RETRY(stat) \
1285 ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
1287 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1289 struct mwl8k_priv *priv = hw->priv;
1290 struct mwl8k_tx_queue *txq = priv->txq + index;
1293 while (txq->tx_stats.len > 0) {
1296 struct mwl8k_tx_desc *tx_desc;
1299 struct sk_buff *skb;
1300 struct ieee80211_tx_info *info;
1305 tx_desc = txq->tx_desc_area + tx;
1307 status = le32_to_cpu(tx_desc->status);
1309 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1313 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1316 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1317 BUG_ON(txq->tx_stats.len == 0);
1318 txq->tx_stats.len--;
1319 priv->pending_tx_pkts--;
1321 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1322 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1323 skb = txq->tx_skb[tx].skb;
1324 txq->tx_skb[tx].skb = NULL;
1326 BUG_ON(skb == NULL);
1327 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1329 rc = mwl8k_remove_dma_header(skb);
1331 /* Mark descriptor as unused */
1332 tx_desc->pkt_phys_addr = 0;
1333 tx_desc->pkt_len = 0;
1335 if (txq->tx_skb[tx].clone) {
1336 /* Replace with original skb
1337 * before returning to stack
1338 * as buffer has been cloned
1341 skb = txq->tx_skb[tx].clone;
1342 txq->tx_skb[tx].clone = NULL;
1346 /* Something has gone wrong here.
1347 * Failed to remove DMA header.
1348 * Print error message and drop packet.
1350 printk(KERN_ERR "%s: Error removing DMA header from "
1351 "tx skb 0x%p.\n", priv->name, skb);
1357 info = IEEE80211_SKB_CB(skb);
1358 ieee80211_tx_info_clear_status(info);
1360 /* Convert firmware status stuff into tx_status */
1361 if (MWL8K_TXD_SUCCESS(status)) {
1363 info->flags |= IEEE80211_TX_STAT_ACK;
1366 ieee80211_tx_status_irqsafe(hw, skb);
1368 wake = !priv->inconfig && priv->radio_state;
1372 ieee80211_wake_queue(hw, index);
1375 /* must be called only when the card's transmit is completely halted */
1376 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1378 struct mwl8k_priv *priv = hw->priv;
1379 struct mwl8k_tx_queue *txq = priv->txq + index;
1381 mwl8k_txq_reclaim(hw, index, 1);
1386 pci_free_consistent(priv->pdev,
1387 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1388 txq->tx_desc_area, txq->tx_desc_dma);
1389 txq->tx_desc_area = NULL;
1393 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1395 struct mwl8k_priv *priv = hw->priv;
1396 struct ieee80211_tx_info *tx_info;
1397 struct ieee80211_hdr *wh;
1398 struct mwl8k_tx_queue *txq;
1399 struct mwl8k_tx_desc *tx;
1400 struct mwl8k_dma_data *tr;
1401 struct mwl8k_vif *mwl8k_vif;
1402 struct sk_buff *org_skb = skb;
1405 bool qosframe = false, ampduframe = false;
1406 bool mcframe = false, eapolframe = false;
1407 bool amsduframe = false;
1410 txq = priv->txq + index;
1411 tx = txq->tx_desc_area + txq->tx_tail;
1413 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1416 * Append HW DMA header to start of packet. Drop packet if
1417 * there is not enough space or a failure to unshare/unclone
1420 skb = mwl8k_add_dma_header(skb);
1423 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1424 "header, dropping TX frame.\n", priv->name);
1425 dev_kfree_skb(org_skb);
1426 return NETDEV_TX_OK;
1429 tx_info = IEEE80211_SKB_CB(skb);
1430 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1431 tr = (struct mwl8k_dma_data *)skb->data;
1433 fc = wh->frame_control;
1434 qosframe = ieee80211_is_data_qos(fc);
1435 mcframe = is_multicast_ether_addr(wh->addr1);
1436 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1438 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1439 u16 seqno = mwl8k_vif->seqno;
1440 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1441 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1442 mwl8k_vif->seqno = seqno++ % 4096;
1446 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1448 dma = pci_map_single(priv->pdev, skb->data,
1449 skb->len, PCI_DMA_TODEVICE);
1451 if (pci_dma_mapping_error(priv->pdev, dma)) {
1452 printk(KERN_DEBUG "%s: failed to dma map skb, "
1453 "dropping TX frame.\n", priv->name);
1455 if (org_skb != NULL)
1456 dev_kfree_skb(org_skb);
1459 return NETDEV_TX_OK;
1462 /* Set desc header, cpu bit order. */
1465 tx->tx_priority = index;
1466 tx->qos_control = 0;
1468 tx->peer_id = mwl8k_vif->peer_id;
1470 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1472 /* Setup firmware control bit fields for each frame type. */
1473 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1475 qos = mwl8k_qos_setbit_eosp(qos);
1476 /* Set Queue size to unspecified */
1477 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1478 } else if (ieee80211_is_data(fc)) {
1481 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1484 * Tell firmware to not send EAPOL pkts in an
1485 * aggregate. Verify against mac80211 tx path. If
1486 * stack turns off AMPDU for an EAPOL frame this
1487 * check will be removed.
1490 qos = mwl8k_qos_setbit_ack(qos,
1491 MWL8K_TXD_ACK_POLICY_NORMAL);
1493 /* Send pkt in an aggregate if AMPDU frame. */
1495 qos = mwl8k_qos_setbit_ack(qos,
1496 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1498 qos = mwl8k_qos_setbit_ack(qos,
1499 MWL8K_TXD_ACK_POLICY_NORMAL);
1502 qos = mwl8k_qos_setbit_amsdu(qos);
1506 /* Convert to little endian */
1507 tx->qos_control = cpu_to_le16(qos);
1508 tx->status = cpu_to_le32(tx->status);
1509 tx->pkt_phys_addr = cpu_to_le32(dma);
1510 tx->pkt_len = cpu_to_le16(skb->len);
1512 txq->tx_skb[txq->tx_tail].skb = skb;
1513 txq->tx_skb[txq->tx_tail].clone =
1514 skb == org_skb ? NULL : org_skb;
1516 spin_lock_bh(&priv->tx_lock);
1518 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1519 MWL8K_TXD_STATUS_FW_OWNED);
1521 txq->tx_stats.len++;
1522 priv->pending_tx_pkts++;
1523 txq->tx_stats.count++;
1526 if (txq->tx_tail == MWL8K_TX_DESCS)
1528 if (txq->tx_head == txq->tx_tail)
1529 ieee80211_stop_queue(hw, index);
1531 if (priv->inconfig) {
1533 * Silently queue packet when we are in the middle of
1534 * a config cycle. Notify firmware only if we are
1535 * waiting for TXQs to empty. If a packet is sent
1536 * before .config() is complete, perhaps it is better
1537 * to drop the packet, as the channel is being changed
1538 * and the packet will end up on the wrong channel.
1540 printk(KERN_ERR "%s(): WARNING TX activity while "
1541 "in config\n", __func__);
1543 if (priv->tx_wait != NULL)
1544 mwl8k_tx_start(priv);
1546 mwl8k_tx_start(priv);
1548 spin_unlock_bh(&priv->tx_lock);
1550 return NETDEV_TX_OK;
1555 * Command processing.
1558 /* Timeout firmware commands after 2000ms */
1559 #define MWL8K_CMD_TIMEOUT_MS 2000
1561 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1563 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1564 struct mwl8k_priv *priv = hw->priv;
1565 void __iomem *regs = priv->regs;
1566 dma_addr_t dma_addr;
1567 unsigned int dma_size;
1569 u16 __iomem *result;
1570 unsigned long timeout = 0;
1573 cmd->result = 0xFFFF;
1574 dma_size = le16_to_cpu(cmd->length);
1575 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1576 PCI_DMA_BIDIRECTIONAL);
1577 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1580 if (priv->hostcmd_wait != NULL)
1581 printk(KERN_ERR "WARNING host command in progress\n");
1583 spin_lock_irq(&priv->fw_lock);
1584 priv->hostcmd_wait = &cmd_wait;
1585 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1586 iowrite32(MWL8K_H2A_INT_DOORBELL,
1587 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1588 iowrite32(MWL8K_H2A_INT_DUMMY,
1589 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1590 spin_unlock_irq(&priv->fw_lock);
1592 timeout = wait_for_completion_timeout(&cmd_wait,
1593 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1595 result = &cmd->result;
1597 spin_lock_irq(&priv->fw_lock);
1598 priv->hostcmd_wait = NULL;
1599 spin_unlock_irq(&priv->fw_lock);
1600 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1602 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1603 MWL8K_CMD_TIMEOUT_MS);
1606 rc = *result ? -EINVAL : 0;
1608 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1610 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1614 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1615 PCI_DMA_BIDIRECTIONAL);
1622 struct mwl8k_cmd_get_hw_spec {
1623 struct mwl8k_cmd_pkt header;
1625 __u8 host_interface;
1627 __u8 perm_addr[IEEE80211_ADDR_LEN];
1632 __u8 mcs_bitmap[16];
1633 __le32 rx_queue_ptr;
1634 __le32 num_tx_queues;
1635 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1637 __le32 num_tx_desc_per_queue;
1638 __le32 total_rx_desc;
1639 } __attribute__((packed));
1641 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1643 struct mwl8k_priv *priv = hw->priv;
1644 struct mwl8k_cmd_get_hw_spec *cmd;
1648 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1652 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1653 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1655 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1656 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1657 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1658 cmd->num_tx_queues = MWL8K_TX_QUEUES;
1659 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1660 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1661 cmd->num_tx_desc_per_queue = MWL8K_TX_DESCS;
1662 cmd->total_rx_desc = MWL8K_RX_DESCS;
1664 rc = mwl8k_post_cmd(hw, &cmd->header);
1667 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1668 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1669 priv->fw_rev = cmd->fw_rev;
1670 priv->hw_rev = cmd->hw_rev;
1671 priv->region_code = le16_to_cpu(cmd->region_code);
1679 * CMD_MAC_MULTICAST_ADR.
1681 struct mwl8k_cmd_mac_multicast_adr {
1682 struct mwl8k_cmd_pkt header;
1685 __u8 addr[1][IEEE80211_ADDR_LEN];
1688 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1689 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1691 struct dev_addr_list *mclist)
1693 struct mwl8k_cmd_mac_multicast_adr *cmd;
1696 int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
1697 cmd = kzalloc(size, GFP_KERNEL);
1701 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1702 cmd->header.length = cpu_to_le16(size);
1703 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1704 cmd->numaddr = cpu_to_le16(mc_count);
1705 while ((index < mc_count) && mclist) {
1706 if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
1708 goto mwl8k_cmd_mac_multicast_adr_exit;
1710 memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
1712 mclist = mclist->next;
1715 rc = mwl8k_post_cmd(hw, &cmd->header);
1717 mwl8k_cmd_mac_multicast_adr_exit:
1723 * CMD_802_11_GET_STAT.
1725 struct mwl8k_cmd_802_11_get_stat {
1726 struct mwl8k_cmd_pkt header;
1729 } __attribute__((packed));
1731 #define MWL8K_STAT_ACK_FAILURE 9
1732 #define MWL8K_STAT_RTS_FAILURE 12
1733 #define MWL8K_STAT_FCS_ERROR 24
1734 #define MWL8K_STAT_RTS_SUCCESS 11
1736 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1737 struct ieee80211_low_level_stats *stats)
1739 struct mwl8k_cmd_802_11_get_stat *cmd;
1742 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1746 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1747 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1748 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1750 rc = mwl8k_post_cmd(hw, &cmd->header);
1752 stats->dot11ACKFailureCount =
1753 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1754 stats->dot11RTSFailureCount =
1755 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1756 stats->dot11FCSErrorCount =
1757 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1758 stats->dot11RTSSuccessCount =
1759 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1767 * CMD_802_11_RADIO_CONTROL.
1769 struct mwl8k_cmd_802_11_radio_control {
1770 struct mwl8k_cmd_pkt header;
1774 } __attribute__((packed));
1776 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1778 struct mwl8k_priv *priv = hw->priv;
1779 struct mwl8k_cmd_802_11_radio_control *cmd;
1782 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1783 !(enable & MWL8K_RADIO_FORCE))
1786 enable &= MWL8K_RADIO_ENABLE;
1788 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1792 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1793 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1794 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1795 cmd->control = cpu_to_le16(priv->radio_preamble);
1796 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1798 rc = mwl8k_post_cmd(hw, &cmd->header);
1802 priv->radio_state = enable;
1808 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1810 struct mwl8k_priv *priv;
1812 if (hw == NULL || hw->priv == NULL)
1816 priv->radio_preamble = (short_preamble ?
1817 MWL8K_RADIO_SHORT_PREAMBLE :
1818 MWL8K_RADIO_LONG_PREAMBLE);
1820 return mwl8k_cmd_802_11_radio_control(hw,
1821 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1825 * CMD_802_11_RF_TX_POWER.
1827 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1829 struct mwl8k_cmd_802_11_rf_tx_power {
1830 struct mwl8k_cmd_pkt header;
1832 __le16 support_level;
1833 __le16 current_level;
1835 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1836 } __attribute__((packed));
1838 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1840 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1843 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1847 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1848 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1849 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1850 cmd->support_level = cpu_to_le16(dBm);
1852 rc = mwl8k_post_cmd(hw, &cmd->header);
1861 struct mwl8k_cmd_set_pre_scan {
1862 struct mwl8k_cmd_pkt header;
1863 } __attribute__((packed));
1865 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1867 struct mwl8k_cmd_set_pre_scan *cmd;
1870 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1874 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1875 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1877 rc = mwl8k_post_cmd(hw, &cmd->header);
1884 * CMD_SET_POST_SCAN.
1886 struct mwl8k_cmd_set_post_scan {
1887 struct mwl8k_cmd_pkt header;
1889 __u8 bssid[IEEE80211_ADDR_LEN];
1890 } __attribute__((packed));
1893 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
1895 struct mwl8k_cmd_set_post_scan *cmd;
1898 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1902 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1903 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1905 memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
1907 rc = mwl8k_post_cmd(hw, &cmd->header);
1914 * CMD_SET_RF_CHANNEL.
1916 struct mwl8k_cmd_set_rf_channel {
1917 struct mwl8k_cmd_pkt header;
1919 __u8 current_channel;
1920 __le32 channel_flags;
1921 } __attribute__((packed));
1923 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1924 struct ieee80211_channel *channel)
1926 struct mwl8k_cmd_set_rf_channel *cmd;
1929 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1933 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1934 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1935 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1936 cmd->current_channel = channel->hw_value;
1937 if (channel->band == IEEE80211_BAND_2GHZ)
1938 cmd->channel_flags = cpu_to_le32(0x00000081);
1940 cmd->channel_flags = cpu_to_le32(0x00000000);
1942 rc = mwl8k_post_cmd(hw, &cmd->header);
1951 struct mwl8k_cmd_set_slot {
1952 struct mwl8k_cmd_pkt header;
1955 } __attribute__((packed));
1957 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1959 struct mwl8k_cmd_set_slot *cmd;
1962 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1966 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1967 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1968 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1969 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1971 rc = mwl8k_post_cmd(hw, &cmd->header);
1980 struct mwl8k_cmd_mimo_config {
1981 struct mwl8k_cmd_pkt header;
1983 __u8 rx_antenna_map;
1984 __u8 tx_antenna_map;
1985 } __attribute__((packed));
1987 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1989 struct mwl8k_cmd_mimo_config *cmd;
1992 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1996 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1997 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1998 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1999 cmd->rx_antenna_map = rx;
2000 cmd->tx_antenna_map = tx;
2002 rc = mwl8k_post_cmd(hw, &cmd->header);
2009 * CMD_ENABLE_SNIFFER.
2011 struct mwl8k_cmd_enable_sniffer {
2012 struct mwl8k_cmd_pkt header;
2014 } __attribute__((packed));
2016 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2018 struct mwl8k_cmd_enable_sniffer *cmd;
2021 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2025 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2026 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2027 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
2029 rc = mwl8k_post_cmd(hw, &cmd->header);
2036 * CMD_SET_RATE_ADAPT_MODE.
2038 struct mwl8k_cmd_set_rate_adapt_mode {
2039 struct mwl8k_cmd_pkt header;
2042 } __attribute__((packed));
2044 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2046 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2049 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2053 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2054 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2055 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2056 cmd->mode = cpu_to_le16(mode);
2058 rc = mwl8k_post_cmd(hw, &cmd->header);
2067 struct mwl8k_cmd_set_wmm {
2068 struct mwl8k_cmd_pkt header;
2070 } __attribute__((packed));
2072 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2074 struct mwl8k_priv *priv = hw->priv;
2075 struct mwl8k_cmd_set_wmm *cmd;
2078 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2082 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2083 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2084 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2086 rc = mwl8k_post_cmd(hw, &cmd->header);
2090 priv->wmm_mode = enable;
2096 * CMD_SET_RTS_THRESHOLD.
2098 struct mwl8k_cmd_rts_threshold {
2099 struct mwl8k_cmd_pkt header;
2102 } __attribute__((packed));
2104 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2105 u16 action, u16 *threshold)
2107 struct mwl8k_cmd_rts_threshold *cmd;
2110 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2114 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2115 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2116 cmd->action = cpu_to_le16(action);
2117 cmd->threshold = cpu_to_le16(*threshold);
2119 rc = mwl8k_post_cmd(hw, &cmd->header);
2126 * CMD_SET_EDCA_PARAMS.
2128 struct mwl8k_cmd_set_edca_params {
2129 struct mwl8k_cmd_pkt header;
2131 /* See MWL8K_SET_EDCA_XXX below */
2134 /* TX opportunity in units of 32 us */
2137 /* Log exponent of max contention period: 0...15*/
2140 /* Log exponent of min contention period: 0...15 */
2143 /* Adaptive interframe spacing in units of 32us */
2146 /* TX queue to configure */
2148 } __attribute__((packed));
2150 #define MWL8K_GET_EDCA_ALL 0
2151 #define MWL8K_SET_EDCA_CW 0x01
2152 #define MWL8K_SET_EDCA_TXOP 0x02
2153 #define MWL8K_SET_EDCA_AIFS 0x04
2155 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2156 MWL8K_SET_EDCA_TXOP | \
2157 MWL8K_SET_EDCA_AIFS)
2160 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2161 __u16 cw_min, __u16 cw_max,
2162 __u8 aifs, __u16 txop)
2164 struct mwl8k_cmd_set_edca_params *cmd;
2165 u32 log_cw_min, log_cw_max;
2168 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2172 log_cw_min = ilog2(cw_min+1);
2173 log_cw_max = ilog2(cw_max+1);
2174 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2175 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2177 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2178 cmd->txop = cpu_to_le16(txop);
2179 cmd->log_cw_max = (u8)log_cw_max;
2180 cmd->log_cw_min = (u8)log_cw_min;
2184 rc = mwl8k_post_cmd(hw, &cmd->header);
2191 * CMD_FINALIZE_JOIN.
2194 /* FJ beacon buffer size is compiled into the firmware. */
2195 #define MWL8K_FJ_BEACON_MAXLEN 128
2197 struct mwl8k_cmd_finalize_join {
2198 struct mwl8k_cmd_pkt header;
2199 __le32 sleep_interval; /* Number of beacon periods to sleep */
2200 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2201 } __attribute__((packed));
2203 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2204 __u16 framelen, __u16 dtim)
2206 struct mwl8k_cmd_finalize_join *cmd;
2207 struct ieee80211_mgmt *payload = frame;
2215 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2219 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2220 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2223 cmd->sleep_interval = cpu_to_le32(dtim);
2225 cmd->sleep_interval = cpu_to_le32(1);
2227 hdrlen = ieee80211_hdrlen(payload->frame_control);
2229 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2231 /* XXX TBD Might just have to abort and return an error */
2232 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2233 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2234 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2235 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2237 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2238 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2240 if (payload && payload_len)
2241 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2243 rc = mwl8k_post_cmd(hw, &cmd->header);
2251 struct mwl8k_cmd_update_sta_db {
2252 struct mwl8k_cmd_pkt header;
2254 /* See STADB_ACTION_TYPE */
2257 /* Peer MAC address */
2258 __u8 peer_addr[IEEE80211_ADDR_LEN];
2262 /* Peer info - valid during add/update. */
2263 struct peer_capability_info peer_info;
2264 } __attribute__((packed));
2266 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2267 struct ieee80211_vif *vif, __u32 action)
2269 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2270 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2271 struct mwl8k_cmd_update_sta_db *cmd;
2272 struct peer_capability_info *peer_info;
2273 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2277 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2281 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2282 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2284 cmd->action = cpu_to_le32(action);
2285 peer_info = &cmd->peer_info;
2286 memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
2289 case MWL8K_STA_DB_ADD_ENTRY:
2290 case MWL8K_STA_DB_MODIFY_ENTRY:
2291 /* Build peer_info block */
2292 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2293 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2294 peer_info->interop = 1;
2295 peer_info->amsdu_enabled = 0;
2297 rates = peer_info->legacy_rates;
2298 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2299 rates[count] = bitrates[count].hw_value;
2301 rc = mwl8k_post_cmd(hw, &cmd->header);
2303 mv_vif->peer_id = peer_info->station_id;
2307 case MWL8K_STA_DB_DEL_ENTRY:
2308 case MWL8K_STA_DB_FLUSH:
2310 rc = mwl8k_post_cmd(hw, &cmd->header);
2312 mv_vif->peer_id = 0;
2323 #define IEEE80211_OPMODE_DISABLED 0x00
2324 #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
2325 #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
2326 #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
2328 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2330 #define MWL8K_FRAME_PROT_DISABLED 0x00
2331 #define MWL8K_FRAME_PROT_11G 0x07
2332 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2333 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2334 #define MWL8K_FRAME_PROT_MASK 0x07
2336 struct mwl8k_cmd_update_set_aid {
2337 struct mwl8k_cmd_pkt header;
2340 /* AP's MAC address (BSSID) */
2341 __u8 bssid[IEEE80211_ADDR_LEN];
2342 __le16 protection_mode;
2343 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2344 } __attribute__((packed));
2346 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2347 struct ieee80211_vif *vif)
2349 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2350 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2351 struct mwl8k_cmd_update_set_aid *cmd;
2352 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2357 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2361 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2362 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2363 cmd->aid = cpu_to_le16(info->aid);
2365 memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
2367 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2369 if (info->use_cts_prot) {
2370 prot_mode = MWL8K_FRAME_PROT_11G;
2372 switch (info->ht_operation_mode &
2373 IEEE80211_HT_OP_MODE_PROTECTION) {
2374 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2375 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2377 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2378 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2381 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2386 cmd->protection_mode = cpu_to_le16(prot_mode);
2388 for (count = 0; count < mv_vif->legacy_nrates; count++)
2389 cmd->supp_rates[count] = bitrates[count].hw_value;
2391 rc = mwl8k_post_cmd(hw, &cmd->header);
2400 struct mwl8k_cmd_update_rateset {
2401 struct mwl8k_cmd_pkt header;
2402 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2404 /* Bitmap for supported MCS codes. */
2405 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2406 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2407 } __attribute__((packed));
2409 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2410 struct ieee80211_vif *vif)
2412 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2413 struct mwl8k_cmd_update_rateset *cmd;
2414 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2418 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2422 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2423 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2425 for (count = 0; count < mv_vif->legacy_nrates; count++)
2426 cmd->legacy_rates[count] = bitrates[count].hw_value;
2428 rc = mwl8k_post_cmd(hw, &cmd->header);
2435 * CMD_USE_FIXED_RATE.
2437 #define MWL8K_RATE_TABLE_SIZE 8
2438 #define MWL8K_UCAST_RATE 0
2439 #define MWL8K_MCAST_RATE 1
2440 #define MWL8K_BCAST_RATE 2
2442 #define MWL8K_USE_FIXED_RATE 0x0001
2443 #define MWL8K_USE_AUTO_RATE 0x0002
2445 struct mwl8k_rate_entry {
2446 /* Set to 1 if HT rate, 0 if legacy. */
2449 /* Set to 1 to use retry_count field. */
2450 __le32 enable_retry;
2452 /* Specified legacy rate or MCS. */
2455 /* Number of allowed retries. */
2457 } __attribute__((packed));
2459 struct mwl8k_rate_table {
2460 /* 1 to allow specified rate and below */
2461 __le32 allow_rate_drop;
2463 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2464 } __attribute__((packed));
2466 struct mwl8k_cmd_use_fixed_rate {
2467 struct mwl8k_cmd_pkt header;
2469 struct mwl8k_rate_table rate_table;
2471 /* Unicast, Broadcast or Multicast */
2475 } __attribute__((packed));
2477 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2478 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2480 struct mwl8k_cmd_use_fixed_rate *cmd;
2484 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2488 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2489 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2491 cmd->action = cpu_to_le32(action);
2492 cmd->rate_type = cpu_to_le32(rate_type);
2494 if (rate_table != NULL) {
2495 /* Copy over each field manually so
2496 * that bitflipping can be done
2498 cmd->rate_table.allow_rate_drop =
2499 cpu_to_le32(rate_table->allow_rate_drop);
2500 cmd->rate_table.num_rates =
2501 cpu_to_le32(rate_table->num_rates);
2503 for (count = 0; count < rate_table->num_rates; count++) {
2504 struct mwl8k_rate_entry *dst =
2505 &cmd->rate_table.rate_entry[count];
2506 struct mwl8k_rate_entry *src =
2507 &rate_table->rate_entry[count];
2509 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2510 dst->enable_retry = cpu_to_le32(src->enable_retry);
2511 dst->rate = cpu_to_le32(src->rate);
2512 dst->retry_count = cpu_to_le32(src->retry_count);
2516 rc = mwl8k_post_cmd(hw, &cmd->header);
2524 * Interrupt handling.
2526 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2528 struct ieee80211_hw *hw = dev_id;
2529 struct mwl8k_priv *priv = hw->priv;
2532 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2533 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2535 status &= priv->int_mask;
2539 if (status & MWL8K_A2H_INT_TX_DONE)
2540 tasklet_schedule(&priv->tx_reclaim_task);
2542 if (status & MWL8K_A2H_INT_RX_READY) {
2543 while (rxq_process(hw, 0, 1))
2544 rxq_refill(hw, 0, 1);
2547 if (status & MWL8K_A2H_INT_OPC_DONE) {
2548 if (priv->hostcmd_wait != NULL) {
2549 complete(priv->hostcmd_wait);
2550 priv->hostcmd_wait = NULL;
2554 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2555 if (!priv->inconfig &&
2556 priv->radio_state &&
2557 mwl8k_txq_busy(priv))
2558 mwl8k_tx_start(priv);
2566 * Core driver operations.
2568 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2570 struct mwl8k_priv *priv = hw->priv;
2571 int index = skb_get_queue_mapping(skb);
2574 if (priv->current_channel == NULL) {
2575 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2576 "disabled\n", priv->name);
2578 return NETDEV_TX_OK;
2581 rc = mwl8k_txq_xmit(hw, index, skb);
2586 struct mwl8k_work_struct {
2587 /* Initialized by mwl8k_queue_work(). */
2588 struct work_struct wt;
2590 /* Required field passed in to mwl8k_queue_work(). */
2591 struct ieee80211_hw *hw;
2593 /* Required field passed in to mwl8k_queue_work(). */
2594 int (*wfunc)(struct work_struct *w);
2596 /* Initialized by mwl8k_queue_work(). */
2597 struct completion *cmd_wait;
2603 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2604 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2608 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2609 unsigned long timeout_ms;
2611 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2612 u32 txwait_attempts;
2614 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2619 /* Flags controlling behavior of config queue requests */
2621 /* Caller spins while waiting for completion. */
2622 #define MWL8K_WQ_SPIN 0x00000001
2624 /* Wait for TX queues to empty before proceeding with configuration. */
2625 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2627 /* Queue request and return immediately. */
2628 #define MWL8K_WQ_POST_REQUEST 0x00000004
2631 * Caller sleeps and waits for task complete notification.
2632 * Do not use in atomic context.
2634 #define MWL8K_WQ_SLEEP 0x00000008
2636 /* Free work struct when task is done. */
2637 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2640 * Config request is queued and returns to caller imediately. Use
2641 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2642 * when this flag is set.
2644 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2645 MWL8K_WQ_FREE_WORKSTRUCT)
2647 /* Default work queue behavior is to sleep and wait for tx completion. */
2648 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2651 * Default config request timeout. Add adjustments to make sure the
2652 * config thread waits long enough for both tx wait and cmd wait before
2656 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2657 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2659 /* Default number of TX wait attempts. */
2660 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2662 /* Total time to wait for TXQ to drain. */
2663 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2664 MWL8K_WQ_TXWAIT_ATTEMPTS)
2666 /* Scheduling slop. */
2667 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2669 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2671 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2673 static void mwl8k_config_thread(struct work_struct *wt)
2675 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2676 struct ieee80211_hw *hw = worker->hw;
2677 struct mwl8k_priv *priv = hw->priv;
2680 spin_lock_irq(&priv->tx_lock);
2681 priv->inconfig = true;
2682 spin_unlock_irq(&priv->tx_lock);
2684 ieee80211_stop_queues(hw);
2687 * Wait for host queues to drain before doing PHY
2688 * reconfiguration. This avoids interrupting any in-flight
2689 * DMA transfers to the hardware.
2691 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2695 u32 tx_wait_attempts = worker->txwait_attempts;
2697 time_remaining = worker->tx_timeout_ms;
2698 if (!tx_wait_attempts)
2699 tx_wait_attempts = 1;
2701 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2705 iter = tx_wait_attempts;
2709 if (time_remaining > timeout) {
2710 time_remaining -= timeout;
2711 wait_time = timeout;
2713 wait_time = time_remaining;
2718 rc = mwl8k_tx_wait_empty(hw, wait_time);
2720 printk(KERN_ERR "%s() txwait timeout=%ums "
2721 "Retry:%u/%u\n", __func__, timeout,
2722 tx_wait_attempts - iter + 1,
2725 } while (rc && --iter);
2727 rc = iter ? 0 : -ETIMEDOUT;
2730 rc = worker->wfunc(wt);
2732 spin_lock_irq(&priv->tx_lock);
2733 priv->inconfig = false;
2734 if (priv->pending_tx_pkts && priv->radio_state)
2735 mwl8k_tx_start(priv);
2736 spin_unlock_irq(&priv->tx_lock);
2737 ieee80211_wake_queues(hw);
2740 if (worker->options & MWL8K_WQ_SLEEP)
2741 complete(worker->cmd_wait);
2743 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2747 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2748 struct mwl8k_work_struct *worker,
2749 struct workqueue_struct *wqueue,
2750 int (*wfunc)(struct work_struct *w))
2752 unsigned long timeout = 0;
2755 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2757 if (!worker->timeout_ms)
2758 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2760 if (!worker->options)
2761 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2763 if (!worker->txwait_attempts)
2764 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2766 if (!worker->tx_timeout_ms)
2767 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2770 worker->cmd_wait = &cmd_wait;
2772 worker->wfunc = wfunc;
2774 INIT_WORK(&worker->wt, mwl8k_config_thread);
2775 queue_work(wqueue, &worker->wt);
2777 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2780 if (worker->options & MWL8K_WQ_SPIN) {
2781 timeout = worker->timeout_ms;
2782 while (timeout && (worker->rc > 0)) {
2786 } else if (worker->options & MWL8K_WQ_SLEEP)
2787 timeout = wait_for_completion_timeout(&cmd_wait,
2788 msecs_to_jiffies(worker->timeout_ms));
2793 cancel_work_sync(&worker->wt);
2801 struct mwl8k_start_worker {
2802 struct mwl8k_work_struct header;
2805 static int mwl8k_start_wt(struct work_struct *wt)
2807 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2808 struct ieee80211_hw *hw = worker->header.hw;
2809 struct mwl8k_priv *priv = hw->priv;
2812 if (priv->vif != NULL) {
2814 goto mwl8k_start_exit;
2818 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2820 goto mwl8k_start_exit;
2823 /* Purge TX/RX HW queues */
2824 if (mwl8k_cmd_set_pre_scan(hw)) {
2826 goto mwl8k_start_exit;
2829 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2831 goto mwl8k_start_exit;
2834 /* Enable firmware rate adaptation */
2835 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2837 goto mwl8k_start_exit;
2840 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2841 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2843 goto mwl8k_start_exit;
2846 /* Disable sniffer mode */
2847 if (mwl8k_enable_sniffer(hw, 0))
2854 static int mwl8k_start(struct ieee80211_hw *hw)
2856 struct mwl8k_start_worker *worker;
2857 struct mwl8k_priv *priv = hw->priv;
2860 /* Enable tx reclaim tasklet */
2861 tasklet_enable(&priv->tx_reclaim_task);
2863 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2864 IRQF_SHARED, MWL8K_NAME, hw);
2866 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2869 goto mwl8k_start_disable_tasklet;
2872 /* Enable interrupts */
2873 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2875 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2876 if (worker == NULL) {
2878 goto mwl8k_start_disable_irq;
2881 rc = mwl8k_queue_work(hw, &worker->header,
2882 priv->config_wq, mwl8k_start_wt);
2887 if (rc == -ETIMEDOUT)
2888 printk(KERN_ERR "%s() timed out\n", __func__);
2892 mwl8k_start_disable_irq:
2893 spin_lock_irq(&priv->tx_lock);
2894 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2895 spin_unlock_irq(&priv->tx_lock);
2896 free_irq(priv->pdev->irq, hw);
2898 mwl8k_start_disable_tasklet:
2899 tasklet_disable(&priv->tx_reclaim_task);
2904 struct mwl8k_stop_worker {
2905 struct mwl8k_work_struct header;
2908 static int mwl8k_stop_wt(struct work_struct *wt)
2910 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2911 struct ieee80211_hw *hw = worker->header.hw;
2914 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2919 static void mwl8k_stop(struct ieee80211_hw *hw)
2922 struct mwl8k_stop_worker *worker;
2923 struct mwl8k_priv *priv = hw->priv;
2926 if (priv->vif != NULL)
2929 ieee80211_stop_queues(hw);
2931 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2935 rc = mwl8k_queue_work(hw, &worker->header,
2936 priv->config_wq, mwl8k_stop_wt);
2938 if (rc == -ETIMEDOUT)
2939 printk(KERN_ERR "%s() timed out\n", __func__);
2941 /* Disable interrupts */
2942 spin_lock_irq(&priv->tx_lock);
2943 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2944 spin_unlock_irq(&priv->tx_lock);
2945 free_irq(priv->pdev->irq, hw);
2947 /* Stop finalize join worker */
2948 cancel_work_sync(&priv->finalize_join_worker);
2949 if (priv->beacon_skb != NULL)
2950 dev_kfree_skb(priv->beacon_skb);
2952 /* Stop tx reclaim tasklet */
2953 tasklet_disable(&priv->tx_reclaim_task);
2955 /* Stop config thread */
2956 flush_workqueue(priv->config_wq);
2958 /* Return all skbs to mac80211 */
2959 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2960 mwl8k_txq_reclaim(hw, i, 1);
2963 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2964 struct ieee80211_if_init_conf *conf)
2966 struct mwl8k_priv *priv = hw->priv;
2967 struct mwl8k_vif *mwl8k_vif;
2970 * We only support one active interface at a time.
2972 if (priv->vif != NULL)
2976 * We only support managed interfaces for now.
2978 if (conf->type != NL80211_IFTYPE_STATION &&
2979 conf->type != NL80211_IFTYPE_MONITOR)
2982 /* Clean out driver private area */
2983 mwl8k_vif = MWL8K_VIF(conf->vif);
2984 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2986 /* Save the mac address */
2987 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
2989 /* Back pointer to parent config block */
2990 mwl8k_vif->priv = priv;
2992 /* Setup initial PHY parameters */
2993 memcpy(mwl8k_vif->legacy_rates ,
2994 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2995 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2997 /* Set Initial sequence number to zero */
2998 mwl8k_vif->seqno = 0;
3000 priv->vif = conf->vif;
3001 priv->current_channel = NULL;
3006 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3007 struct ieee80211_if_init_conf *conf)
3009 struct mwl8k_priv *priv = hw->priv;
3011 if (priv->vif == NULL)
3017 struct mwl8k_config_worker {
3018 struct mwl8k_work_struct header;
3022 static int mwl8k_config_wt(struct work_struct *wt)
3024 struct mwl8k_config_worker *worker =
3025 (struct mwl8k_config_worker *)wt;
3026 struct ieee80211_hw *hw = worker->header.hw;
3027 struct ieee80211_conf *conf = &hw->conf;
3028 struct mwl8k_priv *priv = hw->priv;
3031 if (!conf->radio_enabled) {
3032 mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3033 priv->current_channel = NULL;
3035 goto mwl8k_config_exit;
3038 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
3040 goto mwl8k_config_exit;
3043 priv->current_channel = conf->channel;
3045 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
3047 goto mwl8k_config_exit;
3050 if (conf->power_level > 18)
3051 conf->power_level = 18;
3052 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
3054 goto mwl8k_config_exit;
3057 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3064 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3067 struct mwl8k_config_worker *worker;
3068 struct mwl8k_priv *priv = hw->priv;
3070 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3074 worker->changed = changed;
3075 rc = mwl8k_queue_work(hw, &worker->header,
3076 priv->config_wq, mwl8k_config_wt);
3077 if (rc == -ETIMEDOUT) {
3078 printk(KERN_ERR "%s() timed out.\n", __func__);
3085 * mac80211 will crash on anything other than -EINVAL on
3086 * error. Looks like wireless extensions which calls mac80211
3087 * may be the actual culprit...
3089 return rc ? -EINVAL : 0;
3092 struct mwl8k_bss_info_changed_worker {
3093 struct mwl8k_work_struct header;
3094 struct ieee80211_vif *vif;
3095 struct ieee80211_bss_conf *info;
3099 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3101 struct mwl8k_bss_info_changed_worker *worker =
3102 (struct mwl8k_bss_info_changed_worker *)wt;
3103 struct ieee80211_hw *hw = worker->header.hw;
3104 struct ieee80211_vif *vif = worker->vif;
3105 struct ieee80211_bss_conf *info = worker->info;
3109 struct mwl8k_priv *priv = hw->priv;
3110 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3112 changed = worker->changed;
3113 priv->capture_beacon = false;
3116 memcpy(&mwl8k_vif->bss_info, info,
3117 sizeof(struct ieee80211_bss_conf));
3120 if (mwl8k_update_rateset(hw, vif))
3121 goto mwl8k_bss_info_changed_exit;
3123 /* Turn on rate adaptation */
3124 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3125 MWL8K_UCAST_RATE, NULL))
3126 goto mwl8k_bss_info_changed_exit;
3128 /* Set radio preamble */
3129 if (mwl8k_set_radio_preamble(hw,
3130 info->use_short_preamble))
3131 goto mwl8k_bss_info_changed_exit;
3134 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3135 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3136 goto mwl8k_bss_info_changed_exit;
3138 /* Update peer rate info */
3139 if (mwl8k_cmd_update_sta_db(hw, vif,
3140 MWL8K_STA_DB_MODIFY_ENTRY))
3141 goto mwl8k_bss_info_changed_exit;
3144 if (mwl8k_cmd_set_aid(hw, vif))
3145 goto mwl8k_bss_info_changed_exit;
3148 * Finalize the join. Tell rx handler to process
3149 * next beacon from our BSSID.
3151 memcpy(priv->capture_bssid,
3152 mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
3153 priv->capture_beacon = true;
3155 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3156 memset(&mwl8k_vif->bss_info, 0,
3157 sizeof(struct ieee80211_bss_conf));
3158 memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
3161 mwl8k_bss_info_changed_exit:
3166 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3167 struct ieee80211_vif *vif,
3168 struct ieee80211_bss_conf *info,
3171 struct mwl8k_bss_info_changed_worker *worker;
3172 struct mwl8k_priv *priv = hw->priv;
3173 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3176 if (changed & BSS_CHANGED_BSSID)
3177 memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
3179 if ((changed & BSS_CHANGED_ASSOC) == 0)
3182 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3187 worker->info = info;
3188 worker->changed = changed;
3189 rc = mwl8k_queue_work(hw, &worker->header,
3191 mwl8k_bss_info_changed_wt);
3193 if (rc == -ETIMEDOUT)
3194 printk(KERN_ERR "%s() timed out\n", __func__);
3197 struct mwl8k_configure_filter_worker {
3198 struct mwl8k_work_struct header;
3199 unsigned int changed_flags;
3200 unsigned int *total_flags;
3202 struct dev_addr_list *mclist;
3205 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3207 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3209 struct mwl8k_configure_filter_worker *worker =
3210 (struct mwl8k_configure_filter_worker *)wt;
3212 struct ieee80211_hw *hw = worker->header.hw;
3213 unsigned int changed_flags = worker->changed_flags;
3214 unsigned int *total_flags = worker->total_flags;
3215 int mc_count = worker->mc_count;
3216 struct dev_addr_list *mclist = worker->mclist;
3218 struct mwl8k_priv *priv = hw->priv;
3219 struct mwl8k_vif *mv_vif;
3222 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3223 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3224 rc = mwl8k_cmd_set_pre_scan(hw);
3226 mv_vif = MWL8K_VIF(priv->vif);
3227 rc = mwl8k_cmd_set_post_scan(hw, mv_vif->bssid);
3232 goto mwl8k_configure_filter_exit;
3234 mc_count = mc_count < priv->num_mcaddrs ?
3235 mc_count : priv->num_mcaddrs;
3236 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3239 "%s()Error setting multicast addresses\n",
3243 mwl8k_configure_filter_exit:
3247 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3248 unsigned int changed_flags,
3249 unsigned int *total_flags,
3251 struct dev_addr_list *mclist)
3254 struct mwl8k_configure_filter_worker *worker;
3255 struct mwl8k_priv *priv = hw->priv;
3257 /* Clear unsupported feature flags */
3258 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3260 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
3263 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3267 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3268 worker->changed_flags = changed_flags;
3269 worker->total_flags = total_flags;
3270 worker->mc_count = mc_count;
3271 worker->mclist = mclist;
3273 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3274 mwl8k_configure_filter_wt);
3277 struct mwl8k_set_rts_threshold_worker {
3278 struct mwl8k_work_struct header;
3282 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3284 struct mwl8k_set_rts_threshold_worker *worker =
3285 (struct mwl8k_set_rts_threshold_worker *)wt;
3287 struct ieee80211_hw *hw = worker->header.hw;
3288 u16 threshold = (u16)(worker->value);
3291 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3296 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3299 struct mwl8k_set_rts_threshold_worker *worker;
3300 struct mwl8k_priv *priv = hw->priv;
3302 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3306 worker->value = value;
3308 rc = mwl8k_queue_work(hw, &worker->header,
3310 mwl8k_set_rts_threshold_wt);
3313 if (rc == -ETIMEDOUT) {
3314 printk(KERN_ERR "%s() timed out\n", __func__);
3321 struct mwl8k_conf_tx_worker {
3322 struct mwl8k_work_struct header;
3324 const struct ieee80211_tx_queue_params *params;
3327 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3329 struct mwl8k_conf_tx_worker *worker =
3330 (struct mwl8k_conf_tx_worker *)wt;
3332 struct ieee80211_hw *hw = worker->header.hw;
3333 u16 queue = worker->queue;
3334 const struct ieee80211_tx_queue_params *params = worker->params;
3336 struct mwl8k_priv *priv = hw->priv;
3339 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3340 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3342 goto mwl8k_conf_tx_exit;
3345 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3346 params->cw_max, params->aifs, params->txop))
3352 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3353 const struct ieee80211_tx_queue_params *params)
3356 struct mwl8k_conf_tx_worker *worker;
3357 struct mwl8k_priv *priv = hw->priv;
3359 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3363 worker->queue = queue;
3364 worker->params = params;
3365 rc = mwl8k_queue_work(hw, &worker->header,
3366 priv->config_wq, mwl8k_conf_tx_wt);
3368 if (rc == -ETIMEDOUT) {
3369 printk(KERN_ERR "%s() timed out\n", __func__);
3375 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3376 struct ieee80211_tx_queue_stats *stats)
3378 struct mwl8k_priv *priv = hw->priv;
3379 struct mwl8k_tx_queue *txq;
3382 spin_lock_bh(&priv->tx_lock);
3383 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3384 txq = priv->txq + index;
3385 memcpy(&stats[index], &txq->tx_stats,
3386 sizeof(struct ieee80211_tx_queue_stats));
3388 spin_unlock_bh(&priv->tx_lock);
3392 struct mwl8k_get_stats_worker {
3393 struct mwl8k_work_struct header;
3394 struct ieee80211_low_level_stats *stats;
3397 static int mwl8k_get_stats_wt(struct work_struct *wt)
3399 struct mwl8k_get_stats_worker *worker =
3400 (struct mwl8k_get_stats_worker *)wt;
3402 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3405 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3406 struct ieee80211_low_level_stats *stats)
3409 struct mwl8k_get_stats_worker *worker;
3410 struct mwl8k_priv *priv = hw->priv;
3412 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3416 worker->stats = stats;
3417 rc = mwl8k_queue_work(hw, &worker->header,
3418 priv->config_wq, mwl8k_get_stats_wt);
3421 if (rc == -ETIMEDOUT) {
3422 printk(KERN_ERR "%s() timed out\n", __func__);
3429 static const struct ieee80211_ops mwl8k_ops = {
3431 .start = mwl8k_start,
3433 .add_interface = mwl8k_add_interface,
3434 .remove_interface = mwl8k_remove_interface,
3435 .config = mwl8k_config,
3436 .bss_info_changed = mwl8k_bss_info_changed,
3437 .configure_filter = mwl8k_configure_filter,
3438 .set_rts_threshold = mwl8k_set_rts_threshold,
3439 .conf_tx = mwl8k_conf_tx,
3440 .get_tx_stats = mwl8k_get_tx_stats,
3441 .get_stats = mwl8k_get_stats,
3444 static void mwl8k_tx_reclaim_handler(unsigned long data)
3447 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3448 struct mwl8k_priv *priv = hw->priv;
3450 spin_lock_bh(&priv->tx_lock);
3451 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3452 mwl8k_txq_reclaim(hw, i, 0);
3454 if (priv->tx_wait != NULL) {
3455 int count = mwl8k_txq_busy(priv);
3457 complete(priv->tx_wait);
3458 priv->tx_wait = NULL;
3461 spin_unlock_bh(&priv->tx_lock);
3464 static void mwl8k_finalize_join_worker(struct work_struct *work)
3466 struct mwl8k_priv *priv =
3467 container_of(work, struct mwl8k_priv, finalize_join_worker);
3468 struct sk_buff *skb = priv->beacon_skb;
3469 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3471 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3474 priv->beacon_skb = NULL;
3477 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3478 const struct pci_device_id *id)
3480 struct ieee80211_hw *hw;
3481 struct mwl8k_priv *priv;
3486 rc = pci_enable_device(pdev);
3488 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3493 rc = pci_request_regions(pdev, MWL8K_NAME);
3495 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3500 pci_set_master(pdev);
3502 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3504 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3512 priv->hostcmd_wait = NULL;
3513 priv->tx_wait = NULL;
3514 priv->inconfig = false;
3515 priv->wep_enabled = 0;
3516 priv->wmm_mode = false;
3517 priv->pending_tx_pkts = 0;
3518 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3520 spin_lock_init(&priv->fw_lock);
3522 SET_IEEE80211_DEV(hw, &pdev->dev);
3523 pci_set_drvdata(pdev, hw);
3525 priv->regs = pci_iomap(pdev, 1, 0x10000);
3526 if (priv->regs == NULL) {
3527 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3531 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3532 priv->band.band = IEEE80211_BAND_2GHZ;
3533 priv->band.channels = priv->channels;
3534 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3535 priv->band.bitrates = priv->rates;
3536 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3537 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3539 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3540 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3543 * Extra headroom is the size of the required DMA header
3544 * minus the size of the smallest 802.11 frame (CTS frame).
3546 hw->extra_tx_headroom =
3547 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3549 hw->channel_change_time = 10;
3551 hw->queues = MWL8K_TX_QUEUES;
3553 hw->wiphy->interface_modes =
3554 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3556 /* Set rssi and noise values to dBm */
3557 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3558 hw->vif_data_size = sizeof(struct mwl8k_vif);
3561 /* Set default radio state and preamble */
3562 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3563 priv->radio_state = MWL8K_RADIO_DISABLE;
3565 /* Finalize join worker */
3566 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3568 /* TX reclaim tasklet */
3569 tasklet_init(&priv->tx_reclaim_task,
3570 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3571 tasklet_disable(&priv->tx_reclaim_task);
3573 /* Config workthread */
3574 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3575 if (priv->config_wq == NULL)
3578 /* Power management cookie */
3579 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3580 if (priv->cookie == NULL)
3583 rc = mwl8k_rxq_init(hw, 0);
3586 rxq_refill(hw, 0, INT_MAX);
3588 spin_lock_init(&priv->tx_lock);
3590 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3591 rc = mwl8k_txq_init(hw, i);
3593 goto err_free_queues;
3596 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3598 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3599 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3600 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3602 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3603 IRQF_SHARED, MWL8K_NAME, hw);
3605 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3607 goto err_free_queues;
3610 /* Reset firmware and hardware */
3611 mwl8k_hw_reset(priv);
3613 /* Ask userland hotplug daemon for the device firmware */
3614 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3616 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3620 /* Load firmware into hardware */
3621 rc = mwl8k_load_firmware(priv);
3623 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3624 goto err_stop_firmware;
3627 /* Reclaim memory once firmware is successfully loaded */
3628 mwl8k_release_firmware(priv);
3631 * Temporarily enable interrupts. Initial firmware host
3632 * commands use interrupts and avoids polling. Disable
3633 * interrupts when done.
3635 priv->int_mask |= MWL8K_A2H_EVENTS;
3637 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3639 /* Get config data, mac addrs etc */
3640 rc = mwl8k_cmd_get_hw_spec(hw);
3642 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3643 goto err_stop_firmware;
3646 /* Turn radio off */
3647 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3649 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3650 goto err_stop_firmware;
3653 /* Disable interrupts */
3654 spin_lock_irq(&priv->tx_lock);
3655 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3656 spin_unlock_irq(&priv->tx_lock);
3657 free_irq(priv->pdev->irq, hw);
3659 rc = ieee80211_register_hw(hw);
3661 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3662 goto err_stop_firmware;
3665 fw = (u8 *)&priv->fw_rev;
3666 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3668 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3669 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3670 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3671 hw->wiphy->perm_addr);
3676 mwl8k_hw_reset(priv);
3677 mwl8k_release_firmware(priv);
3680 spin_lock_irq(&priv->tx_lock);
3681 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3682 spin_unlock_irq(&priv->tx_lock);
3683 free_irq(priv->pdev->irq, hw);
3686 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3687 mwl8k_txq_deinit(hw, i);
3688 mwl8k_rxq_deinit(hw, 0);
3691 if (priv->cookie != NULL)
3692 pci_free_consistent(priv->pdev, 4,
3693 priv->cookie, priv->cookie_dma);
3695 if (priv->regs != NULL)
3696 pci_iounmap(pdev, priv->regs);
3698 if (priv->config_wq != NULL)
3699 destroy_workqueue(priv->config_wq);
3701 pci_set_drvdata(pdev, NULL);
3702 ieee80211_free_hw(hw);
3705 pci_release_regions(pdev);
3706 pci_disable_device(pdev);
3711 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3713 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3716 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3718 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3719 struct mwl8k_priv *priv;
3726 ieee80211_stop_queues(hw);
3728 /* Remove tx reclaim tasklet */
3729 tasklet_kill(&priv->tx_reclaim_task);
3731 /* Stop config thread */
3732 destroy_workqueue(priv->config_wq);
3735 mwl8k_hw_reset(priv);
3737 /* Return all skbs to mac80211 */
3738 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3739 mwl8k_txq_reclaim(hw, i, 1);
3741 ieee80211_unregister_hw(hw);
3743 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3744 mwl8k_txq_deinit(hw, i);
3746 mwl8k_rxq_deinit(hw, 0);
3748 pci_free_consistent(priv->pdev, 4,
3749 priv->cookie, priv->cookie_dma);
3751 pci_iounmap(pdev, priv->regs);
3752 pci_set_drvdata(pdev, NULL);
3753 ieee80211_free_hw(hw);
3754 pci_release_regions(pdev);
3755 pci_disable_device(pdev);
3758 static struct pci_driver mwl8k_driver = {
3760 .id_table = mwl8k_table,
3761 .probe = mwl8k_probe,
3762 .remove = __devexit_p(mwl8k_remove),
3763 .shutdown = __devexit_p(mwl8k_shutdown),
3766 static int __init mwl8k_init(void)
3768 return pci_register_driver(&mwl8k_driver);
3771 static void __exit mwl8k_exit(void)
3773 pci_unregister_driver(&mwl8k_driver);
3776 module_init(mwl8k_init);
3777 module_exit(mwl8k_exit);