2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/completion.h>
19 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
21 #include <linux/moduleparam.h>
22 #include <linux/firmware.h>
23 #include <linux/workqueue.h>
25 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26 #define MWL8K_NAME KBUILD_MODNAME
27 #define MWL8K_VERSION "0.9.1"
29 MODULE_DESCRIPTION(MWL8K_DESC);
30 MODULE_VERSION(MWL8K_VERSION);
31 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
39 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41 /* Register definitions */
42 #define MWL8K_HIU_GEN_PTR 0x00000c10
43 #define MWL8K_MODE_STA 0x0000005a
44 #define MWL8K_MODE_AP 0x000000a5
45 #define MWL8K_HIU_INT_CODE 0x00000c14
46 #define MWL8K_FWSTA_READY 0xf0f1f2f4
47 #define MWL8K_FWAP_READY 0xf1f2f4a5
48 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
49 #define MWL8K_HIU_SCRATCH 0x00000c40
51 /* Host->device communications */
52 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
54 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
55 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
56 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
57 #define MWL8K_H2A_INT_DUMMY (1 << 20)
58 #define MWL8K_H2A_INT_RESET (1 << 15)
59 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
60 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
62 /* Device->host communications */
63 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
65 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
66 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
67 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
68 #define MWL8K_A2H_INT_DUMMY (1 << 20)
69 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
70 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
71 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
72 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
73 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
74 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
75 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
76 #define MWL8K_A2H_INT_RX_READY (1 << 1)
77 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
79 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
80 MWL8K_A2H_INT_CHNL_SWITCHED | \
81 MWL8K_A2H_INT_QUEUE_EMPTY | \
82 MWL8K_A2H_INT_RADAR_DETECT | \
83 MWL8K_A2H_INT_RADIO_ON | \
84 MWL8K_A2H_INT_RADIO_OFF | \
85 MWL8K_A2H_INT_MAC_EVENT | \
86 MWL8K_A2H_INT_OPC_DONE | \
87 MWL8K_A2H_INT_RX_READY | \
88 MWL8K_A2H_INT_TX_DONE)
90 /* WME stream classes */
91 #define WME_AC_BE 0 /* best effort */
92 #define WME_AC_BK 1 /* background */
93 #define WME_AC_VI 2 /* video */
94 #define WME_AC_VO 3 /* voice */
96 #define MWL8K_RX_QUEUES 1
97 #define MWL8K_TX_QUEUES 4
99 struct mwl8k_rx_queue {
102 /* hw receives here */
105 /* refill descs here */
108 struct mwl8k_rx_desc *rx_desc_area;
109 dma_addr_t rx_desc_dma;
110 struct sk_buff **rx_skb;
115 * The DMA engine requires a modification to the payload.
116 * If the skbuff is shared/cloned, it needs to be unshared.
117 * This method is used to ensure the stack always gets back
118 * the skbuff it sent for transmission.
120 struct sk_buff *clone;
124 struct mwl8k_tx_queue {
125 /* hw transmits here */
128 /* sw appends here */
131 struct ieee80211_tx_queue_stats tx_stats;
132 struct mwl8k_tx_desc *tx_desc_area;
133 dma_addr_t tx_desc_dma;
134 struct mwl8k_skb *tx_skb;
137 /* Pointers to the firmware data and meta information about it. */
138 struct mwl8k_firmware {
140 struct firmware *ucode;
142 /* Boot helper code */
143 struct firmware *helper;
148 struct ieee80211_hw *hw;
150 struct pci_dev *pdev;
152 /* firmware access lock */
155 /* firmware files and meta data */
156 struct mwl8k_firmware fw;
159 /* lock held over TX and TX reap */
162 struct ieee80211_vif *vif;
164 struct ieee80211_channel *current_channel;
166 /* power management status cookie from firmware */
168 dma_addr_t cookie_dma;
175 * Running count of TX packets in flight, to avoid
176 * iterating over the transmit rings each time.
180 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
181 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
184 struct ieee80211_supported_band band;
185 struct ieee80211_channel channels[14];
186 struct ieee80211_rate rates[12];
188 /* RF preamble: Short, Long or Auto */
192 /* WMM MODE 1 for enabled; 0 for disabled */
195 /* Set if PHY config is in progress */
198 /* XXX need to convert this to handle multiple interfaces */
200 u8 capture_bssid[ETH_ALEN];
201 struct sk_buff *beacon_skb;
204 * This FJ worker has to be global as it is scheduled from the
205 * RX handler. At this point we don't know which interface it
206 * belongs to until the list of bssids waiting to complete join
209 struct work_struct finalize_join_worker;
211 /* Tasklet to reclaim TX descriptors and buffers after tx */
212 struct tasklet_struct tx_reclaim_task;
214 /* Work thread to serialize configuration requests */
215 struct workqueue_struct *config_wq;
216 struct completion *hostcmd_wait;
217 struct completion *tx_wait;
220 /* Per interface specific private data */
222 /* backpointer to parent config block */
223 struct mwl8k_priv *priv;
225 /* BSS config of AP or IBSS from mac80211*/
226 struct ieee80211_bss_conf bss_info;
228 /* BSSID of AP or IBSS */
230 u8 mac_addr[ETH_ALEN];
233 * Subset of supported legacy rates.
234 * Intersection of AP and STA supported rates.
236 struct ieee80211_rate legacy_rates[12];
238 /* number of supported legacy rates */
241 /* Index into station database.Returned by update_sta_db call */
244 /* Non AMPDU sequence number assigned by driver */
248 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
250 static const struct ieee80211_channel mwl8k_channels[] = {
251 { .center_freq = 2412, .hw_value = 1, },
252 { .center_freq = 2417, .hw_value = 2, },
253 { .center_freq = 2422, .hw_value = 3, },
254 { .center_freq = 2427, .hw_value = 4, },
255 { .center_freq = 2432, .hw_value = 5, },
256 { .center_freq = 2437, .hw_value = 6, },
257 { .center_freq = 2442, .hw_value = 7, },
258 { .center_freq = 2447, .hw_value = 8, },
259 { .center_freq = 2452, .hw_value = 9, },
260 { .center_freq = 2457, .hw_value = 10, },
261 { .center_freq = 2462, .hw_value = 11, },
264 static const struct ieee80211_rate mwl8k_rates[] = {
265 { .bitrate = 10, .hw_value = 2, },
266 { .bitrate = 20, .hw_value = 4, },
267 { .bitrate = 55, .hw_value = 11, },
268 { .bitrate = 60, .hw_value = 12, },
269 { .bitrate = 90, .hw_value = 18, },
270 { .bitrate = 110, .hw_value = 22, },
271 { .bitrate = 120, .hw_value = 24, },
272 { .bitrate = 180, .hw_value = 36, },
273 { .bitrate = 240, .hw_value = 48, },
274 { .bitrate = 360, .hw_value = 72, },
275 { .bitrate = 480, .hw_value = 96, },
276 { .bitrate = 540, .hw_value = 108, },
280 #define MWL8K_RADIO_FORCE 0x2
281 #define MWL8K_RADIO_ENABLE 0x1
282 #define MWL8K_RADIO_DISABLE 0x0
283 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
284 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
285 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
288 #define MWL8K_WMM_ENABLE 1
289 #define MWL8K_WMM_DISABLE 0
291 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
295 /* Short Slot: 9us slot time */
296 #define MWL8K_SHORT_SLOTTIME 1
298 /* Long slot: 20us slot time */
299 #define MWL8K_LONG_SLOTTIME 0
301 /* Set or get info from Firmware */
302 #define MWL8K_CMD_SET 0x0001
303 #define MWL8K_CMD_GET 0x0000
305 /* Firmware command codes */
306 #define MWL8K_CMD_CODE_DNLD 0x0001
307 #define MWL8K_CMD_GET_HW_SPEC 0x0003
308 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
309 #define MWL8K_CMD_GET_STAT 0x0014
310 #define MWL8K_CMD_RADIO_CONTROL 0x001C
311 #define MWL8K_CMD_RF_TX_POWER 0x001E
312 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
313 #define MWL8K_CMD_SET_POST_SCAN 0x0108
314 #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
315 #define MWL8K_CMD_SET_SLOT 0x0114
316 #define MWL8K_CMD_MIMO_CONFIG 0x0125
317 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
318 #define MWL8K_CMD_SET_WMM_MODE 0x0123
319 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
320 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
321 #define MWL8K_CMD_UPDATE_STADB 0x1123
322 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
323 #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
324 #define MWL8K_CMD_SET_AID 0x010d
325 #define MWL8K_CMD_SET_RATE 0x0110
326 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
327 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
328 #define MWL8K_CMD_ENCRYPTION 0x1122
330 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
332 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
333 snprintf(buf, bufsize, "%s", #x);\
336 switch (cmd & (~0x8000)) {
337 MWL8K_CMDNAME(CODE_DNLD);
338 MWL8K_CMDNAME(GET_HW_SPEC);
339 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
340 MWL8K_CMDNAME(GET_STAT);
341 MWL8K_CMDNAME(RADIO_CONTROL);
342 MWL8K_CMDNAME(RF_TX_POWER);
343 MWL8K_CMDNAME(SET_PRE_SCAN);
344 MWL8K_CMDNAME(SET_POST_SCAN);
345 MWL8K_CMDNAME(SET_RF_CHANNEL);
346 MWL8K_CMDNAME(SET_SLOT);
347 MWL8K_CMDNAME(MIMO_CONFIG);
348 MWL8K_CMDNAME(ENABLE_SNIFFER);
349 MWL8K_CMDNAME(SET_WMM_MODE);
350 MWL8K_CMDNAME(SET_EDCA_PARAMS);
351 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
352 MWL8K_CMDNAME(UPDATE_STADB);
353 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
354 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
355 MWL8K_CMDNAME(SET_AID);
356 MWL8K_CMDNAME(SET_RATE);
357 MWL8K_CMDNAME(USE_FIXED_RATE);
358 MWL8K_CMDNAME(RTS_THRESHOLD);
359 MWL8K_CMDNAME(ENCRYPTION);
361 snprintf(buf, bufsize, "0x%x", cmd);
368 /* Hardware and firmware reset */
369 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
371 iowrite32(MWL8K_H2A_INT_RESET,
372 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
373 iowrite32(MWL8K_H2A_INT_RESET,
374 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
378 /* Release fw image */
379 static void mwl8k_release_fw(struct firmware **fw)
383 release_firmware(*fw);
387 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
389 mwl8k_release_fw(&priv->fw.ucode);
390 mwl8k_release_fw(&priv->fw.helper);
393 /* Request fw image */
394 static int mwl8k_request_fw(struct mwl8k_priv *priv,
395 const char *fname, struct firmware **fw)
397 /* release current image */
399 mwl8k_release_fw(fw);
401 return request_firmware((const struct firmware **)fw,
402 fname, &priv->pdev->dev);
405 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
410 priv->part_num = part_num;
412 snprintf(filename, sizeof(filename),
413 "mwl8k/helper_%u.fw", priv->part_num);
415 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
418 "%s Error requesting helper firmware file %s\n",
419 pci_name(priv->pdev), filename);
423 snprintf(filename, sizeof(filename),
424 "mwl8k/fmimage_%u.fw", priv->part_num);
426 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
428 printk(KERN_ERR "%s Error requesting firmware file %s\n",
429 pci_name(priv->pdev), filename);
430 mwl8k_release_fw(&priv->fw.helper);
437 struct mwl8k_cmd_pkt {
443 } __attribute__((packed));
449 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
451 void __iomem *regs = priv->regs;
456 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
457 if (pci_dma_mapping_error(priv->pdev, dma_addr))
460 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
461 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
462 iowrite32(MWL8K_H2A_INT_DOORBELL,
463 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
464 iowrite32(MWL8K_H2A_INT_DUMMY,
465 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
472 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
473 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
474 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
482 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
485 * Clear 'command done' interrupt bit.
491 status = ioread32(priv->regs +
492 MWL8K_HIU_A2H_INTERRUPT_STATUS);
493 if (status & MWL8K_A2H_INT_OPC_DONE) {
494 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
495 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
496 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
506 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
507 const u8 *data, size_t length)
509 struct mwl8k_cmd_pkt *cmd;
513 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
517 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
523 int block_size = length > 256 ? 256 : length;
525 memcpy(cmd->payload, data + done, block_size);
526 cmd->length = cpu_to_le16(block_size);
528 rc = mwl8k_send_fw_load_cmd(priv, cmd,
529 sizeof(*cmd) + block_size);
534 length -= block_size;
539 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
547 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
548 const u8 *data, size_t length)
550 unsigned char *buffer;
551 int may_continue, rc = 0;
552 u32 done, prev_block_size;
554 buffer = kmalloc(1024, GFP_KERNEL);
561 while (may_continue > 0) {
564 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
565 if (block_size & 1) {
569 done += prev_block_size;
570 length -= prev_block_size;
573 if (block_size > 1024 || block_size > length) {
583 if (block_size == 0) {
590 prev_block_size = block_size;
591 memcpy(buffer, data + done, block_size);
593 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
598 if (!rc && length != 0)
606 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
610 const u8 *ucode = priv->fw.ucode->data;
611 size_t ucode_len = priv->fw.ucode->size;
612 const u8 *helper = priv->fw.helper->data;
613 size_t helper_len = priv->fw.helper->size;
615 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
616 rc = mwl8k_load_fw_image(priv, helper, helper_len);
618 printk(KERN_ERR "%s: unable to load firmware "
619 "helper image\n", pci_name(priv->pdev));
624 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
626 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
630 printk(KERN_ERR "%s: unable to load firmware data\n",
631 pci_name(priv->pdev));
635 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
640 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
641 == MWL8K_FWSTA_READY)
646 return loops ? 0 : -ETIMEDOUT;
651 * Defines shared between transmission and reception.
653 /* HT control fields for firmware */
658 } __attribute__((packed));
660 /* Firmware Station database operations */
661 #define MWL8K_STA_DB_ADD_ENTRY 0
662 #define MWL8K_STA_DB_MODIFY_ENTRY 1
663 #define MWL8K_STA_DB_DEL_ENTRY 2
664 #define MWL8K_STA_DB_FLUSH 3
666 /* Peer Entry flags - used to define the type of the peer node */
667 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
669 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
670 #define MWL8K_MCS_BITMAP_SIZE 16
672 struct peer_capability_info {
673 /* Peer type - AP vs. STA. */
676 /* Basic 802.11 capabilities from assoc resp. */
679 /* Set if peer supports 802.11n high throughput (HT). */
682 /* Valid if HT is supported. */
684 __u8 extended_ht_caps;
685 struct ewc_ht_info ewc_info;
687 /* Legacy rate table. Intersection of our rates and peer rates. */
688 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
690 /* HT rate table. Intersection of our rates and peer rates. */
691 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
694 /* If set, interoperability mode, no proprietary extensions. */
698 __le16 amsdu_enabled;
699 } __attribute__((packed));
701 /* Inline functions to manipulate QoS field in data descriptor. */
702 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
704 u16 val_mask = 1 << 4;
706 /* End of Service Period Bit 4 */
707 return qos | val_mask;
710 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
714 u16 qos_mask = ~(val_mask << shift);
716 /* Ack Policy Bit 5-6 */
717 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
720 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
722 u16 val_mask = 1 << 7;
724 /* AMSDU present Bit 7 */
725 return qos | val_mask;
728 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
732 u16 qos_mask = ~(val_mask << shift);
734 /* Queue Length Bits 8-15 */
735 return (qos & qos_mask) | ((len & val_mask) << shift);
738 /* DMA header used by firmware and hardware. */
739 struct mwl8k_dma_data {
741 struct ieee80211_hdr wh;
742 } __attribute__((packed));
744 /* Routines to add/remove DMA header from skb. */
745 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
747 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
748 void *dst, *src = &tr->wh;
749 __le16 fc = tr->wh.frame_control;
750 int hdrlen = ieee80211_hdrlen(fc);
751 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
753 dst = (void *)tr + space;
755 memmove(dst, src, hdrlen);
756 skb_pull(skb, space);
762 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
764 struct ieee80211_hdr *wh;
766 struct mwl8k_dma_data *tr;
768 wh = (struct ieee80211_hdr *)skb->data;
769 hdrlen = ieee80211_hdrlen(wh->frame_control);
773 * Copy up/down the 802.11 header; the firmware requires
774 * we present a 2-byte payload length followed by a
775 * 4-address header (w/o QoS), followed (optionally) by
776 * any WEP/ExtIV header (but only filled in for CCMP).
778 if (hdrlen != sizeof(struct mwl8k_dma_data))
779 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
781 tr = (struct mwl8k_dma_data *)skb->data;
783 memmove(&tr->wh, wh, hdrlen);
786 memset(tr->wh.addr4, 0, ETH_ALEN);
789 * Firmware length is the length of the fully formed "802.11
790 * payload". That is, everything except for the 802.11 header.
791 * This includes all crypto material including the MIC.
793 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
802 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
804 struct mwl8k_rx_desc {
808 __le32 pkt_phys_addr;
809 __le32 next_rx_desc_phys_addr;
819 } __attribute__((packed));
821 #define MWL8K_RX_DESCS 256
822 #define MWL8K_RX_MAXSZ 3800
824 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
826 struct mwl8k_priv *priv = hw->priv;
827 struct mwl8k_rx_queue *rxq = priv->rxq + index;
831 rxq->rx_desc_count = 0;
835 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
838 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
839 if (rxq->rx_desc_area == NULL) {
840 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
844 memset(rxq->rx_desc_area, 0, size);
846 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
847 sizeof(*rxq->rx_skb), GFP_KERNEL);
848 if (rxq->rx_skb == NULL) {
849 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
851 pci_free_consistent(priv->pdev, size,
852 rxq->rx_desc_area, rxq->rx_desc_dma);
855 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
857 for (i = 0; i < MWL8K_RX_DESCS; i++) {
858 struct mwl8k_rx_desc *rx_desc;
861 rx_desc = rxq->rx_desc_area + i;
862 nexti = (i + 1) % MWL8K_RX_DESCS;
864 rx_desc->next_rx_desc_phys_addr =
865 cpu_to_le32(rxq->rx_desc_dma
866 + nexti * sizeof(*rx_desc));
867 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
873 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
875 struct mwl8k_priv *priv = hw->priv;
876 struct mwl8k_rx_queue *rxq = priv->rxq + index;
880 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
884 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
888 rxq->rx_desc_count++;
891 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
893 rxq->rx_desc_area[rx].pkt_phys_addr =
894 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
895 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
897 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
898 rxq->rx_skb[rx] = skb;
900 rxq->rx_desc_area[rx].rx_ctrl = 0;
908 /* Must be called only when the card's reception is completely halted */
909 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
911 struct mwl8k_priv *priv = hw->priv;
912 struct mwl8k_rx_queue *rxq = priv->rxq + index;
915 for (i = 0; i < MWL8K_RX_DESCS; i++) {
916 if (rxq->rx_skb[i] != NULL) {
919 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
920 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
922 kfree_skb(rxq->rx_skb[i]);
923 rxq->rx_skb[i] = NULL;
930 pci_free_consistent(priv->pdev,
931 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
932 rxq->rx_desc_area, rxq->rx_desc_dma);
933 rxq->rx_desc_area = NULL;
938 * Scan a list of BSSIDs to process for finalize join.
939 * Allows for extension to process multiple BSSIDs.
942 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
944 return priv->capture_beacon &&
945 ieee80211_is_beacon(wh->frame_control) &&
946 !compare_ether_addr(wh->addr3, priv->capture_bssid);
949 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
952 priv->capture_beacon = false;
953 memset(priv->capture_bssid, 0, ETH_ALEN);
956 * Use GFP_ATOMIC as rxq_process is called from
957 * the primary interrupt handler, memory allocation call
960 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
961 if (priv->beacon_skb != NULL)
962 queue_work(priv->config_wq,
963 &priv->finalize_join_worker);
966 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
968 struct mwl8k_priv *priv = hw->priv;
969 struct mwl8k_rx_queue *rxq = priv->rxq + index;
973 while (rxq->rx_desc_count && limit--) {
974 struct mwl8k_rx_desc *rx_desc;
976 struct ieee80211_rx_status status;
978 struct ieee80211_hdr *wh;
980 rx_desc = rxq->rx_desc_area + rxq->rx_head;
981 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
985 skb = rxq->rx_skb[rxq->rx_head];
988 rxq->rx_skb[rxq->rx_head] = NULL;
990 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
991 rxq->rx_desc_count--;
993 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
994 pci_unmap_single(priv->pdev, addr,
995 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
997 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
998 if (mwl8k_remove_dma_header(skb)) {
1003 wh = (struct ieee80211_hdr *)skb->data;
1006 * Check for pending join operation. save a copy of
1007 * the beacon and schedule a tasklet to send finalize
1008 * join command to the firmware.
1010 if (mwl8k_capture_bssid(priv, wh))
1011 mwl8k_save_beacon(priv, skb);
1013 memset(&status, 0, sizeof(status));
1015 status.signal = -rx_desc->rssi;
1016 status.noise = -rx_desc->noise_level;
1017 status.qual = rx_desc->link_quality;
1019 status.rate_idx = 1;
1021 status.band = IEEE80211_BAND_2GHZ;
1022 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1023 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1024 ieee80211_rx_irqsafe(hw, skb);
1034 * Packet transmission.
1037 /* Transmit queue assignment. */
1039 MWL8K_WME_AC_BK = 0, /* background access */
1040 MWL8K_WME_AC_BE = 1, /* best effort access */
1041 MWL8K_WME_AC_VI = 2, /* video access */
1042 MWL8K_WME_AC_VO = 3, /* voice access */
1045 /* Transmit packet ACK policy */
1046 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1047 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1049 #define GET_TXQ(_ac) (\
1050 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1051 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1052 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1055 #define MWL8K_TXD_STATUS_OK 0x00000001
1056 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1057 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1058 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1059 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1061 struct mwl8k_tx_desc {
1066 __le32 pkt_phys_addr;
1068 __u8 dest_MAC_addr[ETH_ALEN];
1069 __le32 next_tx_desc_phys_addr;
1074 } __attribute__((packed));
1076 #define MWL8K_TX_DESCS 128
1078 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1080 struct mwl8k_priv *priv = hw->priv;
1081 struct mwl8k_tx_queue *txq = priv->txq + index;
1085 memset(&txq->tx_stats, 0,
1086 sizeof(struct ieee80211_tx_queue_stats));
1087 txq->tx_stats.limit = MWL8K_TX_DESCS;
1091 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1094 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1095 if (txq->tx_desc_area == NULL) {
1096 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1100 memset(txq->tx_desc_area, 0, size);
1102 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1104 if (txq->tx_skb == NULL) {
1105 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1107 pci_free_consistent(priv->pdev, size,
1108 txq->tx_desc_area, txq->tx_desc_dma);
1111 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1113 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1114 struct mwl8k_tx_desc *tx_desc;
1117 tx_desc = txq->tx_desc_area + i;
1118 nexti = (i + 1) % MWL8K_TX_DESCS;
1120 tx_desc->status = 0;
1121 tx_desc->next_tx_desc_phys_addr =
1122 cpu_to_le32(txq->tx_desc_dma +
1123 nexti * sizeof(*tx_desc));
1129 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1131 iowrite32(MWL8K_H2A_INT_PPA_READY,
1132 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1133 iowrite32(MWL8K_H2A_INT_DUMMY,
1134 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1135 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1138 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1140 return priv->pending_tx_pkts;
1143 struct mwl8k_txq_info {
1152 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1153 struct mwl8k_txq_info txinfo[],
1156 int count, desc, status;
1157 struct mwl8k_tx_queue *txq;
1158 struct mwl8k_tx_desc *tx_desc;
1161 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1162 spin_lock_bh(&priv->tx_lock);
1163 for (count = 0; count < num_queues; count++) {
1164 txq = priv->txq + count;
1165 txinfo[count].len = txq->tx_stats.len;
1166 txinfo[count].head = txq->tx_head;
1167 txinfo[count].tail = txq->tx_tail;
1168 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1169 tx_desc = txq->tx_desc_area + desc;
1170 status = le32_to_cpu(tx_desc->status);
1172 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1173 txinfo[count].fw_owned++;
1175 txinfo[count].drv_owned++;
1177 if (tx_desc->pkt_len == 0)
1178 txinfo[count].unused++;
1181 spin_unlock_bh(&priv->tx_lock);
1186 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1189 unsigned long timeout = 0;
1190 struct mwl8k_priv *priv = hw->priv;
1191 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1195 if (priv->tx_wait != NULL)
1196 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1198 spin_lock_bh(&priv->tx_lock);
1199 count = mwl8k_txq_busy(priv);
1201 priv->tx_wait = &cmd_wait;
1202 if (priv->radio_state)
1203 mwl8k_tx_start(priv);
1205 spin_unlock_bh(&priv->tx_lock);
1208 struct mwl8k_txq_info txinfo[4];
1212 timeout = wait_for_completion_timeout(&cmd_wait,
1213 msecs_to_jiffies(delay_ms));
1217 spin_lock_bh(&priv->tx_lock);
1218 priv->tx_wait = NULL;
1219 newcount = mwl8k_txq_busy(priv);
1220 spin_unlock_bh(&priv->tx_lock);
1222 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1223 __func__, __LINE__, delay_ms, count, newcount);
1225 mwl8k_scan_tx_ring(priv, txinfo, 4);
1226 for (index = 0 ; index < 4; index++)
1228 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1233 txinfo[index].fw_owned,
1234 txinfo[index].drv_owned,
1235 txinfo[index].unused);
1242 #define MWL8K_TXD_SUCCESS(status) \
1243 ((status) & (MWL8K_TXD_STATUS_OK | \
1244 MWL8K_TXD_STATUS_OK_RETRY | \
1245 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1247 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1249 struct mwl8k_priv *priv = hw->priv;
1250 struct mwl8k_tx_queue *txq = priv->txq + index;
1253 while (txq->tx_stats.len > 0) {
1256 struct mwl8k_tx_desc *tx_desc;
1259 struct sk_buff *skb;
1260 struct ieee80211_tx_info *info;
1265 tx_desc = txq->tx_desc_area + tx;
1267 status = le32_to_cpu(tx_desc->status);
1269 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1273 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1276 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1277 BUG_ON(txq->tx_stats.len == 0);
1278 txq->tx_stats.len--;
1279 priv->pending_tx_pkts--;
1281 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1282 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1283 skb = txq->tx_skb[tx].skb;
1284 txq->tx_skb[tx].skb = NULL;
1286 BUG_ON(skb == NULL);
1287 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1289 rc = mwl8k_remove_dma_header(skb);
1291 /* Mark descriptor as unused */
1292 tx_desc->pkt_phys_addr = 0;
1293 tx_desc->pkt_len = 0;
1295 if (txq->tx_skb[tx].clone) {
1296 /* Replace with original skb
1297 * before returning to stack
1298 * as buffer has been cloned
1301 skb = txq->tx_skb[tx].clone;
1302 txq->tx_skb[tx].clone = NULL;
1306 /* Something has gone wrong here.
1307 * Failed to remove DMA header.
1308 * Print error message and drop packet.
1310 printk(KERN_ERR "%s: Error removing DMA header from "
1311 "tx skb 0x%p.\n", priv->name, skb);
1317 info = IEEE80211_SKB_CB(skb);
1318 ieee80211_tx_info_clear_status(info);
1320 /* Convert firmware status stuff into tx_status */
1321 if (MWL8K_TXD_SUCCESS(status)) {
1323 info->flags |= IEEE80211_TX_STAT_ACK;
1326 ieee80211_tx_status_irqsafe(hw, skb);
1328 wake = !priv->inconfig && priv->radio_state;
1332 ieee80211_wake_queue(hw, index);
1335 /* must be called only when the card's transmit is completely halted */
1336 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1338 struct mwl8k_priv *priv = hw->priv;
1339 struct mwl8k_tx_queue *txq = priv->txq + index;
1341 mwl8k_txq_reclaim(hw, index, 1);
1346 pci_free_consistent(priv->pdev,
1347 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1348 txq->tx_desc_area, txq->tx_desc_dma);
1349 txq->tx_desc_area = NULL;
1353 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1355 struct mwl8k_priv *priv = hw->priv;
1356 struct ieee80211_tx_info *tx_info;
1357 struct ieee80211_hdr *wh;
1358 struct mwl8k_tx_queue *txq;
1359 struct mwl8k_tx_desc *tx;
1360 struct mwl8k_dma_data *tr;
1361 struct mwl8k_vif *mwl8k_vif;
1362 struct sk_buff *org_skb = skb;
1365 bool qosframe = false, ampduframe = false;
1366 bool mcframe = false, eapolframe = false;
1367 bool amsduframe = false;
1370 txq = priv->txq + index;
1371 tx = txq->tx_desc_area + txq->tx_tail;
1373 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1376 * Append HW DMA header to start of packet. Drop packet if
1377 * there is not enough space or a failure to unshare/unclone
1380 skb = mwl8k_add_dma_header(skb);
1383 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1384 "header, dropping TX frame.\n", priv->name);
1385 dev_kfree_skb(org_skb);
1386 return NETDEV_TX_OK;
1389 tx_info = IEEE80211_SKB_CB(skb);
1390 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1391 tr = (struct mwl8k_dma_data *)skb->data;
1393 fc = wh->frame_control;
1394 qosframe = ieee80211_is_data_qos(fc);
1395 mcframe = is_multicast_ether_addr(wh->addr1);
1396 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1398 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1399 u16 seqno = mwl8k_vif->seqno;
1400 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1401 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1402 mwl8k_vif->seqno = seqno++ % 4096;
1406 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1408 dma = pci_map_single(priv->pdev, skb->data,
1409 skb->len, PCI_DMA_TODEVICE);
1411 if (pci_dma_mapping_error(priv->pdev, dma)) {
1412 printk(KERN_DEBUG "%s: failed to dma map skb, "
1413 "dropping TX frame.\n", priv->name);
1415 if (org_skb != NULL)
1416 dev_kfree_skb(org_skb);
1419 return NETDEV_TX_OK;
1422 /* Set desc header, cpu bit order. */
1425 tx->tx_priority = index;
1426 tx->qos_control = 0;
1428 tx->peer_id = mwl8k_vif->peer_id;
1430 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1432 /* Setup firmware control bit fields for each frame type. */
1433 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1435 qos = mwl8k_qos_setbit_eosp(qos);
1436 /* Set Queue size to unspecified */
1437 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1438 } else if (ieee80211_is_data(fc)) {
1441 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1444 * Tell firmware to not send EAPOL pkts in an
1445 * aggregate. Verify against mac80211 tx path. If
1446 * stack turns off AMPDU for an EAPOL frame this
1447 * check will be removed.
1450 qos = mwl8k_qos_setbit_ack(qos,
1451 MWL8K_TXD_ACK_POLICY_NORMAL);
1453 /* Send pkt in an aggregate if AMPDU frame. */
1455 qos = mwl8k_qos_setbit_ack(qos,
1456 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1458 qos = mwl8k_qos_setbit_ack(qos,
1459 MWL8K_TXD_ACK_POLICY_NORMAL);
1462 qos = mwl8k_qos_setbit_amsdu(qos);
1466 /* Convert to little endian */
1467 tx->qos_control = cpu_to_le16(qos);
1468 tx->status = cpu_to_le32(tx->status);
1469 tx->pkt_phys_addr = cpu_to_le32(dma);
1470 tx->pkt_len = cpu_to_le16(skb->len);
1472 txq->tx_skb[txq->tx_tail].skb = skb;
1473 txq->tx_skb[txq->tx_tail].clone =
1474 skb == org_skb ? NULL : org_skb;
1476 spin_lock_bh(&priv->tx_lock);
1478 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1479 MWL8K_TXD_STATUS_FW_OWNED);
1481 txq->tx_stats.len++;
1482 priv->pending_tx_pkts++;
1483 txq->tx_stats.count++;
1486 if (txq->tx_tail == MWL8K_TX_DESCS)
1488 if (txq->tx_head == txq->tx_tail)
1489 ieee80211_stop_queue(hw, index);
1491 if (priv->inconfig) {
1493 * Silently queue packet when we are in the middle of
1494 * a config cycle. Notify firmware only if we are
1495 * waiting for TXQs to empty. If a packet is sent
1496 * before .config() is complete, perhaps it is better
1497 * to drop the packet, as the channel is being changed
1498 * and the packet will end up on the wrong channel.
1500 printk(KERN_ERR "%s(): WARNING TX activity while "
1501 "in config\n", __func__);
1503 if (priv->tx_wait != NULL)
1504 mwl8k_tx_start(priv);
1506 mwl8k_tx_start(priv);
1508 spin_unlock_bh(&priv->tx_lock);
1510 return NETDEV_TX_OK;
1515 * Command processing.
1518 /* Timeout firmware commands after 2000ms */
1519 #define MWL8K_CMD_TIMEOUT_MS 2000
1521 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1523 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1524 struct mwl8k_priv *priv = hw->priv;
1525 void __iomem *regs = priv->regs;
1526 dma_addr_t dma_addr;
1527 unsigned int dma_size;
1529 u16 __iomem *result;
1530 unsigned long timeout = 0;
1533 cmd->result = 0xFFFF;
1534 dma_size = le16_to_cpu(cmd->length);
1535 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1536 PCI_DMA_BIDIRECTIONAL);
1537 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1540 if (priv->hostcmd_wait != NULL)
1541 printk(KERN_ERR "WARNING host command in progress\n");
1543 spin_lock_irq(&priv->fw_lock);
1544 priv->hostcmd_wait = &cmd_wait;
1545 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1546 iowrite32(MWL8K_H2A_INT_DOORBELL,
1547 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1548 iowrite32(MWL8K_H2A_INT_DUMMY,
1549 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1550 spin_unlock_irq(&priv->fw_lock);
1552 timeout = wait_for_completion_timeout(&cmd_wait,
1553 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1555 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1556 PCI_DMA_BIDIRECTIONAL);
1558 result = &cmd->result;
1560 spin_lock_irq(&priv->fw_lock);
1561 priv->hostcmd_wait = NULL;
1562 spin_unlock_irq(&priv->fw_lock);
1563 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1565 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1566 MWL8K_CMD_TIMEOUT_MS);
1569 rc = *result ? -EINVAL : 0;
1571 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1573 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1583 struct mwl8k_cmd_get_hw_spec {
1584 struct mwl8k_cmd_pkt header;
1586 __u8 host_interface;
1588 __u8 perm_addr[ETH_ALEN];
1593 __u8 mcs_bitmap[16];
1594 __le32 rx_queue_ptr;
1595 __le32 num_tx_queues;
1596 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1598 __le32 num_tx_desc_per_queue;
1599 __le32 total_rx_desc;
1600 } __attribute__((packed));
1602 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1604 struct mwl8k_priv *priv = hw->priv;
1605 struct mwl8k_cmd_get_hw_spec *cmd;
1609 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1613 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1614 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1616 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1617 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1618 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1619 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1620 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1621 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1622 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1623 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1625 rc = mwl8k_post_cmd(hw, &cmd->header);
1628 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1629 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1630 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1631 priv->hw_rev = cmd->hw_rev;
1639 * CMD_MAC_MULTICAST_ADR.
1641 struct mwl8k_cmd_mac_multicast_adr {
1642 struct mwl8k_cmd_pkt header;
1645 __u8 addr[1][ETH_ALEN];
1648 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1649 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1651 struct dev_addr_list *mclist)
1653 struct mwl8k_cmd_mac_multicast_adr *cmd;
1656 int size = sizeof(*cmd) + ((mc_count - 1) * ETH_ALEN);
1657 cmd = kzalloc(size, GFP_KERNEL);
1661 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1662 cmd->header.length = cpu_to_le16(size);
1663 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1664 cmd->numaddr = cpu_to_le16(mc_count);
1665 while ((index < mc_count) && mclist) {
1666 if (mclist->da_addrlen != ETH_ALEN) {
1668 goto mwl8k_cmd_mac_multicast_adr_exit;
1670 memcpy(cmd->addr[index], mclist->da_addr, ETH_ALEN);
1672 mclist = mclist->next;
1675 rc = mwl8k_post_cmd(hw, &cmd->header);
1677 mwl8k_cmd_mac_multicast_adr_exit:
1683 * CMD_802_11_GET_STAT.
1685 struct mwl8k_cmd_802_11_get_stat {
1686 struct mwl8k_cmd_pkt header;
1689 } __attribute__((packed));
1691 #define MWL8K_STAT_ACK_FAILURE 9
1692 #define MWL8K_STAT_RTS_FAILURE 12
1693 #define MWL8K_STAT_FCS_ERROR 24
1694 #define MWL8K_STAT_RTS_SUCCESS 11
1696 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1697 struct ieee80211_low_level_stats *stats)
1699 struct mwl8k_cmd_802_11_get_stat *cmd;
1702 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1706 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1707 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1708 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1710 rc = mwl8k_post_cmd(hw, &cmd->header);
1712 stats->dot11ACKFailureCount =
1713 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1714 stats->dot11RTSFailureCount =
1715 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1716 stats->dot11FCSErrorCount =
1717 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1718 stats->dot11RTSSuccessCount =
1719 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1727 * CMD_802_11_RADIO_CONTROL.
1729 struct mwl8k_cmd_802_11_radio_control {
1730 struct mwl8k_cmd_pkt header;
1734 } __attribute__((packed));
1736 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1738 struct mwl8k_priv *priv = hw->priv;
1739 struct mwl8k_cmd_802_11_radio_control *cmd;
1742 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1743 !(enable & MWL8K_RADIO_FORCE))
1746 enable &= MWL8K_RADIO_ENABLE;
1748 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1752 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1753 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1754 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1755 cmd->control = cpu_to_le16(priv->radio_preamble);
1756 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1758 rc = mwl8k_post_cmd(hw, &cmd->header);
1762 priv->radio_state = enable;
1768 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1770 struct mwl8k_priv *priv;
1772 if (hw == NULL || hw->priv == NULL)
1776 priv->radio_preamble = (short_preamble ?
1777 MWL8K_RADIO_SHORT_PREAMBLE :
1778 MWL8K_RADIO_LONG_PREAMBLE);
1780 return mwl8k_cmd_802_11_radio_control(hw,
1781 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1785 * CMD_802_11_RF_TX_POWER.
1787 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1789 struct mwl8k_cmd_802_11_rf_tx_power {
1790 struct mwl8k_cmd_pkt header;
1792 __le16 support_level;
1793 __le16 current_level;
1795 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1796 } __attribute__((packed));
1798 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1800 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1803 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1807 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1808 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1809 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1810 cmd->support_level = cpu_to_le16(dBm);
1812 rc = mwl8k_post_cmd(hw, &cmd->header);
1821 struct mwl8k_cmd_set_pre_scan {
1822 struct mwl8k_cmd_pkt header;
1823 } __attribute__((packed));
1825 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1827 struct mwl8k_cmd_set_pre_scan *cmd;
1830 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1834 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1835 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1837 rc = mwl8k_post_cmd(hw, &cmd->header);
1844 * CMD_SET_POST_SCAN.
1846 struct mwl8k_cmd_set_post_scan {
1847 struct mwl8k_cmd_pkt header;
1849 __u8 bssid[ETH_ALEN];
1850 } __attribute__((packed));
1853 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[ETH_ALEN])
1855 struct mwl8k_cmd_set_post_scan *cmd;
1858 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1862 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1863 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1865 memcpy(cmd->bssid, mac, ETH_ALEN);
1867 rc = mwl8k_post_cmd(hw, &cmd->header);
1874 * CMD_SET_RF_CHANNEL.
1876 struct mwl8k_cmd_set_rf_channel {
1877 struct mwl8k_cmd_pkt header;
1879 __u8 current_channel;
1880 __le32 channel_flags;
1881 } __attribute__((packed));
1883 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1884 struct ieee80211_channel *channel)
1886 struct mwl8k_cmd_set_rf_channel *cmd;
1889 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1893 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1894 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1895 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1896 cmd->current_channel = channel->hw_value;
1897 if (channel->band == IEEE80211_BAND_2GHZ)
1898 cmd->channel_flags = cpu_to_le32(0x00000081);
1900 cmd->channel_flags = cpu_to_le32(0x00000000);
1902 rc = mwl8k_post_cmd(hw, &cmd->header);
1911 struct mwl8k_cmd_set_slot {
1912 struct mwl8k_cmd_pkt header;
1915 } __attribute__((packed));
1917 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1919 struct mwl8k_cmd_set_slot *cmd;
1922 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1926 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1927 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1928 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1929 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1931 rc = mwl8k_post_cmd(hw, &cmd->header);
1940 struct mwl8k_cmd_mimo_config {
1941 struct mwl8k_cmd_pkt header;
1943 __u8 rx_antenna_map;
1944 __u8 tx_antenna_map;
1945 } __attribute__((packed));
1947 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1949 struct mwl8k_cmd_mimo_config *cmd;
1952 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1956 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1957 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1958 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1959 cmd->rx_antenna_map = rx;
1960 cmd->tx_antenna_map = tx;
1962 rc = mwl8k_post_cmd(hw, &cmd->header);
1969 * CMD_ENABLE_SNIFFER.
1971 struct mwl8k_cmd_enable_sniffer {
1972 struct mwl8k_cmd_pkt header;
1974 } __attribute__((packed));
1976 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1978 struct mwl8k_cmd_enable_sniffer *cmd;
1981 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1985 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1986 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1987 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
1989 rc = mwl8k_post_cmd(hw, &cmd->header);
1996 * CMD_SET_RATE_ADAPT_MODE.
1998 struct mwl8k_cmd_set_rate_adapt_mode {
1999 struct mwl8k_cmd_pkt header;
2002 } __attribute__((packed));
2004 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2006 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2009 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2013 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2014 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2015 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2016 cmd->mode = cpu_to_le16(mode);
2018 rc = mwl8k_post_cmd(hw, &cmd->header);
2027 struct mwl8k_cmd_set_wmm {
2028 struct mwl8k_cmd_pkt header;
2030 } __attribute__((packed));
2032 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2034 struct mwl8k_priv *priv = hw->priv;
2035 struct mwl8k_cmd_set_wmm *cmd;
2038 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2042 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2043 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2044 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2046 rc = mwl8k_post_cmd(hw, &cmd->header);
2050 priv->wmm_mode = enable;
2056 * CMD_SET_RTS_THRESHOLD.
2058 struct mwl8k_cmd_rts_threshold {
2059 struct mwl8k_cmd_pkt header;
2062 } __attribute__((packed));
2064 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2065 u16 action, u16 *threshold)
2067 struct mwl8k_cmd_rts_threshold *cmd;
2070 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2074 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2075 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2076 cmd->action = cpu_to_le16(action);
2077 cmd->threshold = cpu_to_le16(*threshold);
2079 rc = mwl8k_post_cmd(hw, &cmd->header);
2086 * CMD_SET_EDCA_PARAMS.
2088 struct mwl8k_cmd_set_edca_params {
2089 struct mwl8k_cmd_pkt header;
2091 /* See MWL8K_SET_EDCA_XXX below */
2094 /* TX opportunity in units of 32 us */
2097 /* Log exponent of max contention period: 0...15*/
2100 /* Log exponent of min contention period: 0...15 */
2103 /* Adaptive interframe spacing in units of 32us */
2106 /* TX queue to configure */
2108 } __attribute__((packed));
2110 #define MWL8K_SET_EDCA_CW 0x01
2111 #define MWL8K_SET_EDCA_TXOP 0x02
2112 #define MWL8K_SET_EDCA_AIFS 0x04
2114 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2115 MWL8K_SET_EDCA_TXOP | \
2116 MWL8K_SET_EDCA_AIFS)
2119 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2120 __u16 cw_min, __u16 cw_max,
2121 __u8 aifs, __u16 txop)
2123 struct mwl8k_cmd_set_edca_params *cmd;
2124 u32 log_cw_min, log_cw_max;
2127 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2131 log_cw_min = ilog2(cw_min+1);
2132 log_cw_max = ilog2(cw_max+1);
2133 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2134 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2136 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2137 cmd->txop = cpu_to_le16(txop);
2138 cmd->log_cw_max = (u8)log_cw_max;
2139 cmd->log_cw_min = (u8)log_cw_min;
2143 rc = mwl8k_post_cmd(hw, &cmd->header);
2150 * CMD_FINALIZE_JOIN.
2153 /* FJ beacon buffer size is compiled into the firmware. */
2154 #define MWL8K_FJ_BEACON_MAXLEN 128
2156 struct mwl8k_cmd_finalize_join {
2157 struct mwl8k_cmd_pkt header;
2158 __le32 sleep_interval; /* Number of beacon periods to sleep */
2159 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2160 } __attribute__((packed));
2162 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2163 __u16 framelen, __u16 dtim)
2165 struct mwl8k_cmd_finalize_join *cmd;
2166 struct ieee80211_mgmt *payload = frame;
2174 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2178 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2179 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2182 cmd->sleep_interval = cpu_to_le32(dtim);
2184 cmd->sleep_interval = cpu_to_le32(1);
2186 hdrlen = ieee80211_hdrlen(payload->frame_control);
2188 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2190 /* XXX TBD Might just have to abort and return an error */
2191 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2192 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2193 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2194 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2196 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2197 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2199 if (payload && payload_len)
2200 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2202 rc = mwl8k_post_cmd(hw, &cmd->header);
2210 struct mwl8k_cmd_update_sta_db {
2211 struct mwl8k_cmd_pkt header;
2213 /* See STADB_ACTION_TYPE */
2216 /* Peer MAC address */
2217 __u8 peer_addr[ETH_ALEN];
2221 /* Peer info - valid during add/update. */
2222 struct peer_capability_info peer_info;
2223 } __attribute__((packed));
2225 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2226 struct ieee80211_vif *vif, __u32 action)
2228 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2229 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2230 struct mwl8k_cmd_update_sta_db *cmd;
2231 struct peer_capability_info *peer_info;
2232 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2236 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2240 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2241 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2243 cmd->action = cpu_to_le32(action);
2244 peer_info = &cmd->peer_info;
2245 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2248 case MWL8K_STA_DB_ADD_ENTRY:
2249 case MWL8K_STA_DB_MODIFY_ENTRY:
2250 /* Build peer_info block */
2251 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2252 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2253 peer_info->interop = 1;
2254 peer_info->amsdu_enabled = 0;
2256 rates = peer_info->legacy_rates;
2257 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2258 rates[count] = bitrates[count].hw_value;
2260 rc = mwl8k_post_cmd(hw, &cmd->header);
2262 mv_vif->peer_id = peer_info->station_id;
2266 case MWL8K_STA_DB_DEL_ENTRY:
2267 case MWL8K_STA_DB_FLUSH:
2269 rc = mwl8k_post_cmd(hw, &cmd->header);
2271 mv_vif->peer_id = 0;
2282 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2284 #define MWL8K_FRAME_PROT_DISABLED 0x00
2285 #define MWL8K_FRAME_PROT_11G 0x07
2286 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2287 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2289 struct mwl8k_cmd_update_set_aid {
2290 struct mwl8k_cmd_pkt header;
2293 /* AP's MAC address (BSSID) */
2294 __u8 bssid[ETH_ALEN];
2295 __le16 protection_mode;
2296 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2297 } __attribute__((packed));
2299 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2300 struct ieee80211_vif *vif)
2302 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2303 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2304 struct mwl8k_cmd_update_set_aid *cmd;
2305 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2310 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2314 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2315 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2316 cmd->aid = cpu_to_le16(info->aid);
2318 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2320 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2322 if (info->use_cts_prot) {
2323 prot_mode = MWL8K_FRAME_PROT_11G;
2325 switch (info->ht_operation_mode &
2326 IEEE80211_HT_OP_MODE_PROTECTION) {
2327 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2328 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2330 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2331 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2334 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2339 cmd->protection_mode = cpu_to_le16(prot_mode);
2341 for (count = 0; count < mv_vif->legacy_nrates; count++)
2342 cmd->supp_rates[count] = bitrates[count].hw_value;
2344 rc = mwl8k_post_cmd(hw, &cmd->header);
2353 struct mwl8k_cmd_update_rateset {
2354 struct mwl8k_cmd_pkt header;
2355 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2357 /* Bitmap for supported MCS codes. */
2358 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2359 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2360 } __attribute__((packed));
2362 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2363 struct ieee80211_vif *vif)
2365 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2366 struct mwl8k_cmd_update_rateset *cmd;
2367 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2371 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2375 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2376 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2378 for (count = 0; count < mv_vif->legacy_nrates; count++)
2379 cmd->legacy_rates[count] = bitrates[count].hw_value;
2381 rc = mwl8k_post_cmd(hw, &cmd->header);
2388 * CMD_USE_FIXED_RATE.
2390 #define MWL8K_RATE_TABLE_SIZE 8
2391 #define MWL8K_UCAST_RATE 0
2392 #define MWL8K_USE_AUTO_RATE 0x0002
2394 struct mwl8k_rate_entry {
2395 /* Set to 1 if HT rate, 0 if legacy. */
2398 /* Set to 1 to use retry_count field. */
2399 __le32 enable_retry;
2401 /* Specified legacy rate or MCS. */
2404 /* Number of allowed retries. */
2406 } __attribute__((packed));
2408 struct mwl8k_rate_table {
2409 /* 1 to allow specified rate and below */
2410 __le32 allow_rate_drop;
2412 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2413 } __attribute__((packed));
2415 struct mwl8k_cmd_use_fixed_rate {
2416 struct mwl8k_cmd_pkt header;
2418 struct mwl8k_rate_table rate_table;
2420 /* Unicast, Broadcast or Multicast */
2424 } __attribute__((packed));
2426 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2427 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2429 struct mwl8k_cmd_use_fixed_rate *cmd;
2433 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2437 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2438 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2440 cmd->action = cpu_to_le32(action);
2441 cmd->rate_type = cpu_to_le32(rate_type);
2443 if (rate_table != NULL) {
2444 /* Copy over each field manually so
2445 * that bitflipping can be done
2447 cmd->rate_table.allow_rate_drop =
2448 cpu_to_le32(rate_table->allow_rate_drop);
2449 cmd->rate_table.num_rates =
2450 cpu_to_le32(rate_table->num_rates);
2452 for (count = 0; count < rate_table->num_rates; count++) {
2453 struct mwl8k_rate_entry *dst =
2454 &cmd->rate_table.rate_entry[count];
2455 struct mwl8k_rate_entry *src =
2456 &rate_table->rate_entry[count];
2458 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2459 dst->enable_retry = cpu_to_le32(src->enable_retry);
2460 dst->rate = cpu_to_le32(src->rate);
2461 dst->retry_count = cpu_to_le32(src->retry_count);
2465 rc = mwl8k_post_cmd(hw, &cmd->header);
2473 * Interrupt handling.
2475 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2477 struct ieee80211_hw *hw = dev_id;
2478 struct mwl8k_priv *priv = hw->priv;
2481 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2482 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2487 if (status & MWL8K_A2H_INT_TX_DONE)
2488 tasklet_schedule(&priv->tx_reclaim_task);
2490 if (status & MWL8K_A2H_INT_RX_READY) {
2491 while (rxq_process(hw, 0, 1))
2492 rxq_refill(hw, 0, 1);
2495 if (status & MWL8K_A2H_INT_OPC_DONE) {
2496 if (priv->hostcmd_wait != NULL) {
2497 complete(priv->hostcmd_wait);
2498 priv->hostcmd_wait = NULL;
2502 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2503 if (!priv->inconfig &&
2504 priv->radio_state &&
2505 mwl8k_txq_busy(priv))
2506 mwl8k_tx_start(priv);
2514 * Core driver operations.
2516 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2518 struct mwl8k_priv *priv = hw->priv;
2519 int index = skb_get_queue_mapping(skb);
2522 if (priv->current_channel == NULL) {
2523 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2524 "disabled\n", priv->name);
2526 return NETDEV_TX_OK;
2529 rc = mwl8k_txq_xmit(hw, index, skb);
2534 struct mwl8k_work_struct {
2535 /* Initialized by mwl8k_queue_work(). */
2536 struct work_struct wt;
2538 /* Required field passed in to mwl8k_queue_work(). */
2539 struct ieee80211_hw *hw;
2541 /* Required field passed in to mwl8k_queue_work(). */
2542 int (*wfunc)(struct work_struct *w);
2544 /* Initialized by mwl8k_queue_work(). */
2545 struct completion *cmd_wait;
2551 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2552 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2556 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2557 unsigned long timeout_ms;
2559 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2560 u32 txwait_attempts;
2562 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2567 /* Flags controlling behavior of config queue requests */
2569 /* Caller spins while waiting for completion. */
2570 #define MWL8K_WQ_SPIN 0x00000001
2572 /* Wait for TX queues to empty before proceeding with configuration. */
2573 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2575 /* Queue request and return immediately. */
2576 #define MWL8K_WQ_POST_REQUEST 0x00000004
2579 * Caller sleeps and waits for task complete notification.
2580 * Do not use in atomic context.
2582 #define MWL8K_WQ_SLEEP 0x00000008
2584 /* Free work struct when task is done. */
2585 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2588 * Config request is queued and returns to caller imediately. Use
2589 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2590 * when this flag is set.
2592 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2593 MWL8K_WQ_FREE_WORKSTRUCT)
2595 /* Default work queue behavior is to sleep and wait for tx completion. */
2596 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2599 * Default config request timeout. Add adjustments to make sure the
2600 * config thread waits long enough for both tx wait and cmd wait before
2604 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2605 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2607 /* Default number of TX wait attempts. */
2608 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2610 /* Total time to wait for TXQ to drain. */
2611 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2612 MWL8K_WQ_TXWAIT_ATTEMPTS)
2614 /* Scheduling slop. */
2615 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2617 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2619 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2621 static void mwl8k_config_thread(struct work_struct *wt)
2623 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2624 struct ieee80211_hw *hw = worker->hw;
2625 struct mwl8k_priv *priv = hw->priv;
2628 spin_lock_irq(&priv->tx_lock);
2629 priv->inconfig = true;
2630 spin_unlock_irq(&priv->tx_lock);
2632 ieee80211_stop_queues(hw);
2635 * Wait for host queues to drain before doing PHY
2636 * reconfiguration. This avoids interrupting any in-flight
2637 * DMA transfers to the hardware.
2639 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2643 u32 tx_wait_attempts = worker->txwait_attempts;
2645 time_remaining = worker->tx_timeout_ms;
2646 if (!tx_wait_attempts)
2647 tx_wait_attempts = 1;
2649 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2653 iter = tx_wait_attempts;
2657 if (time_remaining > timeout) {
2658 time_remaining -= timeout;
2659 wait_time = timeout;
2661 wait_time = time_remaining;
2666 rc = mwl8k_tx_wait_empty(hw, wait_time);
2668 printk(KERN_ERR "%s() txwait timeout=%ums "
2669 "Retry:%u/%u\n", __func__, timeout,
2670 tx_wait_attempts - iter + 1,
2673 } while (rc && --iter);
2675 rc = iter ? 0 : -ETIMEDOUT;
2678 rc = worker->wfunc(wt);
2680 spin_lock_irq(&priv->tx_lock);
2681 priv->inconfig = false;
2682 if (priv->pending_tx_pkts && priv->radio_state)
2683 mwl8k_tx_start(priv);
2684 spin_unlock_irq(&priv->tx_lock);
2685 ieee80211_wake_queues(hw);
2688 if (worker->options & MWL8K_WQ_SLEEP)
2689 complete(worker->cmd_wait);
2691 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2695 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2696 struct mwl8k_work_struct *worker,
2697 struct workqueue_struct *wqueue,
2698 int (*wfunc)(struct work_struct *w))
2700 unsigned long timeout = 0;
2703 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2705 if (!worker->timeout_ms)
2706 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2708 if (!worker->options)
2709 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2711 if (!worker->txwait_attempts)
2712 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2714 if (!worker->tx_timeout_ms)
2715 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2718 worker->cmd_wait = &cmd_wait;
2720 worker->wfunc = wfunc;
2722 INIT_WORK(&worker->wt, mwl8k_config_thread);
2723 queue_work(wqueue, &worker->wt);
2725 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2728 if (worker->options & MWL8K_WQ_SPIN) {
2729 timeout = worker->timeout_ms;
2730 while (timeout && (worker->rc > 0)) {
2734 } else if (worker->options & MWL8K_WQ_SLEEP)
2735 timeout = wait_for_completion_timeout(&cmd_wait,
2736 msecs_to_jiffies(worker->timeout_ms));
2741 cancel_work_sync(&worker->wt);
2749 struct mwl8k_start_worker {
2750 struct mwl8k_work_struct header;
2753 static int mwl8k_start_wt(struct work_struct *wt)
2755 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2756 struct ieee80211_hw *hw = worker->header.hw;
2757 struct mwl8k_priv *priv = hw->priv;
2760 if (priv->vif != NULL) {
2762 goto mwl8k_start_exit;
2766 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2768 goto mwl8k_start_exit;
2771 /* Purge TX/RX HW queues */
2772 if (mwl8k_cmd_set_pre_scan(hw)) {
2774 goto mwl8k_start_exit;
2777 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2779 goto mwl8k_start_exit;
2782 /* Enable firmware rate adaptation */
2783 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2785 goto mwl8k_start_exit;
2788 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2789 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2791 goto mwl8k_start_exit;
2794 /* Disable sniffer mode */
2795 if (mwl8k_enable_sniffer(hw, 0))
2802 static int mwl8k_start(struct ieee80211_hw *hw)
2804 struct mwl8k_start_worker *worker;
2805 struct mwl8k_priv *priv = hw->priv;
2808 /* Enable tx reclaim tasklet */
2809 tasklet_enable(&priv->tx_reclaim_task);
2811 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2812 IRQF_SHARED, MWL8K_NAME, hw);
2814 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2817 goto mwl8k_start_disable_tasklet;
2820 /* Enable interrupts */
2821 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2823 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2824 if (worker == NULL) {
2826 goto mwl8k_start_disable_irq;
2829 rc = mwl8k_queue_work(hw, &worker->header,
2830 priv->config_wq, mwl8k_start_wt);
2835 if (rc == -ETIMEDOUT)
2836 printk(KERN_ERR "%s() timed out\n", __func__);
2840 mwl8k_start_disable_irq:
2841 spin_lock_irq(&priv->tx_lock);
2842 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2843 spin_unlock_irq(&priv->tx_lock);
2844 free_irq(priv->pdev->irq, hw);
2846 mwl8k_start_disable_tasklet:
2847 tasklet_disable(&priv->tx_reclaim_task);
2852 struct mwl8k_stop_worker {
2853 struct mwl8k_work_struct header;
2856 static int mwl8k_stop_wt(struct work_struct *wt)
2858 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2859 struct ieee80211_hw *hw = worker->header.hw;
2862 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2867 static void mwl8k_stop(struct ieee80211_hw *hw)
2870 struct mwl8k_stop_worker *worker;
2871 struct mwl8k_priv *priv = hw->priv;
2874 if (priv->vif != NULL)
2877 ieee80211_stop_queues(hw);
2879 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2883 rc = mwl8k_queue_work(hw, &worker->header,
2884 priv->config_wq, mwl8k_stop_wt);
2886 if (rc == -ETIMEDOUT)
2887 printk(KERN_ERR "%s() timed out\n", __func__);
2889 /* Disable interrupts */
2890 spin_lock_irq(&priv->tx_lock);
2891 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2892 spin_unlock_irq(&priv->tx_lock);
2893 free_irq(priv->pdev->irq, hw);
2895 /* Stop finalize join worker */
2896 cancel_work_sync(&priv->finalize_join_worker);
2897 if (priv->beacon_skb != NULL)
2898 dev_kfree_skb(priv->beacon_skb);
2900 /* Stop tx reclaim tasklet */
2901 tasklet_disable(&priv->tx_reclaim_task);
2903 /* Stop config thread */
2904 flush_workqueue(priv->config_wq);
2906 /* Return all skbs to mac80211 */
2907 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2908 mwl8k_txq_reclaim(hw, i, 1);
2911 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2912 struct ieee80211_if_init_conf *conf)
2914 struct mwl8k_priv *priv = hw->priv;
2915 struct mwl8k_vif *mwl8k_vif;
2918 * We only support one active interface at a time.
2920 if (priv->vif != NULL)
2924 * We only support managed interfaces for now.
2926 if (conf->type != NL80211_IFTYPE_STATION &&
2927 conf->type != NL80211_IFTYPE_MONITOR)
2930 /* Clean out driver private area */
2931 mwl8k_vif = MWL8K_VIF(conf->vif);
2932 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2934 /* Save the mac address */
2935 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2937 /* Back pointer to parent config block */
2938 mwl8k_vif->priv = priv;
2940 /* Setup initial PHY parameters */
2941 memcpy(mwl8k_vif->legacy_rates ,
2942 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2943 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2945 /* Set Initial sequence number to zero */
2946 mwl8k_vif->seqno = 0;
2948 priv->vif = conf->vif;
2949 priv->current_channel = NULL;
2954 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2955 struct ieee80211_if_init_conf *conf)
2957 struct mwl8k_priv *priv = hw->priv;
2959 if (priv->vif == NULL)
2965 struct mwl8k_config_worker {
2966 struct mwl8k_work_struct header;
2970 static int mwl8k_config_wt(struct work_struct *wt)
2972 struct mwl8k_config_worker *worker =
2973 (struct mwl8k_config_worker *)wt;
2974 struct ieee80211_hw *hw = worker->header.hw;
2975 struct ieee80211_conf *conf = &hw->conf;
2976 struct mwl8k_priv *priv = hw->priv;
2979 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2981 goto mwl8k_config_exit;
2984 priv->current_channel = conf->channel;
2986 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2988 goto mwl8k_config_exit;
2991 if (conf->power_level > 18)
2992 conf->power_level = 18;
2993 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2995 goto mwl8k_config_exit;
2998 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3005 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3008 struct mwl8k_config_worker *worker;
3009 struct mwl8k_priv *priv = hw->priv;
3011 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3015 worker->changed = changed;
3016 rc = mwl8k_queue_work(hw, &worker->header,
3017 priv->config_wq, mwl8k_config_wt);
3018 if (rc == -ETIMEDOUT) {
3019 printk(KERN_ERR "%s() timed out.\n", __func__);
3026 * mac80211 will crash on anything other than -EINVAL on
3027 * error. Looks like wireless extensions which calls mac80211
3028 * may be the actual culprit...
3030 return rc ? -EINVAL : 0;
3033 struct mwl8k_bss_info_changed_worker {
3034 struct mwl8k_work_struct header;
3035 struct ieee80211_vif *vif;
3036 struct ieee80211_bss_conf *info;
3040 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3042 struct mwl8k_bss_info_changed_worker *worker =
3043 (struct mwl8k_bss_info_changed_worker *)wt;
3044 struct ieee80211_hw *hw = worker->header.hw;
3045 struct ieee80211_vif *vif = worker->vif;
3046 struct ieee80211_bss_conf *info = worker->info;
3050 struct mwl8k_priv *priv = hw->priv;
3051 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3053 changed = worker->changed;
3054 priv->capture_beacon = false;
3057 memcpy(&mwl8k_vif->bss_info, info,
3058 sizeof(struct ieee80211_bss_conf));
3061 if (mwl8k_update_rateset(hw, vif))
3062 goto mwl8k_bss_info_changed_exit;
3064 /* Turn on rate adaptation */
3065 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3066 MWL8K_UCAST_RATE, NULL))
3067 goto mwl8k_bss_info_changed_exit;
3069 /* Set radio preamble */
3070 if (mwl8k_set_radio_preamble(hw,
3071 info->use_short_preamble))
3072 goto mwl8k_bss_info_changed_exit;
3075 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3076 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3077 goto mwl8k_bss_info_changed_exit;
3079 /* Update peer rate info */
3080 if (mwl8k_cmd_update_sta_db(hw, vif,
3081 MWL8K_STA_DB_MODIFY_ENTRY))
3082 goto mwl8k_bss_info_changed_exit;
3085 if (mwl8k_cmd_set_aid(hw, vif))
3086 goto mwl8k_bss_info_changed_exit;
3089 * Finalize the join. Tell rx handler to process
3090 * next beacon from our BSSID.
3092 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
3093 priv->capture_beacon = true;
3095 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3096 memset(&mwl8k_vif->bss_info, 0,
3097 sizeof(struct ieee80211_bss_conf));
3098 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
3101 mwl8k_bss_info_changed_exit:
3106 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3107 struct ieee80211_vif *vif,
3108 struct ieee80211_bss_conf *info,
3111 struct mwl8k_bss_info_changed_worker *worker;
3112 struct mwl8k_priv *priv = hw->priv;
3113 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3116 if (changed & BSS_CHANGED_BSSID)
3117 memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
3119 if ((changed & BSS_CHANGED_ASSOC) == 0)
3122 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3127 worker->info = info;
3128 worker->changed = changed;
3129 rc = mwl8k_queue_work(hw, &worker->header,
3131 mwl8k_bss_info_changed_wt);
3133 if (rc == -ETIMEDOUT)
3134 printk(KERN_ERR "%s() timed out\n", __func__);
3137 struct mwl8k_configure_filter_worker {
3138 struct mwl8k_work_struct header;
3139 unsigned int changed_flags;
3140 unsigned int *total_flags;
3142 struct dev_addr_list *mclist;
3145 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3147 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3149 struct mwl8k_configure_filter_worker *worker =
3150 (struct mwl8k_configure_filter_worker *)wt;
3152 struct ieee80211_hw *hw = worker->header.hw;
3153 unsigned int changed_flags = worker->changed_flags;
3154 unsigned int *total_flags = worker->total_flags;
3155 int mc_count = worker->mc_count;
3156 struct dev_addr_list *mclist = worker->mclist;
3158 struct mwl8k_priv *priv = hw->priv;
3161 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3162 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3163 rc = mwl8k_cmd_set_pre_scan(hw);
3167 bssid = "\x00\x00\x00\x00\x00\x00";
3168 if (priv->vif != NULL)
3169 bssid = MWL8K_VIF(priv->vif)->bssid;
3171 rc = mwl8k_cmd_set_post_scan(hw, bssid);
3176 goto mwl8k_configure_filter_exit;
3178 mc_count = mc_count < priv->num_mcaddrs ?
3179 mc_count : priv->num_mcaddrs;
3180 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3183 "%s()Error setting multicast addresses\n",
3187 mwl8k_configure_filter_exit:
3191 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3192 int mc_count, struct dev_addr_list *mclist)
3194 struct mwl8k_configure_filter_worker *worker;
3196 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3202 * XXX: This is _HORRIBLY_ broken!!
3204 * No locking, the mclist pointer might be invalid as soon as this
3205 * function returns, something in the list might be invalidated
3206 * once we get to the worker, etc...
3208 worker->mc_count = mc_count;
3209 worker->mclist = mclist;
3214 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3215 unsigned int changed_flags,
3216 unsigned int *total_flags,
3220 struct mwl8k_configure_filter_worker *worker = (void *)multicast;
3221 struct mwl8k_priv *priv = hw->priv;
3223 /* Clear unsupported feature flags */
3224 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3226 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
3232 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3233 worker->changed_flags = changed_flags;
3234 worker->total_flags = total_flags;
3236 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3237 mwl8k_configure_filter_wt);
3240 struct mwl8k_set_rts_threshold_worker {
3241 struct mwl8k_work_struct header;
3245 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3247 struct mwl8k_set_rts_threshold_worker *worker =
3248 (struct mwl8k_set_rts_threshold_worker *)wt;
3250 struct ieee80211_hw *hw = worker->header.hw;
3251 u16 threshold = (u16)(worker->value);
3254 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3259 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3262 struct mwl8k_set_rts_threshold_worker *worker;
3263 struct mwl8k_priv *priv = hw->priv;
3265 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3269 worker->value = value;
3271 rc = mwl8k_queue_work(hw, &worker->header,
3273 mwl8k_set_rts_threshold_wt);
3276 if (rc == -ETIMEDOUT) {
3277 printk(KERN_ERR "%s() timed out\n", __func__);
3284 struct mwl8k_conf_tx_worker {
3285 struct mwl8k_work_struct header;
3287 const struct ieee80211_tx_queue_params *params;
3290 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3292 struct mwl8k_conf_tx_worker *worker =
3293 (struct mwl8k_conf_tx_worker *)wt;
3295 struct ieee80211_hw *hw = worker->header.hw;
3296 u16 queue = worker->queue;
3297 const struct ieee80211_tx_queue_params *params = worker->params;
3299 struct mwl8k_priv *priv = hw->priv;
3302 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3303 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3305 goto mwl8k_conf_tx_exit;
3308 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3309 params->cw_max, params->aifs, params->txop))
3315 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3316 const struct ieee80211_tx_queue_params *params)
3319 struct mwl8k_conf_tx_worker *worker;
3320 struct mwl8k_priv *priv = hw->priv;
3322 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3326 worker->queue = queue;
3327 worker->params = params;
3328 rc = mwl8k_queue_work(hw, &worker->header,
3329 priv->config_wq, mwl8k_conf_tx_wt);
3331 if (rc == -ETIMEDOUT) {
3332 printk(KERN_ERR "%s() timed out\n", __func__);
3338 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3339 struct ieee80211_tx_queue_stats *stats)
3341 struct mwl8k_priv *priv = hw->priv;
3342 struct mwl8k_tx_queue *txq;
3345 spin_lock_bh(&priv->tx_lock);
3346 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3347 txq = priv->txq + index;
3348 memcpy(&stats[index], &txq->tx_stats,
3349 sizeof(struct ieee80211_tx_queue_stats));
3351 spin_unlock_bh(&priv->tx_lock);
3355 struct mwl8k_get_stats_worker {
3356 struct mwl8k_work_struct header;
3357 struct ieee80211_low_level_stats *stats;
3360 static int mwl8k_get_stats_wt(struct work_struct *wt)
3362 struct mwl8k_get_stats_worker *worker =
3363 (struct mwl8k_get_stats_worker *)wt;
3365 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3368 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3369 struct ieee80211_low_level_stats *stats)
3372 struct mwl8k_get_stats_worker *worker;
3373 struct mwl8k_priv *priv = hw->priv;
3375 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3379 worker->stats = stats;
3380 rc = mwl8k_queue_work(hw, &worker->header,
3381 priv->config_wq, mwl8k_get_stats_wt);
3384 if (rc == -ETIMEDOUT) {
3385 printk(KERN_ERR "%s() timed out\n", __func__);
3392 static const struct ieee80211_ops mwl8k_ops = {
3394 .start = mwl8k_start,
3396 .add_interface = mwl8k_add_interface,
3397 .remove_interface = mwl8k_remove_interface,
3398 .config = mwl8k_config,
3399 .bss_info_changed = mwl8k_bss_info_changed,
3400 .prepare_multicast = mwl8k_prepare_multicast,
3401 .configure_filter = mwl8k_configure_filter,
3402 .set_rts_threshold = mwl8k_set_rts_threshold,
3403 .conf_tx = mwl8k_conf_tx,
3404 .get_tx_stats = mwl8k_get_tx_stats,
3405 .get_stats = mwl8k_get_stats,
3408 static void mwl8k_tx_reclaim_handler(unsigned long data)
3411 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3412 struct mwl8k_priv *priv = hw->priv;
3414 spin_lock_bh(&priv->tx_lock);
3415 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3416 mwl8k_txq_reclaim(hw, i, 0);
3418 if (priv->tx_wait != NULL) {
3419 int count = mwl8k_txq_busy(priv);
3421 complete(priv->tx_wait);
3422 priv->tx_wait = NULL;
3425 spin_unlock_bh(&priv->tx_lock);
3428 static void mwl8k_finalize_join_worker(struct work_struct *work)
3430 struct mwl8k_priv *priv =
3431 container_of(work, struct mwl8k_priv, finalize_join_worker);
3432 struct sk_buff *skb = priv->beacon_skb;
3433 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3435 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3438 priv->beacon_skb = NULL;
3441 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3442 const struct pci_device_id *id)
3444 struct ieee80211_hw *hw;
3445 struct mwl8k_priv *priv;
3450 rc = pci_enable_device(pdev);
3452 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3457 rc = pci_request_regions(pdev, MWL8K_NAME);
3459 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3464 pci_set_master(pdev);
3466 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3468 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3476 priv->hostcmd_wait = NULL;
3477 priv->tx_wait = NULL;
3478 priv->inconfig = false;
3479 priv->wmm_mode = false;
3480 priv->pending_tx_pkts = 0;
3481 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3483 spin_lock_init(&priv->fw_lock);
3485 SET_IEEE80211_DEV(hw, &pdev->dev);
3486 pci_set_drvdata(pdev, hw);
3488 priv->regs = pci_iomap(pdev, 1, 0x10000);
3489 if (priv->regs == NULL) {
3490 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3494 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3495 priv->band.band = IEEE80211_BAND_2GHZ;
3496 priv->band.channels = priv->channels;
3497 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3498 priv->band.bitrates = priv->rates;
3499 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3500 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3502 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3503 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3506 * Extra headroom is the size of the required DMA header
3507 * minus the size of the smallest 802.11 frame (CTS frame).
3509 hw->extra_tx_headroom =
3510 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3512 hw->channel_change_time = 10;
3514 hw->queues = MWL8K_TX_QUEUES;
3516 hw->wiphy->interface_modes =
3517 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3519 /* Set rssi and noise values to dBm */
3520 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3521 hw->vif_data_size = sizeof(struct mwl8k_vif);
3524 /* Set default radio state and preamble */
3525 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3526 priv->radio_state = MWL8K_RADIO_DISABLE;
3528 /* Finalize join worker */
3529 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3531 /* TX reclaim tasklet */
3532 tasklet_init(&priv->tx_reclaim_task,
3533 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3534 tasklet_disable(&priv->tx_reclaim_task);
3536 /* Config workthread */
3537 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3538 if (priv->config_wq == NULL)
3541 /* Power management cookie */
3542 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3543 if (priv->cookie == NULL)
3546 rc = mwl8k_rxq_init(hw, 0);
3549 rxq_refill(hw, 0, INT_MAX);
3551 spin_lock_init(&priv->tx_lock);
3553 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3554 rc = mwl8k_txq_init(hw, i);
3556 goto err_free_queues;
3559 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3560 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3561 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3562 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3564 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3565 IRQF_SHARED, MWL8K_NAME, hw);
3567 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3569 goto err_free_queues;
3572 /* Reset firmware and hardware */
3573 mwl8k_hw_reset(priv);
3575 /* Ask userland hotplug daemon for the device firmware */
3576 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3578 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3582 /* Load firmware into hardware */
3583 rc = mwl8k_load_firmware(priv);
3585 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3586 goto err_stop_firmware;
3589 /* Reclaim memory once firmware is successfully loaded */
3590 mwl8k_release_firmware(priv);
3593 * Temporarily enable interrupts. Initial firmware host
3594 * commands use interrupts and avoids polling. Disable
3595 * interrupts when done.
3597 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3599 /* Get config data, mac addrs etc */
3600 rc = mwl8k_cmd_get_hw_spec(hw);
3602 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3603 goto err_stop_firmware;
3606 /* Turn radio off */
3607 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3609 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3610 goto err_stop_firmware;
3613 /* Disable interrupts */
3614 spin_lock_irq(&priv->tx_lock);
3615 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3616 spin_unlock_irq(&priv->tx_lock);
3617 free_irq(priv->pdev->irq, hw);
3619 rc = ieee80211_register_hw(hw);
3621 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3622 goto err_stop_firmware;
3625 fw = (u8 *)&priv->fw_rev;
3626 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3628 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3629 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3630 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3631 hw->wiphy->perm_addr);
3636 mwl8k_hw_reset(priv);
3637 mwl8k_release_firmware(priv);
3640 spin_lock_irq(&priv->tx_lock);
3641 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3642 spin_unlock_irq(&priv->tx_lock);
3643 free_irq(priv->pdev->irq, hw);
3646 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3647 mwl8k_txq_deinit(hw, i);
3648 mwl8k_rxq_deinit(hw, 0);
3651 if (priv->cookie != NULL)
3652 pci_free_consistent(priv->pdev, 4,
3653 priv->cookie, priv->cookie_dma);
3655 if (priv->regs != NULL)
3656 pci_iounmap(pdev, priv->regs);
3658 if (priv->config_wq != NULL)
3659 destroy_workqueue(priv->config_wq);
3661 pci_set_drvdata(pdev, NULL);
3662 ieee80211_free_hw(hw);
3665 pci_release_regions(pdev);
3666 pci_disable_device(pdev);
3671 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3673 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3676 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3678 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3679 struct mwl8k_priv *priv;
3686 ieee80211_stop_queues(hw);
3688 ieee80211_unregister_hw(hw);
3690 /* Remove tx reclaim tasklet */
3691 tasklet_kill(&priv->tx_reclaim_task);
3693 /* Stop config thread */
3694 destroy_workqueue(priv->config_wq);
3697 mwl8k_hw_reset(priv);
3699 /* Return all skbs to mac80211 */
3700 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3701 mwl8k_txq_reclaim(hw, i, 1);
3703 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3704 mwl8k_txq_deinit(hw, i);
3706 mwl8k_rxq_deinit(hw, 0);
3708 pci_free_consistent(priv->pdev, 4,
3709 priv->cookie, priv->cookie_dma);
3711 pci_iounmap(pdev, priv->regs);
3712 pci_set_drvdata(pdev, NULL);
3713 ieee80211_free_hw(hw);
3714 pci_release_regions(pdev);
3715 pci_disable_device(pdev);
3718 static struct pci_driver mwl8k_driver = {
3720 .id_table = mwl8k_table,
3721 .probe = mwl8k_probe,
3722 .remove = __devexit_p(mwl8k_remove),
3723 .shutdown = __devexit_p(mwl8k_shutdown),
3726 static int __init mwl8k_init(void)
3728 return pci_register_driver(&mwl8k_driver);
3731 static void __exit mwl8k_exit(void)
3733 pci_unregister_driver(&mwl8k_driver);
3736 module_init(mwl8k_init);
3737 module_exit(mwl8k_exit);