2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/completion.h>
19 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
21 #include <linux/moduleparam.h>
22 #include <linux/firmware.h>
23 #include <linux/workqueue.h>
25 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26 #define MWL8K_NAME KBUILD_MODNAME
27 #define MWL8K_VERSION "0.9.1"
29 MODULE_DESCRIPTION(MWL8K_DESC);
30 MODULE_VERSION(MWL8K_VERSION);
31 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
39 MODULE_DEVICE_TABLE(pci, mwl8k_table);
41 #define IEEE80211_ADDR_LEN ETH_ALEN
43 /* Register definitions */
44 #define MWL8K_HIU_GEN_PTR 0x00000c10
45 #define MWL8K_MODE_STA 0x0000005a
46 #define MWL8K_MODE_AP 0x000000a5
47 #define MWL8K_HIU_INT_CODE 0x00000c14
48 #define MWL8K_FWSTA_READY 0xf0f1f2f4
49 #define MWL8K_FWAP_READY 0xf1f2f4a5
50 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
51 #define MWL8K_HIU_SCRATCH 0x00000c40
53 /* Host->device communications */
54 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
55 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
56 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
57 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
58 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
59 #define MWL8K_H2A_INT_DUMMY (1 << 20)
60 #define MWL8K_H2A_INT_RESET (1 << 15)
61 #define MWL8K_H2A_INT_PS (1 << 2)
62 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
63 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
65 /* Device->host communications */
66 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
67 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
68 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
69 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
70 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
71 #define MWL8K_A2H_INT_DUMMY (1 << 20)
72 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
73 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
74 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
75 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
76 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
77 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
78 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
79 #define MWL8K_A2H_INT_RX_READY (1 << 1)
80 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
82 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
83 MWL8K_A2H_INT_CHNL_SWITCHED | \
84 MWL8K_A2H_INT_QUEUE_EMPTY | \
85 MWL8K_A2H_INT_RADAR_DETECT | \
86 MWL8K_A2H_INT_RADIO_ON | \
87 MWL8K_A2H_INT_RADIO_OFF | \
88 MWL8K_A2H_INT_MAC_EVENT | \
89 MWL8K_A2H_INT_OPC_DONE | \
90 MWL8K_A2H_INT_RX_READY | \
91 MWL8K_A2H_INT_TX_DONE)
93 /* WME stream classes */
94 #define WME_AC_BE 0 /* best effort */
95 #define WME_AC_BK 1 /* background */
96 #define WME_AC_VI 2 /* video */
97 #define WME_AC_VO 3 /* voice */
99 #define MWL8K_RX_QUEUES 1
100 #define MWL8K_TX_QUEUES 4
102 struct mwl8k_rx_queue {
105 /* hw receives here */
108 /* refill descs here */
111 struct mwl8k_rx_desc *rx_desc_area;
112 dma_addr_t rx_desc_dma;
113 struct sk_buff **rx_skb;
118 * The DMA engine requires a modification to the payload.
119 * If the skbuff is shared/cloned, it needs to be unshared.
120 * This method is used to ensure the stack always gets back
121 * the skbuff it sent for transmission.
123 struct sk_buff *clone;
127 struct mwl8k_tx_queue {
128 /* hw transmits here */
131 /* sw appends here */
134 struct ieee80211_tx_queue_stats tx_stats;
135 struct mwl8k_tx_desc *tx_desc_area;
136 dma_addr_t tx_desc_dma;
137 struct mwl8k_skb *tx_skb;
140 /* Pointers to the firmware data and meta information about it. */
141 struct mwl8k_firmware {
143 struct firmware *ucode;
145 /* Boot helper code */
146 struct firmware *helper;
151 struct ieee80211_hw *hw;
153 struct pci_dev *pdev;
155 /* firmware access lock */
158 /* firmware files and meta data */
159 struct mwl8k_firmware fw;
162 /* lock held over TX and TX reap */
166 struct ieee80211_vif *vif;
167 struct list_head vif_list;
169 struct ieee80211_channel *current_channel;
171 /* power management status cookie from firmware */
173 dma_addr_t cookie_dma;
182 * Running count of TX packets in flight, to avoid
183 * iterating over the transmit rings each time.
187 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
188 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
191 struct ieee80211_supported_band band;
192 struct ieee80211_channel channels[14];
193 struct ieee80211_rate rates[12];
195 /* RF preamble: Short, Long or Auto */
199 /* WMM MODE 1 for enabled; 0 for disabled */
202 /* Set if PHY config is in progress */
205 /* XXX need to convert this to handle multiple interfaces */
207 u8 capture_bssid[IEEE80211_ADDR_LEN];
208 struct sk_buff *beacon_skb;
211 * This FJ worker has to be global as it is scheduled from the
212 * RX handler. At this point we don't know which interface it
213 * belongs to until the list of bssids waiting to complete join
216 struct work_struct finalize_join_worker;
218 /* Tasklet to reclaim TX descriptors and buffers after tx */
219 struct tasklet_struct tx_reclaim_task;
221 /* Work thread to serialize configuration requests */
222 struct workqueue_struct *config_wq;
223 struct completion *hostcmd_wait;
224 struct completion *tx_wait;
227 /* Per interface specific private data */
229 struct list_head node;
231 /* backpointer to parent config block */
232 struct mwl8k_priv *priv;
234 /* BSS config of AP or IBSS from mac80211*/
235 struct ieee80211_bss_conf bss_info;
237 /* BSSID of AP or IBSS */
238 u8 bssid[IEEE80211_ADDR_LEN];
239 u8 mac_addr[IEEE80211_ADDR_LEN];
242 * Subset of supported legacy rates.
243 * Intersection of AP and STA supported rates.
245 struct ieee80211_rate legacy_rates[12];
247 /* number of supported legacy rates */
250 /* Number of supported MCS rates. Work in progress */
253 /* Index into station database.Returned by update_sta_db call */
256 /* Non AMPDU sequence number assigned by driver */
259 /* Note:There is no channel info,
260 * refer to the master channel info in priv
264 #define MWL8K_VIF(_vif) (struct mwl8k_vif *)(&((_vif)->drv_priv))
266 static const struct ieee80211_channel mwl8k_channels[] = {
267 { .center_freq = 2412, .hw_value = 1, },
268 { .center_freq = 2417, .hw_value = 2, },
269 { .center_freq = 2422, .hw_value = 3, },
270 { .center_freq = 2427, .hw_value = 4, },
271 { .center_freq = 2432, .hw_value = 5, },
272 { .center_freq = 2437, .hw_value = 6, },
273 { .center_freq = 2442, .hw_value = 7, },
274 { .center_freq = 2447, .hw_value = 8, },
275 { .center_freq = 2452, .hw_value = 9, },
276 { .center_freq = 2457, .hw_value = 10, },
277 { .center_freq = 2462, .hw_value = 11, },
280 static const struct ieee80211_rate mwl8k_rates[] = {
281 { .bitrate = 10, .hw_value = 2, },
282 { .bitrate = 20, .hw_value = 4, },
283 { .bitrate = 55, .hw_value = 11, },
284 { .bitrate = 60, .hw_value = 12, },
285 { .bitrate = 90, .hw_value = 18, },
286 { .bitrate = 110, .hw_value = 22, },
287 { .bitrate = 120, .hw_value = 24, },
288 { .bitrate = 180, .hw_value = 36, },
289 { .bitrate = 240, .hw_value = 48, },
290 { .bitrate = 360, .hw_value = 72, },
291 { .bitrate = 480, .hw_value = 96, },
292 { .bitrate = 540, .hw_value = 108, },
296 #define MWL8K_RADIO_FORCE 0x2
297 #define MWL8K_RADIO_ENABLE 0x1
298 #define MWL8K_RADIO_DISABLE 0x0
299 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
300 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
301 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
304 #define MWL8K_WMM_ENABLE 1
305 #define MWL8K_WMM_DISABLE 0
307 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
311 /* Short Slot: 9us slot time */
312 #define MWL8K_SHORT_SLOTTIME 1
314 /* Long slot: 20us slot time */
315 #define MWL8K_LONG_SLOTTIME 0
317 /* Set or get info from Firmware */
318 #define MWL8K_CMD_SET 0x0001
319 #define MWL8K_CMD_GET 0x0000
321 /* Firmware command codes */
322 #define MWL8K_CMD_CODE_DNLD 0x0001
323 #define MWL8K_CMD_GET_HW_SPEC 0x0003
324 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
325 #define MWL8K_CMD_GET_STAT 0x0014
326 #define MWL8K_CMD_RADIO_CONTROL 0x001C
327 #define MWL8K_CMD_RF_TX_POWER 0x001E
328 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
329 #define MWL8K_CMD_SET_POST_SCAN 0x0108
330 #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
331 #define MWL8K_CMD_SET_SLOT 0x0114
332 #define MWL8K_CMD_MIMO_CONFIG 0x0125
333 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
334 #define MWL8K_CMD_SET_WMM_MODE 0x0123
335 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
336 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
337 #define MWL8K_CMD_UPDATE_STADB 0x1123
338 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
339 #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
340 #define MWL8K_CMD_SET_AID 0x010d
341 #define MWL8K_CMD_SET_RATE 0x0110
342 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
343 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
344 #define MWL8K_CMD_ENCRYPTION 0x1122
346 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
348 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
349 snprintf(buf, bufsize, "%s", #x);\
352 switch (cmd & (~0x8000)) {
353 MWL8K_CMDNAME(CODE_DNLD);
354 MWL8K_CMDNAME(GET_HW_SPEC);
355 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
356 MWL8K_CMDNAME(GET_STAT);
357 MWL8K_CMDNAME(RADIO_CONTROL);
358 MWL8K_CMDNAME(RF_TX_POWER);
359 MWL8K_CMDNAME(SET_PRE_SCAN);
360 MWL8K_CMDNAME(SET_POST_SCAN);
361 MWL8K_CMDNAME(SET_RF_CHANNEL);
362 MWL8K_CMDNAME(SET_SLOT);
363 MWL8K_CMDNAME(MIMO_CONFIG);
364 MWL8K_CMDNAME(ENABLE_SNIFFER);
365 MWL8K_CMDNAME(SET_WMM_MODE);
366 MWL8K_CMDNAME(SET_EDCA_PARAMS);
367 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
368 MWL8K_CMDNAME(UPDATE_STADB);
369 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
370 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
371 MWL8K_CMDNAME(SET_AID);
372 MWL8K_CMDNAME(SET_RATE);
373 MWL8K_CMDNAME(USE_FIXED_RATE);
374 MWL8K_CMDNAME(RTS_THRESHOLD);
375 MWL8K_CMDNAME(ENCRYPTION);
377 snprintf(buf, bufsize, "0x%x", cmd);
384 /* Hardware and firmware reset */
385 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
387 iowrite32(MWL8K_H2A_INT_RESET,
388 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
389 iowrite32(MWL8K_H2A_INT_RESET,
390 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
394 /* Release fw image */
395 static void mwl8k_release_fw(struct firmware **fw)
399 release_firmware(*fw);
403 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
405 mwl8k_release_fw(&priv->fw.ucode);
406 mwl8k_release_fw(&priv->fw.helper);
409 /* Request fw image */
410 static int mwl8k_request_fw(struct mwl8k_priv *priv,
411 const char *fname, struct firmware **fw)
413 /* release current image */
415 mwl8k_release_fw(fw);
417 return request_firmware((const struct firmware **)fw,
418 fname, &priv->pdev->dev);
421 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
426 priv->part_num = part_num;
428 snprintf(filename, sizeof(filename),
429 "mwl8k/helper_%u.fw", priv->part_num);
431 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
434 "%s Error requesting helper firmware file %s\n",
435 pci_name(priv->pdev), filename);
439 snprintf(filename, sizeof(filename),
440 "mwl8k/fmimage_%u.fw", priv->part_num);
442 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
444 printk(KERN_ERR "%s Error requesting firmware file %s\n",
445 pci_name(priv->pdev), filename);
446 mwl8k_release_fw(&priv->fw.helper);
453 struct mwl8k_cmd_pkt {
459 } __attribute__((packed));
465 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
467 void __iomem *regs = priv->regs;
472 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
473 if (pci_dma_mapping_error(priv->pdev, dma_addr))
476 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
477 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
478 iowrite32(MWL8K_H2A_INT_DOORBELL,
479 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 iowrite32(MWL8K_H2A_INT_DUMMY,
481 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
488 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
489 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
490 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
498 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
501 * Clear 'command done' interrupt bit.
507 status = ioread32(priv->regs +
508 MWL8K_HIU_A2H_INTERRUPT_STATUS);
509 if (status & MWL8K_A2H_INT_OPC_DONE) {
510 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
511 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
512 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
522 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
523 const u8 *data, size_t length)
525 struct mwl8k_cmd_pkt *cmd;
529 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
533 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
539 int block_size = length > 256 ? 256 : length;
541 memcpy(cmd->payload, data + done, block_size);
542 cmd->length = cpu_to_le16(block_size);
544 rc = mwl8k_send_fw_load_cmd(priv, cmd,
545 sizeof(*cmd) + block_size);
550 length -= block_size;
555 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
563 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
564 const u8 *data, size_t length)
566 unsigned char *buffer;
567 int may_continue, rc = 0;
568 u32 done, prev_block_size;
570 buffer = kmalloc(1024, GFP_KERNEL);
577 while (may_continue > 0) {
580 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
581 if (block_size & 1) {
585 done += prev_block_size;
586 length -= prev_block_size;
589 if (block_size > 1024 || block_size > length) {
599 if (block_size == 0) {
606 prev_block_size = block_size;
607 memcpy(buffer, data + done, block_size);
609 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
614 if (!rc && length != 0)
622 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
626 const u8 *ucode = priv->fw.ucode->data;
627 size_t ucode_len = priv->fw.ucode->size;
628 const u8 *helper = priv->fw.helper->data;
629 size_t helper_len = priv->fw.helper->size;
631 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
632 rc = mwl8k_load_fw_image(priv, helper, helper_len);
634 printk(KERN_ERR "%s: unable to load firmware "
635 "helper image\n", pci_name(priv->pdev));
640 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
642 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
646 printk(KERN_ERR "%s: unable to load firmware data\n",
647 pci_name(priv->pdev));
651 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
656 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
657 == MWL8K_FWSTA_READY)
662 return loops ? 0 : -ETIMEDOUT;
667 * Defines shared between transmission and reception.
669 /* HT control fields for firmware */
674 } __attribute__((packed));
676 /* Firmware Station database operations */
677 #define MWL8K_STA_DB_ADD_ENTRY 0
678 #define MWL8K_STA_DB_MODIFY_ENTRY 1
679 #define MWL8K_STA_DB_DEL_ENTRY 2
680 #define MWL8K_STA_DB_FLUSH 3
682 /* Peer Entry flags - used to define the type of the peer node */
683 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
684 #define MWL8K_PEER_TYPE_ADHOC_STATION 4
686 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
687 #define MWL8K_MCS_BITMAP_SIZE 16
690 struct peer_capability_info {
691 /* Peer type - AP vs. STA. */
694 /* Basic 802.11 capabilities from assoc resp. */
697 /* Set if peer supports 802.11n high throughput (HT). */
700 /* Valid if HT is supported. */
702 __u8 extended_ht_caps;
703 struct ewc_ht_info ewc_info;
705 /* Legacy rate table. Intersection of our rates and peer rates. */
706 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
708 /* HT rate table. Intersection of our rates and peer rates. */
709 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
712 /* If set, interoperability mode, no proprietary extensions. */
716 __le16 amsdu_enabled;
717 } __attribute__((packed));
719 /* Inline functions to manipulate QoS field in data descriptor. */
720 static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
722 u16 val_mask = 0x000f;
723 u16 qos_mask = ~val_mask;
726 return (qos & qos_mask) | (tid & val_mask);
729 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
731 u16 val_mask = 1 << 4;
733 /* End of Service Period Bit 4 */
734 return qos | val_mask;
737 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
741 u16 qos_mask = ~(val_mask << shift);
743 /* Ack Policy Bit 5-6 */
744 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
747 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
749 u16 val_mask = 1 << 7;
751 /* AMSDU present Bit 7 */
752 return qos | val_mask;
755 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
759 u16 qos_mask = ~(val_mask << shift);
761 /* Queue Length Bits 8-15 */
762 return (qos & qos_mask) | ((len & val_mask) << shift);
765 /* DMA header used by firmware and hardware. */
766 struct mwl8k_dma_data {
768 struct ieee80211_hdr wh;
769 } __attribute__((packed));
771 /* Routines to add/remove DMA header from skb. */
772 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
774 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
775 void *dst, *src = &tr->wh;
776 __le16 fc = tr->wh.frame_control;
777 int hdrlen = ieee80211_hdrlen(fc);
778 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
780 dst = (void *)tr + space;
782 memmove(dst, src, hdrlen);
783 skb_pull(skb, space);
789 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
791 struct ieee80211_hdr *wh;
793 struct mwl8k_dma_data *tr;
795 wh = (struct ieee80211_hdr *)skb->data;
796 hdrlen = ieee80211_hdrlen(wh->frame_control);
800 * Copy up/down the 802.11 header; the firmware requires
801 * we present a 2-byte payload length followed by a
802 * 4-address header (w/o QoS), followed (optionally) by
803 * any WEP/ExtIV header (but only filled in for CCMP).
805 if (hdrlen != sizeof(struct mwl8k_dma_data))
806 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
808 tr = (struct mwl8k_dma_data *)skb->data;
810 memmove(&tr->wh, wh, hdrlen);
813 memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
816 * Firmware length is the length of the fully formed "802.11
817 * payload". That is, everything except for the 802.11 header.
818 * This includes all crypto material including the MIC.
820 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
829 #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
830 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
831 #define MWL8K_RX_CTRL_AMPDU 0x01
833 struct mwl8k_rx_desc {
837 __le32 pkt_phys_addr;
838 __le32 next_rx_desc_phys_addr;
848 } __attribute__((packed));
850 #define MWL8K_RX_DESCS 256
851 #define MWL8K_RX_MAXSZ 3800
853 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
855 struct mwl8k_priv *priv = hw->priv;
856 struct mwl8k_rx_queue *rxq = priv->rxq + index;
860 rxq->rx_desc_count = 0;
864 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
867 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
868 if (rxq->rx_desc_area == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
873 memset(rxq->rx_desc_area, 0, size);
875 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
876 sizeof(*rxq->rx_skb), GFP_KERNEL);
877 if (rxq->rx_skb == NULL) {
878 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
880 pci_free_consistent(priv->pdev, size,
881 rxq->rx_desc_area, rxq->rx_desc_dma);
884 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
886 for (i = 0; i < MWL8K_RX_DESCS; i++) {
887 struct mwl8k_rx_desc *rx_desc;
890 rx_desc = rxq->rx_desc_area + i;
891 nexti = (i + 1) % MWL8K_RX_DESCS;
893 rx_desc->next_rx_desc_phys_addr =
894 cpu_to_le32(rxq->rx_desc_dma
895 + nexti * sizeof(*rx_desc));
896 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
902 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
904 struct mwl8k_priv *priv = hw->priv;
905 struct mwl8k_rx_queue *rxq = priv->rxq + index;
909 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
913 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
917 rxq->rx_desc_count++;
920 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
922 rxq->rx_desc_area[rx].pkt_phys_addr =
923 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
924 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
926 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
927 rxq->rx_skb[rx] = skb;
929 rxq->rx_desc_area[rx].rx_ctrl = 0;
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
944 for (i = 0; i < MWL8K_RX_DESCS; i++) {
945 if (rxq->rx_skb[i] != NULL) {
948 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
949 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
951 kfree_skb(rxq->rx_skb[i]);
952 rxq->rx_skb[i] = NULL;
959 pci_free_consistent(priv->pdev,
960 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
961 rxq->rx_desc_area, rxq->rx_desc_dma);
962 rxq->rx_desc_area = NULL;
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
971 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
973 return priv->capture_beacon &&
974 ieee80211_is_beacon(wh->frame_control) &&
975 !compare_ether_addr(wh->addr3, priv->capture_bssid);
978 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
981 priv->capture_beacon = false;
982 memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
985 * Use GFP_ATOMIC as rxq_process is called from
986 * the primary interrupt handler, memory allocation call
989 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
990 if (priv->beacon_skb != NULL)
991 queue_work(priv->config_wq,
992 &priv->finalize_join_worker);
995 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
997 struct mwl8k_priv *priv = hw->priv;
998 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1002 while (rxq->rx_desc_count && limit--) {
1003 struct mwl8k_rx_desc *rx_desc;
1004 struct sk_buff *skb;
1005 struct ieee80211_rx_status status;
1007 struct ieee80211_hdr *wh;
1009 rx_desc = rxq->rx_desc_area + rxq->rx_head;
1010 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
1014 skb = rxq->rx_skb[rxq->rx_head];
1017 rxq->rx_skb[rxq->rx_head] = NULL;
1019 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
1020 rxq->rx_desc_count--;
1022 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
1023 pci_unmap_single(priv->pdev, addr,
1024 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1026 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
1027 if (mwl8k_remove_dma_header(skb)) {
1032 wh = (struct ieee80211_hdr *)skb->data;
1035 * Check for pending join operation. save a copy of
1036 * the beacon and schedule a tasklet to send finalize
1037 * join command to the firmware.
1039 if (mwl8k_capture_bssid(priv, wh))
1040 mwl8k_save_beacon(priv, skb);
1042 memset(&status, 0, sizeof(status));
1044 status.signal = -rx_desc->rssi;
1045 status.noise = -rx_desc->noise_level;
1046 status.qual = rx_desc->link_quality;
1048 status.rate_idx = 1;
1050 status.band = IEEE80211_BAND_2GHZ;
1051 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1052 ieee80211_rx_irqsafe(hw, skb, &status);
1062 * Packet transmission.
1065 /* Transmit queue assignment. */
1067 MWL8K_WME_AC_BK = 0, /* background access */
1068 MWL8K_WME_AC_BE = 1, /* best effort access */
1069 MWL8K_WME_AC_VI = 2, /* video access */
1070 MWL8K_WME_AC_VO = 3, /* voice access */
1073 /* Transmit packet ACK policy */
1074 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1075 #define MWL8K_TXD_ACK_POLICY_NONE 1
1076 #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
1077 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1079 #define GET_TXQ(_ac) (\
1080 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1081 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1082 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1085 #define MWL8K_TXD_STATUS_IDLE 0x00000000
1086 #define MWL8K_TXD_STATUS_USED 0x00000001
1087 #define MWL8K_TXD_STATUS_OK 0x00000001
1088 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1089 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1090 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1091 #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
1092 #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
1093 #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
1094 #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
1095 #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
1096 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1097 #define MWL8K_TXD_SOFTSTALE 0x80
1098 #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
1100 struct mwl8k_tx_desc {
1105 __le32 pkt_phys_addr;
1107 __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
1108 __le32 next_tx_desc_phys_addr;
1113 } __attribute__((packed));
1115 #define MWL8K_TX_DESCS 128
1117 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1119 struct mwl8k_priv *priv = hw->priv;
1120 struct mwl8k_tx_queue *txq = priv->txq + index;
1124 memset(&txq->tx_stats, 0,
1125 sizeof(struct ieee80211_tx_queue_stats));
1126 txq->tx_stats.limit = MWL8K_TX_DESCS;
1130 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1133 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1134 if (txq->tx_desc_area == NULL) {
1135 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1139 memset(txq->tx_desc_area, 0, size);
1141 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1143 if (txq->tx_skb == NULL) {
1144 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1146 pci_free_consistent(priv->pdev, size,
1147 txq->tx_desc_area, txq->tx_desc_dma);
1150 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1152 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1153 struct mwl8k_tx_desc *tx_desc;
1156 tx_desc = txq->tx_desc_area + i;
1157 nexti = (i + 1) % MWL8K_TX_DESCS;
1159 tx_desc->status = 0;
1160 tx_desc->next_tx_desc_phys_addr =
1161 cpu_to_le32(txq->tx_desc_dma +
1162 nexti * sizeof(*tx_desc));
1168 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1170 iowrite32(MWL8K_H2A_INT_PPA_READY,
1171 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1172 iowrite32(MWL8K_H2A_INT_DUMMY,
1173 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1174 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1177 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1179 return priv->pending_tx_pkts;
1182 struct mwl8k_txq_info {
1191 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1192 struct mwl8k_txq_info txinfo[],
1195 int count, desc, status;
1196 struct mwl8k_tx_queue *txq;
1197 struct mwl8k_tx_desc *tx_desc;
1200 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1201 spin_lock_bh(&priv->tx_lock);
1202 for (count = 0; count < num_queues; count++) {
1203 txq = priv->txq + count;
1204 txinfo[count].len = txq->tx_stats.len;
1205 txinfo[count].head = txq->tx_head;
1206 txinfo[count].tail = txq->tx_tail;
1207 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1208 tx_desc = txq->tx_desc_area + desc;
1209 status = le32_to_cpu(tx_desc->status);
1211 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1212 txinfo[count].fw_owned++;
1214 txinfo[count].drv_owned++;
1216 if (tx_desc->pkt_len == 0)
1217 txinfo[count].unused++;
1220 spin_unlock_bh(&priv->tx_lock);
1225 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1228 unsigned long timeout = 0;
1229 struct mwl8k_priv *priv = hw->priv;
1230 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1234 if (priv->tx_wait != NULL)
1235 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1237 spin_lock_bh(&priv->tx_lock);
1238 count = mwl8k_txq_busy(priv);
1240 priv->tx_wait = &cmd_wait;
1241 if (priv->radio_state)
1242 mwl8k_tx_start(priv);
1244 spin_unlock_bh(&priv->tx_lock);
1247 struct mwl8k_txq_info txinfo[4];
1251 timeout = wait_for_completion_timeout(&cmd_wait,
1252 msecs_to_jiffies(delay_ms));
1256 spin_lock_bh(&priv->tx_lock);
1257 priv->tx_wait = NULL;
1258 newcount = mwl8k_txq_busy(priv);
1259 spin_unlock_bh(&priv->tx_lock);
1261 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1262 __func__, __LINE__, delay_ms, count, newcount);
1264 mwl8k_scan_tx_ring(priv, txinfo, 4);
1265 for (index = 0 ; index < 4; index++)
1267 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1272 txinfo[index].fw_owned,
1273 txinfo[index].drv_owned,
1274 txinfo[index].unused);
1281 #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
1282 MWL8K_TXD_STATUS_OK_RETRY | \
1283 MWL8K_TXD_STATUS_OK_MORE_RETRY)
1284 #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
1285 #define MWL8K_TXD_FAIL_RETRY(stat) \
1286 ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
1288 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1290 struct mwl8k_priv *priv = hw->priv;
1291 struct mwl8k_tx_queue *txq = priv->txq + index;
1294 while (txq->tx_stats.len > 0) {
1297 struct mwl8k_tx_desc *tx_desc;
1300 struct sk_buff *skb;
1301 struct ieee80211_tx_info *info;
1306 tx_desc = txq->tx_desc_area + tx;
1308 status = le32_to_cpu(tx_desc->status);
1310 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1314 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1317 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1318 BUG_ON(txq->tx_stats.len == 0);
1319 txq->tx_stats.len--;
1320 priv->pending_tx_pkts--;
1322 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1323 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1324 skb = txq->tx_skb[tx].skb;
1325 txq->tx_skb[tx].skb = NULL;
1327 BUG_ON(skb == NULL);
1328 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1330 rc = mwl8k_remove_dma_header(skb);
1332 /* Mark descriptor as unused */
1333 tx_desc->pkt_phys_addr = 0;
1334 tx_desc->pkt_len = 0;
1336 if (txq->tx_skb[tx].clone) {
1337 /* Replace with original skb
1338 * before returning to stack
1339 * as buffer has been cloned
1342 skb = txq->tx_skb[tx].clone;
1343 txq->tx_skb[tx].clone = NULL;
1347 /* Something has gone wrong here.
1348 * Failed to remove DMA header.
1349 * Print error message and drop packet.
1351 printk(KERN_ERR "%s: Error removing DMA header from "
1352 "tx skb 0x%p.\n", priv->name, skb);
1358 info = IEEE80211_SKB_CB(skb);
1359 ieee80211_tx_info_clear_status(info);
1361 /* Convert firmware status stuff into tx_status */
1362 if (MWL8K_TXD_SUCCESS(status)) {
1364 info->flags |= IEEE80211_TX_STAT_ACK;
1367 ieee80211_tx_status_irqsafe(hw, skb);
1369 wake = !priv->inconfig && priv->radio_state;
1373 ieee80211_wake_queue(hw, index);
1376 /* must be called only when the card's transmit is completely halted */
1377 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1379 struct mwl8k_priv *priv = hw->priv;
1380 struct mwl8k_tx_queue *txq = priv->txq + index;
1382 mwl8k_txq_reclaim(hw, index, 1);
1387 pci_free_consistent(priv->pdev,
1388 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1389 txq->tx_desc_area, txq->tx_desc_dma);
1390 txq->tx_desc_area = NULL;
1394 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1396 struct mwl8k_priv *priv = hw->priv;
1397 struct ieee80211_tx_info *tx_info;
1398 struct ieee80211_hdr *wh;
1399 struct mwl8k_tx_queue *txq;
1400 struct mwl8k_tx_desc *tx;
1401 struct mwl8k_dma_data *tr;
1402 struct mwl8k_vif *mwl8k_vif;
1403 struct sk_buff *org_skb = skb;
1406 bool qosframe = false, ampduframe = false;
1407 bool mcframe = false, eapolframe = false;
1408 bool amsduframe = false;
1411 txq = priv->txq + index;
1412 tx = txq->tx_desc_area + txq->tx_tail;
1414 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1417 * Append HW DMA header to start of packet. Drop packet if
1418 * there is not enough space or a failure to unshare/unclone
1421 skb = mwl8k_add_dma_header(skb);
1424 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1425 "header, dropping TX frame.\n", priv->name);
1426 dev_kfree_skb(org_skb);
1427 return NETDEV_TX_OK;
1430 tx_info = IEEE80211_SKB_CB(skb);
1431 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1432 tr = (struct mwl8k_dma_data *)skb->data;
1434 fc = wh->frame_control;
1435 qosframe = ieee80211_is_data_qos(fc);
1436 mcframe = is_multicast_ether_addr(wh->addr1);
1437 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1439 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1440 u16 seqno = mwl8k_vif->seqno;
1441 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1442 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1443 mwl8k_vif->seqno = seqno++ % 4096;
1447 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1449 dma = pci_map_single(priv->pdev, skb->data,
1450 skb->len, PCI_DMA_TODEVICE);
1452 if (pci_dma_mapping_error(priv->pdev, dma)) {
1453 printk(KERN_DEBUG "%s: failed to dma map skb, "
1454 "dropping TX frame.\n", priv->name);
1456 if (org_skb != NULL)
1457 dev_kfree_skb(org_skb);
1460 return NETDEV_TX_OK;
1463 /* Set desc header, cpu bit order. */
1466 tx->tx_priority = index;
1467 tx->qos_control = 0;
1469 tx->peer_id = mwl8k_vif->peer_id;
1471 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1473 /* Setup firmware control bit fields for each frame type. */
1474 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1476 qos = mwl8k_qos_setbit_eosp(qos);
1477 /* Set Queue size to unspecified */
1478 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1479 } else if (ieee80211_is_data(fc)) {
1482 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1485 * Tell firmware to not send EAPOL pkts in an
1486 * aggregate. Verify against mac80211 tx path. If
1487 * stack turns off AMPDU for an EAPOL frame this
1488 * check will be removed.
1491 qos = mwl8k_qos_setbit_ack(qos,
1492 MWL8K_TXD_ACK_POLICY_NORMAL);
1494 /* Send pkt in an aggregate if AMPDU frame. */
1496 qos = mwl8k_qos_setbit_ack(qos,
1497 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1499 qos = mwl8k_qos_setbit_ack(qos,
1500 MWL8K_TXD_ACK_POLICY_NORMAL);
1503 qos = mwl8k_qos_setbit_amsdu(qos);
1507 /* Convert to little endian */
1508 tx->qos_control = cpu_to_le16(qos);
1509 tx->status = cpu_to_le32(tx->status);
1510 tx->pkt_phys_addr = cpu_to_le32(dma);
1511 tx->pkt_len = cpu_to_le16(skb->len);
1513 txq->tx_skb[txq->tx_tail].skb = skb;
1514 txq->tx_skb[txq->tx_tail].clone =
1515 skb == org_skb ? NULL : org_skb;
1517 spin_lock_bh(&priv->tx_lock);
1519 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1520 MWL8K_TXD_STATUS_FW_OWNED);
1522 txq->tx_stats.len++;
1523 priv->pending_tx_pkts++;
1524 txq->tx_stats.count++;
1527 if (txq->tx_tail == MWL8K_TX_DESCS)
1529 if (txq->tx_head == txq->tx_tail)
1530 ieee80211_stop_queue(hw, index);
1532 if (priv->inconfig) {
1534 * Silently queue packet when we are in the middle of
1535 * a config cycle. Notify firmware only if we are
1536 * waiting for TXQs to empty. If a packet is sent
1537 * before .config() is complete, perhaps it is better
1538 * to drop the packet, as the channel is being changed
1539 * and the packet will end up on the wrong channel.
1541 printk(KERN_ERR "%s(): WARNING TX activity while "
1542 "in config\n", __func__);
1544 if (priv->tx_wait != NULL)
1545 mwl8k_tx_start(priv);
1547 mwl8k_tx_start(priv);
1549 spin_unlock_bh(&priv->tx_lock);
1551 return NETDEV_TX_OK;
1556 * Command processing.
1559 /* Timeout firmware commands after 2000ms */
1560 #define MWL8K_CMD_TIMEOUT_MS 2000
1562 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1564 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1565 struct mwl8k_priv *priv = hw->priv;
1566 void __iomem *regs = priv->regs;
1567 dma_addr_t dma_addr;
1568 unsigned int dma_size;
1570 u16 __iomem *result;
1571 unsigned long timeout = 0;
1574 cmd->result = 0xFFFF;
1575 dma_size = le16_to_cpu(cmd->length);
1576 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1577 PCI_DMA_BIDIRECTIONAL);
1578 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1581 if (priv->hostcmd_wait != NULL)
1582 printk(KERN_ERR "WARNING host command in progress\n");
1584 spin_lock_irq(&priv->fw_lock);
1585 priv->hostcmd_wait = &cmd_wait;
1586 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1587 iowrite32(MWL8K_H2A_INT_DOORBELL,
1588 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1589 iowrite32(MWL8K_H2A_INT_DUMMY,
1590 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1591 spin_unlock_irq(&priv->fw_lock);
1593 timeout = wait_for_completion_timeout(&cmd_wait,
1594 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1596 result = &cmd->result;
1598 spin_lock_irq(&priv->fw_lock);
1599 priv->hostcmd_wait = NULL;
1600 spin_unlock_irq(&priv->fw_lock);
1601 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1603 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1604 MWL8K_CMD_TIMEOUT_MS);
1607 rc = *result ? -EINVAL : 0;
1609 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1611 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1615 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1616 PCI_DMA_BIDIRECTIONAL);
1623 struct mwl8k_cmd_get_hw_spec {
1624 struct mwl8k_cmd_pkt header;
1626 __u8 host_interface;
1628 __u8 perm_addr[IEEE80211_ADDR_LEN];
1633 __u8 mcs_bitmap[16];
1634 __le32 rx_queue_ptr;
1635 __le32 num_tx_queues;
1636 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1638 __le32 num_tx_desc_per_queue;
1639 __le32 total_rx_desc;
1640 } __attribute__((packed));
1642 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1644 struct mwl8k_priv *priv = hw->priv;
1645 struct mwl8k_cmd_get_hw_spec *cmd;
1649 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1653 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1654 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1656 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1657 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1658 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1659 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1660 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1661 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1662 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1663 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1665 rc = mwl8k_post_cmd(hw, &cmd->header);
1668 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1669 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1670 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1671 priv->hw_rev = cmd->hw_rev;
1672 priv->region_code = le16_to_cpu(cmd->region_code);
1680 * CMD_MAC_MULTICAST_ADR.
1682 struct mwl8k_cmd_mac_multicast_adr {
1683 struct mwl8k_cmd_pkt header;
1686 __u8 addr[1][IEEE80211_ADDR_LEN];
1689 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1690 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1692 struct dev_addr_list *mclist)
1694 struct mwl8k_cmd_mac_multicast_adr *cmd;
1697 int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
1698 cmd = kzalloc(size, GFP_KERNEL);
1702 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1703 cmd->header.length = cpu_to_le16(size);
1704 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1705 cmd->numaddr = cpu_to_le16(mc_count);
1706 while ((index < mc_count) && mclist) {
1707 if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
1709 goto mwl8k_cmd_mac_multicast_adr_exit;
1711 memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
1713 mclist = mclist->next;
1716 rc = mwl8k_post_cmd(hw, &cmd->header);
1718 mwl8k_cmd_mac_multicast_adr_exit:
1724 * CMD_802_11_GET_STAT.
1726 struct mwl8k_cmd_802_11_get_stat {
1727 struct mwl8k_cmd_pkt header;
1730 } __attribute__((packed));
1732 #define MWL8K_STAT_ACK_FAILURE 9
1733 #define MWL8K_STAT_RTS_FAILURE 12
1734 #define MWL8K_STAT_FCS_ERROR 24
1735 #define MWL8K_STAT_RTS_SUCCESS 11
1737 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1738 struct ieee80211_low_level_stats *stats)
1740 struct mwl8k_cmd_802_11_get_stat *cmd;
1743 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1747 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1748 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1749 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1751 rc = mwl8k_post_cmd(hw, &cmd->header);
1753 stats->dot11ACKFailureCount =
1754 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1755 stats->dot11RTSFailureCount =
1756 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1757 stats->dot11FCSErrorCount =
1758 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1759 stats->dot11RTSSuccessCount =
1760 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1768 * CMD_802_11_RADIO_CONTROL.
1770 struct mwl8k_cmd_802_11_radio_control {
1771 struct mwl8k_cmd_pkt header;
1775 } __attribute__((packed));
1777 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1779 struct mwl8k_priv *priv = hw->priv;
1780 struct mwl8k_cmd_802_11_radio_control *cmd;
1783 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1784 !(enable & MWL8K_RADIO_FORCE))
1787 enable &= MWL8K_RADIO_ENABLE;
1789 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1793 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1794 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1795 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1796 cmd->control = cpu_to_le16(priv->radio_preamble);
1797 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1799 rc = mwl8k_post_cmd(hw, &cmd->header);
1803 priv->radio_state = enable;
1809 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1811 struct mwl8k_priv *priv;
1813 if (hw == NULL || hw->priv == NULL)
1817 priv->radio_preamble = (short_preamble ?
1818 MWL8K_RADIO_SHORT_PREAMBLE :
1819 MWL8K_RADIO_LONG_PREAMBLE);
1821 return mwl8k_cmd_802_11_radio_control(hw,
1822 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1826 * CMD_802_11_RF_TX_POWER.
1828 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1830 struct mwl8k_cmd_802_11_rf_tx_power {
1831 struct mwl8k_cmd_pkt header;
1833 __le16 support_level;
1834 __le16 current_level;
1836 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1837 } __attribute__((packed));
1839 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1841 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1844 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1848 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1849 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1850 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1851 cmd->support_level = cpu_to_le16(dBm);
1853 rc = mwl8k_post_cmd(hw, &cmd->header);
1862 struct mwl8k_cmd_set_pre_scan {
1863 struct mwl8k_cmd_pkt header;
1864 } __attribute__((packed));
1866 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1868 struct mwl8k_cmd_set_pre_scan *cmd;
1871 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1875 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1876 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1878 rc = mwl8k_post_cmd(hw, &cmd->header);
1885 * CMD_SET_POST_SCAN.
1887 struct mwl8k_cmd_set_post_scan {
1888 struct mwl8k_cmd_pkt header;
1890 __u8 bssid[IEEE80211_ADDR_LEN];
1891 } __attribute__((packed));
1894 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
1896 struct mwl8k_cmd_set_post_scan *cmd;
1899 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1903 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1904 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1906 memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
1908 rc = mwl8k_post_cmd(hw, &cmd->header);
1915 * CMD_SET_RF_CHANNEL.
1917 struct mwl8k_cmd_set_rf_channel {
1918 struct mwl8k_cmd_pkt header;
1920 __u8 current_channel;
1921 __le32 channel_flags;
1922 } __attribute__((packed));
1924 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1925 struct ieee80211_channel *channel)
1927 struct mwl8k_cmd_set_rf_channel *cmd;
1930 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1934 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1935 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1936 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1937 cmd->current_channel = channel->hw_value;
1938 if (channel->band == IEEE80211_BAND_2GHZ)
1939 cmd->channel_flags = cpu_to_le32(0x00000081);
1941 cmd->channel_flags = cpu_to_le32(0x00000000);
1943 rc = mwl8k_post_cmd(hw, &cmd->header);
1952 struct mwl8k_cmd_set_slot {
1953 struct mwl8k_cmd_pkt header;
1956 } __attribute__((packed));
1958 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1960 struct mwl8k_cmd_set_slot *cmd;
1963 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1967 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1968 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1969 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1970 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1972 rc = mwl8k_post_cmd(hw, &cmd->header);
1981 struct mwl8k_cmd_mimo_config {
1982 struct mwl8k_cmd_pkt header;
1984 __u8 rx_antenna_map;
1985 __u8 tx_antenna_map;
1986 } __attribute__((packed));
1988 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1990 struct mwl8k_cmd_mimo_config *cmd;
1993 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1997 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1998 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1999 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2000 cmd->rx_antenna_map = rx;
2001 cmd->tx_antenna_map = tx;
2003 rc = mwl8k_post_cmd(hw, &cmd->header);
2010 * CMD_ENABLE_SNIFFER.
2012 struct mwl8k_cmd_enable_sniffer {
2013 struct mwl8k_cmd_pkt header;
2015 } __attribute__((packed));
2017 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2019 struct mwl8k_cmd_enable_sniffer *cmd;
2022 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2026 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2027 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2028 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
2030 rc = mwl8k_post_cmd(hw, &cmd->header);
2037 * CMD_SET_RATE_ADAPT_MODE.
2039 struct mwl8k_cmd_set_rate_adapt_mode {
2040 struct mwl8k_cmd_pkt header;
2043 } __attribute__((packed));
2045 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2047 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2050 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2054 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2055 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2056 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2057 cmd->mode = cpu_to_le16(mode);
2059 rc = mwl8k_post_cmd(hw, &cmd->header);
2068 struct mwl8k_cmd_set_wmm {
2069 struct mwl8k_cmd_pkt header;
2071 } __attribute__((packed));
2073 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2075 struct mwl8k_priv *priv = hw->priv;
2076 struct mwl8k_cmd_set_wmm *cmd;
2079 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2083 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2084 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2085 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2087 rc = mwl8k_post_cmd(hw, &cmd->header);
2091 priv->wmm_mode = enable;
2097 * CMD_SET_RTS_THRESHOLD.
2099 struct mwl8k_cmd_rts_threshold {
2100 struct mwl8k_cmd_pkt header;
2103 } __attribute__((packed));
2105 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2106 u16 action, u16 *threshold)
2108 struct mwl8k_cmd_rts_threshold *cmd;
2111 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2115 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2116 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2117 cmd->action = cpu_to_le16(action);
2118 cmd->threshold = cpu_to_le16(*threshold);
2120 rc = mwl8k_post_cmd(hw, &cmd->header);
2127 * CMD_SET_EDCA_PARAMS.
2129 struct mwl8k_cmd_set_edca_params {
2130 struct mwl8k_cmd_pkt header;
2132 /* See MWL8K_SET_EDCA_XXX below */
2135 /* TX opportunity in units of 32 us */
2138 /* Log exponent of max contention period: 0...15*/
2141 /* Log exponent of min contention period: 0...15 */
2144 /* Adaptive interframe spacing in units of 32us */
2147 /* TX queue to configure */
2149 } __attribute__((packed));
2151 #define MWL8K_GET_EDCA_ALL 0
2152 #define MWL8K_SET_EDCA_CW 0x01
2153 #define MWL8K_SET_EDCA_TXOP 0x02
2154 #define MWL8K_SET_EDCA_AIFS 0x04
2156 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2157 MWL8K_SET_EDCA_TXOP | \
2158 MWL8K_SET_EDCA_AIFS)
2161 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2162 __u16 cw_min, __u16 cw_max,
2163 __u8 aifs, __u16 txop)
2165 struct mwl8k_cmd_set_edca_params *cmd;
2166 u32 log_cw_min, log_cw_max;
2169 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2173 log_cw_min = ilog2(cw_min+1);
2174 log_cw_max = ilog2(cw_max+1);
2175 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2176 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2178 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2179 cmd->txop = cpu_to_le16(txop);
2180 cmd->log_cw_max = (u8)log_cw_max;
2181 cmd->log_cw_min = (u8)log_cw_min;
2185 rc = mwl8k_post_cmd(hw, &cmd->header);
2192 * CMD_FINALIZE_JOIN.
2195 /* FJ beacon buffer size is compiled into the firmware. */
2196 #define MWL8K_FJ_BEACON_MAXLEN 128
2198 struct mwl8k_cmd_finalize_join {
2199 struct mwl8k_cmd_pkt header;
2200 __le32 sleep_interval; /* Number of beacon periods to sleep */
2201 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2202 } __attribute__((packed));
2204 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2205 __u16 framelen, __u16 dtim)
2207 struct mwl8k_cmd_finalize_join *cmd;
2208 struct ieee80211_mgmt *payload = frame;
2216 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2220 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2221 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2224 cmd->sleep_interval = cpu_to_le32(dtim);
2226 cmd->sleep_interval = cpu_to_le32(1);
2228 hdrlen = ieee80211_hdrlen(payload->frame_control);
2230 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2232 /* XXX TBD Might just have to abort and return an error */
2233 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2234 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2235 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2236 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2238 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2239 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2241 if (payload && payload_len)
2242 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2244 rc = mwl8k_post_cmd(hw, &cmd->header);
2252 struct mwl8k_cmd_update_sta_db {
2253 struct mwl8k_cmd_pkt header;
2255 /* See STADB_ACTION_TYPE */
2258 /* Peer MAC address */
2259 __u8 peer_addr[IEEE80211_ADDR_LEN];
2263 /* Peer info - valid during add/update. */
2264 struct peer_capability_info peer_info;
2265 } __attribute__((packed));
2267 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2268 struct ieee80211_vif *vif, __u32 action)
2270 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2271 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2272 struct mwl8k_cmd_update_sta_db *cmd;
2273 struct peer_capability_info *peer_info;
2274 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2275 DECLARE_MAC_BUF(mac);
2279 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2283 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2284 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2286 cmd->action = cpu_to_le32(action);
2287 peer_info = &cmd->peer_info;
2288 memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
2291 case MWL8K_STA_DB_ADD_ENTRY:
2292 case MWL8K_STA_DB_MODIFY_ENTRY:
2293 /* Build peer_info block */
2294 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2295 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2296 peer_info->interop = 1;
2297 peer_info->amsdu_enabled = 0;
2299 rates = peer_info->legacy_rates;
2300 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2301 rates[count] = bitrates[count].hw_value;
2303 rc = mwl8k_post_cmd(hw, &cmd->header);
2305 mv_vif->peer_id = peer_info->station_id;
2309 case MWL8K_STA_DB_DEL_ENTRY:
2310 case MWL8K_STA_DB_FLUSH:
2312 rc = mwl8k_post_cmd(hw, &cmd->header);
2314 mv_vif->peer_id = 0;
2325 #define IEEE80211_OPMODE_DISABLED 0x00
2326 #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
2327 #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
2328 #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
2330 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2332 #define MWL8K_FRAME_PROT_DISABLED 0x00
2333 #define MWL8K_FRAME_PROT_11G 0x07
2334 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2335 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2336 #define MWL8K_FRAME_PROT_MASK 0x07
2338 struct mwl8k_cmd_update_set_aid {
2339 struct mwl8k_cmd_pkt header;
2342 /* AP's MAC address (BSSID) */
2343 __u8 bssid[IEEE80211_ADDR_LEN];
2344 __le16 protection_mode;
2345 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2346 } __attribute__((packed));
2348 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2349 struct ieee80211_vif *vif)
2351 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2352 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2353 struct mwl8k_cmd_update_set_aid *cmd;
2354 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2359 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2363 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2364 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2365 cmd->aid = cpu_to_le16(info->aid);
2367 memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
2369 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2371 if (info->use_cts_prot) {
2372 prot_mode = MWL8K_FRAME_PROT_11G;
2374 switch (info->ht_operation_mode &
2375 IEEE80211_HT_OP_MODE_PROTECTION) {
2376 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2377 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2379 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2380 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2383 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2388 cmd->protection_mode = cpu_to_le16(prot_mode);
2390 for (count = 0; count < mv_vif->legacy_nrates; count++)
2391 cmd->supp_rates[count] = bitrates[count].hw_value;
2393 rc = mwl8k_post_cmd(hw, &cmd->header);
2402 struct mwl8k_cmd_update_rateset {
2403 struct mwl8k_cmd_pkt header;
2404 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2406 /* Bitmap for supported MCS codes. */
2407 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2408 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2409 } __attribute__((packed));
2411 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2412 struct ieee80211_vif *vif)
2414 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2415 struct mwl8k_cmd_update_rateset *cmd;
2416 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2420 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2424 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2425 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2427 for (count = 0; count < mv_vif->legacy_nrates; count++)
2428 cmd->legacy_rates[count] = bitrates[count].hw_value;
2430 rc = mwl8k_post_cmd(hw, &cmd->header);
2437 * CMD_USE_FIXED_RATE.
2439 #define MWL8K_RATE_TABLE_SIZE 8
2440 #define MWL8K_UCAST_RATE 0
2441 #define MWL8K_MCAST_RATE 1
2442 #define MWL8K_BCAST_RATE 2
2444 #define MWL8K_USE_FIXED_RATE 0x0001
2445 #define MWL8K_USE_AUTO_RATE 0x0002
2447 struct mwl8k_rate_entry {
2448 /* Set to 1 if HT rate, 0 if legacy. */
2451 /* Set to 1 to use retry_count field. */
2452 __le32 enable_retry;
2454 /* Specified legacy rate or MCS. */
2457 /* Number of allowed retries. */
2459 } __attribute__((packed));
2461 struct mwl8k_rate_table {
2462 /* 1 to allow specified rate and below */
2463 __le32 allow_rate_drop;
2465 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2466 } __attribute__((packed));
2468 struct mwl8k_cmd_use_fixed_rate {
2469 struct mwl8k_cmd_pkt header;
2471 struct mwl8k_rate_table rate_table;
2473 /* Unicast, Broadcast or Multicast */
2477 } __attribute__((packed));
2479 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2480 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2482 struct mwl8k_cmd_use_fixed_rate *cmd;
2486 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2490 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2491 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2493 cmd->action = cpu_to_le32(action);
2494 cmd->rate_type = cpu_to_le32(rate_type);
2496 if (rate_table != NULL) {
2497 /* Copy over each field manually so
2498 * that bitflipping can be done
2500 cmd->rate_table.allow_rate_drop =
2501 cpu_to_le32(rate_table->allow_rate_drop);
2502 cmd->rate_table.num_rates =
2503 cpu_to_le32(rate_table->num_rates);
2505 for (count = 0; count < rate_table->num_rates; count++) {
2506 struct mwl8k_rate_entry *dst =
2507 &cmd->rate_table.rate_entry[count];
2508 struct mwl8k_rate_entry *src =
2509 &rate_table->rate_entry[count];
2511 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2512 dst->enable_retry = cpu_to_le32(src->enable_retry);
2513 dst->rate = cpu_to_le32(src->rate);
2514 dst->retry_count = cpu_to_le32(src->retry_count);
2518 rc = mwl8k_post_cmd(hw, &cmd->header);
2526 * Interrupt handling.
2528 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2530 struct ieee80211_hw *hw = dev_id;
2531 struct mwl8k_priv *priv = hw->priv;
2534 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2535 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2537 status &= priv->int_mask;
2541 if (status & MWL8K_A2H_INT_TX_DONE)
2542 tasklet_schedule(&priv->tx_reclaim_task);
2544 if (status & MWL8K_A2H_INT_RX_READY) {
2545 while (rxq_process(hw, 0, 1))
2546 rxq_refill(hw, 0, 1);
2549 if (status & MWL8K_A2H_INT_OPC_DONE) {
2550 if (priv->hostcmd_wait != NULL) {
2551 complete(priv->hostcmd_wait);
2552 priv->hostcmd_wait = NULL;
2556 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2557 if (!priv->inconfig &&
2558 priv->radio_state &&
2559 mwl8k_txq_busy(priv))
2560 mwl8k_tx_start(priv);
2568 * Core driver operations.
2570 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2572 struct mwl8k_priv *priv = hw->priv;
2573 int index = skb_get_queue_mapping(skb);
2576 if (priv->current_channel == NULL) {
2577 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2578 "disabled\n", priv->name);
2580 return NETDEV_TX_OK;
2583 rc = mwl8k_txq_xmit(hw, index, skb);
2588 struct mwl8k_work_struct {
2589 /* Initialized by mwl8k_queue_work(). */
2590 struct work_struct wt;
2592 /* Required field passed in to mwl8k_queue_work(). */
2593 struct ieee80211_hw *hw;
2595 /* Required field passed in to mwl8k_queue_work(). */
2596 int (*wfunc)(struct work_struct *w);
2598 /* Initialized by mwl8k_queue_work(). */
2599 struct completion *cmd_wait;
2605 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2606 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2610 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2611 unsigned long timeout_ms;
2613 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2614 u32 txwait_attempts;
2616 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2621 /* Flags controlling behavior of config queue requests */
2623 /* Caller spins while waiting for completion. */
2624 #define MWL8K_WQ_SPIN 0x00000001
2626 /* Wait for TX queues to empty before proceeding with configuration. */
2627 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2629 /* Queue request and return immediately. */
2630 #define MWL8K_WQ_POST_REQUEST 0x00000004
2633 * Caller sleeps and waits for task complete notification.
2634 * Do not use in atomic context.
2636 #define MWL8K_WQ_SLEEP 0x00000008
2638 /* Free work struct when task is done. */
2639 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2642 * Config request is queued and returns to caller imediately. Use
2643 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2644 * when this flag is set.
2646 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2647 MWL8K_WQ_FREE_WORKSTRUCT)
2649 /* Default work queue behavior is to sleep and wait for tx completion. */
2650 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2653 * Default config request timeout. Add adjustments to make sure the
2654 * config thread waits long enough for both tx wait and cmd wait before
2658 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2659 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2661 /* Default number of TX wait attempts. */
2662 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2664 /* Total time to wait for TXQ to drain. */
2665 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2666 MWL8K_WQ_TXWAIT_ATTEMPTS)
2668 /* Scheduling slop. */
2669 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2671 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2673 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2675 static void mwl8k_config_thread(struct work_struct *wt)
2677 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2678 struct ieee80211_hw *hw = worker->hw;
2679 struct mwl8k_priv *priv = hw->priv;
2682 spin_lock_irq(&priv->tx_lock);
2683 priv->inconfig = true;
2684 spin_unlock_irq(&priv->tx_lock);
2686 ieee80211_stop_queues(hw);
2689 * Wait for host queues to drain before doing PHY
2690 * reconfiguration. This avoids interrupting any in-flight
2691 * DMA transfers to the hardware.
2693 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2697 u32 tx_wait_attempts = worker->txwait_attempts;
2699 time_remaining = worker->tx_timeout_ms;
2700 if (!tx_wait_attempts)
2701 tx_wait_attempts = 1;
2703 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2707 iter = tx_wait_attempts;
2711 if (time_remaining > timeout) {
2712 time_remaining -= timeout;
2713 wait_time = timeout;
2715 wait_time = time_remaining;
2720 rc = mwl8k_tx_wait_empty(hw, wait_time);
2722 printk(KERN_ERR "%s() txwait timeout=%ums "
2723 "Retry:%u/%u\n", __func__, timeout,
2724 tx_wait_attempts - iter + 1,
2727 } while (rc && --iter);
2729 rc = iter ? 0 : -ETIMEDOUT;
2732 rc = worker->wfunc(wt);
2734 spin_lock_irq(&priv->tx_lock);
2735 priv->inconfig = false;
2736 if (priv->pending_tx_pkts && priv->radio_state)
2737 mwl8k_tx_start(priv);
2738 spin_unlock_irq(&priv->tx_lock);
2739 ieee80211_wake_queues(hw);
2742 if (worker->options & MWL8K_WQ_SLEEP)
2743 complete(worker->cmd_wait);
2745 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2749 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2750 struct mwl8k_work_struct *worker,
2751 struct workqueue_struct *wqueue,
2752 int (*wfunc)(struct work_struct *w))
2754 unsigned long timeout = 0;
2757 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2759 if (!worker->timeout_ms)
2760 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2762 if (!worker->options)
2763 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2765 if (!worker->txwait_attempts)
2766 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2768 if (!worker->tx_timeout_ms)
2769 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2772 worker->cmd_wait = &cmd_wait;
2774 worker->wfunc = wfunc;
2776 INIT_WORK(&worker->wt, mwl8k_config_thread);
2777 queue_work(wqueue, &worker->wt);
2779 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2782 if (worker->options & MWL8K_WQ_SPIN) {
2783 timeout = worker->timeout_ms;
2784 while (timeout && (worker->rc > 0)) {
2788 } else if (worker->options & MWL8K_WQ_SLEEP)
2789 timeout = wait_for_completion_timeout(&cmd_wait,
2790 msecs_to_jiffies(worker->timeout_ms));
2795 cancel_work_sync(&worker->wt);
2803 struct mwl8k_start_worker {
2804 struct mwl8k_work_struct header;
2807 static int mwl8k_start_wt(struct work_struct *wt)
2809 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2810 struct ieee80211_hw *hw = worker->header.hw;
2811 struct mwl8k_priv *priv = hw->priv;
2814 if (priv->vif != NULL) {
2816 goto mwl8k_start_exit;
2820 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2822 goto mwl8k_start_exit;
2825 /* Purge TX/RX HW queues */
2826 if (mwl8k_cmd_set_pre_scan(hw)) {
2828 goto mwl8k_start_exit;
2831 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2833 goto mwl8k_start_exit;
2836 /* Enable firmware rate adaptation */
2837 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2839 goto mwl8k_start_exit;
2842 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2843 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2845 goto mwl8k_start_exit;
2848 /* Disable sniffer mode */
2849 if (mwl8k_enable_sniffer(hw, 0))
2856 static int mwl8k_start(struct ieee80211_hw *hw)
2858 struct mwl8k_start_worker *worker;
2859 struct mwl8k_priv *priv = hw->priv;
2862 /* Enable tx reclaim tasklet */
2863 tasklet_enable(&priv->tx_reclaim_task);
2865 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2866 IRQF_SHARED, MWL8K_NAME, hw);
2868 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2871 goto mwl8k_start_disable_tasklet;
2874 /* Enable interrupts */
2875 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2877 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2878 if (worker == NULL) {
2880 goto mwl8k_start_disable_irq;
2883 rc = mwl8k_queue_work(hw, &worker->header,
2884 priv->config_wq, mwl8k_start_wt);
2889 if (rc == -ETIMEDOUT)
2890 printk(KERN_ERR "%s() timed out\n", __func__);
2894 mwl8k_start_disable_irq:
2895 spin_lock_irq(&priv->tx_lock);
2896 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2897 spin_unlock_irq(&priv->tx_lock);
2898 free_irq(priv->pdev->irq, hw);
2900 mwl8k_start_disable_tasklet:
2901 tasklet_disable(&priv->tx_reclaim_task);
2906 struct mwl8k_stop_worker {
2907 struct mwl8k_work_struct header;
2910 static int mwl8k_stop_wt(struct work_struct *wt)
2912 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2913 struct ieee80211_hw *hw = worker->header.hw;
2916 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2921 static void mwl8k_stop(struct ieee80211_hw *hw)
2924 struct mwl8k_stop_worker *worker;
2925 struct mwl8k_priv *priv = hw->priv;
2928 if (priv->vif != NULL)
2931 ieee80211_stop_queues(hw);
2933 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2937 rc = mwl8k_queue_work(hw, &worker->header,
2938 priv->config_wq, mwl8k_stop_wt);
2940 if (rc == -ETIMEDOUT)
2941 printk(KERN_ERR "%s() timed out\n", __func__);
2943 /* Disable interrupts */
2944 spin_lock_irq(&priv->tx_lock);
2945 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2946 spin_unlock_irq(&priv->tx_lock);
2947 free_irq(priv->pdev->irq, hw);
2949 /* Stop finalize join worker */
2950 cancel_work_sync(&priv->finalize_join_worker);
2951 if (priv->beacon_skb != NULL)
2952 dev_kfree_skb(priv->beacon_skb);
2954 /* Stop tx reclaim tasklet */
2955 tasklet_disable(&priv->tx_reclaim_task);
2957 /* Stop config thread */
2958 flush_workqueue(priv->config_wq);
2960 /* Return all skbs to mac80211 */
2961 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2962 mwl8k_txq_reclaim(hw, i, 1);
2965 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2966 struct ieee80211_if_init_conf *conf)
2968 struct mwl8k_priv *priv = hw->priv;
2969 struct mwl8k_vif *mwl8k_vif;
2972 * We only support one active interface at a time.
2974 if (priv->vif != NULL)
2978 * We only support managed interfaces for now.
2980 if (conf->type != NL80211_IFTYPE_STATION &&
2981 conf->type != NL80211_IFTYPE_MONITOR)
2984 /* Clean out driver private area */
2985 mwl8k_vif = MWL8K_VIF(conf->vif);
2986 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2988 /* Save the mac address */
2989 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
2991 /* Back pointer to parent config block */
2992 mwl8k_vif->priv = priv;
2994 /* Setup initial PHY parameters */
2995 memcpy(mwl8k_vif->legacy_rates ,
2996 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2997 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2999 /* Set Initial sequence number to zero */
3000 mwl8k_vif->seqno = 0;
3002 priv->vif = conf->vif;
3003 priv->current_channel = NULL;
3008 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3009 struct ieee80211_if_init_conf *conf)
3011 struct mwl8k_priv *priv = hw->priv;
3013 if (priv->vif == NULL)
3019 struct mwl8k_config_worker {
3020 struct mwl8k_work_struct header;
3024 static int mwl8k_config_wt(struct work_struct *wt)
3026 struct mwl8k_config_worker *worker =
3027 (struct mwl8k_config_worker *)wt;
3028 struct ieee80211_hw *hw = worker->header.hw;
3029 struct ieee80211_conf *conf = &hw->conf;
3030 struct mwl8k_priv *priv = hw->priv;
3033 if (!conf->radio_enabled) {
3034 mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3035 priv->current_channel = NULL;
3037 goto mwl8k_config_exit;
3040 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
3042 goto mwl8k_config_exit;
3045 priv->current_channel = conf->channel;
3047 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
3049 goto mwl8k_config_exit;
3052 if (conf->power_level > 18)
3053 conf->power_level = 18;
3054 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
3056 goto mwl8k_config_exit;
3059 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3066 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3069 struct mwl8k_config_worker *worker;
3070 struct mwl8k_priv *priv = hw->priv;
3072 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3076 worker->changed = changed;
3077 rc = mwl8k_queue_work(hw, &worker->header,
3078 priv->config_wq, mwl8k_config_wt);
3079 if (rc == -ETIMEDOUT) {
3080 printk(KERN_ERR "%s() timed out.\n", __func__);
3087 * mac80211 will crash on anything other than -EINVAL on
3088 * error. Looks like wireless extensions which calls mac80211
3089 * may be the actual culprit...
3091 return rc ? -EINVAL : 0;
3094 struct mwl8k_bss_info_changed_worker {
3095 struct mwl8k_work_struct header;
3096 struct ieee80211_vif *vif;
3097 struct ieee80211_bss_conf *info;
3101 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3103 struct mwl8k_bss_info_changed_worker *worker =
3104 (struct mwl8k_bss_info_changed_worker *)wt;
3105 struct ieee80211_hw *hw = worker->header.hw;
3106 struct ieee80211_vif *vif = worker->vif;
3107 struct ieee80211_bss_conf *info = worker->info;
3111 struct mwl8k_priv *priv = hw->priv;
3112 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3114 changed = worker->changed;
3115 priv->capture_beacon = false;
3118 memcpy(&mwl8k_vif->bss_info, info,
3119 sizeof(struct ieee80211_bss_conf));
3122 if (mwl8k_update_rateset(hw, vif))
3123 goto mwl8k_bss_info_changed_exit;
3125 /* Turn on rate adaptation */
3126 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3127 MWL8K_UCAST_RATE, NULL))
3128 goto mwl8k_bss_info_changed_exit;
3130 /* Set radio preamble */
3131 if (mwl8k_set_radio_preamble(hw,
3132 info->use_short_preamble))
3133 goto mwl8k_bss_info_changed_exit;
3136 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3137 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3138 goto mwl8k_bss_info_changed_exit;
3140 /* Update peer rate info */
3141 if (mwl8k_cmd_update_sta_db(hw, vif,
3142 MWL8K_STA_DB_MODIFY_ENTRY))
3143 goto mwl8k_bss_info_changed_exit;
3146 if (mwl8k_cmd_set_aid(hw, vif))
3147 goto mwl8k_bss_info_changed_exit;
3150 * Finalize the join. Tell rx handler to process
3151 * next beacon from our BSSID.
3153 memcpy(priv->capture_bssid,
3154 mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
3155 priv->capture_beacon = true;
3157 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3158 memset(&mwl8k_vif->bss_info, 0,
3159 sizeof(struct ieee80211_bss_conf));
3160 memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
3163 mwl8k_bss_info_changed_exit:
3168 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3169 struct ieee80211_vif *vif,
3170 struct ieee80211_bss_conf *info,
3173 struct mwl8k_bss_info_changed_worker *worker;
3174 struct mwl8k_priv *priv = hw->priv;
3175 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3178 if (changed & BSS_CHANGED_BSSID)
3179 memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
3181 if ((changed & BSS_CHANGED_ASSOC) == 0)
3184 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3189 worker->info = info;
3190 worker->changed = changed;
3191 rc = mwl8k_queue_work(hw, &worker->header,
3193 mwl8k_bss_info_changed_wt);
3195 if (rc == -ETIMEDOUT)
3196 printk(KERN_ERR "%s() timed out\n", __func__);
3199 struct mwl8k_configure_filter_worker {
3200 struct mwl8k_work_struct header;
3201 unsigned int changed_flags;
3202 unsigned int *total_flags;
3204 struct dev_addr_list *mclist;
3207 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3209 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3211 struct mwl8k_configure_filter_worker *worker =
3212 (struct mwl8k_configure_filter_worker *)wt;
3214 struct ieee80211_hw *hw = worker->header.hw;
3215 unsigned int changed_flags = worker->changed_flags;
3216 unsigned int *total_flags = worker->total_flags;
3217 int mc_count = worker->mc_count;
3218 struct dev_addr_list *mclist = worker->mclist;
3220 struct mwl8k_priv *priv = hw->priv;
3221 struct mwl8k_vif *mv_vif;
3224 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3225 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3226 rc = mwl8k_cmd_set_pre_scan(hw);
3228 mv_vif = MWL8K_VIF(priv->vif);
3229 rc = mwl8k_cmd_set_post_scan(hw, mv_vif->bssid);
3234 goto mwl8k_configure_filter_exit;
3236 mc_count = mc_count < priv->num_mcaddrs ?
3237 mc_count : priv->num_mcaddrs;
3238 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3241 "%s()Error setting multicast addresses\n",
3245 mwl8k_configure_filter_exit:
3249 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3250 unsigned int changed_flags,
3251 unsigned int *total_flags,
3253 struct dev_addr_list *mclist)
3256 struct mwl8k_configure_filter_worker *worker;
3257 struct mwl8k_priv *priv = hw->priv;
3259 /* Clear unsupported feature flags */
3260 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3262 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
3265 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3269 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3270 worker->changed_flags = changed_flags;
3271 worker->total_flags = total_flags;
3272 worker->mc_count = mc_count;
3273 worker->mclist = mclist;
3275 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3276 mwl8k_configure_filter_wt);
3279 struct mwl8k_set_rts_threshold_worker {
3280 struct mwl8k_work_struct header;
3284 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3286 struct mwl8k_set_rts_threshold_worker *worker =
3287 (struct mwl8k_set_rts_threshold_worker *)wt;
3289 struct ieee80211_hw *hw = worker->header.hw;
3290 u16 threshold = (u16)(worker->value);
3293 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3298 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3301 struct mwl8k_set_rts_threshold_worker *worker;
3302 struct mwl8k_priv *priv = hw->priv;
3304 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3308 worker->value = value;
3310 rc = mwl8k_queue_work(hw, &worker->header,
3312 mwl8k_set_rts_threshold_wt);
3315 if (rc == -ETIMEDOUT) {
3316 printk(KERN_ERR "%s() timed out\n", __func__);
3323 struct mwl8k_conf_tx_worker {
3324 struct mwl8k_work_struct header;
3326 const struct ieee80211_tx_queue_params *params;
3329 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3331 struct mwl8k_conf_tx_worker *worker =
3332 (struct mwl8k_conf_tx_worker *)wt;
3334 struct ieee80211_hw *hw = worker->header.hw;
3335 u16 queue = worker->queue;
3336 const struct ieee80211_tx_queue_params *params = worker->params;
3338 struct mwl8k_priv *priv = hw->priv;
3341 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3342 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3344 goto mwl8k_conf_tx_exit;
3347 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3348 params->cw_max, params->aifs, params->txop))
3354 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3355 const struct ieee80211_tx_queue_params *params)
3358 struct mwl8k_conf_tx_worker *worker;
3359 struct mwl8k_priv *priv = hw->priv;
3361 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3365 worker->queue = queue;
3366 worker->params = params;
3367 rc = mwl8k_queue_work(hw, &worker->header,
3368 priv->config_wq, mwl8k_conf_tx_wt);
3370 if (rc == -ETIMEDOUT) {
3371 printk(KERN_ERR "%s() timed out\n", __func__);
3377 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3378 struct ieee80211_tx_queue_stats *stats)
3380 struct mwl8k_priv *priv = hw->priv;
3381 struct mwl8k_tx_queue *txq;
3384 spin_lock_bh(&priv->tx_lock);
3385 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3386 txq = priv->txq + index;
3387 memcpy(&stats[index], &txq->tx_stats,
3388 sizeof(struct ieee80211_tx_queue_stats));
3390 spin_unlock_bh(&priv->tx_lock);
3394 struct mwl8k_get_stats_worker {
3395 struct mwl8k_work_struct header;
3396 struct ieee80211_low_level_stats *stats;
3399 static int mwl8k_get_stats_wt(struct work_struct *wt)
3401 struct mwl8k_get_stats_worker *worker =
3402 (struct mwl8k_get_stats_worker *)wt;
3404 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3407 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3408 struct ieee80211_low_level_stats *stats)
3411 struct mwl8k_get_stats_worker *worker;
3412 struct mwl8k_priv *priv = hw->priv;
3414 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3418 worker->stats = stats;
3419 rc = mwl8k_queue_work(hw, &worker->header,
3420 priv->config_wq, mwl8k_get_stats_wt);
3423 if (rc == -ETIMEDOUT) {
3424 printk(KERN_ERR "%s() timed out\n", __func__);
3431 static const struct ieee80211_ops mwl8k_ops = {
3433 .start = mwl8k_start,
3435 .add_interface = mwl8k_add_interface,
3436 .remove_interface = mwl8k_remove_interface,
3437 .config = mwl8k_config,
3438 .bss_info_changed = mwl8k_bss_info_changed,
3439 .configure_filter = mwl8k_configure_filter,
3440 .set_rts_threshold = mwl8k_set_rts_threshold,
3441 .conf_tx = mwl8k_conf_tx,
3442 .get_tx_stats = mwl8k_get_tx_stats,
3443 .get_stats = mwl8k_get_stats,
3446 static void mwl8k_tx_reclaim_handler(unsigned long data)
3449 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3450 struct mwl8k_priv *priv = hw->priv;
3452 spin_lock_bh(&priv->tx_lock);
3453 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3454 mwl8k_txq_reclaim(hw, i, 0);
3456 if (priv->tx_wait != NULL) {
3457 int count = mwl8k_txq_busy(priv);
3459 complete(priv->tx_wait);
3460 priv->tx_wait = NULL;
3463 spin_unlock_bh(&priv->tx_lock);
3466 static void mwl8k_finalize_join_worker(struct work_struct *work)
3468 struct mwl8k_priv *priv =
3469 container_of(work, struct mwl8k_priv, finalize_join_worker);
3470 struct sk_buff *skb = priv->beacon_skb;
3471 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3473 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3476 priv->beacon_skb = NULL;
3479 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3480 const struct pci_device_id *id)
3482 struct ieee80211_hw *hw;
3483 struct mwl8k_priv *priv;
3484 DECLARE_MAC_BUF(mac);
3489 rc = pci_enable_device(pdev);
3491 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3496 rc = pci_request_regions(pdev, MWL8K_NAME);
3498 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3503 pci_set_master(pdev);
3505 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3507 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3515 priv->hostcmd_wait = NULL;
3516 priv->tx_wait = NULL;
3517 priv->inconfig = false;
3518 priv->wep_enabled = 0;
3519 priv->wmm_mode = false;
3520 priv->pending_tx_pkts = 0;
3521 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3523 spin_lock_init(&priv->fw_lock);
3525 SET_IEEE80211_DEV(hw, &pdev->dev);
3526 pci_set_drvdata(pdev, hw);
3528 priv->regs = pci_iomap(pdev, 1, 0x10000);
3529 if (priv->regs == NULL) {
3530 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3534 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3535 priv->band.band = IEEE80211_BAND_2GHZ;
3536 priv->band.channels = priv->channels;
3537 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3538 priv->band.bitrates = priv->rates;
3539 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3540 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3542 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3543 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3546 * Extra headroom is the size of the required DMA header
3547 * minus the size of the smallest 802.11 frame (CTS frame).
3549 hw->extra_tx_headroom =
3550 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3552 hw->channel_change_time = 10;
3554 hw->queues = MWL8K_TX_QUEUES;
3556 hw->wiphy->interface_modes =
3557 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3559 /* Set rssi and noise values to dBm */
3560 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3561 hw->vif_data_size = sizeof(struct mwl8k_vif);
3564 /* Set default radio state and preamble */
3565 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3566 priv->radio_state = MWL8K_RADIO_DISABLE;
3568 /* Finalize join worker */
3569 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3571 /* TX reclaim tasklet */
3572 tasklet_init(&priv->tx_reclaim_task,
3573 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3574 tasklet_disable(&priv->tx_reclaim_task);
3576 /* Config workthread */
3577 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3578 if (priv->config_wq == NULL)
3581 /* Power management cookie */
3582 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3583 if (priv->cookie == NULL)
3586 rc = mwl8k_rxq_init(hw, 0);
3589 rxq_refill(hw, 0, INT_MAX);
3591 spin_lock_init(&priv->tx_lock);
3593 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3594 rc = mwl8k_txq_init(hw, i);
3596 goto err_free_queues;
3599 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3601 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3602 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3603 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3605 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3606 IRQF_SHARED, MWL8K_NAME, hw);
3608 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3610 goto err_free_queues;
3613 /* Reset firmware and hardware */
3614 mwl8k_hw_reset(priv);
3616 /* Ask userland hotplug daemon for the device firmware */
3617 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3619 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3623 /* Load firmware into hardware */
3624 rc = mwl8k_load_firmware(priv);
3626 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3627 goto err_stop_firmware;
3630 /* Reclaim memory once firmware is successfully loaded */
3631 mwl8k_release_firmware(priv);
3634 * Temporarily enable interrupts. Initial firmware host
3635 * commands use interrupts and avoids polling. Disable
3636 * interrupts when done.
3638 priv->int_mask |= MWL8K_A2H_EVENTS;
3640 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3642 /* Get config data, mac addrs etc */
3643 rc = mwl8k_cmd_get_hw_spec(hw);
3645 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3646 goto err_stop_firmware;
3649 /* Turn radio off */
3650 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3652 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3653 goto err_stop_firmware;
3656 /* Disable interrupts */
3657 spin_lock_irq(&priv->tx_lock);
3658 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3659 spin_unlock_irq(&priv->tx_lock);
3660 free_irq(priv->pdev->irq, hw);
3662 rc = ieee80211_register_hw(hw);
3664 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3665 goto err_stop_firmware;
3668 fw = (u8 *)&priv->fw_rev;
3669 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3671 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3672 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3673 printk(KERN_INFO "%s: MAC Address: %s\n", priv->name,
3674 print_mac(mac, hw->wiphy->perm_addr));
3679 mwl8k_hw_reset(priv);
3680 mwl8k_release_firmware(priv);
3683 spin_lock_irq(&priv->tx_lock);
3684 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3685 spin_unlock_irq(&priv->tx_lock);
3686 free_irq(priv->pdev->irq, hw);
3689 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3690 mwl8k_txq_deinit(hw, i);
3691 mwl8k_rxq_deinit(hw, 0);
3694 if (priv->cookie != NULL)
3695 pci_free_consistent(priv->pdev, 4,
3696 priv->cookie, priv->cookie_dma);
3698 if (priv->regs != NULL)
3699 pci_iounmap(pdev, priv->regs);
3701 if (priv->config_wq != NULL)
3702 destroy_workqueue(priv->config_wq);
3704 pci_set_drvdata(pdev, NULL);
3705 ieee80211_free_hw(hw);
3708 pci_release_regions(pdev);
3709 pci_disable_device(pdev);
3714 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3716 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3719 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3721 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3722 struct mwl8k_priv *priv;
3729 ieee80211_stop_queues(hw);
3731 /* Remove tx reclaim tasklet */
3732 tasklet_kill(&priv->tx_reclaim_task);
3734 /* Stop config thread */
3735 destroy_workqueue(priv->config_wq);
3738 mwl8k_hw_reset(priv);
3740 /* Return all skbs to mac80211 */
3741 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3742 mwl8k_txq_reclaim(hw, i, 1);
3744 ieee80211_unregister_hw(hw);
3746 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3747 mwl8k_txq_deinit(hw, i);
3749 mwl8k_rxq_deinit(hw, 0);
3751 pci_free_consistent(priv->pdev, 4,
3752 priv->cookie, priv->cookie_dma);
3754 pci_iounmap(pdev, priv->regs);
3755 pci_set_drvdata(pdev, NULL);
3756 ieee80211_free_hw(hw);
3757 pci_release_regions(pdev);
3758 pci_disable_device(pdev);
3761 static struct pci_driver mwl8k_driver = {
3763 .id_table = mwl8k_table,
3764 .probe = mwl8k_probe,
3765 .remove = __devexit_p(mwl8k_remove),
3766 .shutdown = __devexit_p(mwl8k_shutdown),
3769 static int __init mwl8k_init(void)
3771 return pci_register_driver(&mwl8k_driver);
3774 static void __exit mwl8k_exit(void)
3776 pci_unregister_driver(&mwl8k_driver);
3779 module_init(mwl8k_init);
3780 module_exit(mwl8k_exit);