2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
149 struct completion *hostcmd_wait;
151 /* lock held over TX and TX reap */
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
157 struct ieee80211_vif *vif;
159 struct ieee80211_channel *current_channel;
161 /* power management status cookie from firmware */
163 dma_addr_t cookie_dma;
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[14];
184 bool radio_short_preamble;
185 bool sniffer_enabled;
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
192 /* XXX need to convert this to handle multiple interfaces */
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
203 struct work_struct finalize_join_worker;
205 /* Tasklet to reclaim TX descriptors and buffers after tx */
206 struct tasklet_struct tx_reclaim_task;
209 /* Per interface specific private data */
211 /* Local MAC address. */
212 u8 mac_addr[ETH_ALEN];
214 /* Non AMPDU sequence number assigned by driver */
217 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
220 /* Index into station database. Returned by UPDATE_STADB. */
223 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
225 static const struct ieee80211_channel mwl8k_channels[] = {
226 { .center_freq = 2412, .hw_value = 1, },
227 { .center_freq = 2417, .hw_value = 2, },
228 { .center_freq = 2422, .hw_value = 3, },
229 { .center_freq = 2427, .hw_value = 4, },
230 { .center_freq = 2432, .hw_value = 5, },
231 { .center_freq = 2437, .hw_value = 6, },
232 { .center_freq = 2442, .hw_value = 7, },
233 { .center_freq = 2447, .hw_value = 8, },
234 { .center_freq = 2452, .hw_value = 9, },
235 { .center_freq = 2457, .hw_value = 10, },
236 { .center_freq = 2462, .hw_value = 11, },
237 { .center_freq = 2467, .hw_value = 12, },
238 { .center_freq = 2472, .hw_value = 13, },
239 { .center_freq = 2484, .hw_value = 14, },
242 static const struct ieee80211_rate mwl8k_rates[] = {
243 { .bitrate = 10, .hw_value = 2, },
244 { .bitrate = 20, .hw_value = 4, },
245 { .bitrate = 55, .hw_value = 11, },
246 { .bitrate = 110, .hw_value = 22, },
247 { .bitrate = 220, .hw_value = 44, },
248 { .bitrate = 60, .hw_value = 12, },
249 { .bitrate = 90, .hw_value = 18, },
250 { .bitrate = 120, .hw_value = 24, },
251 { .bitrate = 180, .hw_value = 36, },
252 { .bitrate = 240, .hw_value = 48, },
253 { .bitrate = 360, .hw_value = 72, },
254 { .bitrate = 480, .hw_value = 96, },
255 { .bitrate = 540, .hw_value = 108, },
256 { .bitrate = 720, .hw_value = 144, },
259 /* Set or get info from Firmware */
260 #define MWL8K_CMD_SET 0x0001
261 #define MWL8K_CMD_GET 0x0000
263 /* Firmware command codes */
264 #define MWL8K_CMD_CODE_DNLD 0x0001
265 #define MWL8K_CMD_GET_HW_SPEC 0x0003
266 #define MWL8K_CMD_SET_HW_SPEC 0x0004
267 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
268 #define MWL8K_CMD_GET_STAT 0x0014
269 #define MWL8K_CMD_RADIO_CONTROL 0x001c
270 #define MWL8K_CMD_RF_TX_POWER 0x001e
271 #define MWL8K_CMD_RF_ANTENNA 0x0020
272 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
273 #define MWL8K_CMD_SET_POST_SCAN 0x0108
274 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
275 #define MWL8K_CMD_SET_AID 0x010d
276 #define MWL8K_CMD_SET_RATE 0x0110
277 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
278 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
279 #define MWL8K_CMD_SET_SLOT 0x0114
280 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
281 #define MWL8K_CMD_SET_WMM_MODE 0x0123
282 #define MWL8K_CMD_MIMO_CONFIG 0x0125
283 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
284 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
285 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
286 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
287 #define MWL8K_CMD_UPDATE_STADB 0x1123
289 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
291 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
292 snprintf(buf, bufsize, "%s", #x);\
295 switch (cmd & ~0x8000) {
296 MWL8K_CMDNAME(CODE_DNLD);
297 MWL8K_CMDNAME(GET_HW_SPEC);
298 MWL8K_CMDNAME(SET_HW_SPEC);
299 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
300 MWL8K_CMDNAME(GET_STAT);
301 MWL8K_CMDNAME(RADIO_CONTROL);
302 MWL8K_CMDNAME(RF_TX_POWER);
303 MWL8K_CMDNAME(RF_ANTENNA);
304 MWL8K_CMDNAME(SET_PRE_SCAN);
305 MWL8K_CMDNAME(SET_POST_SCAN);
306 MWL8K_CMDNAME(SET_RF_CHANNEL);
307 MWL8K_CMDNAME(SET_AID);
308 MWL8K_CMDNAME(SET_RATE);
309 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
310 MWL8K_CMDNAME(RTS_THRESHOLD);
311 MWL8K_CMDNAME(SET_SLOT);
312 MWL8K_CMDNAME(SET_EDCA_PARAMS);
313 MWL8K_CMDNAME(SET_WMM_MODE);
314 MWL8K_CMDNAME(MIMO_CONFIG);
315 MWL8K_CMDNAME(USE_FIXED_RATE);
316 MWL8K_CMDNAME(ENABLE_SNIFFER);
317 MWL8K_CMDNAME(SET_MAC_ADDR);
318 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
319 MWL8K_CMDNAME(UPDATE_STADB);
321 snprintf(buf, bufsize, "0x%x", cmd);
328 /* Hardware and firmware reset */
329 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
331 iowrite32(MWL8K_H2A_INT_RESET,
332 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
333 iowrite32(MWL8K_H2A_INT_RESET,
334 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
338 /* Release fw image */
339 static void mwl8k_release_fw(struct firmware **fw)
343 release_firmware(*fw);
347 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
349 mwl8k_release_fw(&priv->fw_ucode);
350 mwl8k_release_fw(&priv->fw_helper);
353 /* Request fw image */
354 static int mwl8k_request_fw(struct mwl8k_priv *priv,
355 const char *fname, struct firmware **fw)
357 /* release current image */
359 mwl8k_release_fw(fw);
361 return request_firmware((const struct firmware **)fw,
362 fname, &priv->pdev->dev);
365 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
367 struct mwl8k_device_info *di = priv->device_info;
370 if (di->helper_image != NULL) {
371 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
373 printk(KERN_ERR "%s: Error requesting helper "
374 "firmware file %s\n", pci_name(priv->pdev),
380 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
382 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
383 pci_name(priv->pdev), di->fw_image);
384 mwl8k_release_fw(&priv->fw_helper);
391 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
392 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
394 struct mwl8k_cmd_pkt {
400 } __attribute__((packed));
406 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
408 void __iomem *regs = priv->regs;
412 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
413 if (pci_dma_mapping_error(priv->pdev, dma_addr))
416 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
417 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
418 iowrite32(MWL8K_H2A_INT_DOORBELL,
419 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
420 iowrite32(MWL8K_H2A_INT_DUMMY,
421 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
427 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
428 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
429 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
437 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
439 return loops ? 0 : -ETIMEDOUT;
442 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
443 const u8 *data, size_t length)
445 struct mwl8k_cmd_pkt *cmd;
449 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
453 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
459 int block_size = length > 256 ? 256 : length;
461 memcpy(cmd->payload, data + done, block_size);
462 cmd->length = cpu_to_le16(block_size);
464 rc = mwl8k_send_fw_load_cmd(priv, cmd,
465 sizeof(*cmd) + block_size);
470 length -= block_size;
475 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
483 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
484 const u8 *data, size_t length)
486 unsigned char *buffer;
487 int may_continue, rc = 0;
488 u32 done, prev_block_size;
490 buffer = kmalloc(1024, GFP_KERNEL);
497 while (may_continue > 0) {
500 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
501 if (block_size & 1) {
505 done += prev_block_size;
506 length -= prev_block_size;
509 if (block_size > 1024 || block_size > length) {
519 if (block_size == 0) {
526 prev_block_size = block_size;
527 memcpy(buffer, data + done, block_size);
529 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
534 if (!rc && length != 0)
542 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
544 struct mwl8k_priv *priv = hw->priv;
545 struct firmware *fw = priv->fw_ucode;
549 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
550 struct firmware *helper = priv->fw_helper;
552 if (helper == NULL) {
553 printk(KERN_ERR "%s: helper image needed but none "
554 "given\n", pci_name(priv->pdev));
558 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
560 printk(KERN_ERR "%s: unable to load firmware "
561 "helper image\n", pci_name(priv->pdev));
566 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
568 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
572 printk(KERN_ERR "%s: unable to load firmware image\n",
573 pci_name(priv->pdev));
577 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
583 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
584 if (ready_code == MWL8K_FWAP_READY) {
587 } else if (ready_code == MWL8K_FWSTA_READY) {
596 return loops ? 0 : -ETIMEDOUT;
600 /* DMA header used by firmware and hardware. */
601 struct mwl8k_dma_data {
603 struct ieee80211_hdr wh;
605 } __attribute__((packed));
607 /* Routines to add/remove DMA header from skb. */
608 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
610 struct mwl8k_dma_data *tr;
613 tr = (struct mwl8k_dma_data *)skb->data;
614 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
616 if (hdrlen != sizeof(tr->wh)) {
617 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
618 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
619 *((__le16 *)(tr->data - 2)) = qos;
621 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
625 if (hdrlen != sizeof(*tr))
626 skb_pull(skb, sizeof(*tr) - hdrlen);
629 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
631 struct ieee80211_hdr *wh;
633 struct mwl8k_dma_data *tr;
636 * Add a firmware DMA header; the firmware requires that we
637 * present a 2-byte payload length followed by a 4-address
638 * header (without QoS field), followed (optionally) by any
639 * WEP/ExtIV header (but only filled in for CCMP).
641 wh = (struct ieee80211_hdr *)skb->data;
643 hdrlen = ieee80211_hdrlen(wh->frame_control);
644 if (hdrlen != sizeof(*tr))
645 skb_push(skb, sizeof(*tr) - hdrlen);
647 if (ieee80211_is_data_qos(wh->frame_control))
650 tr = (struct mwl8k_dma_data *)skb->data;
652 memmove(&tr->wh, wh, hdrlen);
653 if (hdrlen != sizeof(tr->wh))
654 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
657 * Firmware length is the length of the fully formed "802.11
658 * payload". That is, everything except for the 802.11 header.
659 * This includes all crypto material including the MIC.
661 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
666 * Packet reception for 88w8366 AP firmware.
668 struct mwl8k_rxd_8366_ap {
672 __le32 pkt_phys_addr;
673 __le32 next_rxd_phys_addr;
677 __le32 hw_noise_floor_info;
684 } __attribute__((packed));
686 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
687 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
688 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
690 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
692 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
694 struct mwl8k_rxd_8366_ap *rxd = _rxd;
696 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
697 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
700 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
702 struct mwl8k_rxd_8366_ap *rxd = _rxd;
704 rxd->pkt_len = cpu_to_le16(len);
705 rxd->pkt_phys_addr = cpu_to_le32(addr);
711 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
714 struct mwl8k_rxd_8366_ap *rxd = _rxd;
716 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
720 memset(status, 0, sizeof(*status));
722 status->signal = -rxd->rssi;
723 status->noise = -rxd->noise_floor;
725 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
726 status->flag |= RX_FLAG_HT;
727 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
728 status->flag |= RX_FLAG_40MHZ;
729 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
733 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
734 if (mwl8k_rates[i].hw_value == rxd->rate) {
735 status->rate_idx = i;
741 status->band = IEEE80211_BAND_2GHZ;
742 status->freq = ieee80211_channel_to_frequency(rxd->channel);
744 *qos = rxd->qos_control;
746 return le16_to_cpu(rxd->pkt_len);
749 static struct rxd_ops rxd_8366_ap_ops = {
750 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
751 .rxd_init = mwl8k_rxd_8366_ap_init,
752 .rxd_refill = mwl8k_rxd_8366_ap_refill,
753 .rxd_process = mwl8k_rxd_8366_ap_process,
757 * Packet reception for STA firmware.
759 struct mwl8k_rxd_sta {
763 __le32 pkt_phys_addr;
764 __le32 next_rxd_phys_addr;
774 } __attribute__((packed));
776 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
777 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
778 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
779 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
780 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
781 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
783 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
785 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
787 struct mwl8k_rxd_sta *rxd = _rxd;
789 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
790 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
793 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
795 struct mwl8k_rxd_sta *rxd = _rxd;
797 rxd->pkt_len = cpu_to_le16(len);
798 rxd->pkt_phys_addr = cpu_to_le32(addr);
804 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
807 struct mwl8k_rxd_sta *rxd = _rxd;
810 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
814 rate_info = le16_to_cpu(rxd->rate_info);
816 memset(status, 0, sizeof(*status));
818 status->signal = -rxd->rssi;
819 status->noise = -rxd->noise_level;
820 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
821 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
823 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
824 status->flag |= RX_FLAG_SHORTPRE;
825 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
826 status->flag |= RX_FLAG_40MHZ;
827 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
828 status->flag |= RX_FLAG_SHORT_GI;
829 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
830 status->flag |= RX_FLAG_HT;
832 status->band = IEEE80211_BAND_2GHZ;
833 status->freq = ieee80211_channel_to_frequency(rxd->channel);
835 *qos = rxd->qos_control;
837 return le16_to_cpu(rxd->pkt_len);
840 static struct rxd_ops rxd_sta_ops = {
841 .rxd_size = sizeof(struct mwl8k_rxd_sta),
842 .rxd_init = mwl8k_rxd_sta_init,
843 .rxd_refill = mwl8k_rxd_sta_refill,
844 .rxd_process = mwl8k_rxd_sta_process,
848 #define MWL8K_RX_DESCS 256
849 #define MWL8K_RX_MAXSZ 3800
851 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
853 struct mwl8k_priv *priv = hw->priv;
854 struct mwl8k_rx_queue *rxq = priv->rxq + index;
862 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
864 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
865 if (rxq->rxd == NULL) {
866 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
867 wiphy_name(hw->wiphy));
870 memset(rxq->rxd, 0, size);
872 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
873 if (rxq->buf == NULL) {
874 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
875 wiphy_name(hw->wiphy));
876 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
879 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
881 for (i = 0; i < MWL8K_RX_DESCS; i++) {
885 dma_addr_t next_dma_addr;
887 desc_size = priv->rxd_ops->rxd_size;
888 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
891 if (nexti == MWL8K_RX_DESCS)
893 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
895 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
901 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
903 struct mwl8k_priv *priv = hw->priv;
904 struct mwl8k_rx_queue *rxq = priv->rxq + index;
908 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
914 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
918 addr = pci_map_single(priv->pdev, skb->data,
919 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
923 if (rxq->tail == MWL8K_RX_DESCS)
925 rxq->buf[rx].skb = skb;
926 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
928 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
929 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
944 for (i = 0; i < MWL8K_RX_DESCS; i++) {
945 if (rxq->buf[i].skb != NULL) {
946 pci_unmap_single(priv->pdev,
947 pci_unmap_addr(&rxq->buf[i], dma),
948 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
949 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
951 kfree_skb(rxq->buf[i].skb);
952 rxq->buf[i].skb = NULL;
959 pci_free_consistent(priv->pdev,
960 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
961 rxq->rxd, rxq->rxd_dma);
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
971 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
973 return priv->capture_beacon &&
974 ieee80211_is_beacon(wh->frame_control) &&
975 !compare_ether_addr(wh->addr3, priv->capture_bssid);
978 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
981 struct mwl8k_priv *priv = hw->priv;
983 priv->capture_beacon = false;
984 memset(priv->capture_bssid, 0, ETH_ALEN);
987 * Use GFP_ATOMIC as rxq_process is called from
988 * the primary interrupt handler, memory allocation call
991 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
992 if (priv->beacon_skb != NULL)
993 ieee80211_queue_work(hw, &priv->finalize_join_worker);
996 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
998 struct mwl8k_priv *priv = hw->priv;
999 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1003 while (rxq->rxd_count && limit--) {
1004 struct sk_buff *skb;
1007 struct ieee80211_rx_status status;
1010 skb = rxq->buf[rxq->head].skb;
1014 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1016 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1020 rxq->buf[rxq->head].skb = NULL;
1022 pci_unmap_single(priv->pdev,
1023 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1024 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1025 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1028 if (rxq->head == MWL8K_RX_DESCS)
1033 skb_put(skb, pkt_len);
1034 mwl8k_remove_dma_header(skb, qos);
1037 * Check for a pending join operation. Save a
1038 * copy of the beacon and schedule a tasklet to
1039 * send a FINALIZE_JOIN command to the firmware.
1041 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1042 mwl8k_save_beacon(hw, skb);
1044 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1045 ieee80211_rx_irqsafe(hw, skb);
1055 * Packet transmission.
1058 #define MWL8K_TXD_STATUS_OK 0x00000001
1059 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1060 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1061 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1062 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1064 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1065 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1066 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1067 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1068 #define MWL8K_QOS_EOSP 0x0010
1070 struct mwl8k_tx_desc {
1075 __le32 pkt_phys_addr;
1077 __u8 dest_MAC_addr[ETH_ALEN];
1078 __le32 next_txd_phys_addr;
1083 } __attribute__((packed));
1085 #define MWL8K_TX_DESCS 128
1087 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1089 struct mwl8k_priv *priv = hw->priv;
1090 struct mwl8k_tx_queue *txq = priv->txq + index;
1094 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1095 txq->stats.limit = MWL8K_TX_DESCS;
1099 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1101 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1102 if (txq->txd == NULL) {
1103 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1104 wiphy_name(hw->wiphy));
1107 memset(txq->txd, 0, size);
1109 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1110 if (txq->skb == NULL) {
1111 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1112 wiphy_name(hw->wiphy));
1113 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1116 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1118 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1119 struct mwl8k_tx_desc *tx_desc;
1122 tx_desc = txq->txd + i;
1123 nexti = (i + 1) % MWL8K_TX_DESCS;
1125 tx_desc->status = 0;
1126 tx_desc->next_txd_phys_addr =
1127 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1133 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1135 iowrite32(MWL8K_H2A_INT_PPA_READY,
1136 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1137 iowrite32(MWL8K_H2A_INT_DUMMY,
1138 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1139 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1142 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1144 struct mwl8k_priv *priv = hw->priv;
1147 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1148 struct mwl8k_tx_queue *txq = priv->txq + i;
1154 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1155 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1158 status = le32_to_cpu(tx_desc->status);
1159 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1164 if (tx_desc->pkt_len == 0)
1168 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1169 "fw_owned=%d drv_owned=%d unused=%d\n",
1170 wiphy_name(hw->wiphy), i,
1171 txq->stats.len, txq->head, txq->tail,
1172 fw_owned, drv_owned, unused);
1177 * Must be called with priv->fw_mutex held and tx queues stopped.
1179 #define MWL8K_TX_WAIT_TIMEOUT_MS 1000
1181 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1183 struct mwl8k_priv *priv = hw->priv;
1184 DECLARE_COMPLETION_ONSTACK(tx_wait);
1191 * The TX queues are stopped at this point, so this test
1192 * doesn't need to take ->tx_lock.
1194 if (!priv->pending_tx_pkts)
1200 spin_lock_bh(&priv->tx_lock);
1201 priv->tx_wait = &tx_wait;
1204 unsigned long timeout;
1206 oldcount = priv->pending_tx_pkts;
1208 spin_unlock_bh(&priv->tx_lock);
1209 timeout = wait_for_completion_timeout(&tx_wait,
1210 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1211 spin_lock_bh(&priv->tx_lock);
1214 WARN_ON(priv->pending_tx_pkts);
1216 printk(KERN_NOTICE "%s: tx rings drained\n",
1217 wiphy_name(hw->wiphy));
1222 if (priv->pending_tx_pkts < oldcount) {
1223 printk(KERN_NOTICE "%s: waiting for tx rings "
1224 "to drain (%d -> %d pkts)\n",
1225 wiphy_name(hw->wiphy), oldcount,
1226 priv->pending_tx_pkts);
1231 priv->tx_wait = NULL;
1233 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1234 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1235 mwl8k_dump_tx_rings(hw);
1239 spin_unlock_bh(&priv->tx_lock);
1244 #define MWL8K_TXD_SUCCESS(status) \
1245 ((status) & (MWL8K_TXD_STATUS_OK | \
1246 MWL8K_TXD_STATUS_OK_RETRY | \
1247 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1249 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1251 struct mwl8k_priv *priv = hw->priv;
1252 struct mwl8k_tx_queue *txq = priv->txq + index;
1255 while (txq->stats.len > 0) {
1257 struct mwl8k_tx_desc *tx_desc;
1260 struct sk_buff *skb;
1261 struct ieee80211_tx_info *info;
1265 tx_desc = txq->txd + tx;
1267 status = le32_to_cpu(tx_desc->status);
1269 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1273 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1276 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1277 BUG_ON(txq->stats.len == 0);
1279 priv->pending_tx_pkts--;
1281 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1282 size = le16_to_cpu(tx_desc->pkt_len);
1284 txq->skb[tx] = NULL;
1286 BUG_ON(skb == NULL);
1287 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1289 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1291 /* Mark descriptor as unused */
1292 tx_desc->pkt_phys_addr = 0;
1293 tx_desc->pkt_len = 0;
1295 info = IEEE80211_SKB_CB(skb);
1296 ieee80211_tx_info_clear_status(info);
1297 if (MWL8K_TXD_SUCCESS(status))
1298 info->flags |= IEEE80211_TX_STAT_ACK;
1300 ieee80211_tx_status_irqsafe(hw, skb);
1305 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1306 ieee80211_wake_queue(hw, index);
1309 /* must be called only when the card's transmit is completely halted */
1310 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1312 struct mwl8k_priv *priv = hw->priv;
1313 struct mwl8k_tx_queue *txq = priv->txq + index;
1315 mwl8k_txq_reclaim(hw, index, 1);
1320 pci_free_consistent(priv->pdev,
1321 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1322 txq->txd, txq->txd_dma);
1327 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1329 struct mwl8k_priv *priv = hw->priv;
1330 struct ieee80211_tx_info *tx_info;
1331 struct mwl8k_vif *mwl8k_vif;
1332 struct ieee80211_hdr *wh;
1333 struct mwl8k_tx_queue *txq;
1334 struct mwl8k_tx_desc *tx;
1340 wh = (struct ieee80211_hdr *)skb->data;
1341 if (ieee80211_is_data_qos(wh->frame_control))
1342 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1346 mwl8k_add_dma_header(skb);
1347 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1349 tx_info = IEEE80211_SKB_CB(skb);
1350 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1352 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1353 u16 seqno = mwl8k_vif->seqno;
1355 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1356 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1357 mwl8k_vif->seqno = seqno++ % 4096;
1360 /* Setup firmware control bit fields for each frame type. */
1363 if (ieee80211_is_mgmt(wh->frame_control) ||
1364 ieee80211_is_ctl(wh->frame_control)) {
1366 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1367 } else if (ieee80211_is_data(wh->frame_control)) {
1369 if (is_multicast_ether_addr(wh->addr1))
1370 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1372 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1373 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1374 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1376 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1379 dma = pci_map_single(priv->pdev, skb->data,
1380 skb->len, PCI_DMA_TODEVICE);
1382 if (pci_dma_mapping_error(priv->pdev, dma)) {
1383 printk(KERN_DEBUG "%s: failed to dma map skb, "
1384 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1386 return NETDEV_TX_OK;
1389 spin_lock_bh(&priv->tx_lock);
1391 txq = priv->txq + index;
1393 BUG_ON(txq->skb[txq->tail] != NULL);
1394 txq->skb[txq->tail] = skb;
1396 tx = txq->txd + txq->tail;
1397 tx->data_rate = txdatarate;
1398 tx->tx_priority = index;
1399 tx->qos_control = cpu_to_le16(qos);
1400 tx->pkt_phys_addr = cpu_to_le32(dma);
1401 tx->pkt_len = cpu_to_le16(skb->len);
1403 if (!priv->ap_fw && tx_info->control.sta != NULL)
1404 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1408 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1412 priv->pending_tx_pkts++;
1415 if (txq->tail == MWL8K_TX_DESCS)
1418 if (txq->head == txq->tail)
1419 ieee80211_stop_queue(hw, index);
1421 mwl8k_tx_start(priv);
1423 spin_unlock_bh(&priv->tx_lock);
1425 return NETDEV_TX_OK;
1432 * We have the following requirements for issuing firmware commands:
1433 * - Some commands require that the packet transmit path is idle when
1434 * the command is issued. (For simplicity, we'll just quiesce the
1435 * transmit path for every command.)
1436 * - There are certain sequences of commands that need to be issued to
1437 * the hardware sequentially, with no other intervening commands.
1439 * This leads to an implementation of a "firmware lock" as a mutex that
1440 * can be taken recursively, and which is taken by both the low-level
1441 * command submission function (mwl8k_post_cmd) as well as any users of
1442 * that function that require issuing of an atomic sequence of commands,
1443 * and quiesces the transmit path whenever it's taken.
1445 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1447 struct mwl8k_priv *priv = hw->priv;
1449 if (priv->fw_mutex_owner != current) {
1452 mutex_lock(&priv->fw_mutex);
1453 ieee80211_stop_queues(hw);
1455 rc = mwl8k_tx_wait_empty(hw);
1457 ieee80211_wake_queues(hw);
1458 mutex_unlock(&priv->fw_mutex);
1463 priv->fw_mutex_owner = current;
1466 priv->fw_mutex_depth++;
1471 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1473 struct mwl8k_priv *priv = hw->priv;
1475 if (!--priv->fw_mutex_depth) {
1476 ieee80211_wake_queues(hw);
1477 priv->fw_mutex_owner = NULL;
1478 mutex_unlock(&priv->fw_mutex);
1484 * Command processing.
1487 /* Timeout firmware commands after 10s */
1488 #define MWL8K_CMD_TIMEOUT_MS 10000
1490 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1492 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1493 struct mwl8k_priv *priv = hw->priv;
1494 void __iomem *regs = priv->regs;
1495 dma_addr_t dma_addr;
1496 unsigned int dma_size;
1498 unsigned long timeout = 0;
1501 cmd->result = 0xffff;
1502 dma_size = le16_to_cpu(cmd->length);
1503 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1504 PCI_DMA_BIDIRECTIONAL);
1505 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1508 rc = mwl8k_fw_lock(hw);
1510 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1511 PCI_DMA_BIDIRECTIONAL);
1515 priv->hostcmd_wait = &cmd_wait;
1516 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1517 iowrite32(MWL8K_H2A_INT_DOORBELL,
1518 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1519 iowrite32(MWL8K_H2A_INT_DUMMY,
1520 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1522 timeout = wait_for_completion_timeout(&cmd_wait,
1523 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1525 priv->hostcmd_wait = NULL;
1527 mwl8k_fw_unlock(hw);
1529 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1530 PCI_DMA_BIDIRECTIONAL);
1533 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1534 wiphy_name(hw->wiphy),
1535 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1536 MWL8K_CMD_TIMEOUT_MS);
1541 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1543 rc = cmd->result ? -EINVAL : 0;
1545 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1546 wiphy_name(hw->wiphy),
1547 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1548 le16_to_cpu(cmd->result));
1550 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1551 wiphy_name(hw->wiphy),
1552 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1560 * CMD_GET_HW_SPEC (STA version).
1562 struct mwl8k_cmd_get_hw_spec_sta {
1563 struct mwl8k_cmd_pkt header;
1565 __u8 host_interface;
1567 __u8 perm_addr[ETH_ALEN];
1572 __u8 mcs_bitmap[16];
1573 __le32 rx_queue_ptr;
1574 __le32 num_tx_queues;
1575 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1577 __le32 num_tx_desc_per_queue;
1579 } __attribute__((packed));
1581 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1582 #define MWL8K_CAP_GREENFIELD 0x08000000
1583 #define MWL8K_CAP_AMPDU 0x04000000
1584 #define MWL8K_CAP_RX_STBC 0x01000000
1585 #define MWL8K_CAP_TX_STBC 0x00800000
1586 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1587 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1588 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1589 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1590 #define MWL8K_CAP_DELAY_BA 0x00003000
1591 #define MWL8K_CAP_MIMO 0x00000200
1592 #define MWL8K_CAP_40MHZ 0x00000100
1594 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1596 struct mwl8k_priv *priv = hw->priv;
1600 priv->band.ht_cap.ht_supported = 1;
1602 if (cap & MWL8K_CAP_MAX_AMSDU)
1603 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1604 if (cap & MWL8K_CAP_GREENFIELD)
1605 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1606 if (cap & MWL8K_CAP_AMPDU) {
1607 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1608 priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1609 priv->band.ht_cap.ampdu_density =
1610 IEEE80211_HT_MPDU_DENSITY_NONE;
1612 if (cap & MWL8K_CAP_RX_STBC)
1613 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1614 if (cap & MWL8K_CAP_TX_STBC)
1615 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1616 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1617 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1618 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1619 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1620 if (cap & MWL8K_CAP_DELAY_BA)
1621 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1622 if (cap & MWL8K_CAP_40MHZ)
1623 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1625 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1626 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1628 priv->band.ht_cap.mcs.rx_mask[0] = 0xff;
1629 if (rx_streams >= 2)
1630 priv->band.ht_cap.mcs.rx_mask[1] = 0xff;
1631 if (rx_streams >= 3)
1632 priv->band.ht_cap.mcs.rx_mask[2] = 0xff;
1633 priv->band.ht_cap.mcs.rx_mask[4] = 0x01;
1634 priv->band.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1636 if (rx_streams != tx_streams) {
1637 priv->band.ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1638 priv->band.ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1639 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1643 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1645 struct mwl8k_priv *priv = hw->priv;
1646 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1650 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1654 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1655 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1657 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1658 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1659 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1660 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1661 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1662 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1663 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1664 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1666 rc = mwl8k_post_cmd(hw, &cmd->header);
1669 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1670 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1671 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1672 priv->hw_rev = cmd->hw_rev;
1673 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1674 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1682 * CMD_GET_HW_SPEC (AP version).
1684 struct mwl8k_cmd_get_hw_spec_ap {
1685 struct mwl8k_cmd_pkt header;
1687 __u8 host_interface;
1690 __u8 perm_addr[ETH_ALEN];
1701 } __attribute__((packed));
1703 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1705 struct mwl8k_priv *priv = hw->priv;
1706 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1709 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1713 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1714 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1716 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1717 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1719 rc = mwl8k_post_cmd(hw, &cmd->header);
1724 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1725 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1726 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1727 priv->hw_rev = cmd->hw_rev;
1729 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1730 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1732 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1733 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1735 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1736 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1738 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1739 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1741 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1742 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1744 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1745 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1755 struct mwl8k_cmd_set_hw_spec {
1756 struct mwl8k_cmd_pkt header;
1758 __u8 host_interface;
1760 __u8 perm_addr[ETH_ALEN];
1765 __le32 rx_queue_ptr;
1766 __le32 num_tx_queues;
1767 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1769 __le32 num_tx_desc_per_queue;
1771 } __attribute__((packed));
1773 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1775 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1777 struct mwl8k_priv *priv = hw->priv;
1778 struct mwl8k_cmd_set_hw_spec *cmd;
1782 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1786 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1787 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1789 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1790 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1791 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1792 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1793 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1794 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT);
1795 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1796 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1798 rc = mwl8k_post_cmd(hw, &cmd->header);
1805 * CMD_MAC_MULTICAST_ADR.
1807 struct mwl8k_cmd_mac_multicast_adr {
1808 struct mwl8k_cmd_pkt header;
1811 __u8 addr[0][ETH_ALEN];
1814 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1815 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1816 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1817 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1819 static struct mwl8k_cmd_pkt *
1820 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1821 int mc_count, struct dev_addr_list *mclist)
1823 struct mwl8k_priv *priv = hw->priv;
1824 struct mwl8k_cmd_mac_multicast_adr *cmd;
1827 if (allmulti || mc_count > priv->num_mcaddrs) {
1832 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1834 cmd = kzalloc(size, GFP_ATOMIC);
1838 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1839 cmd->header.length = cpu_to_le16(size);
1840 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1841 MWL8K_ENABLE_RX_BROADCAST);
1844 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1845 } else if (mc_count) {
1848 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1849 cmd->numaddr = cpu_to_le16(mc_count);
1850 for (i = 0; i < mc_count && mclist; i++) {
1851 if (mclist->da_addrlen != ETH_ALEN) {
1855 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1856 mclist = mclist->next;
1860 return &cmd->header;
1866 struct mwl8k_cmd_get_stat {
1867 struct mwl8k_cmd_pkt header;
1869 } __attribute__((packed));
1871 #define MWL8K_STAT_ACK_FAILURE 9
1872 #define MWL8K_STAT_RTS_FAILURE 12
1873 #define MWL8K_STAT_FCS_ERROR 24
1874 #define MWL8K_STAT_RTS_SUCCESS 11
1876 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1877 struct ieee80211_low_level_stats *stats)
1879 struct mwl8k_cmd_get_stat *cmd;
1882 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1886 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1887 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1889 rc = mwl8k_post_cmd(hw, &cmd->header);
1891 stats->dot11ACKFailureCount =
1892 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1893 stats->dot11RTSFailureCount =
1894 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1895 stats->dot11FCSErrorCount =
1896 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1897 stats->dot11RTSSuccessCount =
1898 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1906 * CMD_RADIO_CONTROL.
1908 struct mwl8k_cmd_radio_control {
1909 struct mwl8k_cmd_pkt header;
1913 } __attribute__((packed));
1916 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1918 struct mwl8k_priv *priv = hw->priv;
1919 struct mwl8k_cmd_radio_control *cmd;
1922 if (enable == priv->radio_on && !force)
1925 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1929 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1930 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1931 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1932 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1933 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1935 rc = mwl8k_post_cmd(hw, &cmd->header);
1939 priv->radio_on = enable;
1944 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1946 return mwl8k_cmd_radio_control(hw, 0, 0);
1949 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1951 return mwl8k_cmd_radio_control(hw, 1, 0);
1955 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1957 struct mwl8k_priv *priv = hw->priv;
1959 priv->radio_short_preamble = short_preamble;
1961 return mwl8k_cmd_radio_control(hw, 1, 1);
1967 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1969 struct mwl8k_cmd_rf_tx_power {
1970 struct mwl8k_cmd_pkt header;
1972 __le16 support_level;
1973 __le16 current_level;
1975 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1976 } __attribute__((packed));
1978 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1980 struct mwl8k_cmd_rf_tx_power *cmd;
1983 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1987 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1988 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1989 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1990 cmd->support_level = cpu_to_le16(dBm);
1992 rc = mwl8k_post_cmd(hw, &cmd->header);
2001 struct mwl8k_cmd_rf_antenna {
2002 struct mwl8k_cmd_pkt header;
2005 } __attribute__((packed));
2007 #define MWL8K_RF_ANTENNA_RX 1
2008 #define MWL8K_RF_ANTENNA_TX 2
2011 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2013 struct mwl8k_cmd_rf_antenna *cmd;
2016 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2020 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2021 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2022 cmd->antenna = cpu_to_le16(antenna);
2023 cmd->mode = cpu_to_le16(mask);
2025 rc = mwl8k_post_cmd(hw, &cmd->header);
2034 struct mwl8k_cmd_set_pre_scan {
2035 struct mwl8k_cmd_pkt header;
2036 } __attribute__((packed));
2038 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2040 struct mwl8k_cmd_set_pre_scan *cmd;
2043 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2047 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2048 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2050 rc = mwl8k_post_cmd(hw, &cmd->header);
2057 * CMD_SET_POST_SCAN.
2059 struct mwl8k_cmd_set_post_scan {
2060 struct mwl8k_cmd_pkt header;
2062 __u8 bssid[ETH_ALEN];
2063 } __attribute__((packed));
2066 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2068 struct mwl8k_cmd_set_post_scan *cmd;
2071 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2075 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2076 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2078 memcpy(cmd->bssid, mac, ETH_ALEN);
2080 rc = mwl8k_post_cmd(hw, &cmd->header);
2087 * CMD_SET_RF_CHANNEL.
2089 struct mwl8k_cmd_set_rf_channel {
2090 struct mwl8k_cmd_pkt header;
2092 __u8 current_channel;
2093 __le32 channel_flags;
2094 } __attribute__((packed));
2096 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2097 struct ieee80211_conf *conf)
2099 struct ieee80211_channel *channel = conf->channel;
2100 struct mwl8k_cmd_set_rf_channel *cmd;
2103 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2107 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2108 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2109 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2110 cmd->current_channel = channel->hw_value;
2112 if (channel->band == IEEE80211_BAND_2GHZ)
2113 cmd->channel_flags |= cpu_to_le32(0x00000001);
2115 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2116 conf->channel_type == NL80211_CHAN_HT20)
2117 cmd->channel_flags |= cpu_to_le32(0x00000080);
2118 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2119 cmd->channel_flags |= cpu_to_le32(0x000001900);
2120 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2121 cmd->channel_flags |= cpu_to_le32(0x000000900);
2123 rc = mwl8k_post_cmd(hw, &cmd->header);
2132 #define MWL8K_FRAME_PROT_DISABLED 0x00
2133 #define MWL8K_FRAME_PROT_11G 0x07
2134 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2135 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2137 struct mwl8k_cmd_update_set_aid {
2138 struct mwl8k_cmd_pkt header;
2141 /* AP's MAC address (BSSID) */
2142 __u8 bssid[ETH_ALEN];
2143 __le16 protection_mode;
2144 __u8 supp_rates[14];
2145 } __attribute__((packed));
2147 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2153 * Clear nonstandard rates 4 and 13.
2157 for (i = 0, j = 0; i < 14; i++) {
2158 if (mask & (1 << i))
2159 rates[j++] = mwl8k_rates[i].hw_value;
2164 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2165 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2167 struct mwl8k_cmd_update_set_aid *cmd;
2171 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2175 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2176 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2177 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2178 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2180 if (vif->bss_conf.use_cts_prot) {
2181 prot_mode = MWL8K_FRAME_PROT_11G;
2183 switch (vif->bss_conf.ht_operation_mode &
2184 IEEE80211_HT_OP_MODE_PROTECTION) {
2185 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2186 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2188 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2189 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2192 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2196 cmd->protection_mode = cpu_to_le16(prot_mode);
2198 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2200 rc = mwl8k_post_cmd(hw, &cmd->header);
2209 struct mwl8k_cmd_set_rate {
2210 struct mwl8k_cmd_pkt header;
2211 __u8 legacy_rates[14];
2213 /* Bitmap for supported MCS codes. */
2216 } __attribute__((packed));
2219 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2220 u32 legacy_rate_mask, u8 *mcs_rates)
2222 struct mwl8k_cmd_set_rate *cmd;
2225 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2229 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2230 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2231 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2232 memcpy(cmd->mcs_set, mcs_rates, 16);
2234 rc = mwl8k_post_cmd(hw, &cmd->header);
2241 * CMD_FINALIZE_JOIN.
2243 #define MWL8K_FJ_BEACON_MAXLEN 128
2245 struct mwl8k_cmd_finalize_join {
2246 struct mwl8k_cmd_pkt header;
2247 __le32 sleep_interval; /* Number of beacon periods to sleep */
2248 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2249 } __attribute__((packed));
2251 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2252 int framelen, int dtim)
2254 struct mwl8k_cmd_finalize_join *cmd;
2255 struct ieee80211_mgmt *payload = frame;
2259 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2263 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2264 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2265 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2267 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2268 if (payload_len < 0)
2270 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2271 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2273 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2275 rc = mwl8k_post_cmd(hw, &cmd->header);
2282 * CMD_SET_RTS_THRESHOLD.
2284 struct mwl8k_cmd_set_rts_threshold {
2285 struct mwl8k_cmd_pkt header;
2288 } __attribute__((packed));
2290 static int mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw,
2291 u16 action, u16 threshold)
2293 struct mwl8k_cmd_set_rts_threshold *cmd;
2296 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2300 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2301 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2302 cmd->action = cpu_to_le16(action);
2303 cmd->threshold = cpu_to_le16(threshold);
2305 rc = mwl8k_post_cmd(hw, &cmd->header);
2314 struct mwl8k_cmd_set_slot {
2315 struct mwl8k_cmd_pkt header;
2318 } __attribute__((packed));
2320 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2322 struct mwl8k_cmd_set_slot *cmd;
2325 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2329 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2330 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2331 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2332 cmd->short_slot = short_slot_time;
2334 rc = mwl8k_post_cmd(hw, &cmd->header);
2341 * CMD_SET_EDCA_PARAMS.
2343 struct mwl8k_cmd_set_edca_params {
2344 struct mwl8k_cmd_pkt header;
2346 /* See MWL8K_SET_EDCA_XXX below */
2349 /* TX opportunity in units of 32 us */
2354 /* Log exponent of max contention period: 0...15 */
2357 /* Log exponent of min contention period: 0...15 */
2360 /* Adaptive interframe spacing in units of 32us */
2363 /* TX queue to configure */
2367 /* Log exponent of max contention period: 0...15 */
2370 /* Log exponent of min contention period: 0...15 */
2373 /* Adaptive interframe spacing in units of 32us */
2376 /* TX queue to configure */
2380 } __attribute__((packed));
2382 #define MWL8K_SET_EDCA_CW 0x01
2383 #define MWL8K_SET_EDCA_TXOP 0x02
2384 #define MWL8K_SET_EDCA_AIFS 0x04
2386 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2387 MWL8K_SET_EDCA_TXOP | \
2388 MWL8K_SET_EDCA_AIFS)
2391 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2392 __u16 cw_min, __u16 cw_max,
2393 __u8 aifs, __u16 txop)
2395 struct mwl8k_priv *priv = hw->priv;
2396 struct mwl8k_cmd_set_edca_params *cmd;
2399 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2404 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2407 qnum ^= !(qnum >> 1);
2409 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2410 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2411 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2412 cmd->txop = cpu_to_le16(txop);
2414 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2415 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2416 cmd->ap.aifs = aifs;
2419 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2420 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2421 cmd->sta.aifs = aifs;
2422 cmd->sta.txq = qnum;
2425 rc = mwl8k_post_cmd(hw, &cmd->header);
2434 struct mwl8k_cmd_set_wmm_mode {
2435 struct mwl8k_cmd_pkt header;
2437 } __attribute__((packed));
2439 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2441 struct mwl8k_priv *priv = hw->priv;
2442 struct mwl8k_cmd_set_wmm_mode *cmd;
2445 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2449 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2450 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2451 cmd->action = cpu_to_le16(!!enable);
2453 rc = mwl8k_post_cmd(hw, &cmd->header);
2457 priv->wmm_enabled = enable;
2465 struct mwl8k_cmd_mimo_config {
2466 struct mwl8k_cmd_pkt header;
2468 __u8 rx_antenna_map;
2469 __u8 tx_antenna_map;
2470 } __attribute__((packed));
2472 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2474 struct mwl8k_cmd_mimo_config *cmd;
2477 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2481 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2482 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2483 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2484 cmd->rx_antenna_map = rx;
2485 cmd->tx_antenna_map = tx;
2487 rc = mwl8k_post_cmd(hw, &cmd->header);
2494 * CMD_USE_FIXED_RATE.
2496 #define MWL8K_RATE_TABLE_SIZE 8
2497 #define MWL8K_UCAST_RATE 0
2498 #define MWL8K_USE_AUTO_RATE 0x0002
2500 struct mwl8k_rate_entry {
2501 /* Set to 1 if HT rate, 0 if legacy. */
2504 /* Set to 1 to use retry_count field. */
2505 __le32 enable_retry;
2507 /* Specified legacy rate or MCS. */
2510 /* Number of allowed retries. */
2512 } __attribute__((packed));
2514 struct mwl8k_rate_table {
2515 /* 1 to allow specified rate and below */
2516 __le32 allow_rate_drop;
2518 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2519 } __attribute__((packed));
2521 struct mwl8k_cmd_use_fixed_rate {
2522 struct mwl8k_cmd_pkt header;
2524 struct mwl8k_rate_table rate_table;
2526 /* Unicast, Broadcast or Multicast */
2530 } __attribute__((packed));
2532 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2533 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2535 struct mwl8k_cmd_use_fixed_rate *cmd;
2539 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2543 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2544 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2546 cmd->action = cpu_to_le32(action);
2547 cmd->rate_type = cpu_to_le32(rate_type);
2549 if (rate_table != NULL) {
2551 * Copy over each field manually so that endian
2552 * conversion can be done.
2554 cmd->rate_table.allow_rate_drop =
2555 cpu_to_le32(rate_table->allow_rate_drop);
2556 cmd->rate_table.num_rates =
2557 cpu_to_le32(rate_table->num_rates);
2559 for (count = 0; count < rate_table->num_rates; count++) {
2560 struct mwl8k_rate_entry *dst =
2561 &cmd->rate_table.rate_entry[count];
2562 struct mwl8k_rate_entry *src =
2563 &rate_table->rate_entry[count];
2565 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2566 dst->enable_retry = cpu_to_le32(src->enable_retry);
2567 dst->rate = cpu_to_le32(src->rate);
2568 dst->retry_count = cpu_to_le32(src->retry_count);
2572 rc = mwl8k_post_cmd(hw, &cmd->header);
2579 * CMD_ENABLE_SNIFFER.
2581 struct mwl8k_cmd_enable_sniffer {
2582 struct mwl8k_cmd_pkt header;
2584 } __attribute__((packed));
2586 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2588 struct mwl8k_cmd_enable_sniffer *cmd;
2591 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2595 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2596 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2597 cmd->action = cpu_to_le32(!!enable);
2599 rc = mwl8k_post_cmd(hw, &cmd->header);
2608 struct mwl8k_cmd_set_mac_addr {
2609 struct mwl8k_cmd_pkt header;
2613 __u8 mac_addr[ETH_ALEN];
2615 __u8 mac_addr[ETH_ALEN];
2617 } __attribute__((packed));
2619 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2621 struct mwl8k_priv *priv = hw->priv;
2622 struct mwl8k_cmd_set_mac_addr *cmd;
2625 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2629 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2630 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2632 cmd->mbss.mac_type = 0;
2633 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2635 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2638 rc = mwl8k_post_cmd(hw, &cmd->header);
2645 * CMD_SET_RATEADAPT_MODE.
2647 struct mwl8k_cmd_set_rate_adapt_mode {
2648 struct mwl8k_cmd_pkt header;
2651 } __attribute__((packed));
2653 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2655 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2658 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2662 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2663 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2664 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2665 cmd->mode = cpu_to_le16(mode);
2667 rc = mwl8k_post_cmd(hw, &cmd->header);
2676 struct ewc_ht_info {
2680 } __attribute__((packed));
2682 struct peer_capability_info {
2683 /* Peer type - AP vs. STA. */
2686 /* Basic 802.11 capabilities from assoc resp. */
2689 /* Set if peer supports 802.11n high throughput (HT). */
2692 /* Valid if HT is supported. */
2694 __u8 extended_ht_caps;
2695 struct ewc_ht_info ewc_info;
2697 /* Legacy rate table. Intersection of our rates and peer rates. */
2698 __u8 legacy_rates[12];
2700 /* HT rate table. Intersection of our rates and peer rates. */
2704 /* If set, interoperability mode, no proprietary extensions. */
2708 __le16 amsdu_enabled;
2709 } __attribute__((packed));
2711 struct mwl8k_cmd_update_stadb {
2712 struct mwl8k_cmd_pkt header;
2714 /* See STADB_ACTION_TYPE */
2717 /* Peer MAC address */
2718 __u8 peer_addr[ETH_ALEN];
2722 /* Peer info - valid during add/update. */
2723 struct peer_capability_info peer_info;
2724 } __attribute__((packed));
2726 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2727 #define MWL8K_STA_DB_DEL_ENTRY 2
2729 /* Peer Entry flags - used to define the type of the peer node */
2730 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2732 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2733 struct ieee80211_vif *vif,
2734 struct ieee80211_sta *sta)
2736 struct mwl8k_cmd_update_stadb *cmd;
2737 struct peer_capability_info *p;
2740 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2744 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2745 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2746 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2747 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2749 p = &cmd->peer_info;
2750 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2751 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2752 p->ht_support = sta->ht_cap.ht_supported;
2753 p->ht_caps = sta->ht_cap.cap;
2754 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2755 ((sta->ht_cap.ampdu_density & 7) << 2);
2756 legacy_rate_mask_to_array(p->legacy_rates,
2757 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2758 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2760 p->amsdu_enabled = 0;
2762 rc = mwl8k_post_cmd(hw, &cmd->header);
2765 return rc ? rc : p->station_id;
2768 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2769 struct ieee80211_vif *vif, u8 *addr)
2771 struct mwl8k_cmd_update_stadb *cmd;
2774 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2778 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2779 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2780 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2781 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2783 rc = mwl8k_post_cmd(hw, &cmd->header);
2791 * Interrupt handling.
2793 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2795 struct ieee80211_hw *hw = dev_id;
2796 struct mwl8k_priv *priv = hw->priv;
2799 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2800 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2805 if (status & MWL8K_A2H_INT_TX_DONE)
2806 tasklet_schedule(&priv->tx_reclaim_task);
2808 if (status & MWL8K_A2H_INT_RX_READY) {
2809 while (rxq_process(hw, 0, 1))
2810 rxq_refill(hw, 0, 1);
2813 if (status & MWL8K_A2H_INT_OPC_DONE) {
2814 if (priv->hostcmd_wait != NULL)
2815 complete(priv->hostcmd_wait);
2818 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2819 if (!mutex_is_locked(&priv->fw_mutex) &&
2820 priv->radio_on && priv->pending_tx_pkts)
2821 mwl8k_tx_start(priv);
2829 * Core driver operations.
2831 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2833 struct mwl8k_priv *priv = hw->priv;
2834 int index = skb_get_queue_mapping(skb);
2837 if (priv->current_channel == NULL) {
2838 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2839 "disabled\n", wiphy_name(hw->wiphy));
2841 return NETDEV_TX_OK;
2844 rc = mwl8k_txq_xmit(hw, index, skb);
2849 static int mwl8k_start(struct ieee80211_hw *hw)
2851 struct mwl8k_priv *priv = hw->priv;
2854 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2855 IRQF_SHARED, MWL8K_NAME, hw);
2857 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2858 wiphy_name(hw->wiphy));
2862 /* Enable tx reclaim tasklet */
2863 tasklet_enable(&priv->tx_reclaim_task);
2865 /* Enable interrupts */
2866 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2868 rc = mwl8k_fw_lock(hw);
2870 rc = mwl8k_cmd_radio_enable(hw);
2874 rc = mwl8k_cmd_enable_sniffer(hw, 0);
2877 rc = mwl8k_cmd_set_pre_scan(hw);
2880 rc = mwl8k_cmd_set_post_scan(hw,
2881 "\x00\x00\x00\x00\x00\x00");
2885 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
2888 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
2890 mwl8k_fw_unlock(hw);
2894 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2895 free_irq(priv->pdev->irq, hw);
2896 tasklet_disable(&priv->tx_reclaim_task);
2902 static void mwl8k_stop(struct ieee80211_hw *hw)
2904 struct mwl8k_priv *priv = hw->priv;
2907 mwl8k_cmd_radio_disable(hw);
2909 ieee80211_stop_queues(hw);
2911 /* Disable interrupts */
2912 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2913 free_irq(priv->pdev->irq, hw);
2915 /* Stop finalize join worker */
2916 cancel_work_sync(&priv->finalize_join_worker);
2917 if (priv->beacon_skb != NULL)
2918 dev_kfree_skb(priv->beacon_skb);
2920 /* Stop tx reclaim tasklet */
2921 tasklet_disable(&priv->tx_reclaim_task);
2923 /* Return all skbs to mac80211 */
2924 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2925 mwl8k_txq_reclaim(hw, i, 1);
2928 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2929 struct ieee80211_vif *vif)
2931 struct mwl8k_priv *priv = hw->priv;
2932 struct mwl8k_vif *mwl8k_vif;
2935 * We only support one active interface at a time.
2937 if (priv->vif != NULL)
2941 * We only support managed interfaces for now.
2943 if (vif->type != NL80211_IFTYPE_STATION)
2947 * Reject interface creation if sniffer mode is active, as
2948 * STA operation is mutually exclusive with hardware sniffer
2951 if (priv->sniffer_enabled) {
2952 printk(KERN_INFO "%s: unable to create STA "
2953 "interface due to sniffer mode being enabled\n",
2954 wiphy_name(hw->wiphy));
2958 /* Clean out driver private area */
2959 mwl8k_vif = MWL8K_VIF(vif);
2960 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2962 /* Set and save the mac address */
2963 mwl8k_cmd_set_mac_addr(hw, vif->addr);
2964 memcpy(mwl8k_vif->mac_addr, vif->addr, ETH_ALEN);
2966 /* Set Initial sequence number to zero */
2967 mwl8k_vif->seqno = 0;
2970 priv->current_channel = NULL;
2975 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2976 struct ieee80211_vif *vif)
2978 struct mwl8k_priv *priv = hw->priv;
2980 if (priv->vif == NULL)
2983 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2988 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2990 struct ieee80211_conf *conf = &hw->conf;
2991 struct mwl8k_priv *priv = hw->priv;
2994 if (conf->flags & IEEE80211_CONF_IDLE) {
2995 mwl8k_cmd_radio_disable(hw);
2996 priv->current_channel = NULL;
3000 rc = mwl8k_fw_lock(hw);
3004 rc = mwl8k_cmd_radio_enable(hw);
3008 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3012 priv->current_channel = conf->channel;
3014 if (conf->power_level > 18)
3015 conf->power_level = 18;
3016 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3021 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3023 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3025 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3029 mwl8k_fw_unlock(hw);
3034 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3035 struct ieee80211_vif *vif,
3036 struct ieee80211_bss_conf *info,
3039 struct mwl8k_priv *priv = hw->priv;
3040 u32 ap_legacy_rates;
3041 u8 ap_mcs_rates[16];
3044 if (mwl8k_fw_lock(hw))
3048 * No need to capture a beacon if we're no longer associated.
3050 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3051 priv->capture_beacon = false;
3054 * Get the AP's legacy and MCS rates.
3056 ap_legacy_rates = 0;
3057 if (vif->bss_conf.assoc) {
3058 struct ieee80211_sta *ap;
3061 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3067 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3068 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3073 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3074 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3078 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3079 MWL8K_UCAST_RATE, NULL);
3084 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3085 rc = mwl8k_set_radio_preamble(hw,
3086 vif->bss_conf.use_short_preamble);
3091 if (changed & BSS_CHANGED_ERP_SLOT) {
3092 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3097 if (((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) ||
3098 (changed & (BSS_CHANGED_ERP_CTS_PROT | BSS_CHANGED_HT))) {
3099 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3104 if (vif->bss_conf.assoc &&
3105 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3107 * Finalize the join. Tell rx handler to process
3108 * next beacon from our BSSID.
3110 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3111 priv->capture_beacon = true;
3115 mwl8k_fw_unlock(hw);
3118 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3119 int mc_count, struct dev_addr_list *mclist)
3121 struct mwl8k_cmd_pkt *cmd;
3124 * Synthesize and return a command packet that programs the
3125 * hardware multicast address filter. At this point we don't
3126 * know whether FIF_ALLMULTI is being requested, but if it is,
3127 * we'll end up throwing this packet away and creating a new
3128 * one in mwl8k_configure_filter().
3130 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3132 return (unsigned long)cmd;
3136 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3137 unsigned int changed_flags,
3138 unsigned int *total_flags)
3140 struct mwl8k_priv *priv = hw->priv;
3143 * Hardware sniffer mode is mutually exclusive with STA
3144 * operation, so refuse to enable sniffer mode if a STA
3145 * interface is active.
3147 if (priv->vif != NULL) {
3148 if (net_ratelimit())
3149 printk(KERN_INFO "%s: not enabling sniffer "
3150 "mode because STA interface is active\n",
3151 wiphy_name(hw->wiphy));
3155 if (!priv->sniffer_enabled) {
3156 if (mwl8k_cmd_enable_sniffer(hw, 1))
3158 priv->sniffer_enabled = true;
3161 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3162 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3168 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3169 unsigned int changed_flags,
3170 unsigned int *total_flags,
3173 struct mwl8k_priv *priv = hw->priv;
3174 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3177 * AP firmware doesn't allow fine-grained control over
3178 * the receive filter.
3181 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3187 * Enable hardware sniffer mode if FIF_CONTROL or
3188 * FIF_OTHER_BSS is requested.
3190 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3191 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3196 /* Clear unsupported feature flags */
3197 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3199 if (mwl8k_fw_lock(hw)) {
3204 if (priv->sniffer_enabled) {
3205 mwl8k_cmd_enable_sniffer(hw, 0);
3206 priv->sniffer_enabled = false;
3209 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3210 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3212 * Disable the BSS filter.
3214 mwl8k_cmd_set_pre_scan(hw);
3219 * Enable the BSS filter.
3221 * If there is an active STA interface, use that
3222 * interface's BSSID, otherwise use a dummy one
3223 * (where the OUI part needs to be nonzero for
3224 * the BSSID to be accepted by POST_SCAN).
3226 bssid = "\x01\x00\x00\x00\x00\x00";
3227 if (priv->vif != NULL)
3228 bssid = priv->vif->bss_conf.bssid;
3230 mwl8k_cmd_set_post_scan(hw, bssid);
3235 * If FIF_ALLMULTI is being requested, throw away the command
3236 * packet that ->prepare_multicast() built and replace it with
3237 * a command packet that enables reception of all multicast
3240 if (*total_flags & FIF_ALLMULTI) {
3242 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3246 mwl8k_post_cmd(hw, cmd);
3250 mwl8k_fw_unlock(hw);
3253 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3255 return mwl8k_cmd_set_rts_threshold(hw, MWL8K_CMD_SET, value);
3258 struct mwl8k_sta_notify_item
3260 struct list_head list;
3261 struct ieee80211_vif *vif;
3262 enum sta_notify_cmd cmd;
3263 struct ieee80211_sta sta;
3266 static void mwl8k_sta_notify_worker(struct work_struct *work)
3268 struct mwl8k_priv *priv =
3269 container_of(work, struct mwl8k_priv, sta_notify_worker);
3270 struct ieee80211_hw *hw = priv->hw;
3272 spin_lock_bh(&priv->sta_notify_list_lock);
3273 while (!list_empty(&priv->sta_notify_list)) {
3274 struct mwl8k_sta_notify_item *s;
3276 s = list_entry(priv->sta_notify_list.next,
3277 struct mwl8k_sta_notify_item, list);
3280 spin_unlock_bh(&priv->sta_notify_list_lock);
3282 if (s->cmd == STA_NOTIFY_ADD) {
3285 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3287 struct ieee80211_sta *sta;
3290 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3292 MWL8K_STA(sta)->peer_id = rc;
3296 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3301 spin_lock_bh(&priv->sta_notify_list_lock);
3303 spin_unlock_bh(&priv->sta_notify_list_lock);
3307 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3308 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3310 struct mwl8k_priv *priv = hw->priv;
3311 struct mwl8k_sta_notify_item *s;
3313 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3316 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3322 spin_lock(&priv->sta_notify_list_lock);
3323 list_add_tail(&s->list, &priv->sta_notify_list);
3324 spin_unlock(&priv->sta_notify_list_lock);
3326 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3330 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3331 const struct ieee80211_tx_queue_params *params)
3333 struct mwl8k_priv *priv = hw->priv;
3336 rc = mwl8k_fw_lock(hw);
3338 if (!priv->wmm_enabled)
3339 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3342 rc = mwl8k_cmd_set_edca_params(hw, queue,
3348 mwl8k_fw_unlock(hw);
3354 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3355 struct ieee80211_tx_queue_stats *stats)
3357 struct mwl8k_priv *priv = hw->priv;
3358 struct mwl8k_tx_queue *txq;
3361 spin_lock_bh(&priv->tx_lock);
3362 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3363 txq = priv->txq + index;
3364 memcpy(&stats[index], &txq->stats,
3365 sizeof(struct ieee80211_tx_queue_stats));
3367 spin_unlock_bh(&priv->tx_lock);
3372 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3373 struct ieee80211_low_level_stats *stats)
3375 return mwl8k_cmd_get_stat(hw, stats);
3379 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3380 enum ieee80211_ampdu_mlme_action action,
3381 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3384 case IEEE80211_AMPDU_RX_START:
3385 case IEEE80211_AMPDU_RX_STOP:
3386 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3394 static const struct ieee80211_ops mwl8k_ops = {
3396 .start = mwl8k_start,
3398 .add_interface = mwl8k_add_interface,
3399 .remove_interface = mwl8k_remove_interface,
3400 .config = mwl8k_config,
3401 .bss_info_changed = mwl8k_bss_info_changed,
3402 .prepare_multicast = mwl8k_prepare_multicast,
3403 .configure_filter = mwl8k_configure_filter,
3404 .set_rts_threshold = mwl8k_set_rts_threshold,
3405 .sta_notify = mwl8k_sta_notify,
3406 .conf_tx = mwl8k_conf_tx,
3407 .get_tx_stats = mwl8k_get_tx_stats,
3408 .get_stats = mwl8k_get_stats,
3409 .ampdu_action = mwl8k_ampdu_action,
3412 static void mwl8k_tx_reclaim_handler(unsigned long data)
3415 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3416 struct mwl8k_priv *priv = hw->priv;
3418 spin_lock_bh(&priv->tx_lock);
3419 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3420 mwl8k_txq_reclaim(hw, i, 0);
3422 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
3423 complete(priv->tx_wait);
3424 priv->tx_wait = NULL;
3426 spin_unlock_bh(&priv->tx_lock);
3429 static void mwl8k_finalize_join_worker(struct work_struct *work)
3431 struct mwl8k_priv *priv =
3432 container_of(work, struct mwl8k_priv, finalize_join_worker);
3433 struct sk_buff *skb = priv->beacon_skb;
3435 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3436 priv->vif->bss_conf.dtim_period);
3439 priv->beacon_skb = NULL;
3448 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3450 .part_name = "88w8363",
3451 .helper_image = "mwl8k/helper_8363.fw",
3452 .fw_image = "mwl8k/fmimage_8363.fw",
3455 .part_name = "88w8687",
3456 .helper_image = "mwl8k/helper_8687.fw",
3457 .fw_image = "mwl8k/fmimage_8687.fw",
3460 .part_name = "88w8366",
3461 .helper_image = "mwl8k/helper_8366.fw",
3462 .fw_image = "mwl8k/fmimage_8366.fw",
3463 .ap_rxd_ops = &rxd_8366_ap_ops,
3467 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3468 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3469 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3470 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3471 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3472 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3475 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3477 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3478 const struct pci_device_id *id)
3480 static int printed_version = 0;
3481 struct ieee80211_hw *hw;
3482 struct mwl8k_priv *priv;
3486 if (!printed_version) {
3487 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3488 printed_version = 1;
3492 rc = pci_enable_device(pdev);
3494 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3499 rc = pci_request_regions(pdev, MWL8K_NAME);
3501 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3503 goto err_disable_device;
3506 pci_set_master(pdev);
3509 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3511 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3516 SET_IEEE80211_DEV(hw, &pdev->dev);
3517 pci_set_drvdata(pdev, hw);
3522 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3525 priv->sram = pci_iomap(pdev, 0, 0x10000);
3526 if (priv->sram == NULL) {
3527 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3528 wiphy_name(hw->wiphy));
3533 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3534 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3536 priv->regs = pci_iomap(pdev, 1, 0x10000);
3537 if (priv->regs == NULL) {
3538 priv->regs = pci_iomap(pdev, 2, 0x10000);
3539 if (priv->regs == NULL) {
3540 printk(KERN_ERR "%s: Cannot map device registers\n",
3541 wiphy_name(hw->wiphy));
3547 /* Reset firmware and hardware */
3548 mwl8k_hw_reset(priv);
3550 /* Ask userland hotplug daemon for the device firmware */
3551 rc = mwl8k_request_firmware(priv);
3553 printk(KERN_ERR "%s: Firmware files not found\n",
3554 wiphy_name(hw->wiphy));
3555 goto err_stop_firmware;
3558 /* Load firmware into hardware */
3559 rc = mwl8k_load_firmware(hw);
3561 printk(KERN_ERR "%s: Cannot start firmware\n",
3562 wiphy_name(hw->wiphy));
3563 goto err_stop_firmware;
3566 /* Reclaim memory once firmware is successfully loaded */
3567 mwl8k_release_firmware(priv);
3571 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3572 if (priv->rxd_ops == NULL) {
3573 printk(KERN_ERR "%s: Driver does not have AP "
3574 "firmware image support for this hardware\n",
3575 wiphy_name(hw->wiphy));
3576 goto err_stop_firmware;
3579 priv->rxd_ops = &rxd_sta_ops;
3582 priv->sniffer_enabled = false;
3583 priv->wmm_enabled = false;
3584 priv->pending_tx_pkts = 0;
3587 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3588 priv->band.band = IEEE80211_BAND_2GHZ;
3589 priv->band.channels = priv->channels;
3590 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3591 priv->band.bitrates = priv->rates;
3592 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3593 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3595 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3596 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3599 * Extra headroom is the size of the required DMA header
3600 * minus the size of the smallest 802.11 frame (CTS frame).
3602 hw->extra_tx_headroom =
3603 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3605 hw->channel_change_time = 10;
3607 hw->queues = MWL8K_TX_QUEUES;
3609 /* Set rssi and noise values to dBm */
3610 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3611 hw->vif_data_size = sizeof(struct mwl8k_vif);
3612 hw->sta_data_size = sizeof(struct mwl8k_sta);
3615 /* Set default radio state and preamble */
3617 priv->radio_short_preamble = 0;
3619 /* Station database handling */
3620 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3621 spin_lock_init(&priv->sta_notify_list_lock);
3622 INIT_LIST_HEAD(&priv->sta_notify_list);
3624 /* Finalize join worker */
3625 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3627 /* TX reclaim tasklet */
3628 tasklet_init(&priv->tx_reclaim_task,
3629 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3630 tasklet_disable(&priv->tx_reclaim_task);
3632 /* Power management cookie */
3633 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3634 if (priv->cookie == NULL)
3635 goto err_stop_firmware;
3637 rc = mwl8k_rxq_init(hw, 0);
3639 goto err_free_cookie;
3640 rxq_refill(hw, 0, INT_MAX);
3642 mutex_init(&priv->fw_mutex);
3643 priv->fw_mutex_owner = NULL;
3644 priv->fw_mutex_depth = 0;
3645 priv->hostcmd_wait = NULL;
3647 spin_lock_init(&priv->tx_lock);
3649 priv->tx_wait = NULL;
3651 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3652 rc = mwl8k_txq_init(hw, i);
3654 goto err_free_queues;
3657 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3658 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3659 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3660 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3662 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3663 IRQF_SHARED, MWL8K_NAME, hw);
3665 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3666 wiphy_name(hw->wiphy));
3667 goto err_free_queues;
3671 * Temporarily enable interrupts. Initial firmware host
3672 * commands use interrupts and avoids polling. Disable
3673 * interrupts when done.
3675 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3677 /* Get config data, mac addrs etc */
3679 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3681 rc = mwl8k_cmd_set_hw_spec(hw);
3683 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3685 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3688 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3689 wiphy_name(hw->wiphy));
3693 /* Turn radio off */
3694 rc = mwl8k_cmd_radio_disable(hw);
3696 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3700 /* Clear MAC address */
3701 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3703 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3704 wiphy_name(hw->wiphy));
3708 /* Disable interrupts */
3709 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3710 free_irq(priv->pdev->irq, hw);
3712 rc = ieee80211_register_hw(hw);
3714 printk(KERN_ERR "%s: Cannot register device\n",
3715 wiphy_name(hw->wiphy));
3716 goto err_free_queues;
3719 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3720 wiphy_name(hw->wiphy), priv->device_info->part_name,
3721 priv->hw_rev, hw->wiphy->perm_addr,
3722 priv->ap_fw ? "AP" : "STA",
3723 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3724 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3729 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3730 free_irq(priv->pdev->irq, hw);
3733 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3734 mwl8k_txq_deinit(hw, i);
3735 mwl8k_rxq_deinit(hw, 0);
3738 if (priv->cookie != NULL)
3739 pci_free_consistent(priv->pdev, 4,
3740 priv->cookie, priv->cookie_dma);
3743 mwl8k_hw_reset(priv);
3744 mwl8k_release_firmware(priv);
3747 if (priv->regs != NULL)
3748 pci_iounmap(pdev, priv->regs);
3750 if (priv->sram != NULL)
3751 pci_iounmap(pdev, priv->sram);
3753 pci_set_drvdata(pdev, NULL);
3754 ieee80211_free_hw(hw);
3757 pci_release_regions(pdev);
3760 pci_disable_device(pdev);
3765 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3767 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3770 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3772 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3773 struct mwl8k_priv *priv;
3780 ieee80211_stop_queues(hw);
3782 ieee80211_unregister_hw(hw);
3784 /* Remove tx reclaim tasklet */
3785 tasklet_kill(&priv->tx_reclaim_task);
3788 mwl8k_hw_reset(priv);
3790 /* Return all skbs to mac80211 */
3791 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3792 mwl8k_txq_reclaim(hw, i, 1);
3794 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3795 mwl8k_txq_deinit(hw, i);
3797 mwl8k_rxq_deinit(hw, 0);
3799 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3801 pci_iounmap(pdev, priv->regs);
3802 pci_iounmap(pdev, priv->sram);
3803 pci_set_drvdata(pdev, NULL);
3804 ieee80211_free_hw(hw);
3805 pci_release_regions(pdev);
3806 pci_disable_device(pdev);
3809 static struct pci_driver mwl8k_driver = {
3811 .id_table = mwl8k_pci_id_table,
3812 .probe = mwl8k_probe,
3813 .remove = __devexit_p(mwl8k_remove),
3814 .shutdown = __devexit_p(mwl8k_shutdown),
3817 static int __init mwl8k_init(void)
3819 return pci_register_driver(&mwl8k_driver);
3822 static void __exit mwl8k_exit(void)
3824 pci_unregister_driver(&mwl8k_driver);
3827 module_init(mwl8k_init);
3828 module_exit(mwl8k_exit);
3830 MODULE_DESCRIPTION(MWL8K_DESC);
3831 MODULE_VERSION(MWL8K_VERSION);
3832 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3833 MODULE_LICENSE("GPL");