drivers/net/wireless/iwlwifi/iwl-rx.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/etherdevice.h>
  31 #include <net/mac80211.h>
  32 #include <asm/unaligned.h>
  33 #include "iwl-eeprom.h"
  34 #include "iwl-dev.h"
  35 #include "iwl-core.h"
  36 #include "iwl-sta.h"
  37 #include "iwl-io.h"
  38 #include "iwl-calib.h"
  39 #include "iwl-helpers.h"
  40 /************************** RX-FUNCTIONS ****************************/
  41 /*
  42  * Rx theory of operation
  43  *
  44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45  * each of which point to Receive Buffers to be filled by the NIC.  These get
  46  * used not only for Rx frames, but for any command response or notification
  47  * from the NIC.  The driver and NIC manage the Rx buffers by means
  48  * of indexes into the circular buffer.
  49  *
  50  * Rx Queue Indexes
  51  * The host/firmware share two index registers for managing the Rx buffers.
  52  *
  53  * The READ index maps to the first position that the firmware may be writing
  54  * to -- the driver can read up to (but not including) this position and get
  55  * good data.
  56  * The READ index is managed by the firmware once the card is enabled.
  57  *
  58  * The WRITE index maps to the last position the driver has read from -- the
  59  * position preceding WRITE is the last slot the firmware can place a packet.
  60  *
  61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62  * WRITE = READ.
  63  *
  64  * During initialization, the host sets up the READ queue position to the first
  65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66  *
  67  * When the firmware places a packet in a buffer, it will advance the READ index
  68  * and fire the RX interrupt.  The driver can then query the READ index and
  69  * process as many packets as possible, moving the WRITE index forward as it
  70  * resets the Rx queue buffers with new memory.
  71  *
  72  * The management in the driver is as follows:
  73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
  74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75  *   to replenish the iwl->rxq->rx_free.
  76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
  78  *   'processed' and 'read' driver indexes as well)
  79  * + A received packet is processed and handed to the kernel network stack,
  80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
  81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
  84  *   were enough free buffers and RX_STALLED is set it is cleared.
  85  *
  86  *
  87  * Driver sequence:
  88  *
  89  * iwl_rx_queue_alloc()   Allocates rx_free
  90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
  91  *                            iwl_rx_queue_restock
  92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93  *                            queue, updates firmware pointers, and updates
  94  *                            the WRITE index.  If insufficient rx_free buffers
  95  *                            are available, schedules iwl_rx_replenish
  96  *
  97  * -- enable interrupts --
  98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
  99  *                            READ INDEX, detaching the SKB from the pool.
 100  *                            Moves the packet buffer from queue to rx_used.
 101  *                            Calls iwl_rx_queue_restock to refill any empty
 102  *                            slots.
 103  * ...
 104  *
 105  */
 106
 107 /**
 108  * iwl_rx_queue_space - Return number of free slots available in queue.
 109  */
 110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
 111 {
 112         int s = q->read - q->write;
 113         if (s <= 0)
 114                 s += RX_QUEUE_SIZE;
 115         /* keep some buffer to not confuse full and empty queue */
 116         s -= 2;
 117         if (s < 0)
 118                 s = 0;
 119         return s;
 120 }
 121 EXPORT_SYMBOL(iwl_rx_queue_space);
 122
 123 /**
 124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
 125  */
 126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
 127 {
 128         unsigned long flags;
 129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
 130         u32 reg;
 131         int ret = 0;
 132
 133         spin_lock_irqsave(&q->lock, flags);
 134
 135         if (q->need_update == 0)
 136                 goto exit_unlock;
 137
 138         /* If power-saving is in use, make sure device is awake */
 139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
 141
 142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
 143                         iwl_set_bit(priv, CSR_GP_CNTRL,
 144                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 145                         goto exit_unlock;
 146                 }
 147
 148                 q->write_actual = (q->write & ~0x7);
 149                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
 150
 151         /* Else device is assumed to be awake */
 152         } else {
 153                 /* Device expects a multiple of 8 */
 154                 q->write_actual = (q->write & ~0x7);
 155                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
 156         }
 157
 158         q->need_update = 0;
 159
 160  exit_unlock:
 161         spin_unlock_irqrestore(&q->lock, flags);
 162         return ret;
 163 }
 164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
 165 /**
 166  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 167  */
 168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
 169                                           dma_addr_t dma_addr)
 170 {
 171         return cpu_to_le32((u32)(dma_addr >> 8));
 172 }
 173
 174 /**
 175  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
 176  *
 177  * If there are slots in the RX queue that need to be restocked,
 178  * and we have free pre-allocated buffers, fill the ranks as much
 179  * as we can, pulling from rx_free.
 180  *
 181  * This moves the 'write' index forward to catch up with 'processed', and
 182  * also updates the memory address in the firmware to reference the new
 183  * target buffer.
 184  */
 185 int iwl_rx_queue_restock(struct iwl_priv *priv)
 186 {
 187         struct iwl_rx_queue *rxq = &priv->rxq;
 188         struct list_head *element;
 189         struct iwl_rx_mem_buffer *rxb;
 190         unsigned long flags;
 191         int write;
 192         int ret = 0;
 193
 194         spin_lock_irqsave(&rxq->lock, flags);
 195         write = rxq->write & ~0x7;
 196         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 197                 /* Get next free Rx buffer, remove from free list */
 198                 element = rxq->rx_free.next;
 199                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 200                 list_del(element);
 201
 202                 /* Point to Rx buffer via next RBD in circular buffer */
 203                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
 204                 rxq->queue[rxq->write] = rxb;
 205                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 206                 rxq->free_count--;
 207         }
 208         spin_unlock_irqrestore(&rxq->lock, flags);
 209         /* If the pre-allocated buffer pool is dropping low, schedule to
 210          * refill it */
 211         if (rxq->free_count <= RX_LOW_WATERMARK)
 212                 queue_work(priv->workqueue, &priv->rx_replenish);
 213
 214
 215         /* If we've added more space for the firmware to place data, tell it.
 216          * Increment device's write pointer in multiples of 8. */
 217         if (rxq->write_actual != (rxq->write & ~0x7)) {
 218                 spin_lock_irqsave(&rxq->lock, flags);
 219                 rxq->need_update = 1;
 220                 spin_unlock_irqrestore(&rxq->lock, flags);
 221                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
 222         }
 223
 224         return ret;
 225 }
 226 EXPORT_SYMBOL(iwl_rx_queue_restock);
 227
 228
 229 /**
 230  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
 231  *
 232  * When moving to rx_free an SKB is allocated for the slot.
 233  *
 234  * Also restock the Rx queue via iwl_rx_queue_restock.
 235  * This is called as a scheduled work item (except for during initialization)
 236  */
 237 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
 238 {
 239         struct iwl_rx_queue *rxq = &priv->rxq;
 240         struct list_head *element;
 241         struct iwl_rx_mem_buffer *rxb;
 242         struct sk_buff *skb;
 243         unsigned long flags;
 244
 245         while (1) {
 246                 spin_lock_irqsave(&rxq->lock, flags);
 247                 if (list_empty(&rxq->rx_used)) {
 248                         spin_unlock_irqrestore(&rxq->lock, flags);
 249                         return;
 250                 }
 251                 spin_unlock_irqrestore(&rxq->lock, flags);
 252
 253                 /* Alloc a new receive buffer */
 254                 skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
 255                                                 priority);
 256
 257                 if (!skb) {
 258                         IWL_CRIT(priv, "Can not allocate SKB buffers\n");
 259                         /* We don't reschedule replenish work here -- we will
 260                          * call the restock method and if it still needs
 261                          * more buffers it will schedule replenish */
 262                         break;
 263                 }
 264
 265                 spin_lock_irqsave(&rxq->lock, flags);
 266
 267                 if (list_empty(&rxq->rx_used)) {
 268                         spin_unlock_irqrestore(&rxq->lock, flags);
 269                         dev_kfree_skb_any(skb);
 270                         return;
 271                 }
 272                 element = rxq->rx_used.next;
 273                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 274                 list_del(element);
 275
 276                 spin_unlock_irqrestore(&rxq->lock, flags);
 277
 278                 rxb->skb = skb;
 279                 /* Get physical address of RB/SKB */
 280                 rxb->real_dma_addr = pci_map_single(
 281                                         priv->pci_dev,
 282                                         rxb->skb->data,
 283                                         priv->hw_params.rx_buf_size + 256,
 284                                         PCI_DMA_FROMDEVICE);
 285                 /* dma address must be no more than 36 bits */
 286                 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
 287                 /* and also 256 byte aligned! */
 288                 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
 289                 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
 290
 291                 spin_lock_irqsave(&rxq->lock, flags);
 292
 293                 list_add_tail(&rxb->list, &rxq->rx_free);
 294                 rxq->free_count++;
 295                 priv->alloc_rxb_skb++;
 296
 297                 spin_unlock_irqrestore(&rxq->lock, flags);
 298         }
 299 }
 300
 301 void iwl_rx_replenish(struct iwl_priv *priv)
 302 {
 303         unsigned long flags;
 304
 305         iwl_rx_allocate(priv, GFP_KERNEL);
 306
 307         spin_lock_irqsave(&priv->lock, flags);
 308         iwl_rx_queue_restock(priv);
 309         spin_unlock_irqrestore(&priv->lock, flags);
 310 }
 311 EXPORT_SYMBOL(iwl_rx_replenish);
 312
 313 void iwl_rx_replenish_now(struct iwl_priv *priv)
 314 {
 315         iwl_rx_allocate(priv, GFP_ATOMIC);
 316
 317         iwl_rx_queue_restock(priv);
 318 }
 319 EXPORT_SYMBOL(iwl_rx_replenish_now);
 320
 321
 322 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 323  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 324  * This free routine walks the list of POOL entries and if SKB is set to
 325  * non NULL it is unmapped and freed
 326  */
 327 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 328 {
 329         int i;
 330         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 331                 if (rxq->pool[i].skb != NULL) {
 332                         pci_unmap_single(priv->pci_dev,
 333                                          rxq->pool[i].real_dma_addr,
 334                                          priv->hw_params.rx_buf_size + 256,
 335                                          PCI_DMA_FROMDEVICE);
 336                         dev_kfree_skb(rxq->pool[i].skb);
 337                 }
 338         }
 339
 340         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 341                             rxq->dma_addr);
 342         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
 343                             rxq->rb_stts, rxq->rb_stts_dma);
 344         rxq->bd = NULL;
 345         rxq->rb_stts  = NULL;
 346 }
 347 EXPORT_SYMBOL(iwl_rx_queue_free);
 348
 349 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 350 {
 351         struct iwl_rx_queue *rxq = &priv->rxq;
 352         struct pci_dev *dev = priv->pci_dev;
 353         int i;
 354
 355         spin_lock_init(&rxq->lock);
 356         INIT_LIST_HEAD(&rxq->rx_free);
 357         INIT_LIST_HEAD(&rxq->rx_used);
 358
 359         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
 360         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
 361         if (!rxq->bd)
 362                 goto err_bd;
 363
 364         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
 365                                         &rxq->rb_stts_dma);
 366         if (!rxq->rb_stts)
 367                 goto err_rb;
 368
 369         /* Fill the rx_used queue with _all_ of the Rx buffers */
 370         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
 371                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 372
 373         /* Set us so that we have processed and used all buffers, but have
 374          * not restocked the Rx queue with fresh buffers */
 375         rxq->read = rxq->write = 0;
 376         rxq->write_actual = 0;
 377         rxq->free_count = 0;
 378         rxq->need_update = 0;
 379         return 0;
 380
 381 err_rb:
 382         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 383                             rxq->dma_addr);
 384 err_bd:
 385         return -ENOMEM;
 386 }
 387 EXPORT_SYMBOL(iwl_rx_queue_alloc);
 388
 389 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 390 {
 391         unsigned long flags;
 392         int i;
 393         spin_lock_irqsave(&rxq->lock, flags);
 394         INIT_LIST_HEAD(&rxq->rx_free);
 395         INIT_LIST_HEAD(&rxq->rx_used);
 396         /* Fill the rx_used queue with _all_ of the Rx buffers */
 397         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
 398                 /* In the reset function, these buffers may have been allocated
 399                  * to an SKB, so we need to unmap and free potential storage */
 400                 if (rxq->pool[i].skb != NULL) {
 401                         pci_unmap_single(priv->pci_dev,
 402                                          rxq->pool[i].real_dma_addr,
 403                                          priv->hw_params.rx_buf_size + 256,
 404                                          PCI_DMA_FROMDEVICE);
 405                         priv->alloc_rxb_skb--;
 406                         dev_kfree_skb(rxq->pool[i].skb);
 407                         rxq->pool[i].skb = NULL;
 408                 }
 409                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 410         }
 411
 412         /* Set us so that we have processed and used all buffers, but have
 413          * not restocked the Rx queue with fresh buffers */
 414         rxq->read = rxq->write = 0;
 415         rxq->write_actual = 0;
 416         rxq->free_count = 0;
 417         spin_unlock_irqrestore(&rxq->lock, flags);
 418 }
 419
 420 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 421 {
 422         u32 rb_size;
 423         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 424         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
 425
 426         if (!priv->cfg->use_isr_legacy)
 427                 rb_timeout = RX_RB_TIMEOUT;
 428
 429         if (priv->cfg->mod_params->amsdu_size_8K)
 430                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 431         else
 432                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 433
 434         /* Stop Rx DMA */
 435         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 436
 437         /* Reset driver's Rx queue write index */
 438         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 439
 440         /* Tell device where to find RBD circular buffer in DRAM */
 441         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 442                            (u32)(rxq->dma_addr >> 8));
 443
 444         /* Tell device where in DRAM to update its Rx status */
 445         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 446                            rxq->rb_stts_dma >> 4);
 447
 448         /* Enable Rx DMA
 449          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
 450          *      the credit mechanism in 5000 HW RX FIFO
 451          * Direct rx interrupts to hosts
 452          * Rx buffer size 4 or 8k
 453          * RB timeout 0x10
 454          * 256 RBDs
 455          */
 456         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 457                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 458                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 459                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 460                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
 461                            rb_size|
 462                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 463                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 464
 465         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
 466
 467         return 0;
 468 }
 469
 470 int iwl_rxq_stop(struct iwl_priv *priv)
 471 {
 472
 473         /* stop Rx DMA */
 474         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 475         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 476                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
 477
 478         return 0;
 479 }
 480 EXPORT_SYMBOL(iwl_rxq_stop);
 481
 482 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
 483                                 struct iwl_rx_mem_buffer *rxb)
 484
 485 {
 486         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 487         struct iwl_missed_beacon_notif *missed_beacon;
 488
 489         missed_beacon = &pkt->u.missed_beacon;
 490         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
 491                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
 492                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
 493                     le32_to_cpu(missed_beacon->total_missed_becons),
 494                     le32_to_cpu(missed_beacon->num_recvd_beacons),
 495                     le32_to_cpu(missed_beacon->num_expected_beacons));
 496                 if (!test_bit(STATUS_SCANNING, &priv->status))
 497                         iwl_init_sensitivity(priv);
 498         }
 499 }
 500 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
 501
 502
 503 /* Calculate noise level, based on measurements during network silence just
 504  *   before arriving beacon.  This measurement can be done only if we know
 505  *   exactly when to expect beacons, therefore only when we're associated. */
 506 static void iwl_rx_calc_noise(struct iwl_priv *priv)
 507 {
 508         struct statistics_rx_non_phy *rx_info
 509                                 = &(priv->statistics.rx.general);
 510         int num_active_rx = 0;
 511         int total_silence = 0;
 512         int bcn_silence_a =
 513                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
 514         int bcn_silence_b =
 515                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
 516         int bcn_silence_c =
 517                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
 518
 519         if (bcn_silence_a) {
 520                 total_silence += bcn_silence_a;
 521                 num_active_rx++;
 522         }
 523         if (bcn_silence_b) {
 524                 total_silence += bcn_silence_b;
 525                 num_active_rx++;
 526         }
 527         if (bcn_silence_c) {
 528                 total_silence += bcn_silence_c;
 529                 num_active_rx++;
 530         }
 531
 532         /* Average among active antennas */
 533         if (num_active_rx)
 534                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
 535         else
 536                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 537
 538         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
 539                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
 540                         priv->last_rx_noise);
 541 }
 542
 543 #define REG_RECALIB_PERIOD (60)
 544
 545 void iwl_rx_statistics(struct iwl_priv *priv,
 546                               struct iwl_rx_mem_buffer *rxb)
 547 {
 548         int change;
 549         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 550
 551         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
 552                      (int)sizeof(priv->statistics),
 553                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 554
 555         change = ((priv->statistics.general.temperature !=
 556                    pkt->u.stats.general.temperature) ||
 557                   ((priv->statistics.flag &
 558                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
 559                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
 560
 561         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
 562
 563         set_bit(STATUS_STATISTICS, &priv->status);
 564
 565         /* Reschedule the statistics timer to occur in
 566          * REG_RECALIB_PERIOD seconds to ensure we get a
 567          * thermal update even if the uCode doesn't give
 568          * us one */
 569         mod_timer(&priv->statistics_periodic, jiffies +
 570                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
 571
 572         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
 573             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
 574                 iwl_rx_calc_noise(priv);
 575                 queue_work(priv->workqueue, &priv->run_time_calib_work);
 576         }
 577
 578         iwl_leds_background(priv);
 579
 580         if (priv->cfg->ops->lib->temp_ops.temperature && change)
 581                 priv->cfg->ops->lib->temp_ops.temperature(priv);
 582 }
 583 EXPORT_SYMBOL(iwl_rx_statistics);
 584
 585 #define PERFECT_RSSI (-20) /* dBm */
 586 #define WORST_RSSI (-95)   /* dBm */
 587 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
 588
 589 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
 590  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
 591  *   about formulas used below. */
 592 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
 593 {
 594         int sig_qual;
 595         int degradation = PERFECT_RSSI - rssi_dbm;
 596
 597         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
 598          * as indicator; formula is (signal dbm - noise dbm).
 599          * SNR at or above 40 is a great signal (100%).
 600          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
 601          * Weakest usable signal is usually 10 - 15 dB SNR. */
 602         if (noise_dbm) {
 603                 if (rssi_dbm - noise_dbm >= 40)
 604                         return 100;
 605                 else if (rssi_dbm < noise_dbm)
 606                         return 0;
 607                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
 608
 609         /* Else use just the signal level.
 610          * This formula is a least squares fit of data points collected and
 611          *   compared with a reference system that had a percentage (%) display
 612          *   for signal quality. */
 613         } else
 614                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
 615                             (15 * RSSI_RANGE + 62 * degradation)) /
 616                            (RSSI_RANGE * RSSI_RANGE);
 617
 618         if (sig_qual > 100)
 619                 sig_qual = 100;
 620         else if (sig_qual < 1)
 621                 sig_qual = 0;
 622
 623         return sig_qual;
 624 }
 625
 626 /* Calc max signal level (dBm) among 3 possible receivers */
 627 static inline int iwl_calc_rssi(struct iwl_priv *priv,
 628                                 struct iwl_rx_phy_res *rx_resp)
 629 {
 630         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
 631 }
 632
 633 #ifdef CONFIG_IWLWIFI_DEBUG
 634 /**
 635  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
 636  *
 637  * You may hack this function to show different aspects of received frames,
 638  * including selective frame dumps.
 639  * group100 parameter selects whether to show 1 out of 100 good data frames.
 640  *    All beacon and probe response frames are printed.
 641  */
 642 static void iwl_dbg_report_frame(struct iwl_priv *priv,
 643                       struct iwl_rx_phy_res *phy_res, u16 length,
 644                       struct ieee80211_hdr *header, int group100)
 645 {
 646         u32 to_us;
 647         u32 print_summary = 0;
 648         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 649         u32 hundred = 0;
 650         u32 dataframe = 0;
 651         __le16 fc;
 652         u16 seq_ctl;
 653         u16 channel;
 654         u16 phy_flags;
 655         u32 rate_n_flags;
 656         u32 tsf_low;
 657         int rssi;
 658
 659         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
 660                 return;
 661
 662         /* MAC header */
 663         fc = header->frame_control;
 664         seq_ctl = le16_to_cpu(header->seq_ctrl);
 665
 666         /* metadata */
 667         channel = le16_to_cpu(phy_res->channel);
 668         phy_flags = le16_to_cpu(phy_res->phy_flags);
 669         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 670
 671         /* signal statistics */
 672         rssi = iwl_calc_rssi(priv, phy_res);
 673         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
 674
 675         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 676
 677         /* if data frame is to us and all is good,
 678          *   (optionally) print summary for only 1 out of every 100 */
 679         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 680             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 681                 dataframe = 1;
 682                 if (!group100)
 683                         print_summary = 1;      /* print each frame */
 684                 else if (priv->framecnt_to_us < 100) {
 685                         priv->framecnt_to_us++;
 686                         print_summary = 0;
 687                 } else {
 688                         priv->framecnt_to_us = 0;
 689                         print_summary = 1;
 690                         hundred = 1;
 691                 }
 692         } else {
 693                 /* print summary for all other frames */
 694                 print_summary = 1;
 695         }
 696
 697         if (print_summary) {
 698                 char *title;
 699                 int rate_idx;
 700                 u32 bitrate;
 701
 702                 if (hundred)
 703                         title = "100Frames";
 704                 else if (ieee80211_has_retry(fc))
 705                         title = "Retry";
 706                 else if (ieee80211_is_assoc_resp(fc))
 707                         title = "AscRsp";
 708                 else if (ieee80211_is_reassoc_resp(fc))
 709                         title = "RasRsp";
 710                 else if (ieee80211_is_probe_resp(fc)) {
 711                         title = "PrbRsp";
 712                         print_dump = 1; /* dump frame contents */
 713                 } else if (ieee80211_is_beacon(fc)) {
 714                         title = "Beacon";
 715                         print_dump = 1; /* dump frame contents */
 716                 } else if (ieee80211_is_atim(fc))
 717                         title = "ATIM";
 718                 else if (ieee80211_is_auth(fc))
 719                         title = "Auth";
 720                 else if (ieee80211_is_deauth(fc))
 721                         title = "DeAuth";
 722                 else if (ieee80211_is_disassoc(fc))
 723                         title = "DisAssoc";
 724                 else
 725                         title = "Frame";
 726
 727                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
 728                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
 729                         bitrate = 0;
 730                         WARN_ON_ONCE(1);
 731                 } else {
 732                         bitrate = iwl_rates[rate_idx].ieee / 2;
 733                 }
 734
 735                 /* print frame summary.
 736                  * MAC addresses show just the last byte (for brevity),
 737                  *    but you can hack it to show more, if you'd like to. */
 738                 if (dataframe)
 739                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
 740                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 741                                      title, le16_to_cpu(fc), header->addr1[5],
 742                                      length, rssi, channel, bitrate);
 743                 else {
 744                         /* src/dst addresses assume managed mode */
 745                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
 746                                      "len=%u, rssi=%d, tim=%lu usec, "
 747                                      "phy=0x%02x, chnl=%d\n",
 748                                      title, le16_to_cpu(fc), header->addr1[5],
 749                                      header->addr3[5], length, rssi,
 750                                      tsf_low - priv->scan_start_tsf,
 751                                      phy_flags, channel);
 752                 }
 753         }
 754         if (print_dump)
 755                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
 756 }
 757 #endif
 758
 759 /*
 760  * returns non-zero if packet should be dropped
 761  */
 762 int iwl_set_decrypted_flag(struct iwl_priv *priv,
 763                            struct ieee80211_hdr *hdr,
 764                            u32 decrypt_res,
 765                            struct ieee80211_rx_status *stats)
 766 {
 767         u16 fc = le16_to_cpu(hdr->frame_control);
 768
 769         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
 770                 return 0;
 771
 772         if (!(fc & IEEE80211_FCTL_PROTECTED))
 773                 return 0;
 774
 775         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
 776         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
 777         case RX_RES_STATUS_SEC_TYPE_TKIP:
 778                 /* The uCode has got a bad phase 1 Key, pushes the packet.
 779                  * Decryption will be done in SW. */
 780                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 781                     RX_RES_STATUS_BAD_KEY_TTAK)
 782                         break;
 783
 784         case RX_RES_STATUS_SEC_TYPE_WEP:
 785                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 786                     RX_RES_STATUS_BAD_ICV_MIC) {
 787                         /* bad ICV, the packet is destroyed since the
 788                          * decryption is inplace, drop it */
 789                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
 790                         return -1;
 791                 }
 792         case RX_RES_STATUS_SEC_TYPE_CCMP:
 793                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 794                     RX_RES_STATUS_DECRYPT_OK) {
 795                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
 796                         stats->flag |= RX_FLAG_DECRYPTED;
 797                 }
 798                 break;
 799
 800         default:
 801                 break;
 802         }
 803         return 0;
 804 }
 805 EXPORT_SYMBOL(iwl_set_decrypted_flag);
 806
 807 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 808 {
 809         u32 decrypt_out = 0;
 810
 811         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 812                                         RX_RES_STATUS_STATION_FOUND)
 813                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 814                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 815
 816         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 817
 818         /* packet was not encrypted */
 819         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 820                                         RX_RES_STATUS_SEC_TYPE_NONE)
 821                 return decrypt_out;
 822
 823         /* packet was encrypted with unknown alg */
 824         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 825                                         RX_RES_STATUS_SEC_TYPE_ERR)
 826                 return decrypt_out;
 827
 828         /* decryption was not done in HW */
 829         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 830                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 831                 return decrypt_out;
 832
 833         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 834
 835         case RX_RES_STATUS_SEC_TYPE_CCMP:
 836                 /* alg is CCM: check MIC only */
 837                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 838                         /* Bad MIC */
 839                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 840                 else
 841                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 842
 843                 break;
 844
 845         case RX_RES_STATUS_SEC_TYPE_TKIP:
 846                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 847                         /* Bad TTAK */
 848                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 849                         break;
 850                 }
 851                 /* fall through if TTAK OK */
 852         default:
 853                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 854                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 855                 else
 856                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 857                 break;
 858         };
 859
 860         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
 861                                         decrypt_in, decrypt_out);
 862
 863         return decrypt_out;
 864 }
 865
 866 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
 867                                         struct ieee80211_hdr *hdr,
 868                                         u16 len,
 869                                         u32 ampdu_status,
 870                                         struct iwl_rx_mem_buffer *rxb,
 871                                         struct ieee80211_rx_status *stats)
 872 {
 873         /* We only process data packets if the interface is open */
 874         if (unlikely(!priv->is_open)) {
 875                 IWL_DEBUG_DROP_LIMIT(priv,
 876                     "Dropping packet while interface is not open.\n");
 877                 return;
 878         }
 879
 880         /* In case of HW accelerated crypto and bad decryption, drop */
 881         if (!priv->cfg->mod_params->sw_crypto &&
 882             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 883                 return;
 884
 885         /* Resize SKB from mac header to end of packet */
 886         skb_reserve(rxb->skb, (void *)hdr - (void *)rxb->skb->data);
 887         skb_put(rxb->skb, len);
 888
 889         iwl_update_stats(priv, false, hdr->frame_control, len);
 890         memcpy(IEEE80211_SKB_RXCB(rxb->skb), stats, sizeof(*stats));
 891         ieee80211_rx_irqsafe(priv->hw, rxb->skb);
 892         priv->alloc_rxb_skb--;
 893         rxb->skb = NULL;
 894 }
 895
 896 /* This is necessary only for a number of statistics, see the caller. */
 897 static int iwl_is_network_packet(struct iwl_priv *priv,
 898                 struct ieee80211_hdr *header)
 899 {
 900         /* Filter incoming packets to determine if they are targeted toward
 901          * this network, discarding packets coming from ourselves */
 902         switch (priv->iw_mode) {
 903         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 904                 /* packets to our IBSS update information */
 905                 return !compare_ether_addr(header->addr3, priv->bssid);
 906         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 907                 /* packets to our IBSS update information */
 908                 return !compare_ether_addr(header->addr2, priv->bssid);
 909         default:
 910                 return 1;
 911         }
 912 }
 913
 914 /* Called for REPLY_RX (legacy ABG frames), or
 915  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
 916 void iwl_rx_reply_rx(struct iwl_priv *priv,
 917                                 struct iwl_rx_mem_buffer *rxb)
 918 {
 919         struct ieee80211_hdr *header;
 920         struct ieee80211_rx_status rx_status;
 921         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 922         struct iwl_rx_phy_res *phy_res;
 923         __le32 rx_pkt_status;
 924         struct iwl4965_rx_mpdu_res_start *amsdu;
 925         u32 len;
 926         u32 ampdu_status;
 927         u16 fc;
 928         u32 rate_n_flags;
 929
 930         /**
 931          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
 932          *      REPLY_RX: physical layer info is in this buffer
 933          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
 934          *              command and cached in priv->last_phy_res
 935          *
 936          * Here we set up local variables depending on which command is
 937          * received.
 938          */
 939         if (pkt->hdr.cmd == REPLY_RX) {
 940                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
 941                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
 942                                 + phy_res->cfg_phy_cnt);
 943
 944                 len = le16_to_cpu(phy_res->byte_count);
 945                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
 946                                 phy_res->cfg_phy_cnt + len);
 947                 ampdu_status = le32_to_cpu(rx_pkt_status);
 948         } else {
 949                 if (!priv->last_phy_res[0]) {
 950                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
 951                         return;
 952                 }
 953                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
 954                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
 955                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
 956                 len = le16_to_cpu(amsdu->byte_count);
 957                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
 958                 ampdu_status = iwl_translate_rx_status(priv,
 959                                 le32_to_cpu(rx_pkt_status));
 960         }
 961
 962         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
 963                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
 964                                 phy_res->cfg_phy_cnt);
 965                 return;
 966         }
 967
 968         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
 969             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 970                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
 971                                 le32_to_cpu(rx_pkt_status));
 972                 return;
 973         }
 974
 975         /* This will be used in several places later */
 976         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 977
 978         /* rx_status carries information about the packet to mac80211 */
 979         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
 980         rx_status.freq =
 981                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
 982         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 983                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 984         rx_status.rate_idx =
 985                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
 986         rx_status.flag = 0;
 987
 988         /* TSF isn't reliable. In order to allow smooth user experience,
 989          * this W/A doesn't propagate it to the mac80211 */
 990         /*rx_status.flag |= RX_FLAG_TSFT;*/
 991
 992         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
 993
 994         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
 995         rx_status.signal = iwl_calc_rssi(priv, phy_res);
 996
 997         /* Meaningful noise values are available only from beacon statistics,
 998          *   which are gathered only when associated, and indicate noise
 999          *   only for the associated network channel ...
1000          * Ignore these noise values while scanning (other channels) */
1001         if (iwl_is_associated(priv) &&
1002             !test_bit(STATUS_SCANNING, &priv->status)) {
1003                 rx_status.noise = priv->last_rx_noise;
1004                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1005                                                          rx_status.noise);
1006         } else {
1007                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1008                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1009         }
1010
1011         /* Reset beacon noise level if not associated. */
1012         if (!iwl_is_associated(priv))
1013                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1014
1015 #ifdef CONFIG_IWLWIFI_DEBUG
1016         /* Set "1" to report good data frames in groups of 100 */
1017         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1018                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1019 #endif
1020         iwl_dbg_log_rx_data_frame(priv, len, header);
1021         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1022                 rx_status.signal, rx_status.noise, rx_status.qual,
1023                 (unsigned long long)rx_status.mactime);
1024
1025         /*
1026          * "antenna number"
1027          *
1028          * It seems that the antenna field in the phy flags value
1029          * is actually a bit field. This is undefined by radiotap,
1030          * it wants an actual antenna number but I always get "7"
1031          * for most legacy frames I receive indicating that the
1032          * same frame was received on all three RX chains.
1033          *
1034          * I think this field should be removed in favor of a
1035          * new 802.11n radiotap field "RX chains" that is defined
1036          * as a bitmask.
1037          */
1038         rx_status.antenna =
1039                 le16_to_cpu(phy_res->phy_flags & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1040                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1041
1042         /* set the preamble flag if appropriate */
1043         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1044                 rx_status.flag |= RX_FLAG_SHORTPRE;
1045
1046         /* Set up the HT phy flags */
1047         if (rate_n_flags & RATE_MCS_HT_MSK)
1048                 rx_status.flag |= RX_FLAG_HT;
1049         if (rate_n_flags & RATE_MCS_HT40_MSK)
1050                 rx_status.flag |= RX_FLAG_40MHZ;
1051         if (rate_n_flags & RATE_MCS_SGI_MSK)
1052                 rx_status.flag |= RX_FLAG_SHORT_GI;
1053
1054         if (iwl_is_network_packet(priv, header)) {
1055                 priv->last_rx_rssi = rx_status.signal;
1056                 priv->last_beacon_time =  priv->ucode_beacon_time;
1057                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1058         }
1059
1060         fc = le16_to_cpu(header->frame_control);
1061         switch (fc & IEEE80211_FCTL_FTYPE) {
1062         case IEEE80211_FTYPE_MGMT:
1063         case IEEE80211_FTYPE_DATA:
1064                 if (priv->iw_mode == NL80211_IFTYPE_AP)
1065                         iwl_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
1066                                                 header->addr2);
1067                 /* fall through */
1068         default:
1069                 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1070                                 rxb, &rx_status);
1071                 break;
1072
1073         }
1074 }
1075 EXPORT_SYMBOL(iwl_rx_reply_rx);
1076
1077 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1078  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1079 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1080                                     struct iwl_rx_mem_buffer *rxb)
1081 {
1082         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1083         priv->last_phy_res[0] = 1;
1084         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1085                sizeof(struct iwl_rx_phy_res));
1086 }
1087 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);