drivers/net/wireless/iwlwifi/iwl-rx.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/etherdevice.h>
  31 #include <net/mac80211.h>
  32 #include <asm/unaligned.h>
  33 #include "iwl-eeprom.h"
  34 #include "iwl-dev.h"
  35 #include "iwl-core.h"
  36 #include "iwl-sta.h"
  37 #include "iwl-io.h"
  38 #include "iwl-calib.h"
  39 #include "iwl-helpers.h"
  40 /************************** RX-FUNCTIONS ****************************/
  41 /*
  42  * Rx theory of operation
  43  *
  44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45  * each of which point to Receive Buffers to be filled by the NIC.  These get
  46  * used not only for Rx frames, but for any command response or notification
  47  * from the NIC.  The driver and NIC manage the Rx buffers by means
  48  * of indexes into the circular buffer.
  49  *
  50  * Rx Queue Indexes
  51  * The host/firmware share two index registers for managing the Rx buffers.
  52  *
  53  * The READ index maps to the first position that the firmware may be writing
  54  * to -- the driver can read up to (but not including) this position and get
  55  * good data.
  56  * The READ index is managed by the firmware once the card is enabled.
  57  *
  58  * The WRITE index maps to the last position the driver has read from -- the
  59  * position preceding WRITE is the last slot the firmware can place a packet.
  60  *
  61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62  * WRITE = READ.
  63  *
  64  * During initialization, the host sets up the READ queue position to the first
  65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66  *
  67  * When the firmware places a packet in a buffer, it will advance the READ index
  68  * and fire the RX interrupt.  The driver can then query the READ index and
  69  * process as many packets as possible, moving the WRITE index forward as it
  70  * resets the Rx queue buffers with new memory.
  71  *
  72  * The management in the driver is as follows:
  73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
  74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75  *   to replenish the iwl->rxq->rx_free.
  76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
  78  *   'processed' and 'read' driver indexes as well)
  79  * + A received packet is processed and handed to the kernel network stack,
  80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
  81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
  84  *   were enough free buffers and RX_STALLED is set it is cleared.
  85  *
  86  *
  87  * Driver sequence:
  88  *
  89  * iwl_rx_queue_alloc()   Allocates rx_free
  90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
  91  *                            iwl_rx_queue_restock
  92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93  *                            queue, updates firmware pointers, and updates
  94  *                            the WRITE index.  If insufficient rx_free buffers
  95  *                            are available, schedules iwl_rx_replenish
  96  *
  97  * -- enable interrupts --
  98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
  99  *                            READ INDEX, detaching the SKB from the pool.
 100  *                            Moves the packet buffer from queue to rx_used.
 101  *                            Calls iwl_rx_queue_restock to refill any empty
 102  *                            slots.
 103  * ...
 104  *
 105  */
 106
 107 /**
 108  * iwl_rx_queue_space - Return number of free slots available in queue.
 109  */
 110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
 111 {
 112         int s = q->read - q->write;
 113         if (s <= 0)
 114                 s += RX_QUEUE_SIZE;
 115         /* keep some buffer to not confuse full and empty queue */
 116         s -= 2;
 117         if (s < 0)
 118                 s = 0;
 119         return s;
 120 }
 121 EXPORT_SYMBOL(iwl_rx_queue_space);
 122
 123 /**
 124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
 125  */
 126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
 127 {
 128         unsigned long flags;
 129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
 130         u32 reg;
 131         int ret = 0;
 132
 133         spin_lock_irqsave(&q->lock, flags);
 134
 135         if (q->need_update == 0)
 136                 goto exit_unlock;
 137
 138         /* If power-saving is in use, make sure device is awake */
 139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
 141
 142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
 143                         iwl_set_bit(priv, CSR_GP_CNTRL,
 144                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 145                         goto exit_unlock;
 146                 }
 147
 148                 q->write_actual = (q->write & ~0x7);
 149                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
 150
 151         /* Else device is assumed to be awake */
 152         } else {
 153                 /* Device expects a multiple of 8 */
 154                 q->write_actual = (q->write & ~0x7);
 155                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
 156         }
 157
 158         q->need_update = 0;
 159
 160  exit_unlock:
 161         spin_unlock_irqrestore(&q->lock, flags);
 162         return ret;
 163 }
 164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
 165 /**
 166  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 167  */
 168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
 169                                           dma_addr_t dma_addr)
 170 {
 171         return cpu_to_le32((u32)(dma_addr >> 8));
 172 }
 173
 174 /**
 175  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
 176  *
 177  * If there are slots in the RX queue that need to be restocked,
 178  * and we have free pre-allocated buffers, fill the ranks as much
 179  * as we can, pulling from rx_free.
 180  *
 181  * This moves the 'write' index forward to catch up with 'processed', and
 182  * also updates the memory address in the firmware to reference the new
 183  * target buffer.
 184  */
 185 int iwl_rx_queue_restock(struct iwl_priv *priv)
 186 {
 187         struct iwl_rx_queue *rxq = &priv->rxq;
 188         struct list_head *element;
 189         struct iwl_rx_mem_buffer *rxb;
 190         unsigned long flags;
 191         int write;
 192         int ret = 0;
 193
 194         spin_lock_irqsave(&rxq->lock, flags);
 195         write = rxq->write & ~0x7;
 196         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 197                 /* Get next free Rx buffer, remove from free list */
 198                 element = rxq->rx_free.next;
 199                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 200                 list_del(element);
 201
 202                 /* Point to Rx buffer via next RBD in circular buffer */
 203                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
 204                 rxq->queue[rxq->write] = rxb;
 205                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 206                 rxq->free_count--;
 207         }
 208         spin_unlock_irqrestore(&rxq->lock, flags);
 209         /* If the pre-allocated buffer pool is dropping low, schedule to
 210          * refill it */
 211         if (rxq->free_count <= RX_LOW_WATERMARK)
 212                 queue_work(priv->workqueue, &priv->rx_replenish);
 213
 214
 215         /* If we've added more space for the firmware to place data, tell it.
 216          * Increment device's write pointer in multiples of 8. */
 217         if (rxq->write_actual != (rxq->write & ~0x7)) {
 218                 spin_lock_irqsave(&rxq->lock, flags);
 219                 rxq->need_update = 1;
 220                 spin_unlock_irqrestore(&rxq->lock, flags);
 221                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
 222         }
 223
 224         return ret;
 225 }
 226 EXPORT_SYMBOL(iwl_rx_queue_restock);
 227
 228
 229 /**
 230  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
 231  *
 232  * When moving to rx_free an SKB is allocated for the slot.
 233  *
 234  * Also restock the Rx queue via iwl_rx_queue_restock.
 235  * This is called as a scheduled work item (except for during initialization)
 236  */
 237 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
 238 {
 239         struct iwl_rx_queue *rxq = &priv->rxq;
 240         struct list_head *element;
 241         struct iwl_rx_mem_buffer *rxb;
 242         struct sk_buff *skb;
 243         unsigned long flags;
 244
 245         while (1) {
 246                 spin_lock_irqsave(&rxq->lock, flags);
 247                 if (list_empty(&rxq->rx_used)) {
 248                         spin_unlock_irqrestore(&rxq->lock, flags);
 249                         return;
 250                 }
 251                 spin_unlock_irqrestore(&rxq->lock, flags);
 252
 253                 if (rxq->free_count > RX_LOW_WATERMARK)
 254                         priority |= __GFP_NOWARN;
 255                 /* Alloc a new receive buffer */
 256                 skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
 257                                                 priority);
 258
 259                 if (!skb) {
 260                         if (net_ratelimit())
 261                                 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
 262                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
 263                             net_ratelimit())
 264                                 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
 265                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
 266                                          rxq->free_count);
 267                         /* We don't reschedule replenish work here -- we will
 268                          * call the restock method and if it still needs
 269                          * more buffers it will schedule replenish */
 270                         break;
 271                 }
 272
 273                 spin_lock_irqsave(&rxq->lock, flags);
 274
 275                 if (list_empty(&rxq->rx_used)) {
 276                         spin_unlock_irqrestore(&rxq->lock, flags);
 277                         dev_kfree_skb_any(skb);
 278                         return;
 279                 }
 280                 element = rxq->rx_used.next;
 281                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 282                 list_del(element);
 283
 284                 spin_unlock_irqrestore(&rxq->lock, flags);
 285
 286                 rxb->skb = skb;
 287                 /* Get physical address of RB/SKB */
 288                 rxb->real_dma_addr = pci_map_single(
 289                                         priv->pci_dev,
 290                                         rxb->skb->data,
 291                                         priv->hw_params.rx_buf_size + 256,
 292                                         PCI_DMA_FROMDEVICE);
 293                 /* dma address must be no more than 36 bits */
 294                 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
 295                 /* and also 256 byte aligned! */
 296                 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
 297                 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
 298
 299                 spin_lock_irqsave(&rxq->lock, flags);
 300
 301                 list_add_tail(&rxb->list, &rxq->rx_free);
 302                 rxq->free_count++;
 303                 priv->alloc_rxb_skb++;
 304
 305                 spin_unlock_irqrestore(&rxq->lock, flags);
 306         }
 307 }
 308
 309 void iwl_rx_replenish(struct iwl_priv *priv)
 310 {
 311         unsigned long flags;
 312
 313         iwl_rx_allocate(priv, GFP_KERNEL);
 314
 315         spin_lock_irqsave(&priv->lock, flags);
 316         iwl_rx_queue_restock(priv);
 317         spin_unlock_irqrestore(&priv->lock, flags);
 318 }
 319 EXPORT_SYMBOL(iwl_rx_replenish);
 320
 321 void iwl_rx_replenish_now(struct iwl_priv *priv)
 322 {
 323         iwl_rx_allocate(priv, GFP_ATOMIC);
 324
 325         iwl_rx_queue_restock(priv);
 326 }
 327 EXPORT_SYMBOL(iwl_rx_replenish_now);
 328
 329
 330 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 331  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 332  * This free routine walks the list of POOL entries and if SKB is set to
 333  * non NULL it is unmapped and freed
 334  */
 335 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 336 {
 337         int i;
 338         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 339                 if (rxq->pool[i].skb != NULL) {
 340                         pci_unmap_single(priv->pci_dev,
 341                                          rxq->pool[i].real_dma_addr,
 342                                          priv->hw_params.rx_buf_size + 256,
 343                                          PCI_DMA_FROMDEVICE);
 344                         dev_kfree_skb(rxq->pool[i].skb);
 345                 }
 346         }
 347
 348         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 349                             rxq->dma_addr);
 350         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
 351                             rxq->rb_stts, rxq->rb_stts_dma);
 352         rxq->bd = NULL;
 353         rxq->rb_stts  = NULL;
 354 }
 355 EXPORT_SYMBOL(iwl_rx_queue_free);
 356
 357 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 358 {
 359         struct iwl_rx_queue *rxq = &priv->rxq;
 360         struct pci_dev *dev = priv->pci_dev;
 361         int i;
 362
 363         spin_lock_init(&rxq->lock);
 364         INIT_LIST_HEAD(&rxq->rx_free);
 365         INIT_LIST_HEAD(&rxq->rx_used);
 366
 367         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
 368         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
 369         if (!rxq->bd)
 370                 goto err_bd;
 371
 372         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
 373                                         &rxq->rb_stts_dma);
 374         if (!rxq->rb_stts)
 375                 goto err_rb;
 376
 377         /* Fill the rx_used queue with _all_ of the Rx buffers */
 378         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
 379                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 380
 381         /* Set us so that we have processed and used all buffers, but have
 382          * not restocked the Rx queue with fresh buffers */
 383         rxq->read = rxq->write = 0;
 384         rxq->write_actual = 0;
 385         rxq->free_count = 0;
 386         rxq->need_update = 0;
 387         return 0;
 388
 389 err_rb:
 390         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 391                             rxq->dma_addr);
 392 err_bd:
 393         return -ENOMEM;
 394 }
 395 EXPORT_SYMBOL(iwl_rx_queue_alloc);
 396
 397 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 398 {
 399         unsigned long flags;
 400         int i;
 401         spin_lock_irqsave(&rxq->lock, flags);
 402         INIT_LIST_HEAD(&rxq->rx_free);
 403         INIT_LIST_HEAD(&rxq->rx_used);
 404         /* Fill the rx_used queue with _all_ of the Rx buffers */
 405         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
 406                 /* In the reset function, these buffers may have been allocated
 407                  * to an SKB, so we need to unmap and free potential storage */
 408                 if (rxq->pool[i].skb != NULL) {
 409                         pci_unmap_single(priv->pci_dev,
 410                                          rxq->pool[i].real_dma_addr,
 411                                          priv->hw_params.rx_buf_size + 256,
 412                                          PCI_DMA_FROMDEVICE);
 413                         priv->alloc_rxb_skb--;
 414                         dev_kfree_skb(rxq->pool[i].skb);
 415                         rxq->pool[i].skb = NULL;
 416                 }
 417                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 418         }
 419
 420         /* Set us so that we have processed and used all buffers, but have
 421          * not restocked the Rx queue with fresh buffers */
 422         rxq->read = rxq->write = 0;
 423         rxq->write_actual = 0;
 424         rxq->free_count = 0;
 425         spin_unlock_irqrestore(&rxq->lock, flags);
 426 }
 427
 428 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 429 {
 430         u32 rb_size;
 431         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 432         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
 433
 434         if (!priv->cfg->use_isr_legacy)
 435                 rb_timeout = RX_RB_TIMEOUT;
 436
 437         if (priv->cfg->mod_params->amsdu_size_8K)
 438                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 439         else
 440                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 441
 442         /* Stop Rx DMA */
 443         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 444
 445         /* Reset driver's Rx queue write index */
 446         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 447
 448         /* Tell device where to find RBD circular buffer in DRAM */
 449         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 450                            (u32)(rxq->dma_addr >> 8));
 451
 452         /* Tell device where in DRAM to update its Rx status */
 453         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 454                            rxq->rb_stts_dma >> 4);
 455
 456         /* Enable Rx DMA
 457          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
 458          *      the credit mechanism in 5000 HW RX FIFO
 459          * Direct rx interrupts to hosts
 460          * Rx buffer size 4 or 8k
 461          * RB timeout 0x10
 462          * 256 RBDs
 463          */
 464         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 465                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 466                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 467                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 468                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
 469                            rb_size|
 470                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 471                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 472
 473         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
 474
 475         return 0;
 476 }
 477
 478 int iwl_rxq_stop(struct iwl_priv *priv)
 479 {
 480
 481         /* stop Rx DMA */
 482         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 483         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 484                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
 485
 486         return 0;
 487 }
 488 EXPORT_SYMBOL(iwl_rxq_stop);
 489
 490 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
 491                                 struct iwl_rx_mem_buffer *rxb)
 492
 493 {
 494         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 495         struct iwl_missed_beacon_notif *missed_beacon;
 496
 497         missed_beacon = &pkt->u.missed_beacon;
 498         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
 499                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
 500                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
 501                     le32_to_cpu(missed_beacon->total_missed_becons),
 502                     le32_to_cpu(missed_beacon->num_recvd_beacons),
 503                     le32_to_cpu(missed_beacon->num_expected_beacons));
 504                 if (!test_bit(STATUS_SCANNING, &priv->status))
 505                         iwl_init_sensitivity(priv);
 506         }
 507 }
 508 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
 509
 510
 511 /* Calculate noise level, based on measurements during network silence just
 512  *   before arriving beacon.  This measurement can be done only if we know
 513  *   exactly when to expect beacons, therefore only when we're associated. */
 514 static void iwl_rx_calc_noise(struct iwl_priv *priv)
 515 {
 516         struct statistics_rx_non_phy *rx_info
 517                                 = &(priv->statistics.rx.general);
 518         int num_active_rx = 0;
 519         int total_silence = 0;
 520         int bcn_silence_a =
 521                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
 522         int bcn_silence_b =
 523                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
 524         int bcn_silence_c =
 525                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
 526
 527         if (bcn_silence_a) {
 528                 total_silence += bcn_silence_a;
 529                 num_active_rx++;
 530         }
 531         if (bcn_silence_b) {
 532                 total_silence += bcn_silence_b;
 533                 num_active_rx++;
 534         }
 535         if (bcn_silence_c) {
 536                 total_silence += bcn_silence_c;
 537                 num_active_rx++;
 538         }
 539
 540         /* Average among active antennas */
 541         if (num_active_rx)
 542                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
 543         else
 544                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 545
 546         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
 547                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
 548                         priv->last_rx_noise);
 549 }
 550
 551 #define REG_RECALIB_PERIOD (60)
 552
 553 void iwl_rx_statistics(struct iwl_priv *priv,
 554                               struct iwl_rx_mem_buffer *rxb)
 555 {
 556         int change;
 557         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 558
 559         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
 560                      (int)sizeof(priv->statistics),
 561                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 562
 563         change = ((priv->statistics.general.temperature !=
 564                    pkt->u.stats.general.temperature) ||
 565                   ((priv->statistics.flag &
 566                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
 567                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
 568
 569         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
 570
 571         set_bit(STATUS_STATISTICS, &priv->status);
 572
 573         /* Reschedule the statistics timer to occur in
 574          * REG_RECALIB_PERIOD seconds to ensure we get a
 575          * thermal update even if the uCode doesn't give
 576          * us one */
 577         mod_timer(&priv->statistics_periodic, jiffies +
 578                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
 579
 580         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
 581             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
 582                 iwl_rx_calc_noise(priv);
 583                 queue_work(priv->workqueue, &priv->run_time_calib_work);
 584         }
 585
 586         iwl_leds_background(priv);
 587
 588         if (priv->cfg->ops->lib->temp_ops.temperature && change)
 589                 priv->cfg->ops->lib->temp_ops.temperature(priv);
 590 }
 591 EXPORT_SYMBOL(iwl_rx_statistics);
 592
 593 #define PERFECT_RSSI (-20) /* dBm */
 594 #define WORST_RSSI (-95)   /* dBm */
 595 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
 596
 597 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
 598  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
 599  *   about formulas used below. */
 600 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
 601 {
 602         int sig_qual;
 603         int degradation = PERFECT_RSSI - rssi_dbm;
 604
 605         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
 606          * as indicator; formula is (signal dbm - noise dbm).
 607          * SNR at or above 40 is a great signal (100%).
 608          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
 609          * Weakest usable signal is usually 10 - 15 dB SNR. */
 610         if (noise_dbm) {
 611                 if (rssi_dbm - noise_dbm >= 40)
 612                         return 100;
 613                 else if (rssi_dbm < noise_dbm)
 614                         return 0;
 615                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
 616
 617         /* Else use just the signal level.
 618          * This formula is a least squares fit of data points collected and
 619          *   compared with a reference system that had a percentage (%) display
 620          *   for signal quality. */
 621         } else
 622                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
 623                             (15 * RSSI_RANGE + 62 * degradation)) /
 624                            (RSSI_RANGE * RSSI_RANGE);
 625
 626         if (sig_qual > 100)
 627                 sig_qual = 100;
 628         else if (sig_qual < 1)
 629                 sig_qual = 0;
 630
 631         return sig_qual;
 632 }
 633
 634 /* Calc max signal level (dBm) among 3 possible receivers */
 635 static inline int iwl_calc_rssi(struct iwl_priv *priv,
 636                                 struct iwl_rx_phy_res *rx_resp)
 637 {
 638         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
 639 }
 640
 641 #ifdef CONFIG_IWLWIFI_DEBUG
 642 /**
 643  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
 644  *
 645  * You may hack this function to show different aspects of received frames,
 646  * including selective frame dumps.
 647  * group100 parameter selects whether to show 1 out of 100 good data frames.
 648  *    All beacon and probe response frames are printed.
 649  */
 650 static void iwl_dbg_report_frame(struct iwl_priv *priv,
 651                       struct iwl_rx_phy_res *phy_res, u16 length,
 652                       struct ieee80211_hdr *header, int group100)
 653 {
 654         u32 to_us;
 655         u32 print_summary = 0;
 656         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 657         u32 hundred = 0;
 658         u32 dataframe = 0;
 659         __le16 fc;
 660         u16 seq_ctl;
 661         u16 channel;
 662         u16 phy_flags;
 663         u32 rate_n_flags;
 664         u32 tsf_low;
 665         int rssi;
 666
 667         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
 668                 return;
 669
 670         /* MAC header */
 671         fc = header->frame_control;
 672         seq_ctl = le16_to_cpu(header->seq_ctrl);
 673
 674         /* metadata */
 675         channel = le16_to_cpu(phy_res->channel);
 676         phy_flags = le16_to_cpu(phy_res->phy_flags);
 677         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 678
 679         /* signal statistics */
 680         rssi = iwl_calc_rssi(priv, phy_res);
 681         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
 682
 683         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 684
 685         /* if data frame is to us and all is good,
 686          *   (optionally) print summary for only 1 out of every 100 */
 687         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 688             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 689                 dataframe = 1;
 690                 if (!group100)
 691                         print_summary = 1;      /* print each frame */
 692                 else if (priv->framecnt_to_us < 100) {
 693                         priv->framecnt_to_us++;
 694                         print_summary = 0;
 695                 } else {
 696                         priv->framecnt_to_us = 0;
 697                         print_summary = 1;
 698                         hundred = 1;
 699                 }
 700         } else {
 701                 /* print summary for all other frames */
 702                 print_summary = 1;
 703         }
 704
 705         if (print_summary) {
 706                 char *title;
 707                 int rate_idx;
 708                 u32 bitrate;
 709
 710                 if (hundred)
 711                         title = "100Frames";
 712                 else if (ieee80211_has_retry(fc))
 713                         title = "Retry";
 714                 else if (ieee80211_is_assoc_resp(fc))
 715                         title = "AscRsp";
 716                 else if (ieee80211_is_reassoc_resp(fc))
 717                         title = "RasRsp";
 718                 else if (ieee80211_is_probe_resp(fc)) {
 719                         title = "PrbRsp";
 720                         print_dump = 1; /* dump frame contents */
 721                 } else if (ieee80211_is_beacon(fc)) {
 722                         title = "Beacon";
 723                         print_dump = 1; /* dump frame contents */
 724                 } else if (ieee80211_is_atim(fc))
 725                         title = "ATIM";
 726                 else if (ieee80211_is_auth(fc))
 727                         title = "Auth";
 728                 else if (ieee80211_is_deauth(fc))
 729                         title = "DeAuth";
 730                 else if (ieee80211_is_disassoc(fc))
 731                         title = "DisAssoc";
 732                 else
 733                         title = "Frame";
 734
 735                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
 736                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
 737                         bitrate = 0;
 738                         WARN_ON_ONCE(1);
 739                 } else {
 740                         bitrate = iwl_rates[rate_idx].ieee / 2;
 741                 }
 742
 743                 /* print frame summary.
 744                  * MAC addresses show just the last byte (for brevity),
 745                  *    but you can hack it to show more, if you'd like to. */
 746                 if (dataframe)
 747                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
 748                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 749                                      title, le16_to_cpu(fc), header->addr1[5],
 750                                      length, rssi, channel, bitrate);
 751                 else {
 752                         /* src/dst addresses assume managed mode */
 753                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
 754                                      "len=%u, rssi=%d, tim=%lu usec, "
 755                                      "phy=0x%02x, chnl=%d\n",
 756                                      title, le16_to_cpu(fc), header->addr1[5],
 757                                      header->addr3[5], length, rssi,
 758                                      tsf_low - priv->scan_start_tsf,
 759                                      phy_flags, channel);
 760                 }
 761         }
 762         if (print_dump)
 763                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
 764 }
 765 #endif
 766
 767 /*
 768  * returns non-zero if packet should be dropped
 769  */
 770 int iwl_set_decrypted_flag(struct iwl_priv *priv,
 771                            struct ieee80211_hdr *hdr,
 772                            u32 decrypt_res,
 773                            struct ieee80211_rx_status *stats)
 774 {
 775         u16 fc = le16_to_cpu(hdr->frame_control);
 776
 777         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
 778                 return 0;
 779
 780         if (!(fc & IEEE80211_FCTL_PROTECTED))
 781                 return 0;
 782
 783         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
 784         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
 785         case RX_RES_STATUS_SEC_TYPE_TKIP:
 786                 /* The uCode has got a bad phase 1 Key, pushes the packet.
 787                  * Decryption will be done in SW. */
 788                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 789                     RX_RES_STATUS_BAD_KEY_TTAK)
 790                         break;
 791
 792         case RX_RES_STATUS_SEC_TYPE_WEP:
 793                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 794                     RX_RES_STATUS_BAD_ICV_MIC) {
 795                         /* bad ICV, the packet is destroyed since the
 796                          * decryption is inplace, drop it */
 797                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
 798                         return -1;
 799                 }
 800         case RX_RES_STATUS_SEC_TYPE_CCMP:
 801                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 802                     RX_RES_STATUS_DECRYPT_OK) {
 803                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
 804                         stats->flag |= RX_FLAG_DECRYPTED;
 805                 }
 806                 break;
 807
 808         default:
 809                 break;
 810         }
 811         return 0;
 812 }
 813 EXPORT_SYMBOL(iwl_set_decrypted_flag);
 814
 815 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 816 {
 817         u32 decrypt_out = 0;
 818
 819         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 820                                         RX_RES_STATUS_STATION_FOUND)
 821                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 822                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 823
 824         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 825
 826         /* packet was not encrypted */
 827         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 828                                         RX_RES_STATUS_SEC_TYPE_NONE)
 829                 return decrypt_out;
 830
 831         /* packet was encrypted with unknown alg */
 832         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 833                                         RX_RES_STATUS_SEC_TYPE_ERR)
 834                 return decrypt_out;
 835
 836         /* decryption was not done in HW */
 837         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 838                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 839                 return decrypt_out;
 840
 841         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 842
 843         case RX_RES_STATUS_SEC_TYPE_CCMP:
 844                 /* alg is CCM: check MIC only */
 845                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 846                         /* Bad MIC */
 847                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 848                 else
 849                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 850
 851                 break;
 852
 853         case RX_RES_STATUS_SEC_TYPE_TKIP:
 854                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 855                         /* Bad TTAK */
 856                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 857                         break;
 858                 }
 859                 /* fall through if TTAK OK */
 860         default:
 861                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 862                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 863                 else
 864                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 865                 break;
 866         };
 867
 868         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
 869                                         decrypt_in, decrypt_out);
 870
 871         return decrypt_out;
 872 }
 873
 874 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
 875                                         struct ieee80211_hdr *hdr,
 876                                         u16 len,
 877                                         u32 ampdu_status,
 878                                         struct iwl_rx_mem_buffer *rxb,
 879                                         struct ieee80211_rx_status *stats)
 880 {
 881         /* We only process data packets if the interface is open */
 882         if (unlikely(!priv->is_open)) {
 883                 IWL_DEBUG_DROP_LIMIT(priv,
 884                     "Dropping packet while interface is not open.\n");
 885                 return;
 886         }
 887
 888         /* In case of HW accelerated crypto and bad decryption, drop */
 889         if (!priv->cfg->mod_params->sw_crypto &&
 890             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 891                 return;
 892
 893         /* Resize SKB from mac header to end of packet */
 894         skb_reserve(rxb->skb, (void *)hdr - (void *)rxb->skb->data);
 895         skb_put(rxb->skb, len);
 896
 897         iwl_update_stats(priv, false, hdr->frame_control, len);
 898         memcpy(IEEE80211_SKB_RXCB(rxb->skb), stats, sizeof(*stats));
 899         ieee80211_rx_irqsafe(priv->hw, rxb->skb);
 900         priv->alloc_rxb_skb--;
 901         rxb->skb = NULL;
 902 }
 903
 904 /* This is necessary only for a number of statistics, see the caller. */
 905 static int iwl_is_network_packet(struct iwl_priv *priv,
 906                 struct ieee80211_hdr *header)
 907 {
 908         /* Filter incoming packets to determine if they are targeted toward
 909          * this network, discarding packets coming from ourselves */
 910         switch (priv->iw_mode) {
 911         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 912                 /* packets to our IBSS update information */
 913                 return !compare_ether_addr(header->addr3, priv->bssid);
 914         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 915                 /* packets to our IBSS update information */
 916                 return !compare_ether_addr(header->addr2, priv->bssid);
 917         default:
 918                 return 1;
 919         }
 920 }
 921
 922 /* Called for REPLY_RX (legacy ABG frames), or
 923  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
 924 void iwl_rx_reply_rx(struct iwl_priv *priv,
 925                                 struct iwl_rx_mem_buffer *rxb)
 926 {
 927         struct ieee80211_hdr *header;
 928         struct ieee80211_rx_status rx_status;
 929         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 930         struct iwl_rx_phy_res *phy_res;
 931         __le32 rx_pkt_status;
 932         struct iwl4965_rx_mpdu_res_start *amsdu;
 933         u32 len;
 934         u32 ampdu_status;
 935         u16 fc;
 936         u32 rate_n_flags;
 937
 938         /**
 939          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
 940          *      REPLY_RX: physical layer info is in this buffer
 941          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
 942          *              command and cached in priv->last_phy_res
 943          *
 944          * Here we set up local variables depending on which command is
 945          * received.
 946          */
 947         if (pkt->hdr.cmd == REPLY_RX) {
 948                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
 949                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
 950                                 + phy_res->cfg_phy_cnt);
 951
 952                 len = le16_to_cpu(phy_res->byte_count);
 953                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
 954                                 phy_res->cfg_phy_cnt + len);
 955                 ampdu_status = le32_to_cpu(rx_pkt_status);
 956         } else {
 957                 if (!priv->last_phy_res[0]) {
 958                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
 959                         return;
 960                 }
 961                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
 962                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
 963                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
 964                 len = le16_to_cpu(amsdu->byte_count);
 965                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
 966                 ampdu_status = iwl_translate_rx_status(priv,
 967                                 le32_to_cpu(rx_pkt_status));
 968         }
 969
 970         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
 971                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
 972                                 phy_res->cfg_phy_cnt);
 973                 return;
 974         }
 975
 976         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
 977             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 978                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
 979                                 le32_to_cpu(rx_pkt_status));
 980                 return;
 981         }
 982
 983         /* This will be used in several places later */
 984         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 985
 986         /* rx_status carries information about the packet to mac80211 */
 987         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
 988         rx_status.freq =
 989                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
 990         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 991                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 992         rx_status.rate_idx =
 993                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
 994         rx_status.flag = 0;
 995
 996         /* TSF isn't reliable. In order to allow smooth user experience,
 997          * this W/A doesn't propagate it to the mac80211 */
 998         /*rx_status.flag |= RX_FLAG_TSFT;*/
 999
1000         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1001
1002         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1003         rx_status.signal = iwl_calc_rssi(priv, phy_res);
1004
1005         /* Meaningful noise values are available only from beacon statistics,
1006          *   which are gathered only when associated, and indicate noise
1007          *   only for the associated network channel ...
1008          * Ignore these noise values while scanning (other channels) */
1009         if (iwl_is_associated(priv) &&
1010             !test_bit(STATUS_SCANNING, &priv->status)) {
1011                 rx_status.noise = priv->last_rx_noise;
1012                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1013                                                          rx_status.noise);
1014         } else {
1015                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1016                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1017         }
1018
1019         /* Reset beacon noise level if not associated. */
1020         if (!iwl_is_associated(priv))
1021                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1022
1023 #ifdef CONFIG_IWLWIFI_DEBUG
1024         /* Set "1" to report good data frames in groups of 100 */
1025         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1026                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1027 #endif
1028         iwl_dbg_log_rx_data_frame(priv, len, header);
1029         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1030                 rx_status.signal, rx_status.noise, rx_status.qual,
1031                 (unsigned long long)rx_status.mactime);
1032
1033         /*
1034          * "antenna number"
1035          *
1036          * It seems that the antenna field in the phy flags value
1037          * is actually a bit field. This is undefined by radiotap,
1038          * it wants an actual antenna number but I always get "7"
1039          * for most legacy frames I receive indicating that the
1040          * same frame was received on all three RX chains.
1041          *
1042          * I think this field should be removed in favor of a
1043          * new 802.11n radiotap field "RX chains" that is defined
1044          * as a bitmask.
1045          */
1046         rx_status.antenna =
1047                 le16_to_cpu(phy_res->phy_flags & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1048                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1049
1050         /* set the preamble flag if appropriate */
1051         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1052                 rx_status.flag |= RX_FLAG_SHORTPRE;
1053
1054         /* Set up the HT phy flags */
1055         if (rate_n_flags & RATE_MCS_HT_MSK)
1056                 rx_status.flag |= RX_FLAG_HT;
1057         if (rate_n_flags & RATE_MCS_HT40_MSK)
1058                 rx_status.flag |= RX_FLAG_40MHZ;
1059         if (rate_n_flags & RATE_MCS_SGI_MSK)
1060                 rx_status.flag |= RX_FLAG_SHORT_GI;
1061
1062         if (iwl_is_network_packet(priv, header)) {
1063                 priv->last_rx_rssi = rx_status.signal;
1064                 priv->last_beacon_time =  priv->ucode_beacon_time;
1065                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1066         }
1067
1068         fc = le16_to_cpu(header->frame_control);
1069         switch (fc & IEEE80211_FCTL_FTYPE) {
1070         case IEEE80211_FTYPE_MGMT:
1071         case IEEE80211_FTYPE_DATA:
1072                 if (priv->iw_mode == NL80211_IFTYPE_AP)
1073                         iwl_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
1074                                                 header->addr2);
1075                 /* fall through */
1076         default:
1077                 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1078                                 rxb, &rx_status);
1079                 break;
1080
1081         }
1082 }
1083 EXPORT_SYMBOL(iwl_rx_reply_rx);
1084
1085 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1086  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1087 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1088                                     struct iwl_rx_mem_buffer *rxb)
1089 {
1090         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1091         priv->last_phy_res[0] = 1;
1092         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1093                sizeof(struct iwl_rx_phy_res));
1094 }
1095 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);