Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
[pandora-kernel.git] / drivers / net / wireless / iwlwifi / iwl-pci.c
1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of version 2 of the GNU General Public License as
12  * published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22  * USA
23  *
24  * The full GNU General Public License is included in this distribution
25  * in the file called LICENSE.GPL.
26  *
27  * Contact Information:
28  *  Intel Linux Wireless <ilw@linux.intel.com>
29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30  *
31  * BSD LICENSE
32  *
33  * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34  * All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  *
40  *  * Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  *  * Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in
44  *    the documentation and/or other materials provided with the
45  *    distribution.
46  *  * Neither the name Intel Corporation nor the names of its
47  *    contributors may be used to endorse or promote products derived
48  *    from this software without specific prior written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  *
62  *****************************************************************************/
63 #include <linux/pci.h>
64 #include <linux/pci-aspm.h>
65
66 #include "iwl-bus.h"
67 #include "iwl-io.h"
68 #include "iwl-shared.h"
69 #include "iwl-trans.h"
70 #include "iwl-csr.h"
71 #include "iwl-cfg.h"
72
73 /* PCI registers */
74 #define PCI_CFG_RETRY_TIMEOUT   0x041
75 #define PCI_CFG_LINK_CTRL_VAL_L0S_EN    0x01
76 #define PCI_CFG_LINK_CTRL_VAL_L1_EN     0x02
77
78 struct iwl_pci_bus {
79         /* basic pci-network driver stuff */
80         struct pci_dev *pci_dev;
81
82         /* pci hardware address support */
83         void __iomem *hw_base;
84 };
85
86 #define IWL_BUS_GET_PCI_BUS(_iwl_bus) \
87                         ((struct iwl_pci_bus *) ((_iwl_bus)->bus_specific))
88
89 #define IWL_BUS_GET_PCI_DEV(_iwl_bus) \
90                         ((IWL_BUS_GET_PCI_BUS(_iwl_bus))->pci_dev)
91
92 static u16 iwl_pciexp_link_ctrl(struct iwl_bus *bus)
93 {
94         int pos;
95         u16 pci_lnk_ctl;
96
97         struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
98
99         pos = pci_pcie_cap(pci_dev);
100         pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
101         return pci_lnk_ctl;
102 }
103
104 static bool iwl_pci_is_pm_supported(struct iwl_bus *bus)
105 {
106         u16 lctl = iwl_pciexp_link_ctrl(bus);
107
108         return !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
109 }
110
111 static void iwl_pci_apm_config(struct iwl_bus *bus)
112 {
113         /*
114          * HW bug W/A for instability in PCIe bus L0S->L1 transition.
115          * Check if BIOS (or OS) enabled L1-ASPM on this device.
116          * If so (likely), disable L0S, so device moves directly L0->L1;
117          *    costs negligible amount of power savings.
118          * If not (unlikely), enable L0S, so there is at least some
119          *    power savings, even without L1.
120          */
121         u16 lctl = iwl_pciexp_link_ctrl(bus);
122
123         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
124                                 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
125                 /* L1-ASPM enabled; disable(!) L0S */
126                 iwl_set_bit(bus, CSR_GIO_REG,
127                                 CSR_GIO_REG_VAL_L0S_ENABLED);
128                 dev_printk(KERN_INFO, bus->dev, "L1 Enabled; Disabling L0S\n");
129         } else {
130                 /* L1-ASPM disabled; enable(!) L0S */
131                 iwl_clear_bit(bus, CSR_GIO_REG,
132                                 CSR_GIO_REG_VAL_L0S_ENABLED);
133                 dev_printk(KERN_INFO, bus->dev, "L1 Disabled; Enabling L0S\n");
134         }
135 }
136
137 static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
138                               int buf_len)
139 {
140         struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
141
142         snprintf(buf, buf_len, "PCI ID: 0x%04X:0x%04X", pci_dev->device,
143                  pci_dev->subsystem_device);
144 }
145
146 static void iwl_pci_write8(struct iwl_bus *bus, u32 ofs, u8 val)
147 {
148         iowrite8(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
149 }
150
151 static void iwl_pci_write32(struct iwl_bus *bus, u32 ofs, u32 val)
152 {
153         iowrite32(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
154 }
155
156 static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
157 {
158         u32 val = ioread32(IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
159         return val;
160 }
161
162 static const struct iwl_bus_ops bus_ops_pci = {
163         .get_pm_support = iwl_pci_is_pm_supported,
164         .apm_config = iwl_pci_apm_config,
165         .get_hw_id = iwl_pci_get_hw_id,
166         .write8 = iwl_pci_write8,
167         .write32 = iwl_pci_write32,
168         .read32 = iwl_pci_read32,
169 };
170
171 #define IWL_PCI_DEVICE(dev, subdev, cfg) \
172         .vendor = PCI_VENDOR_ID_INTEL,  .device = (dev), \
173         .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
174         .driver_data = (kernel_ulong_t)&(cfg)
175
176 /* Hardware specific file defines the PCI IDs table for that hardware module */
177 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
178         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
179         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
180         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
181         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
182         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
183         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
184         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
185         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
186         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
187         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
188         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
189         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
190         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
191         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
192         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
193         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
194         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
195         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
196         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
197         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
198         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
199         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
200         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
201         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
202
203 /* 5300 Series WiFi */
204         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
205         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
206         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
207         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
208         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
209         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
210         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
211         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
212         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
213         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
214         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
215         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
216
217 /* 5350 Series WiFi/WiMax */
218         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
219         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
220         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
221
222 /* 5150 Series Wifi/WiMax */
223         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
224         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
225         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
226         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
227         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
228         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
229
230         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
231         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
232         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
233         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
234
235 /* 6x00 Series */
236         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
237         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
238         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
239         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
240         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
241         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
242         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
243         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
244         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
245         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
246
247 /* 6x05 Series */
248         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
249         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
250         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
251         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
252         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
253         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
254         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
255         {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)},
256         {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)},
257         {IWL_PCI_DEVICE(0x0082, 0x1341, iwl6005_2agn_d_cfg)},
258
259 /* 6x30 Series */
260         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
261         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
262         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
263         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
264         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
265         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
266         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
267         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
268         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
269         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
270         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
271         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
272         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
273         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
274         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
275         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
276
277 /* 6x50 WiFi/WiMax Series */
278         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
279         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
280         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
281         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
282         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
283         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
284
285 /* 6150 WiFi/WiMax Series */
286         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
287         {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
288         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
289         {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
290         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
291         {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
292
293 /* 1000 Series WiFi */
294         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
295         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
296         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
297         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
298         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
299         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
300         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
301         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
302         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
303         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
304         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
305         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
306
307 /* 100 Series WiFi */
308         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
309         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
310         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
311         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
312         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
313         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
314
315 /* 130 Series WiFi */
316         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
317         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
318         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
319         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
320         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
321         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
322
323 /* 2x00 Series */
324         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
325         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
326         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
327         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
328         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
329         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
330         {IWL_PCI_DEVICE(0x0890, 0x4822, iwl2000_2bgn_d_cfg)},
331
332 /* 2x30 Series */
333         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
334         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
335         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
336         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
337         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
338         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
339
340 /* 6x35 Series */
341         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
342         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
343         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
344         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
345         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
346         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
347         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
348         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
349         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
350
351 /* 105 Series */
352         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
353         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
354         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
355         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
356         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
357         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
358         {IWL_PCI_DEVICE(0x0894, 0x0822, iwl105_bgn_d_cfg)},
359
360 /* 135 Series */
361         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
362         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
363         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
364         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
365         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
366         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
367
368         {0}
369 };
370 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
371
372 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
373 {
374         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
375         struct iwl_bus *bus;
376         struct iwl_pci_bus *pci_bus;
377         u16 pci_cmd;
378         int err;
379
380         bus = kzalloc(sizeof(*bus) + sizeof(*pci_bus), GFP_KERNEL);
381         if (!bus) {
382                 dev_printk(KERN_ERR, &pdev->dev,
383                            "Couldn't allocate iwl_pci_bus");
384                 err = -ENOMEM;
385                 goto out_no_pci;
386         }
387
388         pci_bus = IWL_BUS_GET_PCI_BUS(bus);
389         pci_bus->pci_dev = pdev;
390
391         pci_set_drvdata(pdev, bus);
392
393         /* W/A - seems to solve weird behavior. We need to remove this if we
394          * don't want to stay in L1 all the time. This wastes a lot of power */
395         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
396                                 PCIE_LINK_STATE_CLKPM);
397
398         if (pci_enable_device(pdev)) {
399                 err = -ENODEV;
400                 goto out_no_pci;
401         }
402
403         pci_set_master(pdev);
404
405         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
406         if (!err)
407                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
408         if (err) {
409                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
410                 if (!err)
411                         err = pci_set_consistent_dma_mask(pdev,
412                                                         DMA_BIT_MASK(32));
413                 /* both attempts failed: */
414                 if (err) {
415                         dev_printk(KERN_ERR, bus->dev,
416                                    "No suitable DMA available.\n");
417                         goto out_pci_disable_device;
418                 }
419         }
420
421         err = pci_request_regions(pdev, DRV_NAME);
422         if (err) {
423                 dev_printk(KERN_ERR, bus->dev, "pci_request_regions failed");
424                 goto out_pci_disable_device;
425         }
426
427         pci_bus->hw_base = pci_iomap(pdev, 0, 0);
428         if (!pci_bus->hw_base) {
429                 dev_printk(KERN_ERR, bus->dev, "pci_iomap failed");
430                 err = -ENODEV;
431                 goto out_pci_release_regions;
432         }
433
434         dev_printk(KERN_INFO, &pdev->dev,
435                 "pci_resource_len = 0x%08llx\n",
436                 (unsigned long long) pci_resource_len(pdev, 0));
437         dev_printk(KERN_INFO, &pdev->dev,
438                 "pci_resource_base = %p\n", pci_bus->hw_base);
439
440         dev_printk(KERN_INFO, &pdev->dev,
441                 "HW Revision ID = 0x%X\n", pdev->revision);
442
443         /* We disable the RETRY_TIMEOUT register (0x41) to keep
444          * PCI Tx retries from interfering with C3 CPU state */
445         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
446
447         err = pci_enable_msi(pdev);
448         if (err) {
449                 dev_printk(KERN_ERR, &pdev->dev, "pci_enable_msi failed");
450                 goto out_iounmap;
451         }
452
453         /* TODO: Move this away, not needed if not MSI */
454         /* enable rfkill interrupt: hw bug w/a */
455         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
456         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
457                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
458                 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
459         }
460
461         bus->dev = &pdev->dev;
462         bus->irq = pdev->irq;
463         bus->ops = &bus_ops_pci;
464
465         err = iwl_probe(bus, &trans_ops_pcie, cfg);
466         if (err)
467                 goto out_disable_msi;
468         return 0;
469
470 out_disable_msi:
471         pci_disable_msi(pdev);
472 out_iounmap:
473         pci_iounmap(pdev, pci_bus->hw_base);
474 out_pci_release_regions:
475         pci_set_drvdata(pdev, NULL);
476         pci_release_regions(pdev);
477 out_pci_disable_device:
478         pci_disable_device(pdev);
479 out_no_pci:
480         kfree(bus);
481         return err;
482 }
483
484 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
485 {
486         struct iwl_bus *bus = pci_get_drvdata(pdev);
487         struct iwl_pci_bus *pci_bus = IWL_BUS_GET_PCI_BUS(bus);
488         struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
489         struct iwl_shared *shrd = bus->shrd;
490
491         iwl_remove(shrd->priv);
492
493         pci_disable_msi(pci_dev);
494         pci_iounmap(pci_dev, pci_bus->hw_base);
495         pci_release_regions(pci_dev);
496         pci_disable_device(pci_dev);
497         pci_set_drvdata(pci_dev, NULL);
498
499         kfree(bus);
500 }
501
502 #ifdef CONFIG_PM_SLEEP
503
504 static int iwl_pci_suspend(struct device *device)
505 {
506         struct pci_dev *pdev = to_pci_dev(device);
507         struct iwl_bus *bus = pci_get_drvdata(pdev);
508         struct iwl_shared *shrd = bus->shrd;
509
510         /* Before you put code here, think about WoWLAN. You cannot check here
511          * whether WoWLAN is enabled or not, and your code will run even if
512          * WoWLAN is enabled - don't kill the NIC, someone may need it in Sx.
513          */
514
515         return iwl_trans_suspend(shrd->trans);
516 }
517
518 static int iwl_pci_resume(struct device *device)
519 {
520         struct pci_dev *pdev = to_pci_dev(device);
521         struct iwl_bus *bus = pci_get_drvdata(pdev);
522         struct iwl_shared *shrd = bus->shrd;
523
524         /* Before you put code here, think about WoWLAN. You cannot check here
525          * whether WoWLAN is enabled or not, and your code will run even if
526          * WoWLAN is enabled - the NIC may be alive.
527          */
528
529         /*
530          * We disable the RETRY_TIMEOUT register (0x41) to keep
531          * PCI Tx retries from interfering with C3 CPU state.
532          */
533         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
534
535         return iwl_trans_resume(shrd->trans);
536 }
537
538 static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume);
539
540 #define IWL_PM_OPS      (&iwl_dev_pm_ops)
541
542 #else
543
544 #define IWL_PM_OPS      NULL
545
546 #endif
547
548 static struct pci_driver iwl_pci_driver = {
549         .name = DRV_NAME,
550         .id_table = iwl_hw_card_ids,
551         .probe = iwl_pci_probe,
552         .remove = __devexit_p(iwl_pci_remove),
553         .driver.pm = IWL_PM_OPS,
554 };
555
556 int __must_check iwl_pci_register_driver(void)
557 {
558         int ret;
559         ret = pci_register_driver(&iwl_pci_driver);
560         if (ret)
561                 pr_err("Unable to initialize PCI module\n");
562
563         return ret;
564 }
565
566 void iwl_pci_unregister_driver(void)
567 {
568         pci_unregister_driver(&iwl_pci_driver);
569 }